semiconductor devices and circuit lab manual
DESCRIPTION
3rd semester of kurukshetra university SDC lab manualTRANSCRIPT
-
5/26/2018 semiconductor devices and circuit lab manual
1/46
PREPARED BY: Deepak Dhadwal APPROVED BY: HOD(ECE)
M.M.UNIVERSITY, SADOPUR (AMBALA) LABORATORY MANUAL
PRACTICAL EXPERIMENT INSTRUCTION SHEET
AIM: To measure and study P-N junction diode V- I characteristics.
EXPERIMENT NO. : ECE-209-01 ISSUE DATE:
DEPTT.:ELECTRONICS AND COMMUNICATION ENGINEERING
LABORATORY : SEMESTER: III NO. OF PAGES: 04
Aim: - To measure and study P-N junction diode V- I characteristics.
Apparatus: - Diode Characteristics Kit and connecting leads.
Theory: -
A P-N junction is known as Semiconductor diode or Crystal diode. It is the combination of P-type & N-ty
Semiconductor which offers nearly zero resistance to current on forward biasing & nearly infin
Resistance to the flow of current when in reverse biased.
Forward biasing
When P-type semiconductor is connected to the +ve terminal and N-type to ve terminal of voltage sou
nearly zero resistance is offered to the flow of current.
Reverse biasing
When P-type semiconductor is connected to the ve terminal and N-type to +ve terminal nearly zero curr
flow in this condition.
Fig. 1.1 Forward biased P-N junction Fig. 1.2 Reverse biased P-N junction
-
5/26/2018 semiconductor devices and circuit lab manual
2/46
PREPARED BY: Deepak Dhadwal APPROVED BY: HOD(ECE)
Procedure: -
(1) Connect the circuit as shown in figure.
(2) Switch on the power supply.
(3) Vary the value of input dc supply in steps.
(4) Note down the ammeter & voltmeter readings for each step.
(5) Plot the graph of Voltage Vs Current.
Observations:
Table 1.1 Observation Table.
Fig. 1.3 Forward and Reverse Diode I-V characteristics
-
5/26/2018 semiconductor devices and circuit lab manual
3/46
PREPARED BY: Deepak Dhadwal APPROVED BY: HOD(ECE)
Precautions:
(1)Always connect the voltmeter in parallel & ammeter in series as shown in fig.
(2)Connection should be proper & tight.
(3)Switch ON the supply after completing the circuit.
(4)DC supply should be increased slowly in steps
(5)Reading of voltmeter & Ammeter should be accurate.
Result: -The graph has been plotted between voltage and current.
QUESTION-ANSWER:
Q1. What is extrinsic semiconductor?
ANS. Intrinsic semiconductor conducts a small amount of current. To make it more conductive a small amouof impurity is added in it. Then this semiconductor is called extrinsic semiconductor.
Q2. What is an intrinsic semiconductor?
ANS. Semiconductor in its purest form is called intrinsic semiconductor.
Q3. Which semiconductor is mostly used germanium or silicon?
ANS. Silicon is mostly used because germanium has some free electrons at room temperature where as silico
have no free electrons at room temperature.
Q4. What is n- type semiconductor?
ANS. When a small amount of Pentavalent impurity is added to pure semiconductor which results a la
number of free electrons, this semiconductor is known as n- type semiconductor.
Q5. What is p- type semiconductor?
ANS. When a small amount of trivalent impurity is added to pure semiconductor which results a large num
of holes, this semiconductor is known as p- type semiconductor.
-
5/26/2018 semiconductor devices and circuit lab manual
4/46
PREPARED BY: Deepak Dhadwal APPROVED BY: HOD(ECE)
Q6.What is P-N Junction?
ANS. The P-N junction is control element for semiconductor devices, when a P-type semiconductor is suita
joined to an N-type semiconductor this formation is called P-N junction.
Q7. What do you understand by potential barrier?
ANS.The electric field between donor and acceptor ions is called potential barriers.
Q8. What do you mean by knee voltage?
ANS. The forward voltage at which the current through the diode starts rising abruptly is known as kn
voltage. Its value for germanium is 0.3v and for silicon it is 0.7v.
Q9.What is break down voltage?ANS. The reverse voltage at which p-n junction breaks is known as breakdown voltage.
Q10. Explain peak inverse voltage (PIV)?
ANS. The maximum value of reverse voltage that p-n junction can withstand without getting damaged is cal
peck inverse voltage.
Q11. What are the application areas of diode?
ANS. Diode is mainly used in rectifier circuits, detector and switching circuit.
Q12. What do you mean by forward biased?
ANS. When +ve terminal of battery is connected to P side & -ve terminal to N side of diode.
Q13. What do you mean by reverse biased?
ANS. When +ve terminal of battery is connected to N side & -ve terminal to P side of diode.
Q14. Define max. Power rating?
ANS. Max. Power that can be dissipated at junction without damage to it.
-
5/26/2018 semiconductor devices and circuit lab manual
5/46
PREPARED BY: Deepak Dhadwal APPROVED BY: HOD(ECE)
M.M.UNIVERSITY, SADOPUR (AMBALA) LABORATORY MANUAL
PRACTICAL EXPERIMENT INSTRUCTION SHEET
AIM: To Study Half wave and Full wave Rectifier.
EXPERIMENT NO. : ECE-209-02 ISSUE DATE:
DEPTT.:ELECTRONICS AND COMMUNICATION ENGINEERING
LABORATORY : SEMESTER: III NO. OF PAGES: 06
Aim: -To Study Half wave and Full wave Rectifier.
Apparatus: - Rectifier kit, CRO and connecting leads.
Theory: -
Half wave rectifier:
Rectification is a process of conversion of AC to DC. In half-wave rectifier, only one diode is used . During +ve h
Cycle the diode is forward biased &, it conducts current through the load resistor R .Duringve half cycle diode is reve
biased Hence, no current flow through the circuit. Only +ve half cycle appears across the load, whereas, the ve
Cycle is suppressed.
Full wave rectifier:
In full-wave rectification, When A.C supplied at the input , both the half cycles current flows through the lo
in the same direction. The following two circuits are commonly employed.
Centre-tap full-wave Rectifier:
In this rectifier, two diodes & a center-tap transformer is used. During +ve half cycle the diode D1 is forw
biased & D2 is reverse biased .Output will be obtained across load resistor R .Duringve half cycle diode D
reverse biased &D2 is forward biased. Output will be obtained across load resistor R again & the direction
output is same i.e, DC output is obtained.
Bridge Rectifier:
The ckt. Contains four diodes connected to form a bridge. In this an ordinary
Transformer is used. During +ve half cycle of secondary voltage, diodes D1 & D3 are forward biased & dio
-
5/26/2018 semiconductor devices and circuit lab manual
6/46
PREPARED BY: Deepak Dhadwal APPROVED BY: HOD(ECE)
D2& D4 are reverse biased & vice versa.
Diagrams:
Fig. 2.1 Circuit Diagram of Half Wave Rectifier
Fig. 2.2 Circuit Diagram of Centre-tap full-wave Rectifier
-
5/26/2018 semiconductor devices and circuit lab manual
7/46
PREPARED BY: Deepak Dhadwal APPROVED BY: HOD(ECE)
Fig. 2.3 Circuit Diagram of full-wave Bridge Rectifier
Procedure: -
1. Connect the circuit as shown in figure.2. Supply the input AC signal to the circuit.
3. Output signal is obtained on CRO which shows the DC (pulsating output).
4. Measure voltage on Meter.
5. Draw the wave form.
Wave forms:
Fig. 2.4 Wave form For Half wave Rectifier
-
5/26/2018 semiconductor devices and circuit lab manual
8/46
PREPARED BY: Deepak Dhadwal APPROVED BY: HOD(ECE)
Fig. 2.5 Wave form For Full wave Rectifier
Observation Table: -
S.NO. Measurements Parameter Half Wave Rectifier Full wave Rectifier
1. Vdc
2. RMS Value of Voltage
Vrms
3. Ripple factor=
(Vrms/ Vdc)2--1
4. Input Frequency
5. Output Frequency
6. Peak inverse voltage
Precautions: -
(a)Connection should be proper & tight.
(b)Switch ON the supply after completing the circuit.
(c)Note down the input & output wave accurately.
Result: - The input and output waveforms of full wave rectifier has been drawn.
-
5/26/2018 semiconductor devices and circuit lab manual
9/46
PREPARED BY: Deepak Dhadwal APPROVED BY: HOD(ECE)
QUESTION-ANSWER:
Q1. What is rectifier?
ANS. Rectifier is basically a p-n junction diode which converts alternating current into unidirectional current
Q2. What is need of rectifier?
ANS. Most of the electronics components are operated with dc voltage. Therefore it is necessary to conv
alternating voltage into dc voltage.
Q3.What is the different type of rectifier?
ANS. There are mainly two types of rectifier,
1.Half wave rectifier 2. Full wave rectifier.
Q4.What is half wave rectifier?
ANS. When ac supply is applied at the input of rectifier it will suppress its one half and will give only one h
at output.
Q5. What do you mean by rectifier efficiency?
ANS. The ratio of DC power output to the AC power input is called rectifier efficiency.
Q6. What do you understand by ripple factor?
ANS. Ripple factor is defined as the ratio of the effective value of the AC component of voltage or current
the average value.
Q7. What is the value of form factor in half wave rectifier?
ANS.It is defind as the ratio of rms value to the average value. The value of form factoe in half wave rectifier
1.57.
Q8. What do you mean by full wave rectifier?
-
5/26/2018 semiconductor devices and circuit lab manual
10/46
PREPARED BY: Deepak Dhadwal APPROVED BY: HOD(ECE)
ANS. In this type of circuits more than one diode is used. It enables the circuit to process both cycles of the
supply. During both the cycles, current flow through the load in the same direction.
Q9. What is Centre- tap rectifier?
ANS. In this type of circuit a transformer with the centre tapped secondary is used. Two diodes work togethe
such a way that during the positive half cycle one diode is forward biased and the other is reverse biased. F
negative half cycle the second diode will be forward biased and 1stdiode is reverse biased. Hence we can
output in the both the helf cycle.
Q10.What is step- down transformers?
ANS. In step down transformer the number of turns in primary winding is greater than the number of turns
secondary winding.
Q11. What is the value of PIV in case of half wave rectifier?
ANS. PIV= Vm
Q12. What is the value of PIV in case of Centre- tap wave rectifier?
ANS. PIV= 2Vm
-
5/26/2018 semiconductor devices and circuit lab manual
11/46
PREPARED BY: Deepak Dhadwal APPROVED BY: HOD(ECE)
M.M.UNIVERSITY, SADOPUR (AMBALA) LABORATORY MANUAL
PRACTICAL EXPERIMENT INSTRUCTION SHEET
AIM: To study diode as clipper and clamper.
EXPERIMENT NO. : ECE-209-03 ISSUE DATE:
DEPTT.:ELECTRONICS AND COMMUNICATION ENGINEERING
LABORATORY : SEMESTER: III NO. OF PAGES: 04
Aim: - To study diode as clipper and clamper.
Apparatus: - Function Generator, Oscilloscope, DC Power Supply, Breadboard, Diodes, Capacitors a
Resistor.
Theory: - This experiment studies the applications of the diode in the clipping & clamping operations.
1. Clipping Circuits: -
Figure (l) shows a biased positive clipper, for the diode to turn in the input voltage must be greater +V, w
Vmis greater than +V , the diode acts like a closed switch (ideally) & the voltage across the output equals +V
this output stays at +V as long as the input voltage exceeds +V. When the input voltage is less than +V ,
diode opens and the circuit acts as a voltage divider, as usual , RLshould be much greater than R, in this wa
most of input voltage appears across the output. The output waveforms of Figure (1) summarize the circ
action. The biased clipper removes all signals above the (+V) level. It is required to remove a portion
negative half cycle of the input voltage, the circuit is improved as shown in fig (2). Such a circuit as knownbiased negative clipper.
2. Clamping Circuits: -
A circuit that shifts either positive or negative peak or the signal at the desired DC level is known as clampi
circuit.
(1)Positive clamper: - A circuit that shifts the signal the positive side in such a way that the negative pe
of the signal falls on the zero level is a called a positive clamper. A positive clamper as shown in fig (
It contains a diode D and a capacitor C. the output is taken across the load resistor RL
-
5/26/2018 semiconductor devices and circuit lab manual
12/46
PREPARED BY: Deepak Dhadwal APPROVED BY: HOD(ECE)
Fig. 3.1 Positive Clipping
Fig. 3.2 Negative Clipping
Fig. 3.3 Positive Clamping
-
5/26/2018 semiconductor devices and circuit lab manual
13/46
PREPARED BY: Deepak Dhadwal APPROVED BY: HOD(ECE)
Fig. 3.4 Negative Clamping
Procedure:
Clipping Circuit:
1. Connect the circuit shown in Figure (3).
2. Ensure that the variable DC is at minimum and the source is at 10VP.P.
3. Observe and Sketch the input and output waveforms.
4. Increase the variable DC voltage to 4V, and notice to what voltage are the positive peaks chopped off, ske
the waveforms.
Clamping Circuit:
1. Connect the circuit shown in Figure (4).
2. Ensure the variable DC is at minimum.
3. Set the sine wave generator frequency to 1 KHz and its output amplitude to 10VP.P
4. Observe and sketch the input waveform with the variable DC at minimum, Sketch the output waveform.
Precautions: -
(a)Connection should be proper & tight.
(b)Switch ON the supply after completing the ckt.
(c)Note down the input & output wave accurately.
Result: - Output voltage V0 =__________ during positive half cycle
Output voltage V0 =__________ during negative half cycle
-
5/26/2018 semiconductor devices and circuit lab manual
14/46
PREPARED BY: Deepak Dhadwal APPROVED BY: HOD(ECE)
QUESTION-ANSWER:
Q1.What is non-linear wave shaping?ANS. Non linear wave shaping is the process, on applying any wave at input of a non-linear device the shape
the output wave varies non-linearly with the input wave.
Q2. Which are the circuits for nonlinear wave shaping?ANS. Clipping circuit & Clamping circuits are the circuits for non-linear wave shaping.
Q3. According to non-linear devices how clippers can be classified?
ANS. According to non-linear devices clippers can be classified as diodes clippers & transistor clippers.
Q4. According to configuration used classify clippers?ANS. According to configuration used classify clippers can be classified as
a)Series diode clipper. b) Parallel or shunt diode clipper. c) Combination clippers.
Q5. Classify clippers according to level of clippers?
ANS. According to level of clipping the clippers may be a) Positive clippers. b) Negative clippers c) Biaclippers d) Combinational clippers.
Q6. What is positive clipper circuit?
ANS. Positive clipper is one which removes the positive half cycles of the input voltage
Q7. What is negative clipper circuit?
ANS. Negative clipper is one which removes the negative half cycles of the input voltage
Q8. What is clamping?ANS. A circuit that places either the positive or negative peak of a signal at a desired level is known
Clamping circuit.
Q9. How many types of clampers are there?
ANS. There are 2 types of clampers a) Positive clamper. b)Negative clamper
Q10. What is clipping circuit ?ANS. A wave-shaping circuit which controls the output waveform by removing or clipping a portion of
applied wave is known as clipping circuit.
-
5/26/2018 semiconductor devices and circuit lab manual
15/46
PREPARED BY: Deepak Dhadwal APPROVED BY: HOD(ECE)
M.M.UNIVERSITY, SADOPUR (AMBALA) LABORATORY MANUAL
PRACTICAL EXPERIMENT INSTRUCTION SHEET
AIM: To study common emitter (CE) amplifier its current & power gains and input, output
impedances.
EXPERIMENT NO. : ECE-209-04 ISSUE DATE:
DEPTT.:ELECTRONICS AND COMMUNICATION ENGINEERING
LABORATORY : SEMESTER: III NO. OF PAGES: 05
Aim: -To study common emitter (CE) amplifier its current & power gains and input, outp
impedances.
Apparatus required: - NV6542 trainer kit, Digital Multimeter (DMM), Multimeter probes,2mm Patch chor
mains cord.
Theory: -
The common-emitter (CE) amplifier provides an output voltage that is 180 out of phase with the input volta
This voltage phase shift can be explained as follows:
1. The input voltage and current are in phase.
2. The input and output currents are in phase. Therefore, output current is in phase with the input voltage
3. An increase in output current results in a decrease in output voltage, and vice versa (as given by).
Therefore, output voltage is 180 out of phase with output current. Since the output current is in phase with input voltage, the input and output voltages are 180 out of phase.
Various parameters associated with BJT CE amplifier are:-
1. Voltage Gain (Av):-
Voltage gain is the factor by which ac signal voltage increases from the amplifier input to the amplifier outp
Stated mathematically,
Since IE IC, the voltage gain of a CE amplifier also equals the ratio of ac collector resistance to ac emi
resistance.
-
5/26/2018 semiconductor devices and circuit lab manual
16/46
PREPARED BY: Deepak Dhadwal APPROVED BY: HOD(ECE)
Theoretical Av= -RC/ Re
Practical Av= Vout/ Vin
Note:Negative sign reveals an 1800phase shift between Voutand Vin
2. Input impedance, Zin:-
The input impedance of a CE amplifier equals the parallel combination of the base biasing resistor(s) and
input impedance to the transistor base.
Theoretical Zin= R1 Req
Practical Zin=Vin/ Iin
3. Output Impedance, Zout:-
Theoretical Zout= RcPractical Zout= Vout/ Iout
4. Current gain, Ai:-
Ai = Iout/ Iin
Iin= Vin/ Zin
And Iout= - Vout/ RL
Procedure:-
To measure Voltage gain, Av
1. Connect circuit as shown in fig.
2. Connect CRO probe from sockets Vin1 and G1 to channel CH1 of CRO.
3. Switch on the power supply.
4. Using the Frequency control and Amplitude control knobs of the SineWave generator section,
the input signal at 2Vp-p, 1 KHz sine wave signal and observe the same on CRO channel CH1.
5. Switch off the power supply. Remove CRO probe.
6. Now set the multimeter dial to AC voltage mode.
7. Connect multimeter probes to test points Vin1 and G1.
-
5/26/2018 semiconductor devices and circuit lab manual
17/46
PREPARED BY: Deepak Dhadwal APPROVED BY: HOD(ECE)
8. Switch on the power supply.
9. Note down the value observed on millimeters display. It is Vin.
10. Connect multimeter probes to test points Vout1 and G2.
11. Switch on the power supply.
12. Note down the value observed on multimeter display. It is Vout
13. Switch off the power supply.
14. Now calculate the Voltage Gain (Av) using the formula
Av= Vout/Vin
15. Now to verify this value of voltage gain we will calculate its theoretical value such that
Av = -RC/R
Note: The value of Rc is 94 and Re is 51.1 .
To calculate Input impedance, Zin:-
1. Note down the value of Vin obtained.
2.Now remove the patch cord between Vin1 and 1.
3. Set the multimeter dial to AC current mode.
4. Connect multimeter probes between sockets Vin1 and 1
5. Note down the value observed on multimeters display. It is Iin.
6. Switch off the power supply.
7. Now calculate the input impedance (Zin) using the formula
Zin=VIN/ Iin
8. Now to verify this value of input impedance we will calculate its theoretical value such that
Zin= R1 Req
Note: The value of R1 is 14.7 K, R2 is 6.6 K, take hFE = 50 (as per datasheet) and RE or Re is equa
51.1.
To calculate Output impedance, Zout:-
1. Note down the value of Voutobtained.
-
5/26/2018 semiconductor devices and circuit lab manual
18/46
PREPARED BY: Deepak Dhadwal APPROVED BY: HOD(ECE)
2. Set the multimeter dial to AC current mode.
3. Remove patch cords between sockets B and C.
4.Now connect multimeter probes between sockets B and C .
5. Switch on the power supply & note down the value observed on multimeters display. It is Iout.
6. Switch off the power supply.
7. Now calculate the output impedance (Zout) using the formula
Zout= Vout/ Iout
8. Now to verify this value of input impedance we will calculate its theoretical value such that Zo= Rc
Note: The value of Rcis 94 .
To measure Current Gain, Ai:-
1. Note down the value of Iinobtained.
2. Note down the value of Ioutobtained.3. Now calculate the Current Gain (Ai) using the formula
Ai= Iout/ Iin
4. Now to verify this value of voltage gain we will calculate its theoretical value such that
Ai=
Note: The value of is between 25- 50 as per the specification sheet.
Observations:
Percentage Error (%) = {(Calculated valueTheoretical value)/Theoretical value }x 100
Table 4.1 Observation Table
-
5/26/2018 semiconductor devices and circuit lab manual
19/46
PREPARED BY: Deepak Dhadwal APPROVED BY: HOD(ECE)
Result:-
The calculated values of various parameters are:
1. Voltage gain, Av= .
2. Current gain, AI =
3. Output Impedance Zo =.ohms4. Input impedance, Zin =..ohms
QUESTION-ANSWER:
Q1. What do you mean by biasing of transistor?
ANS. When dc voltages are applied across the different terminals of transistor, it is called biasing.
Q2. What is d.c. current gain in common base configuration?
ANS. It is ratio of collector current(Ic) to emitter current (Ie).
Q3. What is typical value for dc current gain?
ANS. 0.99
Q4. What is a.c. current gain in CB configuration?
ANS. It is ratio of change in collector current to change in emitter current.
Q5. What are input characteristics?
ANS. These curves relate i/p current & i/p voltage for a given value of o/p voltage.
Q6. What are output characteristics?
ANS. The curves relate o/p voltage & o/p current for a given value of input current.
Q7. Which configuration has highest voltage gain?ANS. Common Emitter.
Q8. Which configuration is most widely used?
ANS. Common Emitter.
Q9. What is operating point?
ANS. The zero signal values of Ic & Vce.
Q10. Which region is heavily doped in Transistor?ANS. Emitter.
-
5/26/2018 semiconductor devices and circuit lab manual
20/46
PREPARED BY: Deepak Dhadwal APPROVED BY: HOD(ECE)
M.M.UNIVERSITY, SADOPUR (AMBALA) LABORATORY MANUAL
PRACTICAL EXPERIMENT INSTRUCTION SHEET
AIM: To study the frequency response of RC-Coupled Amplifier.
EXPERIMENT NO. : ECE-209-05 ISSUE DATE:
DEPTT.:ELECTRONICS AND COMMUNICATION ENGINEERING
LABORATORY : SEMESTER: III NO. OF PAGES: 05
Aim: -To study the frequency response of RC-Coupled Amplifier.
Apparatus required:-NV6542 trainer, CRO, CRO probes, Function generator, Function generator probes
mm patch cords, mains cord.
Theory: -
RC- Coupled Amplifier
One of the coupling methods to couple two stages of an amplifier is RC-coupling. An RC Coupled network
shown in figure5.1.
Fig. 5.1 RC Coupled Amplifier Stages
The network of R2 and Cl enclosed in the dashed lines is the coupling network. C1 is the coupling capac
which connects the output of Ql to the input of Q2. R2 will develop the signal to be applied to the base of Q
Cl acts as a limiting factor at low frequencies because its reactance increases with a decrease in frequency a
some point will be reached when a voltage drop will appear across it. This will reduce the size of the sign
-
5/26/2018 semiconductor devices and circuit lab manual
21/46
PREPARED BY: Deepak Dhadwal APPROVED BY: HOD(ECE)
being applied to Q2. At medium frequencies the reactance of Cl is so small that it can be considered a shor
the signal. C1 will also isolate any DC voltage developed at the collector of Q1 from the DC bias developed
the base of Q2.
A frequency-response curve is a graphical representation of the relationship between amplifier gain
operating frequency. A generic frequency response curve is shown in Figure. This particular curve illustra
the relationship between power gain and frequency.
Fig. 5.2 Frequency-response curve
As shown:
1. The circuit power gain remains relatively constant across the mid band range of frequencies.
2. As operating frequency decreases from the mid band area of the curve, a point is reached where the pow
gain begins to drop off. The frequency at which power gain equals 50% of its mid band value is called
lower cutoff frequency ( fc1 ).
3. As operating frequency increases from the mid band area of the curve, a point is
reached where the power gain begins to drop off again. The frequency at which power gain equals 50% of
mid band value is called the upper cutoff frequency
(fc2).
Note that the bandwidth of the circuit is found as the difference between the cutoffs frequencies.
By formula, BW = fC2fC1
Procedure:-
1. Connect 1 and 2 to channel CH1 of CRO.
-
5/26/2018 semiconductor devices and circuit lab manual
22/46
PREPARED BY: Deepak Dhadwal APPROVED BY: HOD(ECE)
2. Switch on the power supply.
3. Using the Frequency Control and Amplitude Control knobs of the Sine Wave Generator section,
the Input signal at 1Vp-p, 100 Hz sine wave signal andobserve the same on CRO channel CH1.
4. Switch off the power supply.
5. Remove CRO probes.
6. Connect a patch cord across sockets +12V of DC power supply and +12V of RC coupled Amplif
section.
7. Connect a patch cord between points Vin1 and 1 and another patch cordbetween sockets G1
2without disturbing the Frequency Control and Amplitude Control knobs of the Sine wave genera
section.
8. Connect a patch cord between B and C.
9. Connect CRO probes from Vin1and G1to CRO channel CH1.10. Connect point Vout1with point Vin2 and point G2with G3 (This will cascade the two stages through
coupling. Where Cc is the coupling capacitor and the Combination of R1 and R2 will act as coupl
resistance)
11. To observe the output waveform at Stage 2 between points Vout2and G4, use a CRO probe from Vout2
G4to CRO channel CH2.
12. Increase the amplitude of Input signal until you get maximum undistorted output signal. Note down
value of Input signal (Vin).
13. Keep on rotating the Frequency Control pot while recording the values of both the input frequency (H
and output voltage amplitude (Vout).
14.Now we will calculate voltage gain Av given by Vout /Vin.
15.Now calculate Voltage gain Av(dB) = 20 log Av.
16. Plot the graph between Input Frequency (Hz) and Voltage Gain (dB).
-
5/26/2018 semiconductor devices and circuit lab manual
23/46
PREPARED BY: Deepak Dhadwal APPROVED BY: HOD(ECE)
Observation Table: -
S.NO. Frequency Vin Vout Av= Vout/Vin Av(dB) = 20 log Av
1 100Hz
2 500Hz
3 1KHz
4 3 KHz
5 5 KHz
6 10 KHz
7 20 KHz
Result:-Frequency responses of RC-Coupled Amplifier have been plotted.
QUESTION-ANSWER:
Q1. In RC coupled amplifier which component is responsible for reduction in voltage gain in the high frequerange?
ANS. Shunt capacitance in the input circuit.
Q2. In RC coupled amplifier which components value isresponsible for low 3-Db frequency?ANS. Increasing the value of coupling capacitor Cb.
Q3. In RC coupled amplifier which components value is responsible for high 3-dB frequency?ANS. By reducing the total effective shunt capacitance in the input circuit of hybrid pie model.
Q4. In a single stage RC coupled amplifier, what is the phase shift introduced in the true middle frequency?ANS. 180
Q5. Which type of coupling capacitor is used in RC coupled amplifier?ANS. 0.05 f paper capacitor.
Q6. What is the application of RC coupled amplifier?
ANS. It is widely used as a voltage amplifier.
Q7. In single stage RC coupled amplifier, what is the phase shift at low 3-dB frequency?
ANS. 225
Q8. In single stage RC coupled amplifier, what is the phase shift at high 3-dB frequency?
ANS. 135
-
5/26/2018 semiconductor devices and circuit lab manual
24/46
PREPARED BY: Deepak Dhadwal APPROVED BY: HOD(ECE)
Q9. In RC coupled amplifier what is the effect of low 3-dB frequency by increasing the value of coupl
capacitor Cb?
ANS. Decreasing.
Q10. In RC coupled amplifier what is the effect of low 3-dB frequency by increasing the value of total effect
shunt capacitor?ANS. Decreasing.
-
5/26/2018 semiconductor devices and circuit lab manual
25/46
PREPARED BY: Deepak Dhadwal APPROVED BY: HOD(ECE)
M.M.UNIVERSITY, SADOPUR (AMBALA) LABORATORY MANUAL
PRACTICAL EXPERIMENT INSTRUCTION SHEET
AIM: Study of Unipolar Junction Transistor (UJT) Characteristics.
EXPERIMENT NO. : ECE-209-06 ISSUE DATE:
DEPTT.:ELECTRONICS AND COMMUNICATION ENGINEERING
LABORATORY : SEMESTER: III NO. OF PAGES: 05
Aim: -Study of Unipolar Junction Transistor (UJT) Characteristics.
Apparatus required: -UJT trainer kit, connecting lead.
Theory: -
An unipolar junction transistor consists a bar of n - type silicone which is lightly doped, having high ohm
contacts at both side of the bar. These are called as base1 and base 2. A small piece of p - type materia
diffused at the bar and an ohmic contact is brought out called the emitter. The whole arrangement is treated a
series combination of two base resistances as RB1 and RB2 called as inter base resistance is equal to RBB an
diode. Under operating conditions the emitter is forward biased with respect to base1asVEB1. Without apply
VBB the junction exhibit a p n junction diode forward biased characteristics with slightly higher resistance th
diode. When VBB is also applied such that the base2 is +ve than base1, the friction of voltage appears acr
RB1 as;
=RB1/RBB=VRB1/RB --------1
Generally
At small value of VEB1when it is less than VBB, the p - n junction is reverse biased and a small current flow
in A ). When VEB1is greater than ( > VBB+ VD) the diode conducts and holes are injected into RB1. They
attracted towards the -ve of VBB. This causes an equal number of electrons to flow from RB1to the emit
which leads to decrease RB1. Thus the emitter current increases and VEB1 drops. This negative resistance eff
extends from peak point voltage to the valley point voltage as VP to VV. Increase in VEB1Further results
increase of emitter current gradually. The peak point voltage is related to as;
-
5/26/2018 semiconductor devices and circuit lab manual
26/46
PREPARED BY: Deepak Dhadwal APPROVED BY: HOD(ECE)
= RB1/RBB = (VP - VD)/VBB ---------------2
Where the VDis the drop across the forward biased silicone diode ( = 0.6V)
The negative resistance region of the uni junction transistor is used as relaxation oscillator in power control.
Circuit Diagram: -
Fig. 6.1 Circuit arrangement for Ve - Iecharacteristics.
Fig. 6.2 Ve - Iecharacteristics for unipolarjunction transistor
-
5/26/2018 semiconductor devices and circuit lab manual
27/46
PREPARED BY: Deepak Dhadwal APPROVED BY: HOD(ECE)
Procedure: -
1. Connect the circuit as shown in fig 1. Keep both supplies to minimum. Switch ON the power. Now V EB
VBB= 0.
2. Connect the milliammeter as shown in fig 1. Slowly increase the VEBsupply and note the voltage value
which the mA meter starts to deflect. This will give inherent emitter base Forward voltage drop V
Increase voltage further and note voltage and current readings. Bring VEBsupply back to zero.
3. Adjust the VBBvoltage about +10V.
4. Increase VBEuntil it approaches the VP value. At VPthe current rise suddenly and the emitter voltage dr
to a value equal to valley voltage VV. Increase VBEFurther and note more readings of VE and IE. Bring V
supply back to minimum.
5. Repeat step 4 at different values of VBB. Note VE, IE, VPand VVfor each setting of VBB.
6. Connect mA meter at + VBBand B2 of UJT as shown in fig 2.
7. Fix the VBBvoltage at +15V. Note the deflection in mA meter since RBBis presented there. Increase VBE
fire the UJT. Note the sudden rise in current at B2 terminal, which show the decrement of RBBat trig
point = VPeak.
8. Plot graphs between VEand IE from the observations, Find out the negative resistance region and saturat
region from the graph. The declined graph shows the conductivity modulation. Calculate the resistance at
and VV. The result shows fall in resistance, which indicates the negative resistance region of the device.
V / i, where V is equal to (Vp - VV.)RBB= VBB/ IBB, where VEB= 0.
Observations:
Table 6.1 Observation Table
S.No. VBB = 0V VBB = 10V
VE IE1 VE IE2
1.2.
3.
-
5/26/2018 semiconductor devices and circuit lab manual
28/46
PREPARED BY: Deepak Dhadwal APPROVED BY: HOD(ECE)
Precautions:
(1)Always connect the voltmeter in parallel & ammeter in series as shown in figure.
(2)Connection should be proper & tight.
(3)Switch ON the supply after completing the circuit.
(4)DC supply should be increased slowly in steps.
(5)Reading of voltmeter & Ammeter should be accurate.
Result: --The graph has been plotted between voltage and current.
QUESTION-ANSWER:
Q1. What are h parameters of a transistor?
ANS. The h parameter or the hybrid parameters of a transistor helps us to analyze the amplifying action
transistor for small signal .it is necessary for practical purposes. In generally there are four type of h parameThese are : h11 h12 h21 h22
Q2. What are benefits of H-parameter?ANS. Following are the advantages of h-parameters:-
I. h-parameters are Real Numbers up to radio frequency
II. They are easy to measureIII. They can be determined from transistor static characteristic curves
IV. They are convenient to use in circuit analysis and design
V. Easily convertible from one configuration to other
VI. Readily supplied by manufacturers
Q3. H parameter operates in which frequency?
ANS. up to radio frequencies i.e 20-20khz
Q4. Which of the h-parameters corresponds to re in a common-base configuration?
ANS. hib
Q5. Which of the following is referred to as the reverse transfer voltage ratio?
ANS.hr
Q6.What is admittance?
ANS. In electrical engineering, the admittance (Y) is a measure of how easily a circuit or device will allowcurrent to flow. It is defined as the inverse of the impedance (Z). The SI unit of admittance is the siem
(symbol S).
Q7. What is conductance?
-
5/26/2018 semiconductor devices and circuit lab manual
29/46
PREPARED BY: Deepak Dhadwal APPROVED BY: HOD(ECE)
ANS. The electrical resistance of an electrical element is the opposition to the passage of an electric curr
through that element; the inverse quantity is electrical conductance, the ease at which an electric curr
passes. Electrical resistance shares some conceptual parallels with the mechanical notion of friction. The SI uof electrical resistance is the ohm (), while electrical conductance is measured in siemens (S).
Q8. The lowest output impedance is obtained in case of BJT amplifiers for
ANS. CC Configuration
Q9. Which of the following parameters is used for distinguishing between a small signal and a large-sig
amplifier?ANS. (A) Voltage gain (B) Frequency response (C) Harmonic Distortion (D) Input/output impedances
Q10. Removing bypass capacitor across the emitter-leg resistor in a CE amplifier causes
(A) increase in current gain. (B) decrease in current gain. (C) increase in voltage gain. (D ) decrease in volt
gain.
-
5/26/2018 semiconductor devices and circuit lab manual
30/46
PREPARED BY: Deepak Dhadwal APPROVED BY: HOD(ECE)
M.M.UNIVERSITY, SADOPUR (AMBALA) LABORATORY MANUAL
PRACTICAL EXPERIMENT INSTRUCTION SHEET
AIM: To study Push - Pull amplifier
EXPERIMENT NO. : ECE-209-07 ISSUE DATE:
DEPTT.:ELECTRONICS AND COMMUNICATION ENGINEERING
LABORATORY : SEMESTER: III NO. OF PAGES: 04
Aim: -To study Push - Pull amplifier.
Apparatus required: -Push - Pull amplifier trainer kit and connecting lead.
Theory: -
In a push - pull power amplifier, class B is used to obtain high percentage of efficiency (the relation betwe
taken and given). But these amplifiers suffer from the crossover distortion. It is due to keep the bias nearly c
off point which cause to flow current in transistor in later cycle.Such class B push - pull output stage is sho
in fig. where the voltages at emitters of Q3 and Q2, are pulled to ground through RE while the bias is set
0.25Vdc just below half of required cut off potential (in these transistor it is 0.6Vdc). Due to it the after z
crossing, part of input wave is not able to perform amplification and cause to produce the crossover distorti
where the cut - off bias cause to flow no current when there is no signal and quiescent current flows accordito input output signal strength. This enables this mode of configuration to obtain low power dissipation
transistors but high power conversion called the efficiency.
-
5/26/2018 semiconductor devices and circuit lab manual
31/46
PREPARED BY: Deepak Dhadwal APPROVED BY: HOD(ECE)
Circuit Diagram: -
Fig. 7.1 Circuit Diagram of push-pull amplifier
Procedure: -
1. Switch on power. Observe there is no quiescent current flow through the output transistors.
2. Now connect the function generator across the input. Connect CRO as shown in fig. Apply sine w
1Khz signal of such amplitude to Obtain 3Vpp signal across RL.
3. Observe the current in transistors and the crossover distortion at the zero crossing points.
4. Adjust input amplitude to obtain 6Vpp signal across RL. Note the quiescent current from me
Measure voltage at collector of Q2 as Vc. Now from the observed values:
The dc power, Pdc = (Vc) x dc current ... watt
The ac power, Pac = (Vo rms)2 RL ... watt
Where Vo rms = (Vo pp / 2) 2 ... V rms
The percent efficiency of amplifier, % = (Pac / Pdc) x 100
-
5/26/2018 semiconductor devices and circuit lab manual
32/46
PREPARED BY: Deepak Dhadwal APPROVED BY: HOD(ECE)
Fig. 7.2 Crossover distortion in a push-pull amplifier
Precautions: -
1. Connect the circuit properly as shown in fig7.1.
2. Set the input waveform of correct amplitude and frequency.
3. Connect the CRO to the output terminal.
4. All connection should be tight.
5. Take proper care while taking reading.
Result: --The class B amplifier has high efficiency (about 70%) but has Crossover distortion which leads
increase in distortion particularly at low input signals.
QUESTION-ANSWER:
Q1. What is feedback in amplifiers?
Ans. The process of combining a fraction of output energy back to the input is called feedback.
Q2. What is the application of negative feedback amplifier?
Ans. Negative feedback amplifier makes the circuit stable.
Q3. What is voltage series feedback amplifier?
Ans. It is that amplifier in which output voltage feedback in voltage series with input Signal, resulting in
overall gain reduction.
Q4. By Which factor reduces the input noise & non-linear distortions of the amplifier?
Ans. (1+A)
Q5. what is the effect of frequency on phase shift of an amplifier?
-
5/26/2018 semiconductor devices and circuit lab manual
33/46
PREPARED BY: Deepak Dhadwal APPROVED BY: HOD(ECE)
Ans. Shift of an amplifier will change with frequency.
Q6. How does negative feedback increase bandwidth of an amplifier?
Ans. The bandwidth of an amplifier without feedback is equal to separation between 3 db frequencies f1 andIf A is the gain, then gain bandwidth product is A* BW. With the negative feedback the amplifier gain
reduced and since gain bandwidth product has to remain constant in both cases, so the bandwidth will incre
to compensate for the reduction in gain.
Q7.How do series and shunt feedback differ from each other?
Ans. Series means feedback connecting in series with input signal while shunt meansfeedback connecting in shunt with input signal.
Q8. Distortion in an amplifier with negative feedback increases or decreases?
Ans. Decreases
Q9. Feedback in an amplifier always helps to
Ans. Control its output
Q10.When negative feedback is applied to an amplifier, its bandwidth:
Ans. Increased.
-
5/26/2018 semiconductor devices and circuit lab manual
34/46
PREPARED BY: Deepak Dhadwal APPROVED BY: HOD(ECE)
M.M.UNIVERSITY, SADOPUR (AMBALA) LABORATORY MANUAL
PRACTICAL EXPERIMENT INSTRUCTION SHEET
AIM: To study the characteristics of Silicon Controlled Rectifier (SCR) / Thyristor.
EXPERIMENT NO. : ECE-209-08 ISSUE DATE:
DEPTT.:ELECTRONICS AND COMMUNICATION ENGINEERING
LABORATORY : SEMESTER: III NO. OF PAGES: 05
Aim: -To study the characteristics of Silicon Controlled Rectifier (SCR) / Thyristor.
Apparatus:-NV6530SCR Characteristic Trainer,2mm Patch cords
Theory: -
The Silicon Controlled Rectifier (SCR) is a semiconductor device that is a member of a family of con
devices known as Thyristors. The SCR has become the work house of the industrial control industry.
evolution over the year has yielded a device that is less expensive, more reliable and smaller in size than ev
before. Typical applications include: DC motor control, generator field regulation, variable frequency dr
(VFD) DC bus voltage control solid state Relays and lighting system control.
The SCR is a three lead device with an anode and a cathode (us with a Standard diode) plus a third cont
lead or gate. As the name implies, it is a Rectifier which can be controlled or more correctly one that can
triggered to the ON state by applying a small positive voltage (VTM) to the gate lead. Once gated ON,
trigger signal may be removed and the SCR will remain conducting as long as current flows through the devThe load to be controlled by the SCR is normally placed in the anode circuit.
Commutation:-
For the SCR to turn OFF current flow through the device must be interrupted, or drop below the maximu
holding current(IH) , for a short period of time (typically 10-20 microseconds) which is known as
commutated turnoff time (tq). When applied to alternating current circuits or pulsating DC system, the dev
will selfcommutate at the end of every half cycle when the current goes through zero. When applied to p
DC circuits, in applications such as alarm or trip circuit latching, the SCR can be reset manually by interrupt
the current with a push button.
-
5/26/2018 semiconductor devices and circuit lab manual
35/46
PREPARED BY: Deepak Dhadwal APPROVED BY: HOD(ECE)
When used in VFD's or inverters, SCRs are electronically forced OFF using additional Commutating circui
Such as smaller SCRs and Capacitors, which momentarily apply an opposing reverse bias voltage across
SCR(This is complicated everything has to be exactly right).
Basic three modes of operation of SCR:
1. Reverse blocking mode
Cathode is positive with respect to anode with gate open.SCR is in reverse bias i.e., junction J1 & J3 in reve
bias J2 is in forward bias. The device act as two PN diode connected in series with reverse voltage appl
across it. Small leakage current of the order of a few mill ampere or microampere flows; this is off state of SC
If reverse voltage increases, then at critical breakdown level or reverse breakdown voltage (VBR) an avalanc
occurs at J1 & J3 & reverse current increase rapidly, so more loss in SCR. This may lead to SCR damabecause Junction temperature is increasing. Maximum working reverse voltage across SCR does not exc
VBR. If applied reverse voltage across SCR < VBR, then the device offers high impedance in reverse directi
SCR is treated as open switch.
2. Forward blocking mode (off state mode)
Anode is positive with respect to cathode with gate open. SCR is forward bias, junction J1 & J3 is forward b
and J2 is reverse bias. Here small forward leakage current flow. If forward voltage increases then J2 junct
(rev. bias) will have avalanche breakdown called forward break over voltage (VBO) Maximum work
forward voltage across SCR does not exceed VBO. If forward voltage
-
5/26/2018 semiconductor devices and circuit lab manual
36/46
PREPARED BY: Deepak Dhadwal APPROVED BY: HOD(ECE)
Procedure:-
1. Connect terminal1 to terminal 4, terminal 2 to terminal 8 and terminal 3 to terminal 12 as shown
figure.
2. Connect Voltmeter across terminal 7 and 8 and Ammeter across terminal and 10 as shown in figure.
3. Make short terminals 5 and 6.
4. Rotate the knob P1 and P2 fully in counter clockwise.
5. Switch ON the power supply.
6. Set the value of Anode Voltage at 35V by using the knob P1.
7. Now Increases gate current Ig gradually by varying knob P2 and observe it.
8. At certain value of gate current, voltmeter reading falls down to almost zero. This action indicates
firing of SCR.
9.Note the gate current value at this position (firing of SCR).
10.Keep the gate current constant by shorting terminal 9 with 10 and connect ammeter to the terminal 5 a
6.
11.Rotate the potentiometer P1 fully in counter clockwise.
12.Rotate knob P1 (from initial position to its maximum limit) gradually and record Anode current
respective value of anode voltages.
13.Plot the graph between anode voltage Vaand anode current Ia.
Observations:
Table 8.1 Observation Table
S.NO. ANODE VOLTAGE
(Va)
ANODE CURRENT (Ia)
GATE CURRENT CONSTANT
(Ig)= ----mA
1.
2.
3.
4.
5.
-
5/26/2018 semiconductor devices and circuit lab manual
37/46
PREPARED BY: Deepak Dhadwal APPROVED BY: HOD(ECE)
Precautions:
(1)Always connect the voltmeter in parallel & ammeter in series as shown in fig.
(2)Connection should be proper & tight.
(3)Switch ON the supply after completing the ckt.
(4)DC supply should be increased slowly in steps.
(5)Reading of voltmeter & Ammeter should be accurate.
Fig. 8.1 Static I-V characteristics of a thyristor
Result: --The graph has been plotted between voltage and current.
QUESTION-ANSWER:
Q.1 Define SCR?ANS. It is a controlled rectifier constructed of a silicon material with third terminal for control purpose.
Q.2 Define Forward Break over Voltage?
ANS. It is voltage in forward conducting mode after which SCR starts conducting.
-
5/26/2018 semiconductor devices and circuit lab manual
38/46
PREPARED BY: Deepak Dhadwal APPROVED BY: HOD(ECE)
Q.3 Define reverse Break down Voltage?
ANS. If reverse voltage is increased beyond certain value, SCR will break & this voltage is Called reve
breakdown voltage.
Q.4 Why it is called controlled rectifier?
ANS. Because its operation as rectifier can be controlled by using gate terminal.
Q.5 Define peak forward Voltage?
ANS. It is limiting positive anode voltage above which SCR get damaged.
Q.6 Define peak reverse Voltage?
ANS. Max. reverse voltage that can be applied to SCR without conduction in reverse direction.
Q.7 Define Holding Current?
ANS. Min. forward current that must be maintained to keep SCR in conducting state.
Q.8 Define forward current Rating?ANS. The max. Value of anode current that SCR con handle safely.
Q. 9 Define latching current.ANS. Min. device current which must be attained by the device before gate drive is removed.
Q.10 What do you mean by commutation process?ANS. Process of turning off the SCR.
-
5/26/2018 semiconductor devices and circuit lab manual
39/46
PREPARED BY: Deepak Dhadwal APPROVED BY: HOD(ECE)
M.M.UNIVERSITY, SADOPUR (AMBALA) LABORATORY MANUAL
PRACTICAL EXPERIMENT INSTRUCTION SHEET
AIM: To study Active filter.
EXPERIMENT NO. : ECE-209-09 ISSUE DATE:
DEPTT.:ELECTRONICS AND COMMUNICATION ENGINEERING
LABORATORY : SEMESTER: III NO. OF PAGES: 04
Aim: -To study Active filter.
Apparatus:-NV6504 Active filter kit, Oscilloscope,Digital Multimeter.
Theory: -
Active Filters: An active filter is a type of analog electronic filter, distinguished by the use of one or m
active components i.e. voltage amplifiers or buffer amplifiers. Typically this will be a vacuum tube, transisto
operational amplifier. There are two principal reasons for the use of active filters. The first is that the Amplif
powering the filter can be used to shape the filter's response, e.g., how quickly and how steeply it moves fr
its pass band into its stop band. (To do this passively, one must use inductors, which tend to pick
surrounding. Electromagnetic signals and are often quite physically large.) The second is that The ampli
powering the filter can be used to buffer the filter from the electronic components it drives. This is of
necessary so that they do not affect the filter's actions.
Low Pass Filters:A Low-Pass Filter is a filter that passes low frequency signals but attenuates (Reduces the amplitude of) sign
with frequencies higher than the cutoff frequency.
High Pass Filter:
A high-pass filter is a filter that passes high frequencies but attenuates (or reduces) frequencies lower than
cutoff frequency.
Band Pass Filter:
A band-pass filter is a device that passes frequencies within a certain range and rejects (attenuates) frequenc
outside that range
-
5/26/2018 semiconductor devices and circuit lab manual
40/46
PREPARED BY: Deepak Dhadwal APPROVED BY: HOD(ECE)
Narrow Band-Reject Filter:
The narrow band-reject, often called the notch-filter, The most commonly used notch filter is the twin
network.
Procedure:
1. Initially rotate potentiometers R1 and Rf in fully clockwise direction in order to make R1 = Rf = 10K, so t
according to the formula given below:
Vo= (1+Rf/R1) Vin,
The gain of the output will be twice of the input.
2. Connect an Ohmmeter between TP4 and TP7 (Gnd) Adjust resistance value to
15.9K by varying the potentiometer 22K of High Pass Filter to set the Low
Cutoff frequency (fL) at 1K.
3. Connect Ohmmeter between Vin of Low Pass Filter and TP6. Adjust resistancevalue to 1.59K by varying the potentiometer 22K of High Pass Filter to set the
Low cutoff frequency (fL) at 10K.
4. at their indicated position from
Power Supply section.
5. Switch On the Power Supply.
6. Set the output of function generator at 2 Volt, 100 Hz using Oscilloscope with
sinusoidal waveform.
7. Connect TP1 with Vin of Filter to give a sinusoidal signal of amplitude 2 Vpp of frequency 100 Hz.
8. Observe output on Oscilloscope.
9. Similarly you can give the triangular and square wave instead of sinusoidal
wave, from the function generator section.
10. Increase the frequency of input signal step by step and observe the effect on
output Vout on Oscilloscope.
11. Tabulate the values of Vout, gain, gain (db) at different values of input
frequency shown in Observation Table.
-
5/26/2018 semiconductor devices and circuit lab manual
41/46
PREPARED BY: Deepak Dhadwal APPROVED BY: HOD(ECE)
Circuit Diagram: -
Observation Table:-
Precautions: -
1. Connect the circuit properly as shown in fig.
2. Set the input waveform of correct amplitude and frequency.
3. Connect the CRO to the output terminal.
4. All connection should be tight.
5. Take proper care while taking reading.
Result: --The graph has been plotted between gain and frequency.
-
5/26/2018 semiconductor devices and circuit lab manual
42/46
PREPARED BY: Deepak Dhadwal APPROVED BY: HOD(ECE)
QUESTION-ANSWER:
Q.1 Define Low Pass Filter?ANS. The low pass filter allows all frequencies up to the specified cut-off frequency to pass through it &
attenuates all the other frequencies above the cut-off frequencies.
Q.2 Define cut-off frequency?ANS. It demarcates the pass band & the stop band.
Q.3 What is the freq. Range of Pass Band?
ANS. The frequency range of pass band is from 0 to fc.
Q.4 What is the freq. Range of Stop Band?ANS. The frequency range of stop band is from fc to .
Q.5 What are the units of attenuation?
ANS. Decibles (dB) & Nepers.
Q.6 Define Band Pass Filter?
ANS. It is a combination of two parallel tuned circuits
Q.7 Define Attenuators?
ANS. An attenuator is a two-port resistive network & its propagation function is real
Q.8 Define Neper .
ANS. t is defined as the natural logarithm of the ratio of input voltage (or current) to the output voltage (or
current) provided that the network is terminated in its characteristic impedance Z0.
Q. 9 Is filter a resistive or reactive network
ANS. Reactive network
Q.10 Where filter circuits are used?
ANS. Filter circuits are used in TV receivers, audio amplifiers etc
-
5/26/2018 semiconductor devices and circuit lab manual
43/46
PREPARED BY: Deepak Dhadwal APPROVED BY: HOD(ECE)
M.M.UNIVERSITY, SADOPUR (AMBALA) LABORATORY MANUAL
PRACTICAL EXPERIMENT INSTRUCTION SHEET
AIM: Measurement and Study of Solar cell I-V characteristics.
EXPERIMENT NO. : ECE-209-10 ISSUE DATE:
DEPTT.:ELECTRONICS AND COMMUNICATION ENGINEERING
LABORATORY : SEMESTER: III NO. OF PAGES: 04
Aim: -Measurement and Study of Solar cell I-V characteristics.
Equipments Needed:
1. NV6005 Solar cell kit2. Patch cord3. Digital Multimeter
Theory: -
Photovoltaic systems convert sunlight directly into electrical energy.
1) Cover glass : The cover glass, made of glass or other clear material such clear plastic, seals the from the external environment.
2) The Antireflective Coating (AR Coating) : Through a combination of a favorable refractive index, a
-
5/26/2018 semiconductor devices and circuit lab manual
44/46
PREPARED BY: Deepak Dhadwal APPROVED BY: HOD(ECE)
thickness, this layer serves to guide light into the PV Cell. Without this layer, much of the light would boun
off the surface of the cell.
3) Contact Grid : The contact grid is made of a good conductor, such as a metal, and it serves acollector of electrons.
4) N-Type Silicon : N-type silicon is created by doping (contaminating) the Si with compounds tcontain one more valance electrons than Si does, such as with either Phosphorus or Arsenic. Since only f
electrons are required to bond with the four adjacent silicon atoms, the fifth valance electron is available
conduction.
5) P-Type Silicon : P-type silicon is created by doping with compounds containing one less valanelectrons than Si does, such as with Boron. When silicon (four valance electrons) is doped with atoms that ha
one less valance electrons (three valance electrons), only three electrons are available for bonding with f
adjacent silicon atoms, therefore an incomplete bond (hole) exists which can attract an electron from a nearatom. Filling one hole creates another hole in a different Si atom. This movement of holes is available
conduction.
F. Back Contact :
The back contact, made out of a metal, covers the entire back surface and acts as a conductor.
Procedure:
1. Take the Solar Energy Trainer NV6005 along with Solar Panel.
2. Place the solar panel in the stand and adjust the panel at an angle of about 45 with the ground. Direct
sunlight straight at the solar panel (angle of 90).
Note : If sunlight is not properly available then any source of light like lamp can be used.
3. With the DB15 connector connect the Solar Energy Trainer NV6005 with Solar Panel. Then wait fo
minute to avoid errors due to temperature fluctuations.
4. Set the potentiometer to maximum resistance i.e. at fully clockwise position and measure and record
resistance into the Observation Table.
5. Connect the solar cell as shown in the following circuit diagram.
a. Connect positive terminal of solar cell to P1 terminal of the potentiometer.
-
5/26/2018 semiconductor devices and circuit lab manual
45/46
PREPARED BY: Deepak Dhadwal APPROVED BY: HOD(ECE)
b. Connect other end of potentiometer i.e. P2 to positive terminal of ammeter.
c. Connect negative terminal of ammeter to negative terminal of solar cell.
d.Now connect the positive terminal of voltmeter to P1 and negative terminal of voltmeter to P2.
6. Record the values of corresponding voltage and current into the Observation Table.
7.Now gradually move the potentiometer in anti- clockwise direction so that the resistance of the potentiome
decreases. Now measure the resistances at successively smaller values and record the corresponding values
voltages and current into the Observation Table below.
8. Plot the I- V characteristics from the measurements recorded in the table, to show how the photoelec
current depends on the photoelectric voltage.
Circuit Diagram: -
Observation Table:-
Precautions:
(1)Always connect the voltmeter in parallel & ammeter in series as shown in fig.
(2)Connection should be proper & tight.
(3)Switch ON the supply after completing the ckt.
-
5/26/2018 semiconductor devices and circuit lab manual
46/46
PREPARED BY: Deepak Dhadwal APPROVED BY: HOD(ECE)
(4)DC supply should be increased slowly in steps.
(5)Reading of voltmeter & Ammeter should be accurate.
Result: --The graph has been plotted between voltage and current.
QUESTION-ANSWER:
Q.1 Explain the working of two devices that use solar energy?ANS. A solar heating device is one which allows collection of a large amount of heat from the sunlight in
given region and restricts the loss of heat to the surrounding in the form of radiation.
Q.2 List the uses of solar cells?ANS. A Solar cells or solar cell panels are used in:
1) Artificial satellites and in space probes like Mars orbiters
2) Wireless transmission systems or TV relay stations in remote locations
3) Traffic signals, calculators and in toys
Q3. What are the application areas of diode?
ANS. Diode is mainly used in rectifier circuits, detector and switching circuit.
Q4. What do you mean by forward biased?
ANS. When +ve terminal of battery is connected to P side & -ve terminal to N side of diode.
Q5. What do you mean by reverse biased?
ANS. When +ve terminal of battery is connected to N side & -ve terminal to P side of diode.
Q6. Define max. Power rating?ANS. Max. Power that can be dissipated at junction without damage to it.
Q7. What do you mean by knee voltage?
ANS. The forward voltage at which the current through the diode starts rising abruptly is known as knvoltage. Its value for germanium is 0.3v and for silicon it is 0.7v.
Q8.What is break down voltage?ANS. The reverse voltage at which p-n junction breaks is known as breakdown voltage.
Q9. Explain peak inverse voltage (PIV)?
ANS. The maximum value of reverse voltage that p-n junction can withstand without getting damaged is calpeck inverse voltage.