FGMOS CURRENT MIRROR :BW

ENHANCEMENT

JayPee Institute of Information Technology, Noida.

BY: PROJECT TO: GOPI KRISHNA DR. MANISH KUMAR [14317188] MR.SHAMIM AKHTAR M.TECH (MET)

INTRODUCTION FGMOS

To presents a high performance, resistively compensated low voltage current mirror using floating gate MOSFETs (FGMOS).

Current mirrors (CMs) have been used as basic circuit element for the design of various low voltage circuit structures .

Floating gate MOS is similar to conventional MOSFET. The gate of FGMOS is electrically isolated , and a no. of secondary gates or inputs are deposited over the floating gate and are electrically isolated from it.

CONTD..

FG is completely surrounded by highly resistive material, the charge contained in it remains unchanged for long period of time.

Usually Hot-Carrier injection scheme is applied to modify the charge stored in the FG.

INTRODUCTION CURRENT MIRROR

Current mirror is a circuit designed to copy current through one active device and replicating it to another active device , keeping the output current constant regardless of loading.

Important feature of current

mirror is its high output resistance.

It provides bias current and

active loads in amplifier stages.

WORKING (a)

In FGMOS it is possible to programme the threshold voltage of FGMOS. For two input FGMOS with Vs=Vb=0 and C1,C2 >> Cd. Then VFG isVFG= 𝐶1𝐶𝑡𝑜𝑡𝑎𝑙 𝑉1+ 𝐶2𝐶𝑡𝑜𝑡𝑎𝑙 𝑉2+ 𝐶𝐷𝐶𝑡𝑜𝑡𝑎𝑙 𝑉𝐷 [1] Now the drain current (ID) in saturation is 𝐼𝐷 = 𝛽2 (𝑉𝐹𝐺 − 𝑉𝑇)2 = 𝛽2[( 𝐶1𝐶𝑡𝑜𝑡𝑎𝑙 𝑉1+ 𝐶2𝐶𝑡𝑜𝑡𝑎𝑙 𝑉2)- 𝑉𝑇]2 [2] = 𝛽2 𝑘12 [𝑉1 − (𝑉𝑇−𝑘2𝑉2𝑘1 )]2 = 𝛽2 𝑘12[𝑉1 − 𝑉𝑇(𝑒𝑓𝑓𝑒𝑐𝑡𝑖𝑣𝑒)]2 [3]

CONTD.. Thus 𝑉𝑇(effective) is decided by 𝑉2,𝑘1and 𝑘2and

hence it is possible to programme 𝑉𝑇 according to application.

In simple FGMOS based current mirror one of the gates is used to programme the threshold voltage.

Bias voltage (Vb) decreases the threshold voltage and so on current voltage characteristics is also changed.

Circuit has low compliance voltage at low current levels.

FGMOS CM CIRCUIT

MODIFIED CM

Basic structure of FGMOS cuurent mirror is modified by adding a resistance (R) in series with capacitance (C2) .

The output short circuit transfer function of the modified current mirror is given by

𝐻ሺ𝑠ሻ= 𝑔𝑚2(𝑠+ 1𝑅𝐶2)3𝐶[𝑠2 + 𝑠ቐ𝑔𝑚1𝐶2 +ቀ

3𝐶+ 𝐶2𝑅 ቁ3𝐶𝐶2 ቑ+ 𝑔𝑚13𝑅𝐶𝐶2]

MODIFIED CM CIRCUIT

CONTD..

Transfer function has a zero at (-1/RC2) and complex poles (P1,2) at

𝑃1,2 = −ሺ𝑔𝑚1𝑅𝐶2+3𝐶+𝐶2ሻ±ඥሺ𝑔𝑚1𝑅𝐶2+3𝐶+𝐶2ሻ²−12𝑔𝑚1𝑅𝐶𝐶26𝑅𝐶𝐶2

Location of poles depends on the value of resistance (R).

If resistance (R) is very high then transfer function becomes

𝐻ሺ𝑠ሻ= 1( 3𝐶𝑔𝑚 𝑠+1)

CONTD..

If gm1 = gm2 = gm then one of the pole is cancel out by zero , because zero approaches towards one of poles.

Pole of transfer function is at S= -(gm/3C) . If the input current increases then the value of gm also

increases , resulting pole at higher frequency. As a result of this frequency response of the system is improved.

Capacitance (C) is gate to source capacitance which is process dependent and its value is low when transistor dimensions are low.

SENSITIVITY

Sensitivity of output current for the change in resistance R is given as

When R is very high then

Thus, as R increases sensitivity decreases.

𝑆𝑅𝑖𝑜 = 1𝑅ቀ𝑠+ 1𝑅𝐶2ቁ[𝐶2 + 4𝐶+ 𝐶1𝑠𝑅𝐶2 + (4𝐶+ 𝐶1)]

𝑆𝑅𝑖𝑜 = 1𝑠𝑅(4𝐶+ 𝐶1)

REFRENCES:-

(1) S. Sharma, L.K. Mangotra , S.S. Rajput and S. S. Jamuar, “FGMOS Current mirror: Bandwidth enhancement” SPRINGER, Analog Integrated Circuits and Signal Processing, 46, 281–286, 2006.

(2) S.S. Rajput and S.S. Jamuar, “Design techniques for low voltage analog circuit Structures” in Proc. NSM 2001/IEEE, Malaysia, Nov. 2001.

(3) S. S. Rajput and S.S. Jamuar, “Low voltage analog circuit design techniques.” IEEE Circuits and Systems Magazine, vol. 2, no. 1, pp. 24–42, 2002.

(4) Design of Analog CMOS Integrated Circuits, Behzad Razavi, Tata McGraw-Hill 2002 .

THANK YOU