serial communicationsjmconrad/ecgr4101-2012-01/...serial communications – rs232 standard – uart...
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1Embedded Systems
Serial Communications
Embedded Systems 2
In these notes . . .
General CommunicationsSerial Communications
– RS232 standard– UART operation– Polled Code– SCI/I2C
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
RSR/WVo
E
DB4DB7 DB6
NOTE: All resistors are 0.1 W, 5%, unless designated otherwise
DB5
Voltage SelectOPEN: 5.0VCLOSED: 2.5-5.0V
fromUART1 connector
GND9VDCpositive center
VCC
EXTPower
POWER
UART 0:RS-232C
Contrast
LCD module
MANUALRESET
AN0KI1KI2KI3
* open JP3 to use internal ring oscillator
UART 1:Debug port
to 50-pinconnector
to 50-pinconnector
to 50-pinconnector
to 50-pinconnector
frequency
UP = IODOWN = LEDs
to 50-pinconnector
AN1
SCLKCE*
READYRxD
TxD
MCUPower
Vref
EXT OSC
CNVss
UP = IODOWN = XC
UP = RC_OSCDOWN = XTAL
UP = IODOWN = RS232
MDECE30262 1.1
MDECE30262 Board Rev A
C
1 1Tuesday, October 01, 2002
Mitsubishi Electric & Electronics US
Title
Size Document Number Rev
Date: Sheet of
P7_2
P10_7
P7_1
Vref
P10_6 P10_5
RESET*
P9_0P9_1P9_2P9_3
P6_0
P7_0
P8_0
P10_0
P6_1
P7_1
P8_1
P6_2
P7_2
P8_2
P6_3
P7_3
P8_3
P6_4
P7_4
P6_5
P7_5
P8_5
P6_6
P7_6
P8_6
P6_7
P7_7
P8_7
P10_1P10_2P10_3P10_4P10_5P10_6P10_7
P1_5P1_6P1_7
P10_0P10_1P10_2P10_3P10_4P10_5P10_6P10_7
P1_5P1_6P1_7
P9_0P9_1P9_2P9_3
P6_0
P7_0
P8_0
P6_1
P7_1
P8_1
P7_2
P8_2
P6_2MP6_3M
P7_3
P8_3
P7_4
P6_4P6_5
P8_5
P7_5
P8_6M
P6_6
P7_6
P6_7
P8_7M
P7_7
P8_6
P8_7
P8_6M
P8_7M
P6_3
P6_2
P6_3M
P6_2M
P1_6P1_7
P7_5P7_7 P7_6
P7_4
RESET*
RESET*P6_7
P8_6P6_5
P6_4
RESET*
P10_0P10_1
Vref
P7_0
P6_6
VCC
VCC VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
R1910K
12
R2010K
12
R24680
12
R25680
12
R26680
12
Z1
FIDUCIAL
J4
POWER JACK
Tip 1
O 2
O 3+
C2010uF
TB1
RED
1
TB2
BLACK
1
U5LM317M
VIN3
AD
J1
VOUT 2
D7GREEN
12
JP51 2
JP71 2
+C1847uF
+ C74.7uF 16V
S1EVQ-PAC04M
D2FMMD914CT
13
Y220MHz
1 2 3
JP61 2
C1
0.1uF
1 2C3
0.1uF
12
C5
20pF
12C4
20pF
1 2
MH4
MTG_HOLE
C14
0.1uF
1 2
C17
0.1uF
12C13
0.1uF
1 2
C16
0.1uF
12
Vcc V+C1+ C2+
C2-C1-
GND V-
T
R
T
R
U4
MAX202/3232
12
3
4
5
6
7
89
10
11
12 13
14
15
16
MH3
MTG_HOLE
MH2
MTG_HOLE
MH1
MTG_HOLE
P1
747250-4
594837261
C11
0.1uF
1 2
Z2
FIDUCIAL
Z3
FIDUCIAL
Z4
FIDUCIAL
Z5
FIDUCIAL
Z6
FIDUCIAL
C10
33pF
12C8
33pF
1 2
t
RT1RL0503-5820-97-MS
12
J1
25x2 Connector
1 23 45 67 89 1011 1213 1415 1617 1819 2021 2223 2425 2627 2829 3031 3233 3435 3637 3839 4041 4243 4445 4647 4849 50
J2
103308-1
+1
+3
+5
+7
+9
+ 2
+ 4
+ 6
+ 8
+ 10
C190.1uF
12
C210.1uF
12
C60.1uF
12
C933pF
12
C150.1uF
12
D3RED
12
D4YELLOW
12
D5GREEN
12
S2EVQ-PAC04M
S3EVQ-PAC04M
S4EVQ-PAC04M
R41301 1%
12
R44432 1%
12
R37.32K 1%
12
R1510K
12
R162.2K
12
R42.2K
12
R52.2K
12
R710K
12
R1310K
12
R2310K
12
R43680
12
R1410K
1 2
R1100K
1 2
U3
ACM0802B
12345678910
11121314
A15 C16
C2
0.1uF
12
R2210K
13
2
R1750K
13
2
R462K
13
2
R2110K
12
JP1
12
C220.1uF
12
JP2
1 2
TB3
HOLE
1
TB4
HOLE
1
TB5
HOLE
1
TB6
HOLE
1
R1850K
13
2
R45
909 1%
12
Y1
32.768KHz
1 4
U1
M30262
AVss44
P15/INT3/ADtrg36
P16/INT435
P17/INT534
P60/CTS0/RTS0 33
P61/CLK0 32
P62/RxD0 31
P63/TxD0 30
P64/CTS1/RTS1 29
P65/CLK1 28
P66/RxD1 27
P67/TxD1 26
P70/TxD2/TA0out 25
P71/RxD2/TA0in 24
P72/CLK2/TA1out/V 23
P73/CTS2/RTS2/TA1in/V 22
P74/TA2out/W 21
P75/TA2in/W 20
P76/TA3out 19
P77/TA3in 18
P80/TA4out/U 17
P81/TA4in/U 16
P82/INT0 15
P83/INT1 14
P85/NMI 12
P86/Xcout 6
P87/Xcin 5
P90/TB0in 3
P91/TB1in 2
P92/TB2in 1
P93 48
P100/AN045
P101/AN143
CNVss4
P102/AN242
P103/AN341
P104/AN4/KI040
P105/AN5/KI139
P106/AN6/KI238
P107/AN7/KI337
Vss9
Vref46
AVcc47
Vcc11
Xin10
Xout8
RESET7
VDC13
JP31 2
Rx10K
12
S5ACT204222ST
116
15
314
13
2
4
S5B
CT204222ST
5 12
11
7 10
9
6
8
S6BCT204222ST5 12
11
7 10
9
6
8
S6ACT204222ST1 16
15
3 14
13
2
4
Mitsubishi microcomputers M16C/26 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER Serial I/O
108
Under
development Preliminary Specifications Rev.0.30 Specifications in this manual are tentative and subject to change.
Figure 1.15.2. Block diagram of UARTi (i = 0, 1) transmit/receive unit
SP SP PAR
2SP
1SP
UART
UART (7 bits)UART (8 bits)
UART (7 bits)
UART (9 bits)
Clock synchronous type
Clock synchronous type
TxDiUARTi transmit register
PAR enabled
PAR disabled
D8 D7 D6 D5 D4 D3 D2 D1 D0
SP: Stop bitPAR: Parity bit
UARTi†transmit buffer register
MSB/LSB conversion circuit
UART (8 bits)UART (9 bits)
Clock synchronous type
UARTi receive buffer register
UARTi receive register
2SP
1SP
PAR enabled
PAR disabled
UART
UART (7 bits)
UART (9 bits)
Clock synchronous type
Clock synchronous type
UART (7 bits)UART (8 bits)
RxDi
Clock synchronous type
UART (8 bits)UART (9 bits)
Address 03A616Address 03A716Address 03AE16Address 03AF16
Address 03A216Address 03A316Address 03AA16Address 03AB16
Data bus low-order bits
MSB/LSB conversion circuit
D7 D6 D5 D4 D3 D2 D1 D0D80 0 0 0 0 0 0
SP SP PAR
0
Data bus high-order bits
Embedded Systems 3
There was no standard for networks in the early days and as a result it was difficult for networks to communicate with each other.
The International Organization for Standardization (ISO) recognized this and in 1984 introduced the Open Systems Interconnection (OSI) reference model.
The OSI reference model organizes network functions into seven numbered layers.
Each layer provides a service to the layer above it in the protocol specification and communicates with the same layer’s software or hardware on other computers.
Layers 5-7 are concerned with services for the applications.
Layers 1-4 are concerned with the flow of data from end to end through the network
Data Communications
Embedded Systems 4
Physical Layer (1) – Serial CommunicationsThe basic premise of serial communications is that one or
two wires are used to transmit digital data.– Of course, ground reference is also needed (extra wire)
Can be one way or two way, usually two way, hence two communications wires.
Often other wires are used for other aspects of the communications (ground, “clear-to-send”, “data terminal ready”, etc).
Tx
TxRx
RxMachine 1 Machine 2
101101100111
001101101111
Embedded Systems 5
Serial Communication Basics
Send one bit of the message at a time
Message fields– Start bit (one bit)– Data (LSB first or MSB, and size – 7, 8, 9 bits)– Optional parity bit is used to make total number of ones in data even or odd– Stop bit (one or two bits)
All devices on network or link must use same communications parameters – The speed of communication must be the same as well (300, 600, 1200, 2400,
9600, 14400, 19200, etc.)More sophisticated network protocols have more information in each message
– Medium access control – when multiple nodes are on bus, they must arbitrate for permission to transmit
– Addressing information – for which node is this message intended?– Larger data payload– Stronger error detection or error correction information– Request for immediate response (“in-frame”)
Message
Databits
Embedded Systems 6
Bit Rate vs. Baud Rate
Bit Rate: how many data bits are transmitted per second?Baud Rate: how many symbols are transmitted per second?
– == How many times does the communication channel change state per second?
– A symbol may be represented by a voltage level, a sine wave’s frequency or phase, etc.
These may be different– Extra symbols (channel changes) may be inserted for framing, error
detection, acknowledgment, etc. These reduce the bit rate– A single symbol might encode more than one bit. This increases the
bit rate.• E.g. multilevel signaling, quadrature amplitude modulation, phase
amplitude modulation, etc.
Embedded Systems 7
Serial Communication BasicsRS232: rules on connector, signals/pins, voltage levels, handshaking, etc.RS232: Fulfilling All Your Communication Needs, Robert AshbyQuick Reference for RS485, RS422, RS232 and RS423Not so quick reference:The RS232 Standard: A Tutorial with Signal Names and Definitions, Christopher E. StrangioBit vs Baud rates: http://www.totse.com/en/technology/telecommunications/bits.html
Embedded Systems 8
UART ConceptsUART
– Universal – configurable to fit protocol requirements– Asynchronous – no clock line needed to de-serialize bits – Receiver/Transmitter
Embedded Systems 9
RS232 Communications CircuitExample RS-232 buffer (level-shifting) circuit
Max202/3232 includescharge pump to generate+10 V and -10V from single 5V supply
Logic-level signals(Vcc or Ground)
RS232-level signals(> 3 V or < -3 V)
Embedded Systems 10
General UART ConceptsUART subsystems
–Two fancy shift registers• Parallel to serial for
transmit• Serial to parallel for
receive–Programmable clock source• Clock must run at 16x
desired bit rate–Error detection
• Detect bad stop or parity bits
• Detect receive buffer overwrite
–Interrupt generators• Character received• Character
transmitted, ready to send another
Block Diagram of RX62N Serial Comm Interface
Embedded Systems 11
SCI in UART ModeTo communicate from the RX62N chip, you need to set up several registers, including:• Mode• Speed• Parity• Stop bits• Configuration
Embedded Systems 12
There are two primary “Data Registers”• SCIx.RDR (Receive Data Register)• SCIx.TDR (Transmit Data Register)
Serial Mode Register (SMR)
SCIx.SMR – Operational values of the UART
Each bit is encoded to make a special meaningCKS: transmission speed (more later)MP: Multi processor (set to 0)STOP: Stop bitsPM: Parity modePE: Parity EnableCHR: Length of dataCM: Communications mode
Embedded Systems 13
Reading a Manual (SMR)
Embedded Systems 14
Embedded Systems 15
Setting up the Serial Control Register
We will use SCI0There are several “control” registers you need to set up
before you can communicate.– First, you need to set up the speed of your port.– Select 8 data bits, no parity, one stop bit (8N1)– Asynchronous mode
What would the byte be set as?
SCI0.SMR.BYTE =
Serial Control Register
Embedded Systems 16
Serial Control Register – Serial Status Register
Check to see is communications was successful (SCIx.SSR)
Embedded Systems 17
Identifying Errors
char read_sci0_status;read_sci0_status = SCI0.SSR.BYTE;
What does it mean if the value holds 0x04?
What does it mean if the value holds 0x0C?
What does it mean if the value holds 0x24?
What does it mean if the value holds 0x20?
Embedded Systems 18
Embedded Systems 19
Setting up Speed of the Serial Port
The speed of communications is a combination of• PCLK• Bits CKS in the SMR• The Bit Rate Register (BRR)
Based on formula:B=bit rate, N=BRR setting, n=CKS setting
So, if you want to communicate at 38,400 bps, if your PCLK is 50 MHz, set n=0 and N=40
SCI0.BRR.BYTE = 40;
Embedded Systems 20
Example – Change to Slower Clock
What about a slower clock?
Say, 2400 bps? What do you need to set n and N?
Class Exercise – Set up clock
Set up to 115,200, including writing the code for BRR.
Embedded Systems 21
Error rate
The error rate is associated to the settings of n and N, since you will not get the exact value of xx.0.
So, if you want to communicate at 38,400 bps, if your PCLK is 50 MHz, set n=0 and N=40, error is:
Embedded Systems 22
What is the Maximum Speed??
Embedded Systems 23
Embedded Systems 24
Example – Set up Communications
Write a function to set up SCI0 to 115,200 bps, 8 data bits, odd parity, 1 stop bit:
Example – Send/receive data
Write a small function to send the string “Sending data” through the SCI0 port. Make sure to wait for the previous char to be transmitted before you send the next char:
Embedded Systems 25
Embedded Systems 26
Serial Communications and InterruptsNow we have three separate threads of control in the program
– main program (and subroutines it calls)
– Transmit ISR – executes when UART is ready to send another character
– Receive ISR – executes when UART receives a character
Need a way of buffering information between threads
– Solution: circular queue with head and tail pointers
– One for tx, one for rx
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Embedded Systems 27
Code to Implement QueuesEnqueue at tail (tail_ptr points to next free entry), dequeue from head (head_ptr points to item to remove)#define the queue size to make it easy to changeOne queue per direction
– tx ISR unloads tx_q– rx ISR loads rx_q
Other threads (e.g. main) load tx_q and unload rx_qNeed to wrap pointer at end of buffer to make it circular, use % (modulus, remainder) operatorQueue is empty if size == 0Queue is full if size == Q_SIZE
tailhead
older data
newer data
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Embedded Systems 28
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Embedded Systems 29
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Embedded Systems 30
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Serial Peripheral Interface (SPI)
• SPI bus is a de facto standard developed byMotorola
• Can work with as few as three wires, but more needed to access additional devices
• Better method to access peripherals than parallel I/O.
• Common clock means you can transmit at 25.0 Mbps
• Intended for very short distances (i.e. on-board)
• The RX62N has two SPI masters
Embedded Systems 31
SPI Details
•Serial Clock – RSPCK•Master Out, Slave in – MOSI (transmission from RX62N)•Master In, Slave Out – MISO (transmission from peripheral)•Slave Select – SSLx (select one of the peripheral devices)We will not investigate Multiple Master modes
Embedded Systems 32
SPI registers
• Serial Peripheral Control Register (SPCR)• Serial Peripheral Control Register 2 (SPCR2)• Serial Peripheral Pin Control Register (SPPCR) – set to
0x00• Slave Select Polarity (SSLP)• Serial Peripheral Status (SPS)
• Serial Peripheral Data Register (SPDR)
Embedded Systems 33
Serial Peripheral Control Register (SPCR)
Embedded Systems 34
Serial Peripheral Control Register 2 (SPCR2)
Slave Select Polarity (SSLP) – set these to 0 (active low)
Embedded Systems 35
Serial Peripheral Bit Rate Register (SPBR)
8 Bit value, used with SPCR
Embedded Systems 36
Serial Peripheral Command Register (SPCMDx)
Embedded Systems 37
Serial Peripheral Command Register (SPCMDx)
Embedded Systems 38
Serial Peripheral Status (SPS)
Embedded Systems 39
Code to set up SPI
void Init_RSPI(void){
MSTP(RSPI0) = 0;
IOPORT.PFGSPI.BIT.RSPIS = 0;
PORT.PFGSPI.BIT.RSPCKE = 1;
IOPORT.PFGSPI.BIT.SSL3E = 0;
IOPORT.PFGSPI.BIT.MOSIE = 1;
PORTC.DDR.BIT.B4 = 1;
PORTC.DR.BIT.B4 = 1;
PORTC.DDR.BIT.B7 = 1;
PORTC.DR.BIT.B7 = 1;
PORTC.DDR.BIT.B6 = 1;
PORTC.DR.BIT.B6 = 1;
PORTC.DDR.BIT.B5 = 1;
PORTC.DR.BIT.B5 = 1;
RSPI0.SPPCR.BYTE = 0x00;
RSPI0.SPBR.BYTE = 0x00;
RSPI0.SPDCR.BYTE = 0x00;
RSPI0.SPCKD.BYTE = 0x00;
RSPI0.SSLND.BYTE = 0x00;
RSPI0.SPND.BYTE = 0x00;
RSPI0.SPCR2.BYTE = 0x00;
RSPI0.SPCMD0.WORD = 0x0700;
RSPI0.SPCR.BYTE = 0x6B;
RSPI0.SSLP.BYTE = 0x08;
RSPI0.SPSCR.BYTE = 0x00;
}
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Code to communicate via SPI
void RSPI_Transmit_LWord(int16_t sLowWord, int16_t sHighWord){
PORTC.DR.BIT.B4 = 0;
while (RSPI0.SPSR.BIT.IDLNF);
RSPI0.SPDR.WORD.L = sLowWord;
RSPI0.SPDR.WORD.H = sHighWord;
while (RSPI0.SPSR.BIT.IDLNF);
(void)RSPI0.SPDR.WORD.L;
(void)RSPI0.SPDR.WORD.H;
PORTC.DR.BIT.B4 = 1 ; //CS OFF
}
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I2C
Inter-Integrated Circuit Bus
•A two line bus for communicating data at high speeds•Multiple devices on the same bus with only one master controlling the bus•Needs pull up resistors and is kept at a digital high level when idle
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Device 1Address (0x80)
Device 2Address (0xC0)
Device 3Address (0xE1)
Device 4Address (0x70)
SCL
SDA
Vcc
I2C: Properties
Modes
Max Transfer Speed
Max. number of devices/slaves connected per busNumber of wires required for communication (not including ground)Max. Length of wires[6]
Number of bits per unit transfer (excluding start and stop)Slave Selection method
Renesas Inter Integrated Chip Bus
I2C mode or SM bus mode
Up to 1Mbps (most devices won’t support speeds beyond 400kbps)128 (0 to 27 bits-1)
2
10 meters @ 100kbps
8
Through addressing
Embedded Systems 43
I2C: Working
Two wires:• SCL (Serial Clock): Synchronizing data transfer
on the data line • SDA (Serial Data): Responsible for transferring
data between devices• Together they can toggle in a controlled fashion
to indicated certain important conditions that determine the status of the bus and intentions of the devices on the bus.
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I2C: Working (Contd …) START CONDITION
• Before any form of data transfer takes place, a device wanting to transfer data must take control of the bus (Needs to monitor the bus).
• If the bus is held high, then it is free. A device may issue a START condition and take control of the bus.
• If a START condition is issued, no other device will transmit data on the bus (predetermined behavior for all devices).
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START
I2C: Working (Contd …) STOP CONDITION
• When device is ready to give up control of the bus, it issues a STOP condition
• STOP condition is one in which the SDA line gets pulled high while the SCL line is high.
• Other conditions: RESTART (combination of a START and STOP signal)
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STOP
I2C: Working (Contd …) After START
• Address the slave device with one byte of data which consists of a 7 bit address + 1 bit (R/W)
• If this bit is low, it indicates that the master wants to write to the slave device; if high, the master device wishes to read from the slave. This determines whether the next transactions are going to be read from or written to the addressed slave devices.
• A ninth bit (clock) is transmitted with each byte of data transmitted (ACK(Logic 0)/NACK(logic 1) bit). The slave device must provide an ACK within the 9th cycle to acknowledge receipt of data
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For Real???? Let’s have a look ..
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START
7 bit address(0x3A) R/W bit
ACK STOP
I2C: Code: Simple example (START and STOP)void RiicIni(unsigned char in_SelfAddr){
SYSTEM.MSTPCRB.BIT.MSTPB21 = 0;
RIIC0.ICCR1.BIT.ICE = 0;
RIIC0.ICCR1.BIT.IICRST = 1;
RIIC0.ICCR1.BIT.IICRST = 0;
RIIC0.SARU0.BIT.FS = 0;
RIIC0.SARL0.BYTE = in_SelfAddr;
RIIC0.ICMR1.BIT.CKS = 7;
RIIC0.ICBRH.BIT.BRH = 28;
RIIC0.ICBRL.BIT.BRL = 29;
RIIC0.ICMR3.BIT.ACKWP = 1;
RIIC0.ICIER.BIT.RIE = 1;
RIIC0.ICIER.BIT.TIE = 1;
RIIC0.ICIER.BIT.TEIE = 0;
RIIC0.ICIER.BIT.NAKIE = 1;
RIIC0.ICIER.BIT.SPIE = 1;
RIIC0.ICIER.BIT.STIE = 0;
RIIC0.ICIER.BIT.ALIE = 0;
RIIC0.ICIER.BIT.TMOIE = 0;
PORT1.ICR.BIT.B3 = 1;
PORT1.ICR.BIT.B2 = 1;
RIIC0.ICCR1.BIT.ICE = 1;
}
void RiicUnIni(void){
SYSTEM.MSTPCRB.BIT.MSTPB21 = 1;
}
unsigned char RiicSendStart(void){
if(RIIC0.ICCR1.BIT.ICE){
while(RIIC0.ICCR2.BIT.BBSY);
RIIC0.ICCR2.BIT.ST=1;
while(!(RIIC0.ICCR2.BIT.BBSY&&RIIC0.ICSR2.BIT.START));
RIIC0.ICSR2.BIT.START=0;
return 1;
}
else return 0;
}
unsigned char RiicSendStop(void){
if(RIIC0.ICCR1.BIT.ICE){
while(RIIC0.ICCR2.BIT.BBSY){
RIIC0.ICCR2.BIT.SP=1;
}
return 1;
}
else return 0;
}
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I2C Code: Reading and writing ….unsigned char RiicReadByte(unsigned char
slave_addr, unsigned char slave_register_num){
RiicWriteByte(slave_addr,slave_register_num);
RiicSendStop();
RIIC0.ICSR2.BIT.STOP=0;
RiicSendStart();
while(!RIIC0.ICSR2.BIT.TDRE);
RIIC0.ICDRT=slave_addr|(0x01);
while(!RIIC0.ICSR2.BIT.RDRF);
if(RIIC0.ICSR2.BIT.NACKF==0){
RIIC0.ICMR3.BIT.WAIT=1;
RIIC0.ICMR3.BIT.ACKBT=1;
read_byte=RIIC0.ICDRR;
while(!RIIC0.ICSR2.BIT.RDRF);
RIIC0.ICSR2.BIT.STOP=0;
RIIC0.ICCR2.BIT.SP=1;
read_byte=RIIC0.ICDRR;
while(!RIIC0.ICSR2.BIT.STOP);
return read_byte;
}
else return 0xFF;
}
unsigned char RiicWriteByte(unsigned char slave_addr, unsigned char data_byte){
RIIC0.ICDRT=slave_addr&(0xFE);
while(!RIIC0.ICSR2.BIT.TDRE);
RIIC0.ICDRT=data_byte;
while(!RIIC0.ICSR2.BIT.TEND){
if(RIIC0.ICSR2.BIT.NACKF){
RIIC0.ICSR2.BIT.NACKF=0;
return 0;
}
}
while(!RIIC0.ICSR2.BIT.TDRE);
while(!RIIC0.ICSR2.BIT.TEND) {
if(RIIC0.ICSR2.BIT.NACKF){
RIIC0.ICSR2.BIT.NACKF=0;
return 0;
}
}
return 1;
}
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I2C Code: the Glorious main()void main(void){
RiicIni(0x10);
RiicSendStart();
RiicWriteByte2(0x3A,0x2D,0x00);
RiicSendStop();
RiicSendStart();
i=RiicReadByte(0x3A,0x00);
RiicSendStop();
RiicUnIni();
while(1);
}
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