serial vector format

Liron Cohen 2006Liron Cohen 2006 11


IntroductionIntroduction

• SVF was jointly developed by Texas SVF was jointly developed by Texas Instruments and Teradyne in response to a Instruments and Teradyne in response to a need for the exchange of Boundary Scan need for the exchange of Boundary Scan test vectors between such tools as test test vectors between such tools as test generation software and ATE (Automatic generation software and ATE (Automatic Test Equipment).Test Equipment).

• At 1991, usage of the IEEE standard 1149.1 At 1991, usage of the IEEE standard 1149.1 was increasing but no common format or was increasing but no common format or language existed to satisfy the need for a language existed to satisfy the need for a common data exchange.common data exchange.



• The developers of SVF chose a format that The developers of SVF chose a format that did not use test vectors solely to provide did not use test vectors solely to provide TCK (clock) and TMS (Test Mode Select) TCK (clock) and TMS (Test Mode Select) signals to the TAP (Test Access Port).signals to the TAP (Test Access Port).

• Instead, the SVF format assume that all Instead, the SVF format assume that all operations begin and end in stable states. operations begin and end in stable states. This results in a much simpler and more This results in a much simpler and more concise description of the stimulus concise description of the stimulus vectors.vectors.



• Reminder :Reminder :

Boundary-scan test execution is controlled Boundary-scan test execution is controlled by the sequencing of TAP signals on the by the sequencing of TAP signals on the pins of the devices. Each device's behavior pins of the devices. Each device's behavior is determined solely by the states of its is determined solely by the states of its TAP pins. Boundary-scan tools must TAP pins. Boundary-scan tools must maintain knowledge of the sequences maintain knowledge of the sequences required to exert certain behaviors within required to exert certain behaviors within a device and where that device is located a device and where that device is located down the serial scan path. down the serial scan path.



• TAP ControllerTAP Controller

State Diagram:State Diagram:



• On the other hand, SVF controls the IEEE On the other hand, SVF controls the IEEE Std 1149.1 test bus using commands that Std 1149.1 test bus using commands that transition the TAP from one steady state to transition the TAP from one steady state to another.another.

• Rather than describe the explicit state of Rather than describe the explicit state of the IEEE Standard 1149.1 bus on every the IEEE Standard 1149.1 bus on every TCK cycle, SVF describes it in terms of TCK cycle, SVF describes it in terms of transactions conducted between stable transactions conducted between stable states. states.



• The Capture,Update, Pause, etc. states are The Capture,Update, Pause, etc. states are inferred rather than explicitly represented. inferred rather than explicitly represented. The data to be scanned in, expected data The data to be scanned in, expected data out, and compare mask are all grouped in an out, and compare mask are all grouped in an easily understandable manner.easily understandable manner.

• A command is provided to support A command is provided to support deterministic navigation of TAP states where deterministic navigation of TAP states where required.required.

• (Note - further discussion on the next slides (Note - further discussion on the next slides under State Commands).under State Commands).



• In addition to supporting higher level of scan In addition to supporting higher level of scan operations, SVF also supports combined operations, SVF also supports combined serial and parallel operations.serial and parallel operations.

• This allows SVF to accommodate This allows SVF to accommodate environments where some stimulus/response environments where some stimulus/response is handled via parallel I/O, and serial signals is handled via parallel I/O, and serial signals are accessed via an IEEE Std 1149.1-control are accessed via an IEEE Std 1149.1-control environment.environment.

• (Note - further discussion on the next slides (Note - further discussion on the next slides under Parallel Commands).under Parallel Commands).


IntroductionIntroduction• SVF also supports the concept of scan SVF also supports the concept of scan

offsets. Offsets allow a test to be applied to offsets. Offsets allow a test to be applied to a component or cluster of logic embedded a component or cluster of logic embedded in the middle of a scan path.in the middle of a scan path.

• SVF allows a header and trailer to be SVF allows a header and trailer to be defined once, which maintains the defined once, which maintains the instruction register and data registers of instruction register and data registers of the non-targeted devices in the desired the non-targeted devices in the desired BYPASS BYPASS state. If the same test were state. If the same test were targeted toward another device, this would targeted toward another device, this would be accommodated just by changing the be accommodated just by changing the headers and trailers.headers and trailers.

• (Note - further discussion on the next (Note - further discussion on the next slides under Offset Commands).slides under Offset Commands).



• Thus, with the goal of creating a format Thus, with the goal of creating a format that was independent of the vendor, that was independent of the vendor, software or equipment SVF was developed software or equipment SVF was developed and now used as the media for exchanging and now used as the media for exchanging descriptions of high-level IEEE 1149.1 bus descriptions of high-level IEEE 1149.1 bus operations.operations.

Ready to go deeper ?


AgendaAgenda

• Topics to be covered :Topics to be covered :– SVF Structure.SVF Structure.– SVF Commands.SVF Commands.– Case Study.Case Study.– Cons & Pros.Cons & Pros.


SVF StructureSVF Structure

• The SVF file is defined as an ASCII file that The SVF file is defined as an ASCII file that consists of a set of SVF statements.consists of a set of SVF statements.

• Statements are terminated by a semicolon Statements are terminated by a semicolon (;) and may continue for more than one (;) and may continue for more than one line.line.

• The maximum number of ASCII characters The maximum number of ASCII characters per line is 256.per line is 256.

• SVF is not case sensitive.SVF is not case sensitive.


SVF StructureSVF Structure• Comments can be inserted into an SVF file Comments can be inserted into an SVF file

after an exclamation point (!) or a pair of after an exclamation point (!) or a pair of slashes (//).slashes (//).

• Scan data within a statement is expressed as Scan data within a statement is expressed as hexadecimal and is always enclosed in hexadecimal and is always enclosed in parentheses.parentheses.

• Each statement consists of a command and Each statement consists of a command and parameters associated with that specific parameters associated with that specific command. Commands can be grouped into command. Commands can be grouped into three types: state commands, offset three types: state commands, offset commands, and parallel commands.commands, and parallel commands.


SVF StructureSVF Structure

• State commandsState commands are used to specify how are used to specify how the test sequences will traverse the IEEE the test sequences will traverse the IEEE Std 1149.1 TAP state machine.Std 1149.1 TAP state machine.

• Offset commandsOffset commands allow a series of SVF allow a series of SVF commands to be targeted toward a commands to be targeted toward a contiguous series of points in the scan contiguous series of points in the scan path.path.

• Parallel commandsParallel commands allow SVF to allow SVF to combine serial and parallel sequences.combine serial and parallel sequences.


SVF StructureSVF Structure• The following table lists each SVF state name

used for each IEEE 1149.1 TAP state name :


SVF CommandsSVF Commands

• State Commands :State Commands :– SDR :SDR : (Scan Data Register)(Scan Data Register) performs an performs an

IEEE Std 1149.1 data register scan.IEEE Std 1149.1 data register scan.– SIR :SIR : (Scan Instruction Register) (Scan Instruction Register) performs performs

an IEEE Std 1149.1 instruction register an IEEE Std 1149.1 instruction register scan.scan.

– ENDDR :ENDDR : establish a default state for the establish a default state for the bus following any Data Register scan.bus following any Data Register scan.

– ENDIR :ENDIR : establish a default state for the bus establish a default state for the bus following any Instruction Register scan.following any Instruction Register scan.


SVF CommandsSVF Commands– RUNTEST :RUNTEST : Forces the IEEE 1149.1 bus to Forces the IEEE 1149.1 bus to

a run state for a specified number of a run state for a specified number of clocks or a specified time period.clocks or a specified time period.

– STATE :STATE : Forces the IEEE 1149.1 bus to a Forces the IEEE 1149.1 bus to a specified stable state.specified stable state.

– TRST :TRST : activates or deactivates the activates or deactivates the optional Test-ReSeT signal of the IEEE Std optional Test-ReSeT signal of the IEEE Std 1149.1 bus.1149.1 bus.

• Note : Note : For each of the above commands except STATE & TRST, a default path through the state machine is used (observe the figure on the next slide). Each of these commands also terminates in a stable state.



• Offset Commands :Offset Commands :– HDR :HDR : (Header Data Register) (Header Data Register) specifies a specifies a

particular pattern of data bits to be padded onto particular pattern of data bits to be padded onto the front (Header) of every Data Register scan.the front (Header) of every Data Register scan.

– HIR :HIR : (Header Instruction Register) (Header Instruction Register) specifies a specifies a particular pattern of data bits to be padded particular pattern of data bits to be padded onto the front (Header) of every Instruction onto the front (Header) of every Instruction Register scan.Register scan.

– TDR : TDR : (Trailer Data Register)(Trailer Data Register) specify data to be specify data to be injected on the back (Trailer) of each Data injected on the back (Trailer) of each Data Register scan.Register scan.

– TIR : TIR : (Trailer Instruction Register)(Trailer Instruction Register) specify data to specify data to be injected on the back (Trailer) of each be injected on the back (Trailer) of each Instruction Register scan.Instruction Register scan.


SVF CommandsSVF Commands• Example of a device with multiple instances -Example of a device with multiple instances -

• Note – These patterns need only be specified Note – These patterns need only be specified once and are included on each scan unless once and are included on each scan unless changed by a subsequent HDR, HIR,TDR, or TIRchanged by a subsequent HDR, HIR,TDR, or TIR command.command.



• Parallel Commands :Parallel Commands :– PIO :PIO : (Parallel Input Output)(Parallel Input Output) Specifies a Specifies a

parallel test pattern.parallel test pattern.– PIOMAP :PIOMAP : (Parallel Input Output Map)(Parallel Input Output Map)

Maps PIO column positions to a logical Maps PIO column positions to a logical pin.pin.


Reminder of BISTReminder of BIST

• BIST :BIST : (Built-In Self Test).(Built-In Self Test).Logic included within a design that can Logic included within a design that can apply test signals and compare results to apply test signals and compare results to determine if the design is working determine if the design is working correctly.correctly.BISTBIST usually consists of special circuitry usually consists of special circuitry built as part of an IC’s internal design.built as part of an IC’s internal design.

• RUNBIST RUNBIST instruction places the IC in a self-instruction places the IC in a self-test mode, enables a comprehensive self-test mode, enables a comprehensive self-test of the IC’s core logic.test of the IC’s core logic.


Case StudyCase Study

• Let’s assume we want to test some unit Let’s assume we want to test some unit which sits in the middle of some device.which sits in the middle of some device.

• Be more specific lets say that the wanted Be more specific lets say that the wanted unit has three units before it in the scan unit has three units before it in the scan path and two units after it in the scan path.path and two units after it in the scan path.

• For simplicity we will also assume this unit For simplicity we will also assume this unit supports BIST, which initialized by scanning supports BIST, which initialized by scanning 4141(hex)(hex) into the IR and ABCD into the IR and ABCD(hex)(hex) into the DR. into the DR.

• Finally, we assume that the BIST in the wanted unit is executed by entering the Run-Test/Idle state for 95 clock cycles.


Case StudyCase Study

• At the end we will check all the BIST At the end we will check all the BIST result and compare all its bits against result and compare all its bits against a deterministic value (1234a deterministic value (1234(hex)(hex)) to ) to determine pass/fail.determine pass/fail.

• On the next slide we will look into the On the next slide we will look into the SVF file of this case.SVF file of this case.


Case StudyCase Study! Begin Test Program

! Disable Test Reset lineTRST OFF;! Initialize UUTSTATE RESET;! End IR scans in DRPAUSEENDIR DRPAUSE;! End DR scans in DRPAUSEENDDR DRPAUSE;! 24 bit IR headerHIR 24 TDI (FFFFFF);! 3 bit DR headerHDR 3 TDI (7);! 16 bit IR trailerTIR 16 TDI (FFFF);! 2 bit DR trailerTDR 2 TDI (3);

! 8 bit IR scan, load BIST opcodeSIR 8 TDI (41) TDO (81) MASK

(FF);! 16 bit DR scan, load BIST seedSDR 16 TDI (ABCD);! RUNBIST for 95 TCK ClocksRUNTEST 95 TCK ENDSTATE IRPAUSE;! 16 bit DR scan, check BIST

statusSDR 16 TDI (0000) TDO(1234)

MASK(FFFF);! Enter Test-Logic-ResetSTATE RESET;

! End Test Program


Cons and ProsCons and Pros

• Advantages :Advantages :

As we have seen, it is pretty simple As we have seen, it is pretty simple to to write a test with SVF file. This in turn write a test with SVF file. This in turn

reduces time (and money…).reduces time (and money…).

• Disadvantages :Disadvantages :

Because it’s simplicity, SVF only Because it’s simplicity, SVF only providesprovides

PASS/FAIL results, meaning no PASS/FAIL results, meaning no diagnostics.diagnostics.


Cons and ProsCons and Pros• Possible solution :Possible solution :

First, run all tests in SVF mode.First, run all tests in SVF mode.Only on the parts that failed run a C++Only on the parts that failed run a C++version to obtain diagnostic data.version to obtain diagnostic data.

(Note – A C++ test routine is developed to (Note – A C++ test routine is developed to automates the execution steps. The automates the execution steps. The program scans the instruction into the program scans the instruction into the instruction register, clocks the processor, instruction register, clocks the processor, etc. As each instruction is executed, the etc. As each instruction is executed, the program dumps the status registers to allow program dumps the status registers to allow monitoring of each instruction.)monitoring of each instruction.)


SummarySummary

• With SVF it is much easier to develop test With SVF it is much easier to develop test patterns that are transportable across a patterns that are transportable across a wide selection of simulation software and wide selection of simulation software and test equipment - from design verification test equipment - from design verification through field diagnostics. through field diagnostics.

• SVF is a useful and reliable format for SVF is a useful and reliable format for exchanging data between the Boundary exchanging data between the Boundary Scan TAP and the software that drives it.Scan TAP and the software that drives it.


Where to Get More Where to Get More InformationInformation• Course lecture 10Course lecture 10

• http://www.asset-http://www.asset-intertechintertech.com/support/.com/support/svfsvf..pdfpdf

• http://www.xjtag.com/jtag-svf.http://www.xjtag.com/jtag-svf.phpphp

• http://rpmfind.net/linux/netwinder.org/http://rpmfind.net/linux/netwinder.org/netwindernetwinder/docs/misc/bsdlformat.html/docs/misc/bsdlformat.html

• http://focus.ti.com/lit/an/ssya002c/ssya002c.http://focus.ti.com/lit/an/ssya002c/ssya002c.pdfpdf

http://www.asset-intertech.com/support/svf.pdf






http://www.xjtag.com/jtag-svf.php

http://www.xjtag.com/jtag-svf.php

http://rpmfind.net/linux/netwinder.org/netwinder/docs/misc/bsdlformat.html



http://focus.ti.com/lit/an/ssya002c/ssya002c.pdf

http://focus.ti.com/lit/an/ssya002c/ssya002c.pdf


בהצלחה להפועל ירושלים היום בהצלחה להפועל ירושלים היום !!!!!! בגמר הפלייאוףבגמר הפלייאוף

serial vector format

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