shannon decomposition william sandqvist [email protected] claude shannon mathematician / electrical...

Shannon decomposition

William Sandqvist williamkthse

Claude Shannon mathematician electrical engineer (1916 ndash2001)

William Sandqvist williamkthse (Degital Design Ex4)


(Ex 86)Show how a 4-to-1 multiplexer can be used as afunction generator for example to generate theOR function



Multiplexer as function generator


(Ex 86)

=

Show how a 4-to-1 multiplexer can be used as afunction generator for example to generate theOR function




BV 61Show how the function

can be implemented using a 3-to-8 decoder and an OR gate

)754320()( 321 mwwwf




)754320()( 321 mwwwf



Ex 87

A majority gate outputs the same value as the majority of the inputs The gate can for example be used in fault-tolerant logic or in image processing circuits a) (Set up the gates truth table and minimize the function with Karnaugh map Realize the function with AND-OR gates )

b) Realize the majority gate with an 8 1 MUX

c) Use Shannon decomposition and realize the majority gate with a2 1 MUX and gates

d) Realize the majority gate with only 21 MUXes


(87a)

With AND OR gates


(87a)

With AND OR gates


(87a)

bcabacM

With AND OR gates


(87a)

bcabacM

With AND OR gates


87b

With 8-to-1 mux hellip


87b



87c

Shannon decomposition 2-to-1 mux and gates


87c

)()( bccbcbabca

abccabcbabcaM



87c

)()( bccbcbabca

abccabcbabcaM



87c

)()( bccbcbabca

abccabcbabcaM

OR



87c

)()( bccbcbabca

abccabcbabcaM

OR)()( cbabca



87c

)()( bccbcbabca

abccabcbabcaM

OR)()( cbabca



87d

Shannon decomposition Only 2-to-1 muxes


87d

1)1()(

0)()0(

)()(

bcbcbcbbcbcbcbbbcbh

cbbcbbg

cbhbcgcbacbaM



87d

1)1()(

0)()0(

)()(

bcbcbcbbcbcbcbbbcbh

cbbcbbg

cbhbcgcbacbaM



87d

1)1()(

0)()0(

)()(

bcbcbcbbcbcbcbbbcbh

cbbcbbg

cbhbcgcbacbaM



BV 65


For the function

use Shannonrsquos expansion to derive an implementation using a 2-to-1 multiplexer and any necessary gates

)6320()( 321 mwwwf


BV 65


For the function


)6320()( 321 mwwwf

)()(

)()(

)110011010000()(

321321

3213232321

321321321321

321

wwwwww

wwwwwwwwww

wwwwwwwwwwww

mwwwf


BV 65


For the function


)6320()( 321 mwwwf

)()(

)()(

)110011010000()(

321321

3213232321

321321321321

321

wwwwww

wwwwwwwwww

wwwwwwwwwwww

mwwwf


BV 65


For the function


)6320()( 321 mwwwf

)()(

)()(

)110011010000()(

321321

3213232321

321321321321

321

wwwwww

wwwwwwwwww

wwwwwwwwwwww

mwwwf




(Ex 89)

Show how one four-input exorgate (XOR odd parity function) is realized in an FPGA circuit Show the contents of the SRAM cells ( LUT Lookup Table )


(89)


(89)



(89)



(Ex 88)

Set up full adder truth table Show how a full adder is implemented in an FPGA chip Logic elements of an FPGA is able to cascade COUT and CIN between neighbors Show the contents of the SRAM cells ( LUT Lookup Table )


(88)


(88)


(88)



(88)



(BV ex 631)In digital systems it is often necessary to have circuits that can shift the bits of a vector one or more bit positions to the left or right Design a circuit that can shift a four-bit vector W = w3w2w1w0 one bit position to the right when a control signal Shift is equal to 1 Let the outputs of the circuit be a four-bit vector Y = y3y2y1y0 and a signal k such that if Shift = 1 then y3 = 0 y2 = w3 y1 = w2 y0 = w1 and k = w0 If Shift = 0 then Y = W and k = 0



We uses MUXes

(BV ex 631)


(BV ex 631)We uses MUXes



BV ex 632Barrel shifter

The shifter in Example 631 shifts the bits of an input vector by one bit position to the right It fills the vacated bit on the left side with 0 If the bits that are shifted out are placed into the vacated position on the left then the circuit effectively rotates the bits of the input vector by a specified number of bit positions Such a circuit is called a barrel shifter

Design a four-bit barrel shifter that rotates the bits by 0 1 2 or 3 bit positions as determined by the valuation of two control signals s1 and s0

A barrelshifter is used to speed up floating point operations


Barrel shifter



BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

And so on

Truth table

W0W1W2W3

0123


= Lowcost FPGA


Key Benefits Lowest FPGA unit cost starting at $049 Ultra-low power in FlashFreeze mode as low as 2 microW Nonvolatile FPGA eliminates unnecessary parts from BOM Single-chip and ultra-low-power products simplify board design Variety of cost-optimized packages reduce assembly costs Low-power FPGAs reduce thermal management and cooling needs


BV 616

Actel Corporation manufactures an FPGA family called Act 1 which uses multiplexer based logic blocks Show how the function

can be implemented using only ACT 1 logic blocks

323132 wwwwwwf


BV 616323132 wwwwwwf



1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf



1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf



1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf



VHDL BV 251aWrite VHDL code to describe the following functions

)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf

VHDL code is written with a text editor and saved in a file with the extensionvhd The code always consists of two sections ENTITY and ARCHITECTURE

Entity is a description of how the circuit looks from the outside (the interface) and Architecture how it looks like inside


VHDL BV 251a

)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf

Comments begin with ndash-If you wish you can draw clarification ASCII graphics in the comment lines

-- ___________ -- | |-- | Functions |-- -gt-| x1 |-- -gt-| x2 f1 |-gt--- -gt-| x3 f2 |-gt--- -gt-| x4 |-- |___________|--

Program code is written with a text editor So we can only do text comments to the code A fixed-width font is used( eg Courier New )

One usually indent text blocks that belong together for greater clarity


VHDL BV 251a

)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf

ENTITY Functions IS PORT(x1 x2 x3 x4 IN STD_LOGIC f1 f2 OUT STD_LOGIC )END Functions

ARCHITECTURE LogicFunc OF Functions ISBEGIN f1 lt= (x1 AND NOT x3)OR(x2 AND NOT x3)OR (NOT x3 AND NOT x4)OR(x1 AND x2)OR (x1 AND NOT x4) f2 lt= (x1 OR NOT x3)AND(x1 OR x2 OR NOT x4)AND (x2 OR NOT x3 OR NOT x4) END LogicFunc

VHDL BV 621


Using a selected signal assignement write VHDL code for a 4-to-2 binary encoder Only one of w0 hellipw3 is rdquo1rdquo at a time

LIBRARY ieeeUSE IEEEstd_logic_1164allENTITY ENCODER IS PORT( w IN STD_LOGIC_VECTOR( 3 DOWNTO 0 ) y OUT STD_LOGIC_VECTOR( 1 DOWNTO 0 ) )END ENCODERARCHITECTURE Behavior OF ENCODER ISBEGIN WITH w SELECT y lt= rdquo00rdquo WHEN rdquo0001rdquo rdquo01rdquo WHEN rdquo0010rdquo rdquo10rdquo WHEN rdquo0100rdquo rdquo11rdquo WHEN OTHERSEND Behavior


(810) Additional if time permits


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1

Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1

0233010102 xxxxxxxxxxY

023 xxx

301 xxx

01xx

02 xx

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1

x0

x1

0

1

0 1

3 2 (00)x x

x0

x1

0

1

0 1

3 2 (01)x x

x0

x1

0

1

0 1

3 2 (11)x x

x0

x1

0

1

0 1

3 2 (10)x x

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1 - -

1 0

x0

x1

0

1

0 1

3 2 (00)x x

0 1

0 1

x0

x1

0

1

0 1

3 2 (01)x x

0 1

1 0

x0

x1

0

1

0 1

3 2 (11)x x

- -

1 0

x0

x1

0

1

0 1

3 2 (10)x x

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


- -

1 0

x0

x1

0

1

0 1

0

23 )00(

xY

xx

0 1

0 1

x0

x1

0

1

0 1

0

23 )10(

xY

xx

0 1

1 0

x0

x1

0

1

0 1

01

23 )11(

xxY

xx

- -

1 0

x0

x1

0

1

0 1

0

23 )01(

xY

xx

Y

0x0x0x

01 xx


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


- -

1 0

x0

x1

0

1

0 1

3 2

1 0

(00)x x

Y x x

0 1

0 1

x0

x1

0

1

0 1

0

23 )10(

xY

xx

0 1

1 0

x0

x1

0

1

0 1

01

23 )11(

xxY

xx

- -

1 0

x0

x1

0

1

0 1

3 2

1 0

(10)x x

Y x x

Y0x

01 xx

01 xx

01 xx


Or hellip

Or if you donrsquot have acess to the variable x0 inverted hellip



(Ex 86)

Slide 3

Slide 4

Slide 5

BV 61

Slide 7

Slide 8

Ex 87

(87a)

Slide 11

Slide 12

Slide 13

87b

Slide 15

87c

Slide 17

Slide 18

Slide 19

Slide 20

Slide 21

87d

Slide 23

Slide 24

Slide 25

Slide 26

BV 65

Slide 28

Slide 29

Slide 30

Slide 31

(Ex 89)

(89)

Slide 34

Slide 35

(Ex 88)

(88)

Slide 38

Slide 39

Slide 40

(BV ex 631)

Slide 42

Slide 43

Slide 44

Slide 45

BV ex 632 Barrel shifter

Barrel shifter

BV ex 632

Slide 49

Slide 50

Slide 51

Slide 52

Slide 53

Slide 54

= Lowcost FPGA

BV 616

Slide 57

Slide 58

Slide 59

Slide 60

Slide 61

VHDL BV 251a

Slide 63

Slide 64

VHDL BV 621

Slide 66


Slide 68

Slide 69

Slide 70

Slide 71

Slide 72

Slide 73







(Ex 86)

=







)754320()( 321 mwwwf




)754320()( 321 mwwwf



Ex 87






(87a)

With AND OR gates


(87a)

With AND OR gates


(87a)

bcabacM

With AND OR gates


(87a)

bcabacM

With AND OR gates


87b



87b



87c



87c

)()( bccbcbabca

abccabcbabcaM



87c

)()( bccbcbabca

abccabcbabcaM



87c

)()( bccbcbabca

abccabcbabcaM

OR



87c

)()( bccbcbabca

abccabcbabcaM

OR)()( cbabca



87c

)()( bccbcbabca

abccabcbabcaM

OR)()( cbabca



87d



87d

1)1()(

0)()0(

)()(

bcbcbcbbcbcbcbbbcbh

cbbcbbg

cbhbcgcbacbaM



87d

1)1()(

0)()0(

)()(

bcbcbcbbcbcbcbbbcbh

cbbcbbg

cbhbcgcbacbaM



87d

1)1()(

0)()0(

)()(

bcbcbcbbcbcbcbbbcbh

cbbcbbg

cbhbcgcbacbaM



BV 65


For the function


)6320()( 321 mwwwf


BV 65


For the function


)6320()( 321 mwwwf

)()(

)()(

)110011010000()(

321321

3213232321

321321321321

321

wwwwww

wwwwwwwwww

wwwwwwwwwwww

mwwwf


BV 65


For the function


)6320()( 321 mwwwf

)()(

)()(

)110011010000()(

321321

3213232321

321321321321

321

wwwwww

wwwwwwwwww

wwwwwwwwwwww

mwwwf


BV 65


For the function


)6320()( 321 mwwwf

)()(

)()(

)110011010000()(

321321

3213232321

321321321321

321

wwwwww

wwwwwwwwww

wwwwwwwwwwww

mwwwf




(Ex 89)



(89)


(89)



(89)



(Ex 88)



(88)


(88)


(88)



(88)






We uses MUXes

(BV ex 631)










Barrel shifter



BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

And so on

Truth table

W0W1W2W3

0123


= Lowcost FPGA




BV 616



323132 wwwwwwf





1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf



1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf



1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf




)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf




VHDL BV 251a

)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf






VHDL BV 251a

)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf



VHDL BV 621







Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1

Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


023 xxx

301 xxx

01xx

02 xx

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1

x0

x1

0

1

0 1

3 2 (00)x x

x0

x1

0

1

0 1

3 2 (01)x x

x0

x1

0

1

0 1

3 2 (11)x x

x0

x1

0

1

0 1

3 2 (10)x x

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1 - -

1 0

x0

x1

0

1

0 1

3 2 (00)x x

0 1

0 1

x0

x1

0

1

0 1

3 2 (01)x x

0 1

1 0

x0

x1

0

1

0 1

3 2 (11)x x

- -

1 0

x0

x1

0

1

0 1

3 2 (10)x x

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


- -

1 0

x0

x1

0

1

0 1

0

23 )00(

xY

xx

0 1

0 1

x0

x1

0

1

0 1

0

23 )10(

xY

xx

0 1

1 0

x0

x1

0

1

0 1

01

23 )11(

xxY

xx

- -

1 0

x0

x1

0

1

0 1

0

23 )01(

xY

xx

Y

0x0x0x

01 xx


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


- -

1 0

x0

x1

0

1

0 1

3 2

1 0

(00)x x

Y x x

0 1

0 1

x0

x1

0

1

0 1

0

23 )10(

xY

xx

0 1

1 0

x0

x1

0

1

0 1

01

23 )11(

xxY

xx

- -

1 0

x0

x1

0

1

0 1

3 2

1 0

(10)x x

Y x x

Y0x

01 xx

01 xx

01 xx


Or hellip




(Ex 86)

Slide 3

Slide 4

Slide 5

BV 61

Slide 7

Slide 8

Ex 87

(87a)

Slide 11

Slide 12

Slide 13

87b

Slide 15

87c

Slide 17

Slide 18

Slide 19

Slide 20

Slide 21

87d

Slide 23

Slide 24

Slide 25

Slide 26

BV 65

Slide 28

Slide 29

Slide 30

Slide 31

(Ex 89)

(89)

Slide 34

Slide 35

(Ex 88)

(88)

Slide 38

Slide 39

Slide 40

(BV ex 631)

Slide 42

Slide 43

Slide 44

Slide 45


Barrel shifter

BV ex 632

Slide 49

Slide 50

Slide 51

Slide 52

Slide 53

Slide 54

= Lowcost FPGA

BV 616

Slide 57

Slide 58

Slide 59

Slide 60

Slide 61

VHDL BV 251a

Slide 63

Slide 64

VHDL BV 621

Slide 66


Slide 68

Slide 69

Slide 70

Slide 71

Slide 72

Slide 73





)754320()( 321 mwwwf




)754320()( 321 mwwwf



Ex 87






(87a)

With AND OR gates


(87a)

With AND OR gates


(87a)

bcabacM

With AND OR gates


(87a)

bcabacM

With AND OR gates


87b



87b



87c



87c

)()( bccbcbabca

abccabcbabcaM



87c

)()( bccbcbabca

abccabcbabcaM



87c

)()( bccbcbabca

abccabcbabcaM

OR



87c

)()( bccbcbabca

abccabcbabcaM

OR)()( cbabca



87c

)()( bccbcbabca

abccabcbabcaM

OR)()( cbabca



87d



87d

1)1()(

0)()0(

)()(

bcbcbcbbcbcbcbbbcbh

cbbcbbg

cbhbcgcbacbaM



87d

1)1()(

0)()0(

)()(

bcbcbcbbcbcbcbbbcbh

cbbcbbg

cbhbcgcbacbaM



87d

1)1()(

0)()0(

)()(

bcbcbcbbcbcbcbbbcbh

cbbcbbg

cbhbcgcbacbaM



BV 65


For the function


)6320()( 321 mwwwf


BV 65


For the function


)6320()( 321 mwwwf

)()(

)()(

)110011010000()(

321321

3213232321

321321321321

321

wwwwww

wwwwwwwwww

wwwwwwwwwwww

mwwwf


BV 65


For the function


)6320()( 321 mwwwf

)()(

)()(

)110011010000()(

321321

3213232321

321321321321

321

wwwwww

wwwwwwwwww

wwwwwwwwwwww

mwwwf


BV 65


For the function


)6320()( 321 mwwwf

)()(

)()(

)110011010000()(

321321

3213232321

321321321321

321

wwwwww

wwwwwwwwww

wwwwwwwwwwww

mwwwf




(Ex 89)



(89)


(89)



(89)



(Ex 88)



(88)


(88)


(88)



(88)






We uses MUXes

(BV ex 631)










Barrel shifter



BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

And so on

Truth table

W0W1W2W3

0123


= Lowcost FPGA




BV 616



323132 wwwwwwf





1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf



1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf



1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf




)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf




VHDL BV 251a

)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf






VHDL BV 251a

)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf



VHDL BV 621







Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1

Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


023 xxx

301 xxx

01xx

02 xx

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1

x0

x1

0

1

0 1

3 2 (00)x x

x0

x1

0

1

0 1

3 2 (01)x x

x0

x1

0

1

0 1

3 2 (11)x x

x0

x1

0

1

0 1

3 2 (10)x x

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1 - -

1 0

x0

x1

0

1

0 1

3 2 (00)x x

0 1

0 1

x0

x1

0

1

0 1

3 2 (01)x x

0 1

1 0

x0

x1

0

1

0 1

3 2 (11)x x

- -

1 0

x0

x1

0

1

0 1

3 2 (10)x x

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


- -

1 0

x0

x1

0

1

0 1

0

23 )00(

xY

xx

0 1

0 1

x0

x1

0

1

0 1

0

23 )10(

xY

xx

0 1

1 0

x0

x1

0

1

0 1

01

23 )11(

xxY

xx

- -

1 0

x0

x1

0

1

0 1

0

23 )01(

xY

xx

Y

0x0x0x

01 xx


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


- -

1 0

x0

x1

0

1

0 1

3 2

1 0

(00)x x

Y x x

0 1

0 1

x0

x1

0

1

0 1

0

23 )10(

xY

xx

0 1

1 0

x0

x1

0

1

0 1

01

23 )11(

xxY

xx

- -

1 0

x0

x1

0

1

0 1

3 2

1 0

(10)x x

Y x x

Y0x

01 xx

01 xx

01 xx


Or hellip




(Ex 86)

Slide 3

Slide 4

Slide 5

BV 61

Slide 7

Slide 8

Ex 87

(87a)

Slide 11

Slide 12

Slide 13

87b

Slide 15

87c

Slide 17

Slide 18

Slide 19

Slide 20

Slide 21

87d

Slide 23

Slide 24

Slide 25

Slide 26

BV 65

Slide 28

Slide 29

Slide 30

Slide 31

(Ex 89)

(89)

Slide 34

Slide 35

(Ex 88)

(88)

Slide 38

Slide 39

Slide 40

(BV ex 631)

Slide 42

Slide 43

Slide 44

Slide 45


Barrel shifter

BV ex 632

Slide 49

Slide 50

Slide 51

Slide 52

Slide 53

Slide 54

= Lowcost FPGA

BV 616

Slide 57

Slide 58

Slide 59

Slide 60

Slide 61

VHDL BV 251a

Slide 63

Slide 64

VHDL BV 621

Slide 66


Slide 68

Slide 69

Slide 70

Slide 71

Slide 72

Slide 73




)754320()( 321 mwwwf



Ex 87






(87a)

With AND OR gates


(87a)

With AND OR gates


(87a)

bcabacM

With AND OR gates


(87a)

bcabacM

With AND OR gates


87b



87b



87c



87c

)()( bccbcbabca

abccabcbabcaM



87c

)()( bccbcbabca

abccabcbabcaM



87c

)()( bccbcbabca

abccabcbabcaM

OR



87c

)()( bccbcbabca

abccabcbabcaM

OR)()( cbabca



87c

)()( bccbcbabca

abccabcbabcaM

OR)()( cbabca



87d



87d

1)1()(

0)()0(

)()(

bcbcbcbbcbcbcbbbcbh

cbbcbbg

cbhbcgcbacbaM



87d

1)1()(

0)()0(

)()(

bcbcbcbbcbcbcbbbcbh

cbbcbbg

cbhbcgcbacbaM



87d

1)1()(

0)()0(

)()(

bcbcbcbbcbcbcbbbcbh

cbbcbbg

cbhbcgcbacbaM



BV 65


For the function


)6320()( 321 mwwwf


BV 65


For the function


)6320()( 321 mwwwf

)()(

)()(

)110011010000()(

321321

3213232321

321321321321

321

wwwwww

wwwwwwwwww

wwwwwwwwwwww

mwwwf


BV 65


For the function


)6320()( 321 mwwwf

)()(

)()(

)110011010000()(

321321

3213232321

321321321321

321

wwwwww

wwwwwwwwww

wwwwwwwwwwww

mwwwf


BV 65


For the function


)6320()( 321 mwwwf

)()(

)()(

)110011010000()(

321321

3213232321

321321321321

321

wwwwww

wwwwwwwwww

wwwwwwwwwwww

mwwwf




(Ex 89)



(89)


(89)



(89)



(Ex 88)



(88)


(88)


(88)



(88)






We uses MUXes

(BV ex 631)










Barrel shifter



BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

And so on

Truth table

W0W1W2W3

0123


= Lowcost FPGA




BV 616



323132 wwwwwwf





1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf



1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf



1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf




)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf




VHDL BV 251a

)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf






VHDL BV 251a

)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf



VHDL BV 621







Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1

Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


023 xxx

301 xxx

01xx

02 xx

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1

x0

x1

0

1

0 1

3 2 (00)x x

x0

x1

0

1

0 1

3 2 (01)x x

x0

x1

0

1

0 1

3 2 (11)x x

x0

x1

0

1

0 1

3 2 (10)x x

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1 - -

1 0

x0

x1

0

1

0 1

3 2 (00)x x

0 1

0 1

x0

x1

0

1

0 1

3 2 (01)x x

0 1

1 0

x0

x1

0

1

0 1

3 2 (11)x x

- -

1 0

x0

x1

0

1

0 1

3 2 (10)x x

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


- -

1 0

x0

x1

0

1

0 1

0

23 )00(

xY

xx

0 1

0 1

x0

x1

0

1

0 1

0

23 )10(

xY

xx

0 1

1 0

x0

x1

0

1

0 1

01

23 )11(

xxY

xx

- -

1 0

x0

x1

0

1

0 1

0

23 )01(

xY

xx

Y

0x0x0x

01 xx


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


- -

1 0

x0

x1

0

1

0 1

3 2

1 0

(00)x x

Y x x

0 1

0 1

x0

x1

0

1

0 1

0

23 )10(

xY

xx

0 1

1 0

x0

x1

0

1

0 1

01

23 )11(

xxY

xx

- -

1 0

x0

x1

0

1

0 1

3 2

1 0

(10)x x

Y x x

Y0x

01 xx

01 xx

01 xx


Or hellip




(Ex 86)

Slide 3

Slide 4

Slide 5

BV 61

Slide 7

Slide 8

Ex 87

(87a)

Slide 11

Slide 12

Slide 13

87b

Slide 15

87c

Slide 17

Slide 18

Slide 19

Slide 20

Slide 21

87d

Slide 23

Slide 24

Slide 25

Slide 26

BV 65

Slide 28

Slide 29

Slide 30

Slide 31

(Ex 89)

(89)

Slide 34

Slide 35

(Ex 88)

(88)

Slide 38

Slide 39

Slide 40

(BV ex 631)

Slide 42

Slide 43

Slide 44

Slide 45


Barrel shifter

BV ex 632

Slide 49

Slide 50

Slide 51

Slide 52

Slide 53

Slide 54

= Lowcost FPGA

BV 616

Slide 57

Slide 58

Slide 59

Slide 60

Slide 61

VHDL BV 251a

Slide 63

Slide 64

VHDL BV 621

Slide 66


Slide 68

Slide 69

Slide 70

Slide 71

Slide 72

Slide 73



Ex 87






(87a)

With AND OR gates


(87a)

With AND OR gates


(87a)

bcabacM

With AND OR gates


(87a)

bcabacM

With AND OR gates


87b



87b



87c



87c

)()( bccbcbabca

abccabcbabcaM



87c

)()( bccbcbabca

abccabcbabcaM



87c

)()( bccbcbabca

abccabcbabcaM

OR



87c

)()( bccbcbabca

abccabcbabcaM

OR)()( cbabca



87c

)()( bccbcbabca

abccabcbabcaM

OR)()( cbabca



87d



87d

1)1()(

0)()0(

)()(

bcbcbcbbcbcbcbbbcbh

cbbcbbg

cbhbcgcbacbaM



87d

1)1()(

0)()0(

)()(

bcbcbcbbcbcbcbbbcbh

cbbcbbg

cbhbcgcbacbaM



87d

1)1()(

0)()0(

)()(

bcbcbcbbcbcbcbbbcbh

cbbcbbg

cbhbcgcbacbaM



BV 65


For the function


)6320()( 321 mwwwf


BV 65


For the function


)6320()( 321 mwwwf

)()(

)()(

)110011010000()(

321321

3213232321

321321321321

321

wwwwww

wwwwwwwwww

wwwwwwwwwwww

mwwwf


BV 65


For the function


)6320()( 321 mwwwf

)()(

)()(

)110011010000()(

321321

3213232321

321321321321

321

wwwwww

wwwwwwwwww

wwwwwwwwwwww

mwwwf


BV 65


For the function


)6320()( 321 mwwwf

)()(

)()(

)110011010000()(

321321

3213232321

321321321321

321

wwwwww

wwwwwwwwww

wwwwwwwwwwww

mwwwf




(Ex 89)



(89)


(89)



(89)



(Ex 88)



(88)


(88)


(88)



(88)






We uses MUXes

(BV ex 631)










Barrel shifter



BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

And so on

Truth table

W0W1W2W3

0123


= Lowcost FPGA




BV 616



323132 wwwwwwf





1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf



1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf



1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf




)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf




VHDL BV 251a

)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf






VHDL BV 251a

)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf



VHDL BV 621







Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1

Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


023 xxx

301 xxx

01xx

02 xx

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1

x0

x1

0

1

0 1

3 2 (00)x x

x0

x1

0

1

0 1

3 2 (01)x x

x0

x1

0

1

0 1

3 2 (11)x x

x0

x1

0

1

0 1

3 2 (10)x x

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1 - -

1 0

x0

x1

0

1

0 1

3 2 (00)x x

0 1

0 1

x0

x1

0

1

0 1

3 2 (01)x x

0 1

1 0

x0

x1

0

1

0 1

3 2 (11)x x

- -

1 0

x0

x1

0

1

0 1

3 2 (10)x x

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


- -

1 0

x0

x1

0

1

0 1

0

23 )00(

xY

xx

0 1

0 1

x0

x1

0

1

0 1

0

23 )10(

xY

xx

0 1

1 0

x0

x1

0

1

0 1

01

23 )11(

xxY

xx

- -

1 0

x0

x1

0

1

0 1

0

23 )01(

xY

xx

Y

0x0x0x

01 xx


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


- -

1 0

x0

x1

0

1

0 1

3 2

1 0

(00)x x

Y x x

0 1

0 1

x0

x1

0

1

0 1

0

23 )10(

xY

xx

0 1

1 0

x0

x1

0

1

0 1

01

23 )11(

xxY

xx

- -

1 0

x0

x1

0

1

0 1

3 2

1 0

(10)x x

Y x x

Y0x

01 xx

01 xx

01 xx


Or hellip




(Ex 86)

Slide 3

Slide 4

Slide 5

BV 61

Slide 7

Slide 8

Ex 87

(87a)

Slide 11

Slide 12

Slide 13

87b

Slide 15

87c

Slide 17

Slide 18

Slide 19

Slide 20

Slide 21

87d

Slide 23

Slide 24

Slide 25

Slide 26

BV 65

Slide 28

Slide 29

Slide 30

Slide 31

(Ex 89)

(89)

Slide 34

Slide 35

(Ex 88)

(88)

Slide 38

Slide 39

Slide 40

(BV ex 631)

Slide 42

Slide 43

Slide 44

Slide 45


Barrel shifter

BV ex 632

Slide 49

Slide 50

Slide 51

Slide 52

Slide 53

Slide 54

= Lowcost FPGA

BV 616

Slide 57

Slide 58

Slide 59

Slide 60

Slide 61

VHDL BV 251a

Slide 63

Slide 64

VHDL BV 621

Slide 66


Slide 68

Slide 69

Slide 70

Slide 71

Slide 72

Slide 73


(87a)

With AND OR gates


(87a)

With AND OR gates


(87a)

bcabacM

With AND OR gates


(87a)

bcabacM

With AND OR gates


87b



87b



87c



87c

)()( bccbcbabca

abccabcbabcaM



87c

)()( bccbcbabca

abccabcbabcaM



87c

)()( bccbcbabca

abccabcbabcaM

OR



87c

)()( bccbcbabca

abccabcbabcaM

OR)()( cbabca



87c

)()( bccbcbabca

abccabcbabcaM

OR)()( cbabca



87d



87d

1)1()(

0)()0(

)()(

bcbcbcbbcbcbcbbbcbh

cbbcbbg

cbhbcgcbacbaM



87d

1)1()(

0)()0(

)()(

bcbcbcbbcbcbcbbbcbh

cbbcbbg

cbhbcgcbacbaM



87d

1)1()(

0)()0(

)()(

bcbcbcbbcbcbcbbbcbh

cbbcbbg

cbhbcgcbacbaM



BV 65


For the function


)6320()( 321 mwwwf


BV 65


For the function


)6320()( 321 mwwwf

)()(

)()(

)110011010000()(

321321

3213232321

321321321321

321

wwwwww

wwwwwwwwww

wwwwwwwwwwww

mwwwf


BV 65


For the function


)6320()( 321 mwwwf

)()(

)()(

)110011010000()(

321321

3213232321

321321321321

321

wwwwww

wwwwwwwwww

wwwwwwwwwwww

mwwwf


BV 65


For the function


)6320()( 321 mwwwf

)()(

)()(

)110011010000()(

321321

3213232321

321321321321

321

wwwwww

wwwwwwwwww

wwwwwwwwwwww

mwwwf




(Ex 89)



(89)


(89)



(89)



(Ex 88)



(88)


(88)


(88)



(88)






We uses MUXes

(BV ex 631)










Barrel shifter



BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

And so on

Truth table

W0W1W2W3

0123


= Lowcost FPGA




BV 616



323132 wwwwwwf





1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf



1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf



1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf




)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf




VHDL BV 251a

)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf






VHDL BV 251a

)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf



VHDL BV 621







Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1

Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


023 xxx

301 xxx

01xx

02 xx

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1

x0

x1

0

1

0 1

3 2 (00)x x

x0

x1

0

1

0 1

3 2 (01)x x

x0

x1

0

1

0 1

3 2 (11)x x

x0

x1

0

1

0 1

3 2 (10)x x

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1 - -

1 0

x0

x1

0

1

0 1

3 2 (00)x x

0 1

0 1

x0

x1

0

1

0 1

3 2 (01)x x

0 1

1 0

x0

x1

0

1

0 1

3 2 (11)x x

- -

1 0

x0

x1

0

1

0 1

3 2 (10)x x

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


- -

1 0

x0

x1

0

1

0 1

0

23 )00(

xY

xx

0 1

0 1

x0

x1

0

1

0 1

0

23 )10(

xY

xx

0 1

1 0

x0

x1

0

1

0 1

01

23 )11(

xxY

xx

- -

1 0

x0

x1

0

1

0 1

0

23 )01(

xY

xx

Y

0x0x0x

01 xx


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


- -

1 0

x0

x1

0

1

0 1

3 2

1 0

(00)x x

Y x x

0 1

0 1

x0

x1

0

1

0 1

0

23 )10(

xY

xx

0 1

1 0

x0

x1

0

1

0 1

01

23 )11(

xxY

xx

- -

1 0

x0

x1

0

1

0 1

3 2

1 0

(10)x x

Y x x

Y0x

01 xx

01 xx

01 xx


Or hellip




(Ex 86)

Slide 3

Slide 4

Slide 5

BV 61

Slide 7

Slide 8

Ex 87

(87a)

Slide 11

Slide 12

Slide 13

87b

Slide 15

87c

Slide 17

Slide 18

Slide 19

Slide 20

Slide 21

87d

Slide 23

Slide 24

Slide 25

Slide 26

BV 65

Slide 28

Slide 29

Slide 30

Slide 31

(Ex 89)

(89)

Slide 34

Slide 35

(Ex 88)

(88)

Slide 38

Slide 39

Slide 40

(BV ex 631)

Slide 42

Slide 43

Slide 44

Slide 45


Barrel shifter

BV ex 632

Slide 49

Slide 50

Slide 51

Slide 52

Slide 53

Slide 54

= Lowcost FPGA

BV 616

Slide 57

Slide 58

Slide 59

Slide 60

Slide 61

VHDL BV 251a

Slide 63

Slide 64

VHDL BV 621

Slide 66


Slide 68

Slide 69

Slide 70

Slide 71

Slide 72

Slide 73


(87a)

With AND OR gates


(87a)

bcabacM

With AND OR gates


(87a)

bcabacM

With AND OR gates


87b



87b



87c



87c

)()( bccbcbabca

abccabcbabcaM



87c

)()( bccbcbabca

abccabcbabcaM



87c

)()( bccbcbabca

abccabcbabcaM

OR



87c

)()( bccbcbabca

abccabcbabcaM

OR)()( cbabca



87c

)()( bccbcbabca

abccabcbabcaM

OR)()( cbabca



87d



87d

1)1()(

0)()0(

)()(

bcbcbcbbcbcbcbbbcbh

cbbcbbg

cbhbcgcbacbaM



87d

1)1()(

0)()0(

)()(

bcbcbcbbcbcbcbbbcbh

cbbcbbg

cbhbcgcbacbaM



87d

1)1()(

0)()0(

)()(

bcbcbcbbcbcbcbbbcbh

cbbcbbg

cbhbcgcbacbaM



BV 65


For the function


)6320()( 321 mwwwf


BV 65


For the function


)6320()( 321 mwwwf

)()(

)()(

)110011010000()(

321321

3213232321

321321321321

321

wwwwww

wwwwwwwwww

wwwwwwwwwwww

mwwwf


BV 65


For the function


)6320()( 321 mwwwf

)()(

)()(

)110011010000()(

321321

3213232321

321321321321

321

wwwwww

wwwwwwwwww

wwwwwwwwwwww

mwwwf


BV 65


For the function


)6320()( 321 mwwwf

)()(

)()(

)110011010000()(

321321

3213232321

321321321321

321

wwwwww

wwwwwwwwww

wwwwwwwwwwww

mwwwf




(Ex 89)



(89)


(89)



(89)



(Ex 88)



(88)


(88)


(88)



(88)






We uses MUXes

(BV ex 631)










Barrel shifter



BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

And so on

Truth table

W0W1W2W3

0123


= Lowcost FPGA




BV 616



323132 wwwwwwf





1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf



1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf



1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf




)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf




VHDL BV 251a

)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf






VHDL BV 251a

)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf



VHDL BV 621







Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1

Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


023 xxx

301 xxx

01xx

02 xx

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1

x0

x1

0

1

0 1

3 2 (00)x x

x0

x1

0

1

0 1

3 2 (01)x x

x0

x1

0

1

0 1

3 2 (11)x x

x0

x1

0

1

0 1

3 2 (10)x x

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1 - -

1 0

x0

x1

0

1

0 1

3 2 (00)x x

0 1

0 1

x0

x1

0

1

0 1

3 2 (01)x x

0 1

1 0

x0

x1

0

1

0 1

3 2 (11)x x

- -

1 0

x0

x1

0

1

0 1

3 2 (10)x x

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


- -

1 0

x0

x1

0

1

0 1

0

23 )00(

xY

xx

0 1

0 1

x0

x1

0

1

0 1

0

23 )10(

xY

xx

0 1

1 0

x0

x1

0

1

0 1

01

23 )11(

xxY

xx

- -

1 0

x0

x1

0

1

0 1

0

23 )01(

xY

xx

Y

0x0x0x

01 xx


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


- -

1 0

x0

x1

0

1

0 1

3 2

1 0

(00)x x

Y x x

0 1

0 1

x0

x1

0

1

0 1

0

23 )10(

xY

xx

0 1

1 0

x0

x1

0

1

0 1

01

23 )11(

xxY

xx

- -

1 0

x0

x1

0

1

0 1

3 2

1 0

(10)x x

Y x x

Y0x

01 xx

01 xx

01 xx


Or hellip




(Ex 86)

Slide 3

Slide 4

Slide 5

BV 61

Slide 7

Slide 8

Ex 87

(87a)

Slide 11

Slide 12

Slide 13

87b

Slide 15

87c

Slide 17

Slide 18

Slide 19

Slide 20

Slide 21

87d

Slide 23

Slide 24

Slide 25

Slide 26

BV 65

Slide 28

Slide 29

Slide 30

Slide 31

(Ex 89)

(89)

Slide 34

Slide 35

(Ex 88)

(88)

Slide 38

Slide 39

Slide 40

(BV ex 631)

Slide 42

Slide 43

Slide 44

Slide 45


Barrel shifter

BV ex 632

Slide 49

Slide 50

Slide 51

Slide 52

Slide 53

Slide 54

= Lowcost FPGA

BV 616

Slide 57

Slide 58

Slide 59

Slide 60

Slide 61

VHDL BV 251a

Slide 63

Slide 64

VHDL BV 621

Slide 66


Slide 68

Slide 69

Slide 70

Slide 71

Slide 72

Slide 73


(87a)

bcabacM

With AND OR gates


(87a)

bcabacM

With AND OR gates


87b



87b



87c



87c

)()( bccbcbabca

abccabcbabcaM



87c

)()( bccbcbabca

abccabcbabcaM



87c

)()( bccbcbabca

abccabcbabcaM

OR



87c

)()( bccbcbabca

abccabcbabcaM

OR)()( cbabca



87c

)()( bccbcbabca

abccabcbabcaM

OR)()( cbabca



87d



87d

1)1()(

0)()0(

)()(

bcbcbcbbcbcbcbbbcbh

cbbcbbg

cbhbcgcbacbaM



87d

1)1()(

0)()0(

)()(

bcbcbcbbcbcbcbbbcbh

cbbcbbg

cbhbcgcbacbaM



87d

1)1()(

0)()0(

)()(

bcbcbcbbcbcbcbbbcbh

cbbcbbg

cbhbcgcbacbaM



BV 65


For the function


)6320()( 321 mwwwf


BV 65


For the function


)6320()( 321 mwwwf

)()(

)()(

)110011010000()(

321321

3213232321

321321321321

321

wwwwww

wwwwwwwwww

wwwwwwwwwwww

mwwwf


BV 65


For the function


)6320()( 321 mwwwf

)()(

)()(

)110011010000()(

321321

3213232321

321321321321

321

wwwwww

wwwwwwwwww

wwwwwwwwwwww

mwwwf


BV 65


For the function


)6320()( 321 mwwwf

)()(

)()(

)110011010000()(

321321

3213232321

321321321321

321

wwwwww

wwwwwwwwww

wwwwwwwwwwww

mwwwf




(Ex 89)



(89)


(89)



(89)



(Ex 88)



(88)


(88)


(88)



(88)






We uses MUXes

(BV ex 631)










Barrel shifter



BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

And so on

Truth table

W0W1W2W3

0123


= Lowcost FPGA




BV 616



323132 wwwwwwf





1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf



1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf



1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf




)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf




VHDL BV 251a

)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf






VHDL BV 251a

)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf



VHDL BV 621







Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1

Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


023 xxx

301 xxx

01xx

02 xx

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1

x0

x1

0

1

0 1

3 2 (00)x x

x0

x1

0

1

0 1

3 2 (01)x x

x0

x1

0

1

0 1

3 2 (11)x x

x0

x1

0

1

0 1

3 2 (10)x x

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1 - -

1 0

x0

x1

0

1

0 1

3 2 (00)x x

0 1

0 1

x0

x1

0

1

0 1

3 2 (01)x x

0 1

1 0

x0

x1

0

1

0 1

3 2 (11)x x

- -

1 0

x0

x1

0

1

0 1

3 2 (10)x x

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


- -

1 0

x0

x1

0

1

0 1

0

23 )00(

xY

xx

0 1

0 1

x0

x1

0

1

0 1

0

23 )10(

xY

xx

0 1

1 0

x0

x1

0

1

0 1

01

23 )11(

xxY

xx

- -

1 0

x0

x1

0

1

0 1

0

23 )01(

xY

xx

Y

0x0x0x

01 xx


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


- -

1 0

x0

x1

0

1

0 1

3 2

1 0

(00)x x

Y x x

0 1

0 1

x0

x1

0

1

0 1

0

23 )10(

xY

xx

0 1

1 0

x0

x1

0

1

0 1

01

23 )11(

xxY

xx

- -

1 0

x0

x1

0

1

0 1

3 2

1 0

(10)x x

Y x x

Y0x

01 xx

01 xx

01 xx


Or hellip




(Ex 86)

Slide 3

Slide 4

Slide 5

BV 61

Slide 7

Slide 8

Ex 87

(87a)

Slide 11

Slide 12

Slide 13

87b

Slide 15

87c

Slide 17

Slide 18

Slide 19

Slide 20

Slide 21

87d

Slide 23

Slide 24

Slide 25

Slide 26

BV 65

Slide 28

Slide 29

Slide 30

Slide 31

(Ex 89)

(89)

Slide 34

Slide 35

(Ex 88)

(88)

Slide 38

Slide 39

Slide 40

(BV ex 631)

Slide 42

Slide 43

Slide 44

Slide 45


Barrel shifter

BV ex 632

Slide 49

Slide 50

Slide 51

Slide 52

Slide 53

Slide 54

= Lowcost FPGA

BV 616

Slide 57

Slide 58

Slide 59

Slide 60

Slide 61

VHDL BV 251a

Slide 63

Slide 64

VHDL BV 621

Slide 66


Slide 68

Slide 69

Slide 70

Slide 71

Slide 72

Slide 73


(87a)

bcabacM

With AND OR gates


87b



87b



87c



87c

)()( bccbcbabca

abccabcbabcaM



87c

)()( bccbcbabca

abccabcbabcaM



87c

)()( bccbcbabca

abccabcbabcaM

OR



87c

)()( bccbcbabca

abccabcbabcaM

OR)()( cbabca



87c

)()( bccbcbabca

abccabcbabcaM

OR)()( cbabca



87d



87d

1)1()(

0)()0(

)()(

bcbcbcbbcbcbcbbbcbh

cbbcbbg

cbhbcgcbacbaM



87d

1)1()(

0)()0(

)()(

bcbcbcbbcbcbcbbbcbh

cbbcbbg

cbhbcgcbacbaM



87d

1)1()(

0)()0(

)()(

bcbcbcbbcbcbcbbbcbh

cbbcbbg

cbhbcgcbacbaM



BV 65


For the function


)6320()( 321 mwwwf


BV 65


For the function


)6320()( 321 mwwwf

)()(

)()(

)110011010000()(

321321

3213232321

321321321321

321

wwwwww

wwwwwwwwww

wwwwwwwwwwww

mwwwf


BV 65


For the function


)6320()( 321 mwwwf

)()(

)()(

)110011010000()(

321321

3213232321

321321321321

321

wwwwww

wwwwwwwwww

wwwwwwwwwwww

mwwwf


BV 65


For the function


)6320()( 321 mwwwf

)()(

)()(

)110011010000()(

321321

3213232321

321321321321

321

wwwwww

wwwwwwwwww

wwwwwwwwwwww

mwwwf




(Ex 89)



(89)


(89)



(89)



(Ex 88)



(88)


(88)


(88)



(88)






We uses MUXes

(BV ex 631)










Barrel shifter



BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

And so on

Truth table

W0W1W2W3

0123


= Lowcost FPGA




BV 616



323132 wwwwwwf





1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf



1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf



1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf




)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf




VHDL BV 251a

)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf






VHDL BV 251a

)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf



VHDL BV 621







Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1

Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


023 xxx

301 xxx

01xx

02 xx

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1

x0

x1

0

1

0 1

3 2 (00)x x

x0

x1

0

1

0 1

3 2 (01)x x

x0

x1

0

1

0 1

3 2 (11)x x

x0

x1

0

1

0 1

3 2 (10)x x

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1 - -

1 0

x0

x1

0

1

0 1

3 2 (00)x x

0 1

0 1

x0

x1

0

1

0 1

3 2 (01)x x

0 1

1 0

x0

x1

0

1

0 1

3 2 (11)x x

- -

1 0

x0

x1

0

1

0 1

3 2 (10)x x

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


- -

1 0

x0

x1

0

1

0 1

0

23 )00(

xY

xx

0 1

0 1

x0

x1

0

1

0 1

0

23 )10(

xY

xx

0 1

1 0

x0

x1

0

1

0 1

01

23 )11(

xxY

xx

- -

1 0

x0

x1

0

1

0 1

0

23 )01(

xY

xx

Y

0x0x0x

01 xx


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


- -

1 0

x0

x1

0

1

0 1

3 2

1 0

(00)x x

Y x x

0 1

0 1

x0

x1

0

1

0 1

0

23 )10(

xY

xx

0 1

1 0

x0

x1

0

1

0 1

01

23 )11(

xxY

xx

- -

1 0

x0

x1

0

1

0 1

3 2

1 0

(10)x x

Y x x

Y0x

01 xx

01 xx

01 xx


Or hellip




(Ex 86)

Slide 3

Slide 4

Slide 5

BV 61

Slide 7

Slide 8

Ex 87

(87a)

Slide 11

Slide 12

Slide 13

87b

Slide 15

87c

Slide 17

Slide 18

Slide 19

Slide 20

Slide 21

87d

Slide 23

Slide 24

Slide 25

Slide 26

BV 65

Slide 28

Slide 29

Slide 30

Slide 31

(Ex 89)

(89)

Slide 34

Slide 35

(Ex 88)

(88)

Slide 38

Slide 39

Slide 40

(BV ex 631)

Slide 42

Slide 43

Slide 44

Slide 45


Barrel shifter

BV ex 632

Slide 49

Slide 50

Slide 51

Slide 52

Slide 53

Slide 54

= Lowcost FPGA

BV 616

Slide 57

Slide 58

Slide 59

Slide 60

Slide 61

VHDL BV 251a

Slide 63

Slide 64

VHDL BV 621

Slide 66


Slide 68

Slide 69

Slide 70

Slide 71

Slide 72

Slide 73


87b



87b



87c



87c

)()( bccbcbabca

abccabcbabcaM



87c

)()( bccbcbabca

abccabcbabcaM



87c

)()( bccbcbabca

abccabcbabcaM

OR



87c

)()( bccbcbabca

abccabcbabcaM

OR)()( cbabca



87c

)()( bccbcbabca

abccabcbabcaM

OR)()( cbabca



87d



87d

1)1()(

0)()0(

)()(

bcbcbcbbcbcbcbbbcbh

cbbcbbg

cbhbcgcbacbaM



87d

1)1()(

0)()0(

)()(

bcbcbcbbcbcbcbbbcbh

cbbcbbg

cbhbcgcbacbaM



87d

1)1()(

0)()0(

)()(

bcbcbcbbcbcbcbbbcbh

cbbcbbg

cbhbcgcbacbaM



BV 65


For the function


)6320()( 321 mwwwf


BV 65


For the function


)6320()( 321 mwwwf

)()(

)()(

)110011010000()(

321321

3213232321

321321321321

321

wwwwww

wwwwwwwwww

wwwwwwwwwwww

mwwwf


BV 65


For the function


)6320()( 321 mwwwf

)()(

)()(

)110011010000()(

321321

3213232321

321321321321

321

wwwwww

wwwwwwwwww

wwwwwwwwwwww

mwwwf


BV 65


For the function


)6320()( 321 mwwwf

)()(

)()(

)110011010000()(

321321

3213232321

321321321321

321

wwwwww

wwwwwwwwww

wwwwwwwwwwww

mwwwf




(Ex 89)



(89)


(89)



(89)



(Ex 88)



(88)


(88)


(88)



(88)






We uses MUXes

(BV ex 631)










Barrel shifter



BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

And so on

Truth table

W0W1W2W3

0123


= Lowcost FPGA




BV 616



323132 wwwwwwf





1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf



1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf



1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf




)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf




VHDL BV 251a

)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf






VHDL BV 251a

)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf



VHDL BV 621







Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1

Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


023 xxx

301 xxx

01xx

02 xx

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1

x0

x1

0

1

0 1

3 2 (00)x x

x0

x1

0

1

0 1

3 2 (01)x x

x0

x1

0

1

0 1

3 2 (11)x x

x0

x1

0

1

0 1

3 2 (10)x x

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1 - -

1 0

x0

x1

0

1

0 1

3 2 (00)x x

0 1

0 1

x0

x1

0

1

0 1

3 2 (01)x x

0 1

1 0

x0

x1

0

1

0 1

3 2 (11)x x

- -

1 0

x0

x1

0

1

0 1

3 2 (10)x x

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


- -

1 0

x0

x1

0

1

0 1

0

23 )00(

xY

xx

0 1

0 1

x0

x1

0

1

0 1

0

23 )10(

xY

xx

0 1

1 0

x0

x1

0

1

0 1

01

23 )11(

xxY

xx

- -

1 0

x0

x1

0

1

0 1

0

23 )01(

xY

xx

Y

0x0x0x

01 xx


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


- -

1 0

x0

x1

0

1

0 1

3 2

1 0

(00)x x

Y x x

0 1

0 1

x0

x1

0

1

0 1

0

23 )10(

xY

xx

0 1

1 0

x0

x1

0

1

0 1

01

23 )11(

xxY

xx

- -

1 0

x0

x1

0

1

0 1

3 2

1 0

(10)x x

Y x x

Y0x

01 xx

01 xx

01 xx


Or hellip




(Ex 86)

Slide 3

Slide 4

Slide 5

BV 61

Slide 7

Slide 8

Ex 87

(87a)

Slide 11

Slide 12

Slide 13

87b

Slide 15

87c

Slide 17

Slide 18

Slide 19

Slide 20

Slide 21

87d

Slide 23

Slide 24

Slide 25

Slide 26

BV 65

Slide 28

Slide 29

Slide 30

Slide 31

(Ex 89)

(89)

Slide 34

Slide 35

(Ex 88)

(88)

Slide 38

Slide 39

Slide 40

(BV ex 631)

Slide 42

Slide 43

Slide 44

Slide 45


Barrel shifter

BV ex 632

Slide 49

Slide 50

Slide 51

Slide 52

Slide 53

Slide 54

= Lowcost FPGA

BV 616

Slide 57

Slide 58

Slide 59

Slide 60

Slide 61

VHDL BV 251a

Slide 63

Slide 64

VHDL BV 621

Slide 66


Slide 68

Slide 69

Slide 70

Slide 71

Slide 72

Slide 73


87b



87c



87c

)()( bccbcbabca

abccabcbabcaM



87c

)()( bccbcbabca

abccabcbabcaM



87c

)()( bccbcbabca

abccabcbabcaM

OR



87c

)()( bccbcbabca

abccabcbabcaM

OR)()( cbabca



87c

)()( bccbcbabca

abccabcbabcaM

OR)()( cbabca



87d



87d

1)1()(

0)()0(

)()(

bcbcbcbbcbcbcbbbcbh

cbbcbbg

cbhbcgcbacbaM



87d

1)1()(

0)()0(

)()(

bcbcbcbbcbcbcbbbcbh

cbbcbbg

cbhbcgcbacbaM



87d

1)1()(

0)()0(

)()(

bcbcbcbbcbcbcbbbcbh

cbbcbbg

cbhbcgcbacbaM



BV 65


For the function


)6320()( 321 mwwwf


BV 65


For the function


)6320()( 321 mwwwf

)()(

)()(

)110011010000()(

321321

3213232321

321321321321

321

wwwwww

wwwwwwwwww

wwwwwwwwwwww

mwwwf


BV 65


For the function


)6320()( 321 mwwwf

)()(

)()(

)110011010000()(

321321

3213232321

321321321321

321

wwwwww

wwwwwwwwww

wwwwwwwwwwww

mwwwf


BV 65


For the function


)6320()( 321 mwwwf

)()(

)()(

)110011010000()(

321321

3213232321

321321321321

321

wwwwww

wwwwwwwwww

wwwwwwwwwwww

mwwwf




(Ex 89)



(89)


(89)



(89)



(Ex 88)



(88)


(88)


(88)



(88)






We uses MUXes

(BV ex 631)










Barrel shifter



BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

And so on

Truth table

W0W1W2W3

0123


= Lowcost FPGA




BV 616



323132 wwwwwwf





1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf



1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf



1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf




)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf




VHDL BV 251a

)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf






VHDL BV 251a

)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf



VHDL BV 621







Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1

Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


023 xxx

301 xxx

01xx

02 xx

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1

x0

x1

0

1

0 1

3 2 (00)x x

x0

x1

0

1

0 1

3 2 (01)x x

x0

x1

0

1

0 1

3 2 (11)x x

x0

x1

0

1

0 1

3 2 (10)x x

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1 - -

1 0

x0

x1

0

1

0 1

3 2 (00)x x

0 1

0 1

x0

x1

0

1

0 1

3 2 (01)x x

0 1

1 0

x0

x1

0

1

0 1

3 2 (11)x x

- -

1 0

x0

x1

0

1

0 1

3 2 (10)x x

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


- -

1 0

x0

x1

0

1

0 1

0

23 )00(

xY

xx

0 1

0 1

x0

x1

0

1

0 1

0

23 )10(

xY

xx

0 1

1 0

x0

x1

0

1

0 1

01

23 )11(

xxY

xx

- -

1 0

x0

x1

0

1

0 1

0

23 )01(

xY

xx

Y

0x0x0x

01 xx


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


- -

1 0

x0

x1

0

1

0 1

3 2

1 0

(00)x x

Y x x

0 1

0 1

x0

x1

0

1

0 1

0

23 )10(

xY

xx

0 1

1 0

x0

x1

0

1

0 1

01

23 )11(

xxY

xx

- -

1 0

x0

x1

0

1

0 1

3 2

1 0

(10)x x

Y x x

Y0x

01 xx

01 xx

01 xx


Or hellip




(Ex 86)

Slide 3

Slide 4

Slide 5

BV 61

Slide 7

Slide 8

Ex 87

(87a)

Slide 11

Slide 12

Slide 13

87b

Slide 15

87c

Slide 17

Slide 18

Slide 19

Slide 20

Slide 21

87d

Slide 23

Slide 24

Slide 25

Slide 26

BV 65

Slide 28

Slide 29

Slide 30

Slide 31

(Ex 89)

(89)

Slide 34

Slide 35

(Ex 88)

(88)

Slide 38

Slide 39

Slide 40

(BV ex 631)

Slide 42

Slide 43

Slide 44

Slide 45


Barrel shifter

BV ex 632

Slide 49

Slide 50

Slide 51

Slide 52

Slide 53

Slide 54

= Lowcost FPGA

BV 616

Slide 57

Slide 58

Slide 59

Slide 60

Slide 61

VHDL BV 251a

Slide 63

Slide 64

VHDL BV 621

Slide 66


Slide 68

Slide 69

Slide 70

Slide 71

Slide 72

Slide 73


87c



87c

)()( bccbcbabca

abccabcbabcaM



87c

)()( bccbcbabca

abccabcbabcaM



87c

)()( bccbcbabca

abccabcbabcaM

OR



87c

)()( bccbcbabca

abccabcbabcaM

OR)()( cbabca



87c

)()( bccbcbabca

abccabcbabcaM

OR)()( cbabca



87d



87d

1)1()(

0)()0(

)()(

bcbcbcbbcbcbcbbbcbh

cbbcbbg

cbhbcgcbacbaM



87d

1)1()(

0)()0(

)()(

bcbcbcbbcbcbcbbbcbh

cbbcbbg

cbhbcgcbacbaM



87d

1)1()(

0)()0(

)()(

bcbcbcbbcbcbcbbbcbh

cbbcbbg

cbhbcgcbacbaM



BV 65


For the function


)6320()( 321 mwwwf


BV 65


For the function


)6320()( 321 mwwwf

)()(

)()(

)110011010000()(

321321

3213232321

321321321321

321

wwwwww

wwwwwwwwww

wwwwwwwwwwww

mwwwf


BV 65


For the function


)6320()( 321 mwwwf

)()(

)()(

)110011010000()(

321321

3213232321

321321321321

321

wwwwww

wwwwwwwwww

wwwwwwwwwwww

mwwwf


BV 65


For the function


)6320()( 321 mwwwf

)()(

)()(

)110011010000()(

321321

3213232321

321321321321

321

wwwwww

wwwwwwwwww

wwwwwwwwwwww

mwwwf




(Ex 89)



(89)


(89)



(89)



(Ex 88)



(88)


(88)


(88)



(88)






We uses MUXes

(BV ex 631)










Barrel shifter



BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

And so on

Truth table

W0W1W2W3

0123


= Lowcost FPGA




BV 616



323132 wwwwwwf





1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf



1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf



1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf




)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf




VHDL BV 251a

)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf






VHDL BV 251a

)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf



VHDL BV 621







Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1

Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


023 xxx

301 xxx

01xx

02 xx

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1

x0

x1

0

1

0 1

3 2 (00)x x

x0

x1

0

1

0 1

3 2 (01)x x

x0

x1

0

1

0 1

3 2 (11)x x

x0

x1

0

1

0 1

3 2 (10)x x

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1 - -

1 0

x0

x1

0

1

0 1

3 2 (00)x x

0 1

0 1

x0

x1

0

1

0 1

3 2 (01)x x

0 1

1 0

x0

x1

0

1

0 1

3 2 (11)x x

- -

1 0

x0

x1

0

1

0 1

3 2 (10)x x

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


- -

1 0

x0

x1

0

1

0 1

0

23 )00(

xY

xx

0 1

0 1

x0

x1

0

1

0 1

0

23 )10(

xY

xx

0 1

1 0

x0

x1

0

1

0 1

01

23 )11(

xxY

xx

- -

1 0

x0

x1

0

1

0 1

0

23 )01(

xY

xx

Y

0x0x0x

01 xx


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


- -

1 0

x0

x1

0

1

0 1

3 2

1 0

(00)x x

Y x x

0 1

0 1

x0

x1

0

1

0 1

0

23 )10(

xY

xx

0 1

1 0

x0

x1

0

1

0 1

01

23 )11(

xxY

xx

- -

1 0

x0

x1

0

1

0 1

3 2

1 0

(10)x x

Y x x

Y0x

01 xx

01 xx

01 xx


Or hellip




(Ex 86)

Slide 3

Slide 4

Slide 5

BV 61

Slide 7

Slide 8

Ex 87

(87a)

Slide 11

Slide 12

Slide 13

87b

Slide 15

87c

Slide 17

Slide 18

Slide 19

Slide 20

Slide 21

87d

Slide 23

Slide 24

Slide 25

Slide 26

BV 65

Slide 28

Slide 29

Slide 30

Slide 31

(Ex 89)

(89)

Slide 34

Slide 35

(Ex 88)

(88)

Slide 38

Slide 39

Slide 40

(BV ex 631)

Slide 42

Slide 43

Slide 44

Slide 45


Barrel shifter

BV ex 632

Slide 49

Slide 50

Slide 51

Slide 52

Slide 53

Slide 54

= Lowcost FPGA

BV 616

Slide 57

Slide 58

Slide 59

Slide 60

Slide 61

VHDL BV 251a

Slide 63

Slide 64

VHDL BV 621

Slide 66


Slide 68

Slide 69

Slide 70

Slide 71

Slide 72

Slide 73


87c

)()( bccbcbabca

abccabcbabcaM



87c

)()( bccbcbabca

abccabcbabcaM



87c

)()( bccbcbabca

abccabcbabcaM

OR



87c

)()( bccbcbabca

abccabcbabcaM

OR)()( cbabca



87c

)()( bccbcbabca

abccabcbabcaM

OR)()( cbabca



87d



87d

1)1()(

0)()0(

)()(

bcbcbcbbcbcbcbbbcbh

cbbcbbg

cbhbcgcbacbaM



87d

1)1()(

0)()0(

)()(

bcbcbcbbcbcbcbbbcbh

cbbcbbg

cbhbcgcbacbaM



87d

1)1()(

0)()0(

)()(

bcbcbcbbcbcbcbbbcbh

cbbcbbg

cbhbcgcbacbaM



BV 65


For the function


)6320()( 321 mwwwf


BV 65


For the function


)6320()( 321 mwwwf

)()(

)()(

)110011010000()(

321321

3213232321

321321321321

321

wwwwww

wwwwwwwwww

wwwwwwwwwwww

mwwwf


BV 65


For the function


)6320()( 321 mwwwf

)()(

)()(

)110011010000()(

321321

3213232321

321321321321

321

wwwwww

wwwwwwwwww

wwwwwwwwwwww

mwwwf


BV 65


For the function


)6320()( 321 mwwwf

)()(

)()(

)110011010000()(

321321

3213232321

321321321321

321

wwwwww

wwwwwwwwww

wwwwwwwwwwww

mwwwf




(Ex 89)



(89)


(89)



(89)



(Ex 88)



(88)


(88)


(88)



(88)






We uses MUXes

(BV ex 631)










Barrel shifter



BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

And so on

Truth table

W0W1W2W3

0123


= Lowcost FPGA




BV 616



323132 wwwwwwf





1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf



1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf



1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf




)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf




VHDL BV 251a

)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf






VHDL BV 251a

)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf



VHDL BV 621







Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1

Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


023 xxx

301 xxx

01xx

02 xx

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1

x0

x1

0

1

0 1

3 2 (00)x x

x0

x1

0

1

0 1

3 2 (01)x x

x0

x1

0

1

0 1

3 2 (11)x x

x0

x1

0

1

0 1

3 2 (10)x x

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1 - -

1 0

x0

x1

0

1

0 1

3 2 (00)x x

0 1

0 1

x0

x1

0

1

0 1

3 2 (01)x x

0 1

1 0

x0

x1

0

1

0 1

3 2 (11)x x

- -

1 0

x0

x1

0

1

0 1

3 2 (10)x x

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


- -

1 0

x0

x1

0

1

0 1

0

23 )00(

xY

xx

0 1

0 1

x0

x1

0

1

0 1

0

23 )10(

xY

xx

0 1

1 0

x0

x1

0

1

0 1

01

23 )11(

xxY

xx

- -

1 0

x0

x1

0

1

0 1

0

23 )01(

xY

xx

Y

0x0x0x

01 xx


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


- -

1 0

x0

x1

0

1

0 1

3 2

1 0

(00)x x

Y x x

0 1

0 1

x0

x1

0

1

0 1

0

23 )10(

xY

xx

0 1

1 0

x0

x1

0

1

0 1

01

23 )11(

xxY

xx

- -

1 0

x0

x1

0

1

0 1

3 2

1 0

(10)x x

Y x x

Y0x

01 xx

01 xx

01 xx


Or hellip




(Ex 86)

Slide 3

Slide 4

Slide 5

BV 61

Slide 7

Slide 8

Ex 87

(87a)

Slide 11

Slide 12

Slide 13

87b

Slide 15

87c

Slide 17

Slide 18

Slide 19

Slide 20

Slide 21

87d

Slide 23

Slide 24

Slide 25

Slide 26

BV 65

Slide 28

Slide 29

Slide 30

Slide 31

(Ex 89)

(89)

Slide 34

Slide 35

(Ex 88)

(88)

Slide 38

Slide 39

Slide 40

(BV ex 631)

Slide 42

Slide 43

Slide 44

Slide 45


Barrel shifter

BV ex 632

Slide 49

Slide 50

Slide 51

Slide 52

Slide 53

Slide 54

= Lowcost FPGA

BV 616

Slide 57

Slide 58

Slide 59

Slide 60

Slide 61

VHDL BV 251a

Slide 63

Slide 64

VHDL BV 621

Slide 66


Slide 68

Slide 69

Slide 70

Slide 71

Slide 72

Slide 73


87c

)()( bccbcbabca

abccabcbabcaM



87c

)()( bccbcbabca

abccabcbabcaM

OR



87c

)()( bccbcbabca

abccabcbabcaM

OR)()( cbabca



87c

)()( bccbcbabca

abccabcbabcaM

OR)()( cbabca



87d



87d

1)1()(

0)()0(

)()(

bcbcbcbbcbcbcbbbcbh

cbbcbbg

cbhbcgcbacbaM



87d

1)1()(

0)()0(

)()(

bcbcbcbbcbcbcbbbcbh

cbbcbbg

cbhbcgcbacbaM



87d

1)1()(

0)()0(

)()(

bcbcbcbbcbcbcbbbcbh

cbbcbbg

cbhbcgcbacbaM



BV 65


For the function


)6320()( 321 mwwwf


BV 65


For the function


)6320()( 321 mwwwf

)()(

)()(

)110011010000()(

321321

3213232321

321321321321

321

wwwwww

wwwwwwwwww

wwwwwwwwwwww

mwwwf


BV 65


For the function


)6320()( 321 mwwwf

)()(

)()(

)110011010000()(

321321

3213232321

321321321321

321

wwwwww

wwwwwwwwww

wwwwwwwwwwww

mwwwf


BV 65


For the function


)6320()( 321 mwwwf

)()(

)()(

)110011010000()(

321321

3213232321

321321321321

321

wwwwww

wwwwwwwwww

wwwwwwwwwwww

mwwwf




(Ex 89)



(89)


(89)



(89)



(Ex 88)



(88)


(88)


(88)



(88)






We uses MUXes

(BV ex 631)










Barrel shifter



BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

And so on

Truth table

W0W1W2W3

0123


= Lowcost FPGA




BV 616



323132 wwwwwwf





1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf



1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf



1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf




)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf




VHDL BV 251a

)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf






VHDL BV 251a

)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf



VHDL BV 621







Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1

Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


023 xxx

301 xxx

01xx

02 xx

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1

x0

x1

0

1

0 1

3 2 (00)x x

x0

x1

0

1

0 1

3 2 (01)x x

x0

x1

0

1

0 1

3 2 (11)x x

x0

x1

0

1

0 1

3 2 (10)x x

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1 - -

1 0

x0

x1

0

1

0 1

3 2 (00)x x

0 1

0 1

x0

x1

0

1

0 1

3 2 (01)x x

0 1

1 0

x0

x1

0

1

0 1

3 2 (11)x x

- -

1 0

x0

x1

0

1

0 1

3 2 (10)x x

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


- -

1 0

x0

x1

0

1

0 1

0

23 )00(

xY

xx

0 1

0 1

x0

x1

0

1

0 1

0

23 )10(

xY

xx

0 1

1 0

x0

x1

0

1

0 1

01

23 )11(

xxY

xx

- -

1 0

x0

x1

0

1

0 1

0

23 )01(

xY

xx

Y

0x0x0x

01 xx


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


- -

1 0

x0

x1

0

1

0 1

3 2

1 0

(00)x x

Y x x

0 1

0 1

x0

x1

0

1

0 1

0

23 )10(

xY

xx

0 1

1 0

x0

x1

0

1

0 1

01

23 )11(

xxY

xx

- -

1 0

x0

x1

0

1

0 1

3 2

1 0

(10)x x

Y x x

Y0x

01 xx

01 xx

01 xx


Or hellip




(Ex 86)

Slide 3

Slide 4

Slide 5

BV 61

Slide 7

Slide 8

Ex 87

(87a)

Slide 11

Slide 12

Slide 13

87b

Slide 15

87c

Slide 17

Slide 18

Slide 19

Slide 20

Slide 21

87d

Slide 23

Slide 24

Slide 25

Slide 26

BV 65

Slide 28

Slide 29

Slide 30

Slide 31

(Ex 89)

(89)

Slide 34

Slide 35

(Ex 88)

(88)

Slide 38

Slide 39

Slide 40

(BV ex 631)

Slide 42

Slide 43

Slide 44

Slide 45


Barrel shifter

BV ex 632

Slide 49

Slide 50

Slide 51

Slide 52

Slide 53

Slide 54

= Lowcost FPGA

BV 616

Slide 57

Slide 58

Slide 59

Slide 60

Slide 61

VHDL BV 251a

Slide 63

Slide 64

VHDL BV 621

Slide 66


Slide 68

Slide 69

Slide 70

Slide 71

Slide 72

Slide 73


87c

)()( bccbcbabca

abccabcbabcaM

OR



87c

)()( bccbcbabca

abccabcbabcaM

OR)()( cbabca



87c

)()( bccbcbabca

abccabcbabcaM

OR)()( cbabca



87d



87d

1)1()(

0)()0(

)()(

bcbcbcbbcbcbcbbbcbh

cbbcbbg

cbhbcgcbacbaM



87d

1)1()(

0)()0(

)()(

bcbcbcbbcbcbcbbbcbh

cbbcbbg

cbhbcgcbacbaM



87d

1)1()(

0)()0(

)()(

bcbcbcbbcbcbcbbbcbh

cbbcbbg

cbhbcgcbacbaM



BV 65


For the function


)6320()( 321 mwwwf


BV 65


For the function


)6320()( 321 mwwwf

)()(

)()(

)110011010000()(

321321

3213232321

321321321321

321

wwwwww

wwwwwwwwww

wwwwwwwwwwww

mwwwf


BV 65


For the function


)6320()( 321 mwwwf

)()(

)()(

)110011010000()(

321321

3213232321

321321321321

321

wwwwww

wwwwwwwwww

wwwwwwwwwwww

mwwwf


BV 65


For the function


)6320()( 321 mwwwf

)()(

)()(

)110011010000()(

321321

3213232321

321321321321

321

wwwwww

wwwwwwwwww

wwwwwwwwwwww

mwwwf




(Ex 89)



(89)


(89)



(89)



(Ex 88)



(88)


(88)


(88)



(88)






We uses MUXes

(BV ex 631)










Barrel shifter



BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

And so on

Truth table

W0W1W2W3

0123


= Lowcost FPGA




BV 616



323132 wwwwwwf





1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf



1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf



1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf




)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf




VHDL BV 251a

)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf






VHDL BV 251a

)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf



VHDL BV 621







Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1

Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


023 xxx

301 xxx

01xx

02 xx

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1

x0

x1

0

1

0 1

3 2 (00)x x

x0

x1

0

1

0 1

3 2 (01)x x

x0

x1

0

1

0 1

3 2 (11)x x

x0

x1

0

1

0 1

3 2 (10)x x

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1 - -

1 0

x0

x1

0

1

0 1

3 2 (00)x x

0 1

0 1

x0

x1

0

1

0 1

3 2 (01)x x

0 1

1 0

x0

x1

0

1

0 1

3 2 (11)x x

- -

1 0

x0

x1

0

1

0 1

3 2 (10)x x

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


- -

1 0

x0

x1

0

1

0 1

0

23 )00(

xY

xx

0 1

0 1

x0

x1

0

1

0 1

0

23 )10(

xY

xx

0 1

1 0

x0

x1

0

1

0 1

01

23 )11(

xxY

xx

- -

1 0

x0

x1

0

1

0 1

0

23 )01(

xY

xx

Y

0x0x0x

01 xx


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


- -

1 0

x0

x1

0

1

0 1

3 2

1 0

(00)x x

Y x x

0 1

0 1

x0

x1

0

1

0 1

0

23 )10(

xY

xx

0 1

1 0

x0

x1

0

1

0 1

01

23 )11(

xxY

xx

- -

1 0

x0

x1

0

1

0 1

3 2

1 0

(10)x x

Y x x

Y0x

01 xx

01 xx

01 xx


Or hellip




(Ex 86)

Slide 3

Slide 4

Slide 5

BV 61

Slide 7

Slide 8

Ex 87

(87a)

Slide 11

Slide 12

Slide 13

87b

Slide 15

87c

Slide 17

Slide 18

Slide 19

Slide 20

Slide 21

87d

Slide 23

Slide 24

Slide 25

Slide 26

BV 65

Slide 28

Slide 29

Slide 30

Slide 31

(Ex 89)

(89)

Slide 34

Slide 35

(Ex 88)

(88)

Slide 38

Slide 39

Slide 40

(BV ex 631)

Slide 42

Slide 43

Slide 44

Slide 45


Barrel shifter

BV ex 632

Slide 49

Slide 50

Slide 51

Slide 52

Slide 53

Slide 54

= Lowcost FPGA

BV 616

Slide 57

Slide 58

Slide 59

Slide 60

Slide 61

VHDL BV 251a

Slide 63

Slide 64

VHDL BV 621

Slide 66


Slide 68

Slide 69

Slide 70

Slide 71

Slide 72

Slide 73


87c

)()( bccbcbabca

abccabcbabcaM

OR)()( cbabca



87c

)()( bccbcbabca

abccabcbabcaM

OR)()( cbabca



87d



87d

1)1()(

0)()0(

)()(

bcbcbcbbcbcbcbbbcbh

cbbcbbg

cbhbcgcbacbaM



87d

1)1()(

0)()0(

)()(

bcbcbcbbcbcbcbbbcbh

cbbcbbg

cbhbcgcbacbaM



87d

1)1()(

0)()0(

)()(

bcbcbcbbcbcbcbbbcbh

cbbcbbg

cbhbcgcbacbaM



BV 65


For the function


)6320()( 321 mwwwf


BV 65


For the function


)6320()( 321 mwwwf

)()(

)()(

)110011010000()(

321321

3213232321

321321321321

321

wwwwww

wwwwwwwwww

wwwwwwwwwwww

mwwwf


BV 65


For the function


)6320()( 321 mwwwf

)()(

)()(

)110011010000()(

321321

3213232321

321321321321

321

wwwwww

wwwwwwwwww

wwwwwwwwwwww

mwwwf


BV 65


For the function


)6320()( 321 mwwwf

)()(

)()(

)110011010000()(

321321

3213232321

321321321321

321

wwwwww

wwwwwwwwww

wwwwwwwwwwww

mwwwf




(Ex 89)



(89)


(89)



(89)



(Ex 88)



(88)


(88)


(88)



(88)






We uses MUXes

(BV ex 631)










Barrel shifter



BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

And so on

Truth table

W0W1W2W3

0123


= Lowcost FPGA




BV 616



323132 wwwwwwf





1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf



1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf



1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf




)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf




VHDL BV 251a

)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf






VHDL BV 251a

)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf



VHDL BV 621







Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1

Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


023 xxx

301 xxx

01xx

02 xx

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1

x0

x1

0

1

0 1

3 2 (00)x x

x0

x1

0

1

0 1

3 2 (01)x x

x0

x1

0

1

0 1

3 2 (11)x x

x0

x1

0

1

0 1

3 2 (10)x x

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1 - -

1 0

x0

x1

0

1

0 1

3 2 (00)x x

0 1

0 1

x0

x1

0

1

0 1

3 2 (01)x x

0 1

1 0

x0

x1

0

1

0 1

3 2 (11)x x

- -

1 0

x0

x1

0

1

0 1

3 2 (10)x x

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


- -

1 0

x0

x1

0

1

0 1

0

23 )00(

xY

xx

0 1

0 1

x0

x1

0

1

0 1

0

23 )10(

xY

xx

0 1

1 0

x0

x1

0

1

0 1

01

23 )11(

xxY

xx

- -

1 0

x0

x1

0

1

0 1

0

23 )01(

xY

xx

Y

0x0x0x

01 xx


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


- -

1 0

x0

x1

0

1

0 1

3 2

1 0

(00)x x

Y x x

0 1

0 1

x0

x1

0

1

0 1

0

23 )10(

xY

xx

0 1

1 0

x0

x1

0

1

0 1

01

23 )11(

xxY

xx

- -

1 0

x0

x1

0

1

0 1

3 2

1 0

(10)x x

Y x x

Y0x

01 xx

01 xx

01 xx


Or hellip




(Ex 86)

Slide 3

Slide 4

Slide 5

BV 61

Slide 7

Slide 8

Ex 87

(87a)

Slide 11

Slide 12

Slide 13

87b

Slide 15

87c

Slide 17

Slide 18

Slide 19

Slide 20

Slide 21

87d

Slide 23

Slide 24

Slide 25

Slide 26

BV 65

Slide 28

Slide 29

Slide 30

Slide 31

(Ex 89)

(89)

Slide 34

Slide 35

(Ex 88)

(88)

Slide 38

Slide 39

Slide 40

(BV ex 631)

Slide 42

Slide 43

Slide 44

Slide 45


Barrel shifter

BV ex 632

Slide 49

Slide 50

Slide 51

Slide 52

Slide 53

Slide 54

= Lowcost FPGA

BV 616

Slide 57

Slide 58

Slide 59

Slide 60

Slide 61

VHDL BV 251a

Slide 63

Slide 64

VHDL BV 621

Slide 66


Slide 68

Slide 69

Slide 70

Slide 71

Slide 72

Slide 73


87c

)()( bccbcbabca

abccabcbabcaM

OR)()( cbabca



87d



87d

1)1()(

0)()0(

)()(

bcbcbcbbcbcbcbbbcbh

cbbcbbg

cbhbcgcbacbaM



87d

1)1()(

0)()0(

)()(

bcbcbcbbcbcbcbbbcbh

cbbcbbg

cbhbcgcbacbaM



87d

1)1()(

0)()0(

)()(

bcbcbcbbcbcbcbbbcbh

cbbcbbg

cbhbcgcbacbaM



BV 65


For the function


)6320()( 321 mwwwf


BV 65


For the function


)6320()( 321 mwwwf

)()(

)()(

)110011010000()(

321321

3213232321

321321321321

321

wwwwww

wwwwwwwwww

wwwwwwwwwwww

mwwwf


BV 65


For the function


)6320()( 321 mwwwf

)()(

)()(

)110011010000()(

321321

3213232321

321321321321

321

wwwwww

wwwwwwwwww

wwwwwwwwwwww

mwwwf


BV 65


For the function


)6320()( 321 mwwwf

)()(

)()(

)110011010000()(

321321

3213232321

321321321321

321

wwwwww

wwwwwwwwww

wwwwwwwwwwww

mwwwf




(Ex 89)



(89)


(89)



(89)



(Ex 88)



(88)


(88)


(88)



(88)






We uses MUXes

(BV ex 631)










Barrel shifter



BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

And so on

Truth table

W0W1W2W3

0123


= Lowcost FPGA




BV 616



323132 wwwwwwf





1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf



1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf



1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf




)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf




VHDL BV 251a

)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf






VHDL BV 251a

)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf



VHDL BV 621







Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1

Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


023 xxx

301 xxx

01xx

02 xx

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1

x0

x1

0

1

0 1

3 2 (00)x x

x0

x1

0

1

0 1

3 2 (01)x x

x0

x1

0

1

0 1

3 2 (11)x x

x0

x1

0

1

0 1

3 2 (10)x x

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1 - -

1 0

x0

x1

0

1

0 1

3 2 (00)x x

0 1

0 1

x0

x1

0

1

0 1

3 2 (01)x x

0 1

1 0

x0

x1

0

1

0 1

3 2 (11)x x

- -

1 0

x0

x1

0

1

0 1

3 2 (10)x x

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


- -

1 0

x0

x1

0

1

0 1

0

23 )00(

xY

xx

0 1

0 1

x0

x1

0

1

0 1

0

23 )10(

xY

xx

0 1

1 0

x0

x1

0

1

0 1

01

23 )11(

xxY

xx

- -

1 0

x0

x1

0

1

0 1

0

23 )01(

xY

xx

Y

0x0x0x

01 xx


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


- -

1 0

x0

x1

0

1

0 1

3 2

1 0

(00)x x

Y x x

0 1

0 1

x0

x1

0

1

0 1

0

23 )10(

xY

xx

0 1

1 0

x0

x1

0

1

0 1

01

23 )11(

xxY

xx

- -

1 0

x0

x1

0

1

0 1

3 2

1 0

(10)x x

Y x x

Y0x

01 xx

01 xx

01 xx


Or hellip




(Ex 86)

Slide 3

Slide 4

Slide 5

BV 61

Slide 7

Slide 8

Ex 87

(87a)

Slide 11

Slide 12

Slide 13

87b

Slide 15

87c

Slide 17

Slide 18

Slide 19

Slide 20

Slide 21

87d

Slide 23

Slide 24

Slide 25

Slide 26

BV 65

Slide 28

Slide 29

Slide 30

Slide 31

(Ex 89)

(89)

Slide 34

Slide 35

(Ex 88)

(88)

Slide 38

Slide 39

Slide 40

(BV ex 631)

Slide 42

Slide 43

Slide 44

Slide 45


Barrel shifter

BV ex 632

Slide 49

Slide 50

Slide 51

Slide 52

Slide 53

Slide 54

= Lowcost FPGA

BV 616

Slide 57

Slide 58

Slide 59

Slide 60

Slide 61

VHDL BV 251a

Slide 63

Slide 64

VHDL BV 621

Slide 66


Slide 68

Slide 69

Slide 70

Slide 71

Slide 72

Slide 73


87d



87d

1)1()(

0)()0(

)()(

bcbcbcbbcbcbcbbbcbh

cbbcbbg

cbhbcgcbacbaM



87d

1)1()(

0)()0(

)()(

bcbcbcbbcbcbcbbbcbh

cbbcbbg

cbhbcgcbacbaM



87d

1)1()(

0)()0(

)()(

bcbcbcbbcbcbcbbbcbh

cbbcbbg

cbhbcgcbacbaM



BV 65


For the function


)6320()( 321 mwwwf


BV 65


For the function


)6320()( 321 mwwwf

)()(

)()(

)110011010000()(

321321

3213232321

321321321321

321

wwwwww

wwwwwwwwww

wwwwwwwwwwww

mwwwf


BV 65


For the function


)6320()( 321 mwwwf

)()(

)()(

)110011010000()(

321321

3213232321

321321321321

321

wwwwww

wwwwwwwwww

wwwwwwwwwwww

mwwwf


BV 65


For the function


)6320()( 321 mwwwf

)()(

)()(

)110011010000()(

321321

3213232321

321321321321

321

wwwwww

wwwwwwwwww

wwwwwwwwwwww

mwwwf




(Ex 89)



(89)


(89)



(89)



(Ex 88)



(88)


(88)


(88)



(88)






We uses MUXes

(BV ex 631)










Barrel shifter



BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

And so on

Truth table

W0W1W2W3

0123


= Lowcost FPGA




BV 616



323132 wwwwwwf





1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf



1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf



1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf




)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf




VHDL BV 251a

)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf






VHDL BV 251a

)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf



VHDL BV 621







Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1

Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


023 xxx

301 xxx

01xx

02 xx

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1

x0

x1

0

1

0 1

3 2 (00)x x

x0

x1

0

1

0 1

3 2 (01)x x

x0

x1

0

1

0 1

3 2 (11)x x

x0

x1

0

1

0 1

3 2 (10)x x

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1 - -

1 0

x0

x1

0

1

0 1

3 2 (00)x x

0 1

0 1

x0

x1

0

1

0 1

3 2 (01)x x

0 1

1 0

x0

x1

0

1

0 1

3 2 (11)x x

- -

1 0

x0

x1

0

1

0 1

3 2 (10)x x

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


- -

1 0

x0

x1

0

1

0 1

0

23 )00(

xY

xx

0 1

0 1

x0

x1

0

1

0 1

0

23 )10(

xY

xx

0 1

1 0

x0

x1

0

1

0 1

01

23 )11(

xxY

xx

- -

1 0

x0

x1

0

1

0 1

0

23 )01(

xY

xx

Y

0x0x0x

01 xx


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


- -

1 0

x0

x1

0

1

0 1

3 2

1 0

(00)x x

Y x x

0 1

0 1

x0

x1

0

1

0 1

0

23 )10(

xY

xx

0 1

1 0

x0

x1

0

1

0 1

01

23 )11(

xxY

xx

- -

1 0

x0

x1

0

1

0 1

3 2

1 0

(10)x x

Y x x

Y0x

01 xx

01 xx

01 xx


Or hellip




(Ex 86)

Slide 3

Slide 4

Slide 5

BV 61

Slide 7

Slide 8

Ex 87

(87a)

Slide 11

Slide 12

Slide 13

87b

Slide 15

87c

Slide 17

Slide 18

Slide 19

Slide 20

Slide 21

87d

Slide 23

Slide 24

Slide 25

Slide 26

BV 65

Slide 28

Slide 29

Slide 30

Slide 31

(Ex 89)

(89)

Slide 34

Slide 35

(Ex 88)

(88)

Slide 38

Slide 39

Slide 40

(BV ex 631)

Slide 42

Slide 43

Slide 44

Slide 45


Barrel shifter

BV ex 632

Slide 49

Slide 50

Slide 51

Slide 52

Slide 53

Slide 54

= Lowcost FPGA

BV 616

Slide 57

Slide 58

Slide 59

Slide 60

Slide 61

VHDL BV 251a

Slide 63

Slide 64

VHDL BV 621

Slide 66


Slide 68

Slide 69

Slide 70

Slide 71

Slide 72

Slide 73


87d

1)1()(

0)()0(

)()(

bcbcbcbbcbcbcbbbcbh

cbbcbbg

cbhbcgcbacbaM



87d

1)1()(

0)()0(

)()(

bcbcbcbbcbcbcbbbcbh

cbbcbbg

cbhbcgcbacbaM



87d

1)1()(

0)()0(

)()(

bcbcbcbbcbcbcbbbcbh

cbbcbbg

cbhbcgcbacbaM



BV 65


For the function


)6320()( 321 mwwwf


BV 65


For the function


)6320()( 321 mwwwf

)()(

)()(

)110011010000()(

321321

3213232321

321321321321

321

wwwwww

wwwwwwwwww

wwwwwwwwwwww

mwwwf


BV 65


For the function


)6320()( 321 mwwwf

)()(

)()(

)110011010000()(

321321

3213232321

321321321321

321

wwwwww

wwwwwwwwww

wwwwwwwwwwww

mwwwf


BV 65


For the function


)6320()( 321 mwwwf

)()(

)()(

)110011010000()(

321321

3213232321

321321321321

321

wwwwww

wwwwwwwwww

wwwwwwwwwwww

mwwwf




(Ex 89)



(89)


(89)



(89)



(Ex 88)



(88)


(88)


(88)



(88)






We uses MUXes

(BV ex 631)










Barrel shifter



BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

And so on

Truth table

W0W1W2W3

0123


= Lowcost FPGA




BV 616



323132 wwwwwwf





1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf



1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf



1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf




)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf




VHDL BV 251a

)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf






VHDL BV 251a

)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf



VHDL BV 621







Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1

Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


023 xxx

301 xxx

01xx

02 xx

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1

x0

x1

0

1

0 1

3 2 (00)x x

x0

x1

0

1

0 1

3 2 (01)x x

x0

x1

0

1

0 1

3 2 (11)x x

x0

x1

0

1

0 1

3 2 (10)x x

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1 - -

1 0

x0

x1

0

1

0 1

3 2 (00)x x

0 1

0 1

x0

x1

0

1

0 1

3 2 (01)x x

0 1

1 0

x0

x1

0

1

0 1

3 2 (11)x x

- -

1 0

x0

x1

0

1

0 1

3 2 (10)x x

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


- -

1 0

x0

x1

0

1

0 1

0

23 )00(

xY

xx

0 1

0 1

x0

x1

0

1

0 1

0

23 )10(

xY

xx

0 1

1 0

x0

x1

0

1

0 1

01

23 )11(

xxY

xx

- -

1 0

x0

x1

0

1

0 1

0

23 )01(

xY

xx

Y

0x0x0x

01 xx


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


- -

1 0

x0

x1

0

1

0 1

3 2

1 0

(00)x x

Y x x

0 1

0 1

x0

x1

0

1

0 1

0

23 )10(

xY

xx

0 1

1 0

x0

x1

0

1

0 1

01

23 )11(

xxY

xx

- -

1 0

x0

x1

0

1

0 1

3 2

1 0

(10)x x

Y x x

Y0x

01 xx

01 xx

01 xx


Or hellip




(Ex 86)

Slide 3

Slide 4

Slide 5

BV 61

Slide 7

Slide 8

Ex 87

(87a)

Slide 11

Slide 12

Slide 13

87b

Slide 15

87c

Slide 17

Slide 18

Slide 19

Slide 20

Slide 21

87d

Slide 23

Slide 24

Slide 25

Slide 26

BV 65

Slide 28

Slide 29

Slide 30

Slide 31

(Ex 89)

(89)

Slide 34

Slide 35

(Ex 88)

(88)

Slide 38

Slide 39

Slide 40

(BV ex 631)

Slide 42

Slide 43

Slide 44

Slide 45


Barrel shifter

BV ex 632

Slide 49

Slide 50

Slide 51

Slide 52

Slide 53

Slide 54

= Lowcost FPGA

BV 616

Slide 57

Slide 58

Slide 59

Slide 60

Slide 61

VHDL BV 251a

Slide 63

Slide 64

VHDL BV 621

Slide 66


Slide 68

Slide 69

Slide 70

Slide 71

Slide 72

Slide 73


87d

1)1()(

0)()0(

)()(

bcbcbcbbcbcbcbbbcbh

cbbcbbg

cbhbcgcbacbaM



87d

1)1()(

0)()0(

)()(

bcbcbcbbcbcbcbbbcbh

cbbcbbg

cbhbcgcbacbaM



BV 65


For the function


)6320()( 321 mwwwf


BV 65


For the function


)6320()( 321 mwwwf

)()(

)()(

)110011010000()(

321321

3213232321

321321321321

321

wwwwww

wwwwwwwwww

wwwwwwwwwwww

mwwwf


BV 65


For the function


)6320()( 321 mwwwf

)()(

)()(

)110011010000()(

321321

3213232321

321321321321

321

wwwwww

wwwwwwwwww

wwwwwwwwwwww

mwwwf


BV 65


For the function


)6320()( 321 mwwwf

)()(

)()(

)110011010000()(

321321

3213232321

321321321321

321

wwwwww

wwwwwwwwww

wwwwwwwwwwww

mwwwf




(Ex 89)



(89)


(89)



(89)



(Ex 88)



(88)


(88)


(88)



(88)






We uses MUXes

(BV ex 631)










Barrel shifter



BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

And so on

Truth table

W0W1W2W3

0123


= Lowcost FPGA




BV 616



323132 wwwwwwf





1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf



1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf



1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf




)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf




VHDL BV 251a

)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf






VHDL BV 251a

)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf



VHDL BV 621







Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1

Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


023 xxx

301 xxx

01xx

02 xx

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1

x0

x1

0

1

0 1

3 2 (00)x x

x0

x1

0

1

0 1

3 2 (01)x x

x0

x1

0

1

0 1

3 2 (11)x x

x0

x1

0

1

0 1

3 2 (10)x x

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1 - -

1 0

x0

x1

0

1

0 1

3 2 (00)x x

0 1

0 1

x0

x1

0

1

0 1

3 2 (01)x x

0 1

1 0

x0

x1

0

1

0 1

3 2 (11)x x

- -

1 0

x0

x1

0

1

0 1

3 2 (10)x x

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


- -

1 0

x0

x1

0

1

0 1

0

23 )00(

xY

xx

0 1

0 1

x0

x1

0

1

0 1

0

23 )10(

xY

xx

0 1

1 0

x0

x1

0

1

0 1

01

23 )11(

xxY

xx

- -

1 0

x0

x1

0

1

0 1

0

23 )01(

xY

xx

Y

0x0x0x

01 xx


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


- -

1 0

x0

x1

0

1

0 1

3 2

1 0

(00)x x

Y x x

0 1

0 1

x0

x1

0

1

0 1

0

23 )10(

xY

xx

0 1

1 0

x0

x1

0

1

0 1

01

23 )11(

xxY

xx

- -

1 0

x0

x1

0

1

0 1

3 2

1 0

(10)x x

Y x x

Y0x

01 xx

01 xx

01 xx


Or hellip




(Ex 86)

Slide 3

Slide 4

Slide 5

BV 61

Slide 7

Slide 8

Ex 87

(87a)

Slide 11

Slide 12

Slide 13

87b

Slide 15

87c

Slide 17

Slide 18

Slide 19

Slide 20

Slide 21

87d

Slide 23

Slide 24

Slide 25

Slide 26

BV 65

Slide 28

Slide 29

Slide 30

Slide 31

(Ex 89)

(89)

Slide 34

Slide 35

(Ex 88)

(88)

Slide 38

Slide 39

Slide 40

(BV ex 631)

Slide 42

Slide 43

Slide 44

Slide 45


Barrel shifter

BV ex 632

Slide 49

Slide 50

Slide 51

Slide 52

Slide 53

Slide 54

= Lowcost FPGA

BV 616

Slide 57

Slide 58

Slide 59

Slide 60

Slide 61

VHDL BV 251a

Slide 63

Slide 64

VHDL BV 621

Slide 66


Slide 68

Slide 69

Slide 70

Slide 71

Slide 72

Slide 73


87d

1)1()(

0)()0(

)()(

bcbcbcbbcbcbcbbbcbh

cbbcbbg

cbhbcgcbacbaM



BV 65


For the function


)6320()( 321 mwwwf


BV 65


For the function


)6320()( 321 mwwwf

)()(

)()(

)110011010000()(

321321

3213232321

321321321321

321

wwwwww

wwwwwwwwww

wwwwwwwwwwww

mwwwf


BV 65


For the function


)6320()( 321 mwwwf

)()(

)()(

)110011010000()(

321321

3213232321

321321321321

321

wwwwww

wwwwwwwwww

wwwwwwwwwwww

mwwwf


BV 65


For the function


)6320()( 321 mwwwf

)()(

)()(

)110011010000()(

321321

3213232321

321321321321

321

wwwwww

wwwwwwwwww

wwwwwwwwwwww

mwwwf




(Ex 89)



(89)


(89)



(89)



(Ex 88)



(88)


(88)


(88)



(88)






We uses MUXes

(BV ex 631)










Barrel shifter



BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

And so on

Truth table

W0W1W2W3

0123


= Lowcost FPGA




BV 616



323132 wwwwwwf





1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf



1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf



1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf




)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf




VHDL BV 251a

)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf






VHDL BV 251a

)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf



VHDL BV 621







Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1

Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


023 xxx

301 xxx

01xx

02 xx

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1

x0

x1

0

1

0 1

3 2 (00)x x

x0

x1

0

1

0 1

3 2 (01)x x

x0

x1

0

1

0 1

3 2 (11)x x

x0

x1

0

1

0 1

3 2 (10)x x

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1 - -

1 0

x0

x1

0

1

0 1

3 2 (00)x x

0 1

0 1

x0

x1

0

1

0 1

3 2 (01)x x

0 1

1 0

x0

x1

0

1

0 1

3 2 (11)x x

- -

1 0

x0

x1

0

1

0 1

3 2 (10)x x

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


- -

1 0

x0

x1

0

1

0 1

0

23 )00(

xY

xx

0 1

0 1

x0

x1

0

1

0 1

0

23 )10(

xY

xx

0 1

1 0

x0

x1

0

1

0 1

01

23 )11(

xxY

xx

- -

1 0

x0

x1

0

1

0 1

0

23 )01(

xY

xx

Y

0x0x0x

01 xx


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


- -

1 0

x0

x1

0

1

0 1

3 2

1 0

(00)x x

Y x x

0 1

0 1

x0

x1

0

1

0 1

0

23 )10(

xY

xx

0 1

1 0

x0

x1

0

1

0 1

01

23 )11(

xxY

xx

- -

1 0

x0

x1

0

1

0 1

3 2

1 0

(10)x x

Y x x

Y0x

01 xx

01 xx

01 xx


Or hellip




(Ex 86)

Slide 3

Slide 4

Slide 5

BV 61

Slide 7

Slide 8

Ex 87

(87a)

Slide 11

Slide 12

Slide 13

87b

Slide 15

87c

Slide 17

Slide 18

Slide 19

Slide 20

Slide 21

87d

Slide 23

Slide 24

Slide 25

Slide 26

BV 65

Slide 28

Slide 29

Slide 30

Slide 31

(Ex 89)

(89)

Slide 34

Slide 35

(Ex 88)

(88)

Slide 38

Slide 39

Slide 40

(BV ex 631)

Slide 42

Slide 43

Slide 44

Slide 45


Barrel shifter

BV ex 632

Slide 49

Slide 50

Slide 51

Slide 52

Slide 53

Slide 54

= Lowcost FPGA

BV 616

Slide 57

Slide 58

Slide 59

Slide 60

Slide 61

VHDL BV 251a

Slide 63

Slide 64

VHDL BV 621

Slide 66


Slide 68

Slide 69

Slide 70

Slide 71

Slide 72

Slide 73


BV 65


For the function


)6320()( 321 mwwwf


BV 65


For the function


)6320()( 321 mwwwf

)()(

)()(

)110011010000()(

321321

3213232321

321321321321

321

wwwwww

wwwwwwwwww

wwwwwwwwwwww

mwwwf


BV 65


For the function


)6320()( 321 mwwwf

)()(

)()(

)110011010000()(

321321

3213232321

321321321321

321

wwwwww

wwwwwwwwww

wwwwwwwwwwww

mwwwf


BV 65


For the function


)6320()( 321 mwwwf

)()(

)()(

)110011010000()(

321321

3213232321

321321321321

321

wwwwww

wwwwwwwwww

wwwwwwwwwwww

mwwwf




(Ex 89)



(89)


(89)



(89)



(Ex 88)



(88)


(88)


(88)



(88)






We uses MUXes

(BV ex 631)










Barrel shifter



BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

And so on

Truth table

W0W1W2W3

0123


= Lowcost FPGA




BV 616



323132 wwwwwwf





1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf



1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf



1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf




)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf




VHDL BV 251a

)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf






VHDL BV 251a

)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf



VHDL BV 621







Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1

Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


023 xxx

301 xxx

01xx

02 xx

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1

x0

x1

0

1

0 1

3 2 (00)x x

x0

x1

0

1

0 1

3 2 (01)x x

x0

x1

0

1

0 1

3 2 (11)x x

x0

x1

0

1

0 1

3 2 (10)x x

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1 - -

1 0

x0

x1

0

1

0 1

3 2 (00)x x

0 1

0 1

x0

x1

0

1

0 1

3 2 (01)x x

0 1

1 0

x0

x1

0

1

0 1

3 2 (11)x x

- -

1 0

x0

x1

0

1

0 1

3 2 (10)x x

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


- -

1 0

x0

x1

0

1

0 1

0

23 )00(

xY

xx

0 1

0 1

x0

x1

0

1

0 1

0

23 )10(

xY

xx

0 1

1 0

x0

x1

0

1

0 1

01

23 )11(

xxY

xx

- -

1 0

x0

x1

0

1

0 1

0

23 )01(

xY

xx

Y

0x0x0x

01 xx


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


- -

1 0

x0

x1

0

1

0 1

3 2

1 0

(00)x x

Y x x

0 1

0 1

x0

x1

0

1

0 1

0

23 )10(

xY

xx

0 1

1 0

x0

x1

0

1

0 1

01

23 )11(

xxY

xx

- -

1 0

x0

x1

0

1

0 1

3 2

1 0

(10)x x

Y x x

Y0x

01 xx

01 xx

01 xx


Or hellip




(Ex 86)

Slide 3

Slide 4

Slide 5

BV 61

Slide 7

Slide 8

Ex 87

(87a)

Slide 11

Slide 12

Slide 13

87b

Slide 15

87c

Slide 17

Slide 18

Slide 19

Slide 20

Slide 21

87d

Slide 23

Slide 24

Slide 25

Slide 26

BV 65

Slide 28

Slide 29

Slide 30

Slide 31

(Ex 89)

(89)

Slide 34

Slide 35

(Ex 88)

(88)

Slide 38

Slide 39

Slide 40

(BV ex 631)

Slide 42

Slide 43

Slide 44

Slide 45


Barrel shifter

BV ex 632

Slide 49

Slide 50

Slide 51

Slide 52

Slide 53

Slide 54

= Lowcost FPGA

BV 616

Slide 57

Slide 58

Slide 59

Slide 60

Slide 61

VHDL BV 251a

Slide 63

Slide 64

VHDL BV 621

Slide 66


Slide 68

Slide 69

Slide 70

Slide 71

Slide 72

Slide 73

BV 65


For the function


)6320()( 321 mwwwf

)()(

)()(

)110011010000()(

321321

3213232321

321321321321

321

wwwwww

wwwwwwwwww

wwwwwwwwwwww

mwwwf


BV 65


For the function


)6320()( 321 mwwwf

)()(

)()(

)110011010000()(

321321

3213232321

321321321321

321

wwwwww

wwwwwwwwww

wwwwwwwwwwww

mwwwf


BV 65


For the function


)6320()( 321 mwwwf

)()(

)()(

)110011010000()(

321321

3213232321

321321321321

321

wwwwww

wwwwwwwwww

wwwwwwwwwwww

mwwwf




(Ex 89)



(89)


(89)



(89)



(Ex 88)



(88)


(88)


(88)



(88)






We uses MUXes

(BV ex 631)










Barrel shifter



BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

And so on

Truth table

W0W1W2W3

0123


= Lowcost FPGA




BV 616



323132 wwwwwwf





1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf



1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf



1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf




)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf




VHDL BV 251a

)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf






VHDL BV 251a

)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf



VHDL BV 621







Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1

Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


023 xxx

301 xxx

01xx

02 xx

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1

x0

x1

0

1

0 1

3 2 (00)x x

x0

x1

0

1

0 1

3 2 (01)x x

x0

x1

0

1

0 1

3 2 (11)x x

x0

x1

0

1

0 1

3 2 (10)x x

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1 - -

1 0

x0

x1

0

1

0 1

3 2 (00)x x

0 1

0 1

x0

x1

0

1

0 1

3 2 (01)x x

0 1

1 0

x0

x1

0

1

0 1

3 2 (11)x x

- -

1 0

x0

x1

0

1

0 1

3 2 (10)x x

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


- -

1 0

x0

x1

0

1

0 1

0

23 )00(

xY

xx

0 1

0 1

x0

x1

0

1

0 1

0

23 )10(

xY

xx

0 1

1 0

x0

x1

0

1

0 1

01

23 )11(

xxY

xx

- -

1 0

x0

x1

0

1

0 1

0

23 )01(

xY

xx

Y

0x0x0x

01 xx


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


- -

1 0

x0

x1

0

1

0 1

3 2

1 0

(00)x x

Y x x

0 1

0 1

x0

x1

0

1

0 1

0

23 )10(

xY

xx

0 1

1 0

x0

x1

0

1

0 1

01

23 )11(

xxY

xx

- -

1 0

x0

x1

0

1

0 1

3 2

1 0

(10)x x

Y x x

Y0x

01 xx

01 xx

01 xx


Or hellip




(Ex 86)

Slide 3

Slide 4

Slide 5

BV 61

Slide 7

Slide 8

Ex 87

(87a)

Slide 11

Slide 12

Slide 13

87b

Slide 15

87c

Slide 17

Slide 18

Slide 19

Slide 20

Slide 21

87d

Slide 23

Slide 24

Slide 25

Slide 26

BV 65

Slide 28

Slide 29

Slide 30

Slide 31

(Ex 89)

(89)

Slide 34

Slide 35

(Ex 88)

(88)

Slide 38

Slide 39

Slide 40

(BV ex 631)

Slide 42

Slide 43

Slide 44

Slide 45


Barrel shifter

BV ex 632

Slide 49

Slide 50

Slide 51

Slide 52

Slide 53

Slide 54

= Lowcost FPGA

BV 616

Slide 57

Slide 58

Slide 59

Slide 60

Slide 61

VHDL BV 251a

Slide 63

Slide 64

VHDL BV 621

Slide 66


Slide 68

Slide 69

Slide 70

Slide 71

Slide 72

Slide 73

BV 65


For the function


)6320()( 321 mwwwf

)()(

)()(

)110011010000()(

321321

3213232321

321321321321

321

wwwwww

wwwwwwwwww

wwwwwwwwwwww

mwwwf


BV 65


For the function


)6320()( 321 mwwwf

)()(

)()(

)110011010000()(

321321

3213232321

321321321321

321

wwwwww

wwwwwwwwww

wwwwwwwwwwww

mwwwf




(Ex 89)



(89)


(89)



(89)



(Ex 88)



(88)


(88)


(88)



(88)






We uses MUXes

(BV ex 631)










Barrel shifter



BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

And so on

Truth table

W0W1W2W3

0123


= Lowcost FPGA




BV 616



323132 wwwwwwf





1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf



1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf



1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf




)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf




VHDL BV 251a

)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf






VHDL BV 251a

)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf



VHDL BV 621







Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1

Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


023 xxx

301 xxx

01xx

02 xx

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1

x0

x1

0

1

0 1

3 2 (00)x x

x0

x1

0

1

0 1

3 2 (01)x x

x0

x1

0

1

0 1

3 2 (11)x x

x0

x1

0

1

0 1

3 2 (10)x x

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1 - -

1 0

x0

x1

0

1

0 1

3 2 (00)x x

0 1

0 1

x0

x1

0

1

0 1

3 2 (01)x x

0 1

1 0

x0

x1

0

1

0 1

3 2 (11)x x

- -

1 0

x0

x1

0

1

0 1

3 2 (10)x x

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


- -

1 0

x0

x1

0

1

0 1

0

23 )00(

xY

xx

0 1

0 1

x0

x1

0

1

0 1

0

23 )10(

xY

xx

0 1

1 0

x0

x1

0

1

0 1

01

23 )11(

xxY

xx

- -

1 0

x0

x1

0

1

0 1

0

23 )01(

xY

xx

Y

0x0x0x

01 xx


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


- -

1 0

x0

x1

0

1

0 1

3 2

1 0

(00)x x

Y x x

0 1

0 1

x0

x1

0

1

0 1

0

23 )10(

xY

xx

0 1

1 0

x0

x1

0

1

0 1

01

23 )11(

xxY

xx

- -

1 0

x0

x1

0

1

0 1

3 2

1 0

(10)x x

Y x x

Y0x

01 xx

01 xx

01 xx


Or hellip




(Ex 86)

Slide 3

Slide 4

Slide 5

BV 61

Slide 7

Slide 8

Ex 87

(87a)

Slide 11

Slide 12

Slide 13

87b

Slide 15

87c

Slide 17

Slide 18

Slide 19

Slide 20

Slide 21

87d

Slide 23

Slide 24

Slide 25

Slide 26

BV 65

Slide 28

Slide 29

Slide 30

Slide 31

(Ex 89)

(89)

Slide 34

Slide 35

(Ex 88)

(88)

Slide 38

Slide 39

Slide 40

(BV ex 631)

Slide 42

Slide 43

Slide 44

Slide 45


Barrel shifter

BV ex 632

Slide 49

Slide 50

Slide 51

Slide 52

Slide 53

Slide 54

= Lowcost FPGA

BV 616

Slide 57

Slide 58

Slide 59

Slide 60

Slide 61

VHDL BV 251a

Slide 63

Slide 64

VHDL BV 621

Slide 66


Slide 68

Slide 69

Slide 70

Slide 71

Slide 72

Slide 73

BV 65


For the function


)6320()( 321 mwwwf

)()(

)()(

)110011010000()(

321321

3213232321

321321321321

321

wwwwww

wwwwwwwwww

wwwwwwwwwwww

mwwwf




(Ex 89)



(89)


(89)



(89)



(Ex 88)



(88)


(88)


(88)



(88)






We uses MUXes

(BV ex 631)










Barrel shifter



BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

And so on

Truth table

W0W1W2W3

0123


= Lowcost FPGA




BV 616



323132 wwwwwwf





1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf



1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf



1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf




)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf




VHDL BV 251a

)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf






VHDL BV 251a

)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf



VHDL BV 621







Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1

Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


023 xxx

301 xxx

01xx

02 xx

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1

x0

x1

0

1

0 1

3 2 (00)x x

x0

x1

0

1

0 1

3 2 (01)x x

x0

x1

0

1

0 1

3 2 (11)x x

x0

x1

0

1

0 1

3 2 (10)x x

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1 - -

1 0

x0

x1

0

1

0 1

3 2 (00)x x

0 1

0 1

x0

x1

0

1

0 1

3 2 (01)x x

0 1

1 0

x0

x1

0

1

0 1

3 2 (11)x x

- -

1 0

x0

x1

0

1

0 1

3 2 (10)x x

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


- -

1 0

x0

x1

0

1

0 1

0

23 )00(

xY

xx

0 1

0 1

x0

x1

0

1

0 1

0

23 )10(

xY

xx

0 1

1 0

x0

x1

0

1

0 1

01

23 )11(

xxY

xx

- -

1 0

x0

x1

0

1

0 1

0

23 )01(

xY

xx

Y

0x0x0x

01 xx


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


- -

1 0

x0

x1

0

1

0 1

3 2

1 0

(00)x x

Y x x

0 1

0 1

x0

x1

0

1

0 1

0

23 )10(

xY

xx

0 1

1 0

x0

x1

0

1

0 1

01

23 )11(

xxY

xx

- -

1 0

x0

x1

0

1

0 1

3 2

1 0

(10)x x

Y x x

Y0x

01 xx

01 xx

01 xx


Or hellip




(Ex 86)

Slide 3

Slide 4

Slide 5

BV 61

Slide 7

Slide 8

Ex 87

(87a)

Slide 11

Slide 12

Slide 13

87b

Slide 15

87c

Slide 17

Slide 18

Slide 19

Slide 20

Slide 21

87d

Slide 23

Slide 24

Slide 25

Slide 26

BV 65

Slide 28

Slide 29

Slide 30

Slide 31

(Ex 89)

(89)

Slide 34

Slide 35

(Ex 88)

(88)

Slide 38

Slide 39

Slide 40

(BV ex 631)

Slide 42

Slide 43

Slide 44

Slide 45


Barrel shifter

BV ex 632

Slide 49

Slide 50

Slide 51

Slide 52

Slide 53

Slide 54

= Lowcost FPGA

BV 616

Slide 57

Slide 58

Slide 59

Slide 60

Slide 61

VHDL BV 251a

Slide 63

Slide 64

VHDL BV 621

Slide 66


Slide 68

Slide 69

Slide 70

Slide 71

Slide 72

Slide 73



(Ex 89)



(89)


(89)



(89)



(Ex 88)



(88)


(88)


(88)



(88)






We uses MUXes

(BV ex 631)










Barrel shifter



BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

And so on

Truth table

W0W1W2W3

0123


= Lowcost FPGA




BV 616



323132 wwwwwwf





1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf



1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf



1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf




)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf




VHDL BV 251a

)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf






VHDL BV 251a

)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf



VHDL BV 621







Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1

Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


023 xxx

301 xxx

01xx

02 xx

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1

x0

x1

0

1

0 1

3 2 (00)x x

x0

x1

0

1

0 1

3 2 (01)x x

x0

x1

0

1

0 1

3 2 (11)x x

x0

x1

0

1

0 1

3 2 (10)x x

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1 - -

1 0

x0

x1

0

1

0 1

3 2 (00)x x

0 1

0 1

x0

x1

0

1

0 1

3 2 (01)x x

0 1

1 0

x0

x1

0

1

0 1

3 2 (11)x x

- -

1 0

x0

x1

0

1

0 1

3 2 (10)x x

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


- -

1 0

x0

x1

0

1

0 1

0

23 )00(

xY

xx

0 1

0 1

x0

x1

0

1

0 1

0

23 )10(

xY

xx

0 1

1 0

x0

x1

0

1

0 1

01

23 )11(

xxY

xx

- -

1 0

x0

x1

0

1

0 1

0

23 )01(

xY

xx

Y

0x0x0x

01 xx


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


- -

1 0

x0

x1

0

1

0 1

3 2

1 0

(00)x x

Y x x

0 1

0 1

x0

x1

0

1

0 1

0

23 )10(

xY

xx

0 1

1 0

x0

x1

0

1

0 1

01

23 )11(

xxY

xx

- -

1 0

x0

x1

0

1

0 1

3 2

1 0

(10)x x

Y x x

Y0x

01 xx

01 xx

01 xx


Or hellip




(Ex 86)

Slide 3

Slide 4

Slide 5

BV 61

Slide 7

Slide 8

Ex 87

(87a)

Slide 11

Slide 12

Slide 13

87b

Slide 15

87c

Slide 17

Slide 18

Slide 19

Slide 20

Slide 21

87d

Slide 23

Slide 24

Slide 25

Slide 26

BV 65

Slide 28

Slide 29

Slide 30

Slide 31

(Ex 89)

(89)

Slide 34

Slide 35

(Ex 88)

(88)

Slide 38

Slide 39

Slide 40

(BV ex 631)

Slide 42

Slide 43

Slide 44

Slide 45


Barrel shifter

BV ex 632

Slide 49

Slide 50

Slide 51

Slide 52

Slide 53

Slide 54

= Lowcost FPGA

BV 616

Slide 57

Slide 58

Slide 59

Slide 60

Slide 61

VHDL BV 251a

Slide 63

Slide 64

VHDL BV 621

Slide 66


Slide 68

Slide 69

Slide 70

Slide 71

Slide 72

Slide 73


(89)


(89)



(89)



(Ex 88)



(88)


(88)


(88)



(88)






We uses MUXes

(BV ex 631)










Barrel shifter



BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

And so on

Truth table

W0W1W2W3

0123


= Lowcost FPGA




BV 616



323132 wwwwwwf





1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf



1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf



1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf




)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf




VHDL BV 251a

)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf






VHDL BV 251a

)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf



VHDL BV 621







Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1

Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


023 xxx

301 xxx

01xx

02 xx

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1

x0

x1

0

1

0 1

3 2 (00)x x

x0

x1

0

1

0 1

3 2 (01)x x

x0

x1

0

1

0 1

3 2 (11)x x

x0

x1

0

1

0 1

3 2 (10)x x

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1 - -

1 0

x0

x1

0

1

0 1

3 2 (00)x x

0 1

0 1

x0

x1

0

1

0 1

3 2 (01)x x

0 1

1 0

x0

x1

0

1

0 1

3 2 (11)x x

- -

1 0

x0

x1

0

1

0 1

3 2 (10)x x

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


- -

1 0

x0

x1

0

1

0 1

0

23 )00(

xY

xx

0 1

0 1

x0

x1

0

1

0 1

0

23 )10(

xY

xx

0 1

1 0

x0

x1

0

1

0 1

01

23 )11(

xxY

xx

- -

1 0

x0

x1

0

1

0 1

0

23 )01(

xY

xx

Y

0x0x0x

01 xx


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


- -

1 0

x0

x1

0

1

0 1

3 2

1 0

(00)x x

Y x x

0 1

0 1

x0

x1

0

1

0 1

0

23 )10(

xY

xx

0 1

1 0

x0

x1

0

1

0 1

01

23 )11(

xxY

xx

- -

1 0

x0

x1

0

1

0 1

3 2

1 0

(10)x x

Y x x

Y0x

01 xx

01 xx

01 xx


Or hellip




(Ex 86)

Slide 3

Slide 4

Slide 5

BV 61

Slide 7

Slide 8

Ex 87

(87a)

Slide 11

Slide 12

Slide 13

87b

Slide 15

87c

Slide 17

Slide 18

Slide 19

Slide 20

Slide 21

87d

Slide 23

Slide 24

Slide 25

Slide 26

BV 65

Slide 28

Slide 29

Slide 30

Slide 31

(Ex 89)

(89)

Slide 34

Slide 35

(Ex 88)

(88)

Slide 38

Slide 39

Slide 40

(BV ex 631)

Slide 42

Slide 43

Slide 44

Slide 45


Barrel shifter

BV ex 632

Slide 49

Slide 50

Slide 51

Slide 52

Slide 53

Slide 54

= Lowcost FPGA

BV 616

Slide 57

Slide 58

Slide 59

Slide 60

Slide 61

VHDL BV 251a

Slide 63

Slide 64

VHDL BV 621

Slide 66


Slide 68

Slide 69

Slide 70

Slide 71

Slide 72

Slide 73


(89)



(89)



(Ex 88)



(88)


(88)


(88)



(88)






We uses MUXes

(BV ex 631)










Barrel shifter



BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

And so on

Truth table

W0W1W2W3

0123


= Lowcost FPGA




BV 616



323132 wwwwwwf





1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf



1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf



1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf




)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf




VHDL BV 251a

)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf






VHDL BV 251a

)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf



VHDL BV 621







Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1

Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


023 xxx

301 xxx

01xx

02 xx

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1

x0

x1

0

1

0 1

3 2 (00)x x

x0

x1

0

1

0 1

3 2 (01)x x

x0

x1

0

1

0 1

3 2 (11)x x

x0

x1

0

1

0 1

3 2 (10)x x

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1 - -

1 0

x0

x1

0

1

0 1

3 2 (00)x x

0 1

0 1

x0

x1

0

1

0 1

3 2 (01)x x

0 1

1 0

x0

x1

0

1

0 1

3 2 (11)x x

- -

1 0

x0

x1

0

1

0 1

3 2 (10)x x

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


- -

1 0

x0

x1

0

1

0 1

0

23 )00(

xY

xx

0 1

0 1

x0

x1

0

1

0 1

0

23 )10(

xY

xx

0 1

1 0

x0

x1

0

1

0 1

01

23 )11(

xxY

xx

- -

1 0

x0

x1

0

1

0 1

0

23 )01(

xY

xx

Y

0x0x0x

01 xx


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


- -

1 0

x0

x1

0

1

0 1

3 2

1 0

(00)x x

Y x x

0 1

0 1

x0

x1

0

1

0 1

0

23 )10(

xY

xx

0 1

1 0

x0

x1

0

1

0 1

01

23 )11(

xxY

xx

- -

1 0

x0

x1

0

1

0 1

3 2

1 0

(10)x x

Y x x

Y0x

01 xx

01 xx

01 xx


Or hellip




(Ex 86)

Slide 3

Slide 4

Slide 5

BV 61

Slide 7

Slide 8

Ex 87

(87a)

Slide 11

Slide 12

Slide 13

87b

Slide 15

87c

Slide 17

Slide 18

Slide 19

Slide 20

Slide 21

87d

Slide 23

Slide 24

Slide 25

Slide 26

BV 65

Slide 28

Slide 29

Slide 30

Slide 31

(Ex 89)

(89)

Slide 34

Slide 35

(Ex 88)

(88)

Slide 38

Slide 39

Slide 40

(BV ex 631)

Slide 42

Slide 43

Slide 44

Slide 45


Barrel shifter

BV ex 632

Slide 49

Slide 50

Slide 51

Slide 52

Slide 53

Slide 54

= Lowcost FPGA

BV 616

Slide 57

Slide 58

Slide 59

Slide 60

Slide 61

VHDL BV 251a

Slide 63

Slide 64

VHDL BV 621

Slide 66


Slide 68

Slide 69

Slide 70

Slide 71

Slide 72

Slide 73


(89)



(Ex 88)



(88)


(88)


(88)



(88)






We uses MUXes

(BV ex 631)










Barrel shifter



BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

And so on

Truth table

W0W1W2W3

0123


= Lowcost FPGA




BV 616



323132 wwwwwwf





1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf



1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf



1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf




)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf




VHDL BV 251a

)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf






VHDL BV 251a

)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf



VHDL BV 621







Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1

Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


023 xxx

301 xxx

01xx

02 xx

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1

x0

x1

0

1

0 1

3 2 (00)x x

x0

x1

0

1

0 1

3 2 (01)x x

x0

x1

0

1

0 1

3 2 (11)x x

x0

x1

0

1

0 1

3 2 (10)x x

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1 - -

1 0

x0

x1

0

1

0 1

3 2 (00)x x

0 1

0 1

x0

x1

0

1

0 1

3 2 (01)x x

0 1

1 0

x0

x1

0

1

0 1

3 2 (11)x x

- -

1 0

x0

x1

0

1

0 1

3 2 (10)x x

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


- -

1 0

x0

x1

0

1

0 1

0

23 )00(

xY

xx

0 1

0 1

x0

x1

0

1

0 1

0

23 )10(

xY

xx

0 1

1 0

x0

x1

0

1

0 1

01

23 )11(

xxY

xx

- -

1 0

x0

x1

0

1

0 1

0

23 )01(

xY

xx

Y

0x0x0x

01 xx


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


- -

1 0

x0

x1

0

1

0 1

3 2

1 0

(00)x x

Y x x

0 1

0 1

x0

x1

0

1

0 1

0

23 )10(

xY

xx

0 1

1 0

x0

x1

0

1

0 1

01

23 )11(

xxY

xx

- -

1 0

x0

x1

0

1

0 1

3 2

1 0

(10)x x

Y x x

Y0x

01 xx

01 xx

01 xx


Or hellip




(Ex 86)

Slide 3

Slide 4

Slide 5

BV 61

Slide 7

Slide 8

Ex 87

(87a)

Slide 11

Slide 12

Slide 13

87b

Slide 15

87c

Slide 17

Slide 18

Slide 19

Slide 20

Slide 21

87d

Slide 23

Slide 24

Slide 25

Slide 26

BV 65

Slide 28

Slide 29

Slide 30

Slide 31

(Ex 89)

(89)

Slide 34

Slide 35

(Ex 88)

(88)

Slide 38

Slide 39

Slide 40

(BV ex 631)

Slide 42

Slide 43

Slide 44

Slide 45


Barrel shifter

BV ex 632

Slide 49

Slide 50

Slide 51

Slide 52

Slide 53

Slide 54

= Lowcost FPGA

BV 616

Slide 57

Slide 58

Slide 59

Slide 60

Slide 61

VHDL BV 251a

Slide 63

Slide 64

VHDL BV 621

Slide 66


Slide 68

Slide 69

Slide 70

Slide 71

Slide 72

Slide 73


(Ex 88)



(88)


(88)


(88)



(88)






We uses MUXes

(BV ex 631)










Barrel shifter



BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

And so on

Truth table

W0W1W2W3

0123


= Lowcost FPGA




BV 616



323132 wwwwwwf





1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf



1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf



1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf




)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf




VHDL BV 251a

)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf






VHDL BV 251a

)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf



VHDL BV 621







Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1

Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


023 xxx

301 xxx

01xx

02 xx

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1

x0

x1

0

1

0 1

3 2 (00)x x

x0

x1

0

1

0 1

3 2 (01)x x

x0

x1

0

1

0 1

3 2 (11)x x

x0

x1

0

1

0 1

3 2 (10)x x

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1 - -

1 0

x0

x1

0

1

0 1

3 2 (00)x x

0 1

0 1

x0

x1

0

1

0 1

3 2 (01)x x

0 1

1 0

x0

x1

0

1

0 1

3 2 (11)x x

- -

1 0

x0

x1

0

1

0 1

3 2 (10)x x

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


- -

1 0

x0

x1

0

1

0 1

0

23 )00(

xY

xx

0 1

0 1

x0

x1

0

1

0 1

0

23 )10(

xY

xx

0 1

1 0

x0

x1

0

1

0 1

01

23 )11(

xxY

xx

- -

1 0

x0

x1

0

1

0 1

0

23 )01(

xY

xx

Y

0x0x0x

01 xx


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


- -

1 0

x0

x1

0

1

0 1

3 2

1 0

(00)x x

Y x x

0 1

0 1

x0

x1

0

1

0 1

0

23 )10(

xY

xx

0 1

1 0

x0

x1

0

1

0 1

01

23 )11(

xxY

xx

- -

1 0

x0

x1

0

1

0 1

3 2

1 0

(10)x x

Y x x

Y0x

01 xx

01 xx

01 xx


Or hellip




(Ex 86)

Slide 3

Slide 4

Slide 5

BV 61

Slide 7

Slide 8

Ex 87

(87a)

Slide 11

Slide 12

Slide 13

87b

Slide 15

87c

Slide 17

Slide 18

Slide 19

Slide 20

Slide 21

87d

Slide 23

Slide 24

Slide 25

Slide 26

BV 65

Slide 28

Slide 29

Slide 30

Slide 31

(Ex 89)

(89)

Slide 34

Slide 35

(Ex 88)

(88)

Slide 38

Slide 39

Slide 40

(BV ex 631)

Slide 42

Slide 43

Slide 44

Slide 45


Barrel shifter

BV ex 632

Slide 49

Slide 50

Slide 51

Slide 52

Slide 53

Slide 54

= Lowcost FPGA

BV 616

Slide 57

Slide 58

Slide 59

Slide 60

Slide 61

VHDL BV 251a

Slide 63

Slide 64

VHDL BV 621

Slide 66


Slide 68

Slide 69

Slide 70

Slide 71

Slide 72

Slide 73


(88)


(88)


(88)



(88)






We uses MUXes

(BV ex 631)










Barrel shifter



BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

And so on

Truth table

W0W1W2W3

0123


= Lowcost FPGA




BV 616



323132 wwwwwwf





1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf



1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf



1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf




)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf




VHDL BV 251a

)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf






VHDL BV 251a

)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf



VHDL BV 621







Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1

Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


023 xxx

301 xxx

01xx

02 xx

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1

x0

x1

0

1

0 1

3 2 (00)x x

x0

x1

0

1

0 1

3 2 (01)x x

x0

x1

0

1

0 1

3 2 (11)x x

x0

x1

0

1

0 1

3 2 (10)x x

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1 - -

1 0

x0

x1

0

1

0 1

3 2 (00)x x

0 1

0 1

x0

x1

0

1

0 1

3 2 (01)x x

0 1

1 0

x0

x1

0

1

0 1

3 2 (11)x x

- -

1 0

x0

x1

0

1

0 1

3 2 (10)x x

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


- -

1 0

x0

x1

0

1

0 1

0

23 )00(

xY

xx

0 1

0 1

x0

x1

0

1

0 1

0

23 )10(

xY

xx

0 1

1 0

x0

x1

0

1

0 1

01

23 )11(

xxY

xx

- -

1 0

x0

x1

0

1

0 1

0

23 )01(

xY

xx

Y

0x0x0x

01 xx


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


- -

1 0

x0

x1

0

1

0 1

3 2

1 0

(00)x x

Y x x

0 1

0 1

x0

x1

0

1

0 1

0

23 )10(

xY

xx

0 1

1 0

x0

x1

0

1

0 1

01

23 )11(

xxY

xx

- -

1 0

x0

x1

0

1

0 1

3 2

1 0

(10)x x

Y x x

Y0x

01 xx

01 xx

01 xx


Or hellip




(Ex 86)

Slide 3

Slide 4

Slide 5

BV 61

Slide 7

Slide 8

Ex 87

(87a)

Slide 11

Slide 12

Slide 13

87b

Slide 15

87c

Slide 17

Slide 18

Slide 19

Slide 20

Slide 21

87d

Slide 23

Slide 24

Slide 25

Slide 26

BV 65

Slide 28

Slide 29

Slide 30

Slide 31

(Ex 89)

(89)

Slide 34

Slide 35

(Ex 88)

(88)

Slide 38

Slide 39

Slide 40

(BV ex 631)

Slide 42

Slide 43

Slide 44

Slide 45


Barrel shifter

BV ex 632

Slide 49

Slide 50

Slide 51

Slide 52

Slide 53

Slide 54

= Lowcost FPGA

BV 616

Slide 57

Slide 58

Slide 59

Slide 60

Slide 61

VHDL BV 251a

Slide 63

Slide 64

VHDL BV 621

Slide 66


Slide 68

Slide 69

Slide 70

Slide 71

Slide 72

Slide 73


(88)


(88)



(88)






We uses MUXes

(BV ex 631)










Barrel shifter



BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

And so on

Truth table

W0W1W2W3

0123


= Lowcost FPGA




BV 616



323132 wwwwwwf





1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf



1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf



1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf




)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf




VHDL BV 251a

)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf






VHDL BV 251a

)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf



VHDL BV 621







Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1

Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


023 xxx

301 xxx

01xx

02 xx

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1

x0

x1

0

1

0 1

3 2 (00)x x

x0

x1

0

1

0 1

3 2 (01)x x

x0

x1

0

1

0 1

3 2 (11)x x

x0

x1

0

1

0 1

3 2 (10)x x

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1 - -

1 0

x0

x1

0

1

0 1

3 2 (00)x x

0 1

0 1

x0

x1

0

1

0 1

3 2 (01)x x

0 1

1 0

x0

x1

0

1

0 1

3 2 (11)x x

- -

1 0

x0

x1

0

1

0 1

3 2 (10)x x

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


- -

1 0

x0

x1

0

1

0 1

0

23 )00(

xY

xx

0 1

0 1

x0

x1

0

1

0 1

0

23 )10(

xY

xx

0 1

1 0

x0

x1

0

1

0 1

01

23 )11(

xxY

xx

- -

1 0

x0

x1

0

1

0 1

0

23 )01(

xY

xx

Y

0x0x0x

01 xx


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


- -

1 0

x0

x1

0

1

0 1

3 2

1 0

(00)x x

Y x x

0 1

0 1

x0

x1

0

1

0 1

0

23 )10(

xY

xx

0 1

1 0

x0

x1

0

1

0 1

01

23 )11(

xxY

xx

- -

1 0

x0

x1

0

1

0 1

3 2

1 0

(10)x x

Y x x

Y0x

01 xx

01 xx

01 xx


Or hellip




(Ex 86)

Slide 3

Slide 4

Slide 5

BV 61

Slide 7

Slide 8

Ex 87

(87a)

Slide 11

Slide 12

Slide 13

87b

Slide 15

87c

Slide 17

Slide 18

Slide 19

Slide 20

Slide 21

87d

Slide 23

Slide 24

Slide 25

Slide 26

BV 65

Slide 28

Slide 29

Slide 30

Slide 31

(Ex 89)

(89)

Slide 34

Slide 35

(Ex 88)

(88)

Slide 38

Slide 39

Slide 40

(BV ex 631)

Slide 42

Slide 43

Slide 44

Slide 45


Barrel shifter

BV ex 632

Slide 49

Slide 50

Slide 51

Slide 52

Slide 53

Slide 54

= Lowcost FPGA

BV 616

Slide 57

Slide 58

Slide 59

Slide 60

Slide 61

VHDL BV 251a

Slide 63

Slide 64

VHDL BV 621

Slide 66


Slide 68

Slide 69

Slide 70

Slide 71

Slide 72

Slide 73


(88)



(88)






We uses MUXes

(BV ex 631)










Barrel shifter



BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

And so on

Truth table

W0W1W2W3

0123


= Lowcost FPGA




BV 616



323132 wwwwwwf





1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf



1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf



1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf




)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf




VHDL BV 251a

)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf






VHDL BV 251a

)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf



VHDL BV 621







Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1

Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


023 xxx

301 xxx

01xx

02 xx

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1

x0

x1

0

1

0 1

3 2 (00)x x

x0

x1

0

1

0 1

3 2 (01)x x

x0

x1

0

1

0 1

3 2 (11)x x

x0

x1

0

1

0 1

3 2 (10)x x

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1 - -

1 0

x0

x1

0

1

0 1

3 2 (00)x x

0 1

0 1

x0

x1

0

1

0 1

3 2 (01)x x

0 1

1 0

x0

x1

0

1

0 1

3 2 (11)x x

- -

1 0

x0

x1

0

1

0 1

3 2 (10)x x

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


- -

1 0

x0

x1

0

1

0 1

0

23 )00(

xY

xx

0 1

0 1

x0

x1

0

1

0 1

0

23 )10(

xY

xx

0 1

1 0

x0

x1

0

1

0 1

01

23 )11(

xxY

xx

- -

1 0

x0

x1

0

1

0 1

0

23 )01(

xY

xx

Y

0x0x0x

01 xx


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


- -

1 0

x0

x1

0

1

0 1

3 2

1 0

(00)x x

Y x x

0 1

0 1

x0

x1

0

1

0 1

0

23 )10(

xY

xx

0 1

1 0

x0

x1

0

1

0 1

01

23 )11(

xxY

xx

- -

1 0

x0

x1

0

1

0 1

3 2

1 0

(10)x x

Y x x

Y0x

01 xx

01 xx

01 xx


Or hellip




(Ex 86)

Slide 3

Slide 4

Slide 5

BV 61

Slide 7

Slide 8

Ex 87

(87a)

Slide 11

Slide 12

Slide 13

87b

Slide 15

87c

Slide 17

Slide 18

Slide 19

Slide 20

Slide 21

87d

Slide 23

Slide 24

Slide 25

Slide 26

BV 65

Slide 28

Slide 29

Slide 30

Slide 31

(Ex 89)

(89)

Slide 34

Slide 35

(Ex 88)

(88)

Slide 38

Slide 39

Slide 40

(BV ex 631)

Slide 42

Slide 43

Slide 44

Slide 45


Barrel shifter

BV ex 632

Slide 49

Slide 50

Slide 51

Slide 52

Slide 53

Slide 54

= Lowcost FPGA

BV 616

Slide 57

Slide 58

Slide 59

Slide 60

Slide 61

VHDL BV 251a

Slide 63

Slide 64

VHDL BV 621

Slide 66


Slide 68

Slide 69

Slide 70

Slide 71

Slide 72

Slide 73


(88)






We uses MUXes

(BV ex 631)










Barrel shifter



BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

And so on

Truth table

W0W1W2W3

0123


= Lowcost FPGA




BV 616



323132 wwwwwwf





1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf



1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf



1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf




)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf




VHDL BV 251a

)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf






VHDL BV 251a

)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf



VHDL BV 621







Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1

Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


023 xxx

301 xxx

01xx

02 xx

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1

x0

x1

0

1

0 1

3 2 (00)x x

x0

x1

0

1

0 1

3 2 (01)x x

x0

x1

0

1

0 1

3 2 (11)x x

x0

x1

0

1

0 1

3 2 (10)x x

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1 - -

1 0

x0

x1

0

1

0 1

3 2 (00)x x

0 1

0 1

x0

x1

0

1

0 1

3 2 (01)x x

0 1

1 0

x0

x1

0

1

0 1

3 2 (11)x x

- -

1 0

x0

x1

0

1

0 1

3 2 (10)x x

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


- -

1 0

x0

x1

0

1

0 1

0

23 )00(

xY

xx

0 1

0 1

x0

x1

0

1

0 1

0

23 )10(

xY

xx

0 1

1 0

x0

x1

0

1

0 1

01

23 )11(

xxY

xx

- -

1 0

x0

x1

0

1

0 1

0

23 )01(

xY

xx

Y

0x0x0x

01 xx


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


- -

1 0

x0

x1

0

1

0 1

3 2

1 0

(00)x x

Y x x

0 1

0 1

x0

x1

0

1

0 1

0

23 )10(

xY

xx

0 1

1 0

x0

x1

0

1

0 1

01

23 )11(

xxY

xx

- -

1 0

x0

x1

0

1

0 1

3 2

1 0

(10)x x

Y x x

Y0x

01 xx

01 xx

01 xx


Or hellip




(Ex 86)

Slide 3

Slide 4

Slide 5

BV 61

Slide 7

Slide 8

Ex 87

(87a)

Slide 11

Slide 12

Slide 13

87b

Slide 15

87c

Slide 17

Slide 18

Slide 19

Slide 20

Slide 21

87d

Slide 23

Slide 24

Slide 25

Slide 26

BV 65

Slide 28

Slide 29

Slide 30

Slide 31

(Ex 89)

(89)

Slide 34

Slide 35

(Ex 88)

(88)

Slide 38

Slide 39

Slide 40

(BV ex 631)

Slide 42

Slide 43

Slide 44

Slide 45


Barrel shifter

BV ex 632

Slide 49

Slide 50

Slide 51

Slide 52

Slide 53

Slide 54

= Lowcost FPGA

BV 616

Slide 57

Slide 58

Slide 59

Slide 60

Slide 61

VHDL BV 251a

Slide 63

Slide 64

VHDL BV 621

Slide 66


Slide 68

Slide 69

Slide 70

Slide 71

Slide 72

Slide 73





We uses MUXes

(BV ex 631)










Barrel shifter



BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

And so on

Truth table

W0W1W2W3

0123


= Lowcost FPGA




BV 616



323132 wwwwwwf





1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf



1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf



1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf




)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf




VHDL BV 251a

)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf






VHDL BV 251a

)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf



VHDL BV 621







Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1

Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


023 xxx

301 xxx

01xx

02 xx

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1

x0

x1

0

1

0 1

3 2 (00)x x

x0

x1

0

1

0 1

3 2 (01)x x

x0

x1

0

1

0 1

3 2 (11)x x

x0

x1

0

1

0 1

3 2 (10)x x

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1 - -

1 0

x0

x1

0

1

0 1

3 2 (00)x x

0 1

0 1

x0

x1

0

1

0 1

3 2 (01)x x

0 1

1 0

x0

x1

0

1

0 1

3 2 (11)x x

- -

1 0

x0

x1

0

1

0 1

3 2 (10)x x

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


- -

1 0

x0

x1

0

1

0 1

0

23 )00(

xY

xx

0 1

0 1

x0

x1

0

1

0 1

0

23 )10(

xY

xx

0 1

1 0

x0

x1

0

1

0 1

01

23 )11(

xxY

xx

- -

1 0

x0

x1

0

1

0 1

0

23 )01(

xY

xx

Y

0x0x0x

01 xx


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


- -

1 0

x0

x1

0

1

0 1

3 2

1 0

(00)x x

Y x x

0 1

0 1

x0

x1

0

1

0 1

0

23 )10(

xY

xx

0 1

1 0

x0

x1

0

1

0 1

01

23 )11(

xxY

xx

- -

1 0

x0

x1

0

1

0 1

3 2

1 0

(10)x x

Y x x

Y0x

01 xx

01 xx

01 xx


Or hellip




(Ex 86)

Slide 3

Slide 4

Slide 5

BV 61

Slide 7

Slide 8

Ex 87

(87a)

Slide 11

Slide 12

Slide 13

87b

Slide 15

87c

Slide 17

Slide 18

Slide 19

Slide 20

Slide 21

87d

Slide 23

Slide 24

Slide 25

Slide 26

BV 65

Slide 28

Slide 29

Slide 30

Slide 31

(Ex 89)

(89)

Slide 34

Slide 35

(Ex 88)

(88)

Slide 38

Slide 39

Slide 40

(BV ex 631)

Slide 42

Slide 43

Slide 44

Slide 45


Barrel shifter

BV ex 632

Slide 49

Slide 50

Slide 51

Slide 52

Slide 53

Slide 54

= Lowcost FPGA

BV 616

Slide 57

Slide 58

Slide 59

Slide 60

Slide 61

VHDL BV 251a

Slide 63

Slide 64

VHDL BV 621

Slide 66


Slide 68

Slide 69

Slide 70

Slide 71

Slide 72

Slide 73










Barrel shifter



BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

And so on

Truth table

W0W1W2W3

0123


= Lowcost FPGA




BV 616



323132 wwwwwwf





1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf



1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf



1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf




)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf




VHDL BV 251a

)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf






VHDL BV 251a

)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf



VHDL BV 621







Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1

Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


023 xxx

301 xxx

01xx

02 xx

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1

x0

x1

0

1

0 1

3 2 (00)x x

x0

x1

0

1

0 1

3 2 (01)x x

x0

x1

0

1

0 1

3 2 (11)x x

x0

x1

0

1

0 1

3 2 (10)x x

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1 - -

1 0

x0

x1

0

1

0 1

3 2 (00)x x

0 1

0 1

x0

x1

0

1

0 1

3 2 (01)x x

0 1

1 0

x0

x1

0

1

0 1

3 2 (11)x x

- -

1 0

x0

x1

0

1

0 1

3 2 (10)x x

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


- -

1 0

x0

x1

0

1

0 1

0

23 )00(

xY

xx

0 1

0 1

x0

x1

0

1

0 1

0

23 )10(

xY

xx

0 1

1 0

x0

x1

0

1

0 1

01

23 )11(

xxY

xx

- -

1 0

x0

x1

0

1

0 1

0

23 )01(

xY

xx

Y

0x0x0x

01 xx


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


- -

1 0

x0

x1

0

1

0 1

3 2

1 0

(00)x x

Y x x

0 1

0 1

x0

x1

0

1

0 1

0

23 )10(

xY

xx

0 1

1 0

x0

x1

0

1

0 1

01

23 )11(

xxY

xx

- -

1 0

x0

x1

0

1

0 1

3 2

1 0

(10)x x

Y x x

Y0x

01 xx

01 xx

01 xx


Or hellip




(Ex 86)

Slide 3

Slide 4

Slide 5

BV 61

Slide 7

Slide 8

Ex 87

(87a)

Slide 11

Slide 12

Slide 13

87b

Slide 15

87c

Slide 17

Slide 18

Slide 19

Slide 20

Slide 21

87d

Slide 23

Slide 24

Slide 25

Slide 26

BV 65

Slide 28

Slide 29

Slide 30

Slide 31

(Ex 89)

(89)

Slide 34

Slide 35

(Ex 88)

(88)

Slide 38

Slide 39

Slide 40

(BV ex 631)

Slide 42

Slide 43

Slide 44

Slide 45


Barrel shifter

BV ex 632

Slide 49

Slide 50

Slide 51

Slide 52

Slide 53

Slide 54

= Lowcost FPGA

BV 616

Slide 57

Slide 58

Slide 59

Slide 60

Slide 61

VHDL BV 251a

Slide 63

Slide 64

VHDL BV 621

Slide 66


Slide 68

Slide 69

Slide 70

Slide 71

Slide 72

Slide 73


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

And so on

Truth table

W0W1W2W3

0123


= Lowcost FPGA




BV 616



323132 wwwwwwf





1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf



1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf



1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf




)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf




VHDL BV 251a

)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf






VHDL BV 251a

)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf



VHDL BV 621







Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1

Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


023 xxx

301 xxx

01xx

02 xx

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1

x0

x1

0

1

0 1

3 2 (00)x x

x0

x1

0

1

0 1

3 2 (01)x x

x0

x1

0

1

0 1

3 2 (11)x x

x0

x1

0

1

0 1

3 2 (10)x x

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1 - -

1 0

x0

x1

0

1

0 1

3 2 (00)x x

0 1

0 1

x0

x1

0

1

0 1

3 2 (01)x x

0 1

1 0

x0

x1

0

1

0 1

3 2 (11)x x

- -

1 0

x0

x1

0

1

0 1

3 2 (10)x x

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


- -

1 0

x0

x1

0

1

0 1

0

23 )00(

xY

xx

0 1

0 1

x0

x1

0

1

0 1

0

23 )10(

xY

xx

0 1

1 0

x0

x1

0

1

0 1

01

23 )11(

xxY

xx

- -

1 0

x0

x1

0

1

0 1

0

23 )01(

xY

xx

Y

0x0x0x

01 xx


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


- -

1 0

x0

x1

0

1

0 1

3 2

1 0

(00)x x

Y x x

0 1

0 1

x0

x1

0

1

0 1

0

23 )10(

xY

xx

0 1

1 0

x0

x1

0

1

0 1

01

23 )11(

xxY

xx

- -

1 0

x0

x1

0

1

0 1

3 2

1 0

(10)x x

Y x x

Y0x

01 xx

01 xx

01 xx


Or hellip




(Ex 86)

Slide 3

Slide 4

Slide 5

BV 61

Slide 7

Slide 8

Ex 87

(87a)

Slide 11

Slide 12

Slide 13

87b

Slide 15

87c

Slide 17

Slide 18

Slide 19

Slide 20

Slide 21

87d

Slide 23

Slide 24

Slide 25

Slide 26

BV 65

Slide 28

Slide 29

Slide 30

Slide 31

(Ex 89)

(89)

Slide 34

Slide 35

(Ex 88)

(88)

Slide 38

Slide 39

Slide 40

(BV ex 631)

Slide 42

Slide 43

Slide 44

Slide 45


Barrel shifter

BV ex 632

Slide 49

Slide 50

Slide 51

Slide 52

Slide 53

Slide 54

= Lowcost FPGA

BV 616

Slide 57

Slide 58

Slide 59

Slide 60

Slide 61

VHDL BV 251a

Slide 63

Slide 64

VHDL BV 621

Slide 66


Slide 68

Slide 69

Slide 70

Slide 71

Slide 72

Slide 73


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

And so on

Truth table

W0W1W2W3

0123


= Lowcost FPGA




BV 616



323132 wwwwwwf





1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf



1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf



1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf




)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf




VHDL BV 251a

)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf






VHDL BV 251a

)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf



VHDL BV 621







Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1

Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


023 xxx

301 xxx

01xx

02 xx

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1

x0

x1

0

1

0 1

3 2 (00)x x

x0

x1

0

1

0 1

3 2 (01)x x

x0

x1

0

1

0 1

3 2 (11)x x

x0

x1

0

1

0 1

3 2 (10)x x

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1 - -

1 0

x0

x1

0

1

0 1

3 2 (00)x x

0 1

0 1

x0

x1

0

1

0 1

3 2 (01)x x

0 1

1 0

x0

x1

0

1

0 1

3 2 (11)x x

- -

1 0

x0

x1

0

1

0 1

3 2 (10)x x

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


- -

1 0

x0

x1

0

1

0 1

0

23 )00(

xY

xx

0 1

0 1

x0

x1

0

1

0 1

0

23 )10(

xY

xx

0 1

1 0

x0

x1

0

1

0 1

01

23 )11(

xxY

xx

- -

1 0

x0

x1

0

1

0 1

0

23 )01(

xY

xx

Y

0x0x0x

01 xx


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


- -

1 0

x0

x1

0

1

0 1

3 2

1 0

(00)x x

Y x x

0 1

0 1

x0

x1

0

1

0 1

0

23 )10(

xY

xx

0 1

1 0

x0

x1

0

1

0 1

01

23 )11(

xxY

xx

- -

1 0

x0

x1

0

1

0 1

3 2

1 0

(10)x x

Y x x

Y0x

01 xx

01 xx

01 xx


Or hellip




(Ex 86)

Slide 3

Slide 4

Slide 5

BV 61

Slide 7

Slide 8

Ex 87

(87a)

Slide 11

Slide 12

Slide 13

87b

Slide 15

87c

Slide 17

Slide 18

Slide 19

Slide 20

Slide 21

87d

Slide 23

Slide 24

Slide 25

Slide 26

BV 65

Slide 28

Slide 29

Slide 30

Slide 31

(Ex 89)

(89)

Slide 34

Slide 35

(Ex 88)

(88)

Slide 38

Slide 39

Slide 40

(BV ex 631)

Slide 42

Slide 43

Slide 44

Slide 45


Barrel shifter

BV ex 632

Slide 49

Slide 50

Slide 51

Slide 52

Slide 53

Slide 54

= Lowcost FPGA

BV 616

Slide 57

Slide 58

Slide 59

Slide 60

Slide 61

VHDL BV 251a

Slide 63

Slide 64

VHDL BV 621

Slide 66


Slide 68

Slide 69

Slide 70

Slide 71

Slide 72

Slide 73


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

And so on

Truth table

W0W1W2W3

0123


= Lowcost FPGA




BV 616



323132 wwwwwwf





1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf



1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf



1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf




)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf




VHDL BV 251a

)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf






VHDL BV 251a

)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf



VHDL BV 621







Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1

Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


023 xxx

301 xxx

01xx

02 xx

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1

x0

x1

0

1

0 1

3 2 (00)x x

x0

x1

0

1

0 1

3 2 (01)x x

x0

x1

0

1

0 1

3 2 (11)x x

x0

x1

0

1

0 1

3 2 (10)x x

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1 - -

1 0

x0

x1

0

1

0 1

3 2 (00)x x

0 1

0 1

x0

x1

0

1

0 1

3 2 (01)x x

0 1

1 0

x0

x1

0

1

0 1

3 2 (11)x x

- -

1 0

x0

x1

0

1

0 1

3 2 (10)x x

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


- -

1 0

x0

x1

0

1

0 1

0

23 )00(

xY

xx

0 1

0 1

x0

x1

0

1

0 1

0

23 )10(

xY

xx

0 1

1 0

x0

x1

0

1

0 1

01

23 )11(

xxY

xx

- -

1 0

x0

x1

0

1

0 1

0

23 )01(

xY

xx

Y

0x0x0x

01 xx


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


- -

1 0

x0

x1

0

1

0 1

3 2

1 0

(00)x x

Y x x

0 1

0 1

x0

x1

0

1

0 1

0

23 )10(

xY

xx

0 1

1 0

x0

x1

0

1

0 1

01

23 )11(

xxY

xx

- -

1 0

x0

x1

0

1

0 1

3 2

1 0

(10)x x

Y x x

Y0x

01 xx

01 xx

01 xx


Or hellip




(Ex 86)

Slide 3

Slide 4

Slide 5

BV 61

Slide 7

Slide 8

Ex 87

(87a)

Slide 11

Slide 12

Slide 13

87b

Slide 15

87c

Slide 17

Slide 18

Slide 19

Slide 20

Slide 21

87d

Slide 23

Slide 24

Slide 25

Slide 26

BV 65

Slide 28

Slide 29

Slide 30

Slide 31

(Ex 89)

(89)

Slide 34

Slide 35

(Ex 88)

(88)

Slide 38

Slide 39

Slide 40

(BV ex 631)

Slide 42

Slide 43

Slide 44

Slide 45


Barrel shifter

BV ex 632

Slide 49

Slide 50

Slide 51

Slide 52

Slide 53

Slide 54

= Lowcost FPGA

BV 616

Slide 57

Slide 58

Slide 59

Slide 60

Slide 61

VHDL BV 251a

Slide 63

Slide 64

VHDL BV 621

Slide 66


Slide 68

Slide 69

Slide 70

Slide 71

Slide 72

Slide 73


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

And so on

Truth table

W0W1W2W3

0123


= Lowcost FPGA




BV 616



323132 wwwwwwf





1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf



1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf



1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf




)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf




VHDL BV 251a

)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf






VHDL BV 251a

)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf



VHDL BV 621







Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1

Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


023 xxx

301 xxx

01xx

02 xx

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1

x0

x1

0

1

0 1

3 2 (00)x x

x0

x1

0

1

0 1

3 2 (01)x x

x0

x1

0

1

0 1

3 2 (11)x x

x0

x1

0

1

0 1

3 2 (10)x x

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1 - -

1 0

x0

x1

0

1

0 1

3 2 (00)x x

0 1

0 1

x0

x1

0

1

0 1

3 2 (01)x x

0 1

1 0

x0

x1

0

1

0 1

3 2 (11)x x

- -

1 0

x0

x1

0

1

0 1

3 2 (10)x x

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


- -

1 0

x0

x1

0

1

0 1

0

23 )00(

xY

xx

0 1

0 1

x0

x1

0

1

0 1

0

23 )10(

xY

xx

0 1

1 0

x0

x1

0

1

0 1

01

23 )11(

xxY

xx

- -

1 0

x0

x1

0

1

0 1

0

23 )01(

xY

xx

Y

0x0x0x

01 xx


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


- -

1 0

x0

x1

0

1

0 1

3 2

1 0

(00)x x

Y x x

0 1

0 1

x0

x1

0

1

0 1

0

23 )10(

xY

xx

0 1

1 0

x0

x1

0

1

0 1

01

23 )11(

xxY

xx

- -

1 0

x0

x1

0

1

0 1

3 2

1 0

(10)x x

Y x x

Y0x

01 xx

01 xx

01 xx


Or hellip




(Ex 86)

Slide 3

Slide 4

Slide 5

BV 61

Slide 7

Slide 8

Ex 87

(87a)

Slide 11

Slide 12

Slide 13

87b

Slide 15

87c

Slide 17

Slide 18

Slide 19

Slide 20

Slide 21

87d

Slide 23

Slide 24

Slide 25

Slide 26

BV 65

Slide 28

Slide 29

Slide 30

Slide 31

(Ex 89)

(89)

Slide 34

Slide 35

(Ex 88)

(88)

Slide 38

Slide 39

Slide 40

(BV ex 631)

Slide 42

Slide 43

Slide 44

Slide 45


Barrel shifter

BV ex 632

Slide 49

Slide 50

Slide 51

Slide 52

Slide 53

Slide 54

= Lowcost FPGA

BV 616

Slide 57

Slide 58

Slide 59

Slide 60

Slide 61

VHDL BV 251a

Slide 63

Slide 64

VHDL BV 621

Slide 66


Slide 68

Slide 69

Slide 70

Slide 71

Slide 72

Slide 73


BV ex 632

Truth table

W0W1W2W3

0123


BV ex 632

And so on

Truth table

W0W1W2W3

0123


= Lowcost FPGA




BV 616



323132 wwwwwwf





1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf



1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf



1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf




)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf




VHDL BV 251a

)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf






VHDL BV 251a

)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf



VHDL BV 621







Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1

Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


023 xxx

301 xxx

01xx

02 xx

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1

x0

x1

0

1

0 1

3 2 (00)x x

x0

x1

0

1

0 1

3 2 (01)x x

x0

x1

0

1

0 1

3 2 (11)x x

x0

x1

0

1

0 1

3 2 (10)x x

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1 - -

1 0

x0

x1

0

1

0 1

3 2 (00)x x

0 1

0 1

x0

x1

0

1

0 1

3 2 (01)x x

0 1

1 0

x0

x1

0

1

0 1

3 2 (11)x x

- -

1 0

x0

x1

0

1

0 1

3 2 (10)x x

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


- -

1 0

x0

x1

0

1

0 1

0

23 )00(

xY

xx

0 1

0 1

x0

x1

0

1

0 1

0

23 )10(

xY

xx

0 1

1 0

x0

x1

0

1

0 1

01

23 )11(

xxY

xx

- -

1 0

x0

x1

0

1

0 1

0

23 )01(

xY

xx

Y

0x0x0x

01 xx


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


- -

1 0

x0

x1

0

1

0 1

3 2

1 0

(00)x x

Y x x

0 1

0 1

x0

x1

0

1

0 1

0

23 )10(

xY

xx

0 1

1 0

x0

x1

0

1

0 1

01

23 )11(

xxY

xx

- -

1 0

x0

x1

0

1

0 1

3 2

1 0

(10)x x

Y x x

Y0x

01 xx

01 xx

01 xx


Or hellip




(Ex 86)

Slide 3

Slide 4

Slide 5

BV 61

Slide 7

Slide 8

Ex 87

(87a)

Slide 11

Slide 12

Slide 13

87b

Slide 15

87c

Slide 17

Slide 18

Slide 19

Slide 20

Slide 21

87d

Slide 23

Slide 24

Slide 25

Slide 26

BV 65

Slide 28

Slide 29

Slide 30

Slide 31

(Ex 89)

(89)

Slide 34

Slide 35

(Ex 88)

(88)

Slide 38

Slide 39

Slide 40

(BV ex 631)

Slide 42

Slide 43

Slide 44

Slide 45


Barrel shifter

BV ex 632

Slide 49

Slide 50

Slide 51

Slide 52

Slide 53

Slide 54

= Lowcost FPGA

BV 616

Slide 57

Slide 58

Slide 59

Slide 60

Slide 61

VHDL BV 251a

Slide 63

Slide 64

VHDL BV 621

Slide 66


Slide 68

Slide 69

Slide 70

Slide 71

Slide 72

Slide 73


BV ex 632

And so on

Truth table

W0W1W2W3

0123


= Lowcost FPGA




BV 616



323132 wwwwwwf





1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf



1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf



1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf




)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf




VHDL BV 251a

)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf






VHDL BV 251a

)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf



VHDL BV 621







Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1

Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


023 xxx

301 xxx

01xx

02 xx

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1

x0

x1

0

1

0 1

3 2 (00)x x

x0

x1

0

1

0 1

3 2 (01)x x

x0

x1

0

1

0 1

3 2 (11)x x

x0

x1

0

1

0 1

3 2 (10)x x

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1 - -

1 0

x0

x1

0

1

0 1

3 2 (00)x x

0 1

0 1

x0

x1

0

1

0 1

3 2 (01)x x

0 1

1 0

x0

x1

0

1

0 1

3 2 (11)x x

- -

1 0

x0

x1

0

1

0 1

3 2 (10)x x

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


- -

1 0

x0

x1

0

1

0 1

0

23 )00(

xY

xx

0 1

0 1

x0

x1

0

1

0 1

0

23 )10(

xY

xx

0 1

1 0

x0

x1

0

1

0 1

01

23 )11(

xxY

xx

- -

1 0

x0

x1

0

1

0 1

0

23 )01(

xY

xx

Y

0x0x0x

01 xx


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


- -

1 0

x0

x1

0

1

0 1

3 2

1 0

(00)x x

Y x x

0 1

0 1

x0

x1

0

1

0 1

0

23 )10(

xY

xx

0 1

1 0

x0

x1

0

1

0 1

01

23 )11(

xxY

xx

- -

1 0

x0

x1

0

1

0 1

3 2

1 0

(10)x x

Y x x

Y0x

01 xx

01 xx

01 xx


Or hellip




(Ex 86)

Slide 3

Slide 4

Slide 5

BV 61

Slide 7

Slide 8

Ex 87

(87a)

Slide 11

Slide 12

Slide 13

87b

Slide 15

87c

Slide 17

Slide 18

Slide 19

Slide 20

Slide 21

87d

Slide 23

Slide 24

Slide 25

Slide 26

BV 65

Slide 28

Slide 29

Slide 30

Slide 31

(Ex 89)

(89)

Slide 34

Slide 35

(Ex 88)

(88)

Slide 38

Slide 39

Slide 40

(BV ex 631)

Slide 42

Slide 43

Slide 44

Slide 45


Barrel shifter

BV ex 632

Slide 49

Slide 50

Slide 51

Slide 52

Slide 53

Slide 54

= Lowcost FPGA

BV 616

Slide 57

Slide 58

Slide 59

Slide 60

Slide 61

VHDL BV 251a

Slide 63

Slide 64

VHDL BV 621

Slide 66


Slide 68

Slide 69

Slide 70

Slide 71

Slide 72

Slide 73


= Lowcost FPGA




BV 616



323132 wwwwwwf





1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf



1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf



1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf




)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf




VHDL BV 251a

)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf






VHDL BV 251a

)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf



VHDL BV 621







Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1

Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


023 xxx

301 xxx

01xx

02 xx

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1

x0

x1

0

1

0 1

3 2 (00)x x

x0

x1

0

1

0 1

3 2 (01)x x

x0

x1

0

1

0 1

3 2 (11)x x

x0

x1

0

1

0 1

3 2 (10)x x

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1 - -

1 0

x0

x1

0

1

0 1

3 2 (00)x x

0 1

0 1

x0

x1

0

1

0 1

3 2 (01)x x

0 1

1 0

x0

x1

0

1

0 1

3 2 (11)x x

- -

1 0

x0

x1

0

1

0 1

3 2 (10)x x

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


- -

1 0

x0

x1

0

1

0 1

0

23 )00(

xY

xx

0 1

0 1

x0

x1

0

1

0 1

0

23 )10(

xY

xx

0 1

1 0

x0

x1

0

1

0 1

01

23 )11(

xxY

xx

- -

1 0

x0

x1

0

1

0 1

0

23 )01(

xY

xx

Y

0x0x0x

01 xx


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


- -

1 0

x0

x1

0

1

0 1

3 2

1 0

(00)x x

Y x x

0 1

0 1

x0

x1

0

1

0 1

0

23 )10(

xY

xx

0 1

1 0

x0

x1

0

1

0 1

01

23 )11(

xxY

xx

- -

1 0

x0

x1

0

1

0 1

3 2

1 0

(10)x x

Y x x

Y0x

01 xx

01 xx

01 xx


Or hellip




(Ex 86)

Slide 3

Slide 4

Slide 5

BV 61

Slide 7

Slide 8

Ex 87

(87a)

Slide 11

Slide 12

Slide 13

87b

Slide 15

87c

Slide 17

Slide 18

Slide 19

Slide 20

Slide 21

87d

Slide 23

Slide 24

Slide 25

Slide 26

BV 65

Slide 28

Slide 29

Slide 30

Slide 31

(Ex 89)

(89)

Slide 34

Slide 35

(Ex 88)

(88)

Slide 38

Slide 39

Slide 40

(BV ex 631)

Slide 42

Slide 43

Slide 44

Slide 45


Barrel shifter

BV ex 632

Slide 49

Slide 50

Slide 51

Slide 52

Slide 53

Slide 54

= Lowcost FPGA

BV 616

Slide 57

Slide 58

Slide 59

Slide 60

Slide 61

VHDL BV 251a

Slide 63

Slide 64

VHDL BV 621

Slide 66


Slide 68

Slide 69

Slide 70

Slide 71

Slide 72

Slide 73


BV 616



323132 wwwwwwf





1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf



1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf



1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf




)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf




VHDL BV 251a

)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf






VHDL BV 251a

)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf



VHDL BV 621







Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1

Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


023 xxx

301 xxx

01xx

02 xx

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1

x0

x1

0

1

0 1

3 2 (00)x x

x0

x1

0

1

0 1

3 2 (01)x x

x0

x1

0

1

0 1

3 2 (11)x x

x0

x1

0

1

0 1

3 2 (10)x x

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1 - -

1 0

x0

x1

0

1

0 1

3 2 (00)x x

0 1

0 1

x0

x1

0

1

0 1

3 2 (01)x x

0 1

1 0

x0

x1

0

1

0 1

3 2 (11)x x

- -

1 0

x0

x1

0

1

0 1

3 2 (10)x x

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


- -

1 0

x0

x1

0

1

0 1

0

23 )00(

xY

xx

0 1

0 1

x0

x1

0

1

0 1

0

23 )10(

xY

xx

0 1

1 0

x0

x1

0

1

0 1

01

23 )11(

xxY

xx

- -

1 0

x0

x1

0

1

0 1

0

23 )01(

xY

xx

Y

0x0x0x

01 xx


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


- -

1 0

x0

x1

0

1

0 1

3 2

1 0

(00)x x

Y x x

0 1

0 1

x0

x1

0

1

0 1

0

23 )10(

xY

xx

0 1

1 0

x0

x1

0

1

0 1

01

23 )11(

xxY

xx

- -

1 0

x0

x1

0

1

0 1

3 2

1 0

(10)x x

Y x x

Y0x

01 xx

01 xx

01 xx


Or hellip




(Ex 86)

Slide 3

Slide 4

Slide 5

BV 61

Slide 7

Slide 8

Ex 87

(87a)

Slide 11

Slide 12

Slide 13

87b

Slide 15

87c

Slide 17

Slide 18

Slide 19

Slide 20

Slide 21

87d

Slide 23

Slide 24

Slide 25

Slide 26

BV 65

Slide 28

Slide 29

Slide 30

Slide 31

(Ex 89)

(89)

Slide 34

Slide 35

(Ex 88)

(88)

Slide 38

Slide 39

Slide 40

(BV ex 631)

Slide 42

Slide 43

Slide 44

Slide 45


Barrel shifter

BV ex 632

Slide 49

Slide 50

Slide 51

Slide 52

Slide 53

Slide 54

= Lowcost FPGA

BV 616

Slide 57

Slide 58

Slide 59

Slide 60

Slide 61

VHDL BV 251a

Slide 63

Slide 64

VHDL BV 621

Slide 66


Slide 68

Slide 69

Slide 70

Slide 71

Slide 72

Slide 73





1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf



1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf



1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf




)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf




VHDL BV 251a

)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf






VHDL BV 251a

)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf



VHDL BV 621







Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1

Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


023 xxx

301 xxx

01xx

02 xx

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1

x0

x1

0

1

0 1

3 2 (00)x x

x0

x1

0

1

0 1

3 2 (01)x x

x0

x1

0

1

0 1

3 2 (11)x x

x0

x1

0

1

0 1

3 2 (10)x x

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1 - -

1 0

x0

x1

0

1

0 1

3 2 (00)x x

0 1

0 1

x0

x1

0

1

0 1

3 2 (01)x x

0 1

1 0

x0

x1

0

1

0 1

3 2 (11)x x

- -

1 0

x0

x1

0

1

0 1

3 2 (10)x x

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


- -

1 0

x0

x1

0

1

0 1

0

23 )00(

xY

xx

0 1

0 1

x0

x1

0

1

0 1

0

23 )10(

xY

xx

0 1

1 0

x0

x1

0

1

0 1

01

23 )11(

xxY

xx

- -

1 0

x0

x1

0

1

0 1

0

23 )01(

xY

xx

Y

0x0x0x

01 xx


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


- -

1 0

x0

x1

0

1

0 1

3 2

1 0

(00)x x

Y x x

0 1

0 1

x0

x1

0

1

0 1

0

23 )10(

xY

xx

0 1

1 0

x0

x1

0

1

0 1

01

23 )11(

xxY

xx

- -

1 0

x0

x1

0

1

0 1

3 2

1 0

(10)x x

Y x x

Y0x

01 xx

01 xx

01 xx


Or hellip




(Ex 86)

Slide 3

Slide 4

Slide 5

BV 61

Slide 7

Slide 8

Ex 87

(87a)

Slide 11

Slide 12

Slide 13

87b

Slide 15

87c

Slide 17

Slide 18

Slide 19

Slide 20

Slide 21

87d

Slide 23

Slide 24

Slide 25

Slide 26

BV 65

Slide 28

Slide 29

Slide 30

Slide 31

(Ex 89)

(89)

Slide 34

Slide 35

(Ex 88)

(88)

Slide 38

Slide 39

Slide 40

(BV ex 631)

Slide 42

Slide 43

Slide 44

Slide 45


Barrel shifter

BV ex 632

Slide 49

Slide 50

Slide 51

Slide 52

Slide 53

Slide 54

= Lowcost FPGA

BV 616

Slide 57

Slide 58

Slide 59

Slide 60

Slide 61

VHDL BV 251a

Slide 63

Slide 64

VHDL BV 621

Slide 66


Slide 68

Slide 69

Slide 70

Slide 71

Slide 72

Slide 73



1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf



1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf




)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf




VHDL BV 251a

)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf






VHDL BV 251a

)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf



VHDL BV 621







Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1

Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


023 xxx

301 xxx

01xx

02 xx

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1

x0

x1

0

1

0 1

3 2 (00)x x

x0

x1

0

1

0 1

3 2 (01)x x

x0

x1

0

1

0 1

3 2 (11)x x

x0

x1

0

1

0 1

3 2 (10)x x

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1 - -

1 0

x0

x1

0

1

0 1

3 2 (00)x x

0 1

0 1

x0

x1

0

1

0 1

3 2 (01)x x

0 1

1 0

x0

x1

0

1

0 1

3 2 (11)x x

- -

1 0

x0

x1

0

1

0 1

3 2 (10)x x

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


- -

1 0

x0

x1

0

1

0 1

0

23 )00(

xY

xx

0 1

0 1

x0

x1

0

1

0 1

0

23 )10(

xY

xx

0 1

1 0

x0

x1

0

1

0 1

01

23 )11(

xxY

xx

- -

1 0

x0

x1

0

1

0 1

0

23 )01(

xY

xx

Y

0x0x0x

01 xx


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


- -

1 0

x0

x1

0

1

0 1

3 2

1 0

(00)x x

Y x x

0 1

0 1

x0

x1

0

1

0 1

0

23 )10(

xY

xx

0 1

1 0

x0

x1

0

1

0 1

01

23 )11(

xxY

xx

- -

1 0

x0

x1

0

1

0 1

3 2

1 0

(10)x x

Y x x

Y0x

01 xx

01 xx

01 xx


Or hellip




(Ex 86)

Slide 3

Slide 4

Slide 5

BV 61

Slide 7

Slide 8

Ex 87

(87a)

Slide 11

Slide 12

Slide 13

87b

Slide 15

87c

Slide 17

Slide 18

Slide 19

Slide 20

Slide 21

87d

Slide 23

Slide 24

Slide 25

Slide 26

BV 65

Slide 28

Slide 29

Slide 30

Slide 31

(Ex 89)

(89)

Slide 34

Slide 35

(Ex 88)

(88)

Slide 38

Slide 39

Slide 40

(BV ex 631)

Slide 42

Slide 43

Slide 44

Slide 45


Barrel shifter

BV ex 632

Slide 49

Slide 50

Slide 51

Slide 52

Slide 53

Slide 54

= Lowcost FPGA

BV 616

Slide 57

Slide 58

Slide 59

Slide 60

Slide 61

VHDL BV 251a

Slide 63

Slide 64

VHDL BV 621

Slide 66


Slide 68

Slide 69

Slide 70

Slide 71

Slide 72

Slide 73



1223223

122312123

21212322213213

22323

21323

1)10(

1)1(

)()(

)10()(

)()(

wwwwwwwf

wwwwwwwww

wwwwwwwwwwwwww

wwwww

wwwwwf




)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf




VHDL BV 251a

)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf






VHDL BV 251a

)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf



VHDL BV 621







Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1

Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


023 xxx

301 xxx

01xx

02 xx

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1

x0

x1

0

1

0 1

3 2 (00)x x

x0

x1

0

1

0 1

3 2 (01)x x

x0

x1

0

1

0 1

3 2 (11)x x

x0

x1

0

1

0 1

3 2 (10)x x

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1 - -

1 0

x0

x1

0

1

0 1

3 2 (00)x x

0 1

0 1

x0

x1

0

1

0 1

3 2 (01)x x

0 1

1 0

x0

x1

0

1

0 1

3 2 (11)x x

- -

1 0

x0

x1

0

1

0 1

3 2 (10)x x

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


- -

1 0

x0

x1

0

1

0 1

0

23 )00(

xY

xx

0 1

0 1

x0

x1

0

1

0 1

0

23 )10(

xY

xx

0 1

1 0

x0

x1

0

1

0 1

01

23 )11(

xxY

xx

- -

1 0

x0

x1

0

1

0 1

0

23 )01(

xY

xx

Y

0x0x0x

01 xx


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


- -

1 0

x0

x1

0

1

0 1

3 2

1 0

(00)x x

Y x x

0 1

0 1

x0

x1

0

1

0 1

0

23 )10(

xY

xx

0 1

1 0

x0

x1

0

1

0 1

01

23 )11(

xxY

xx

- -

1 0

x0

x1

0

1

0 1

3 2

1 0

(10)x x

Y x x

Y0x

01 xx

01 xx

01 xx


Or hellip




(Ex 86)

Slide 3

Slide 4

Slide 5

BV 61

Slide 7

Slide 8

Ex 87

(87a)

Slide 11

Slide 12

Slide 13

87b

Slide 15

87c

Slide 17

Slide 18

Slide 19

Slide 20

Slide 21

87d

Slide 23

Slide 24

Slide 25

Slide 26

BV 65

Slide 28

Slide 29

Slide 30

Slide 31

(Ex 89)

(89)

Slide 34

Slide 35

(Ex 88)

(88)

Slide 38

Slide 39

Slide 40

(BV ex 631)

Slide 42

Slide 43

Slide 44

Slide 45


Barrel shifter

BV ex 632

Slide 49

Slide 50

Slide 51

Slide 52

Slide 53

Slide 54

= Lowcost FPGA

BV 616

Slide 57

Slide 58

Slide 59

Slide 60

Slide 61

VHDL BV 251a

Slide 63

Slide 64

VHDL BV 621

Slide 66


Slide 68

Slide 69

Slide 70

Slide 71

Slide 72

Slide 73




)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf




VHDL BV 251a

)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf






VHDL BV 251a

)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf



VHDL BV 621







Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1

Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


023 xxx

301 xxx

01xx

02 xx

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1

x0

x1

0

1

0 1

3 2 (00)x x

x0

x1

0

1

0 1

3 2 (01)x x

x0

x1

0

1

0 1

3 2 (11)x x

x0

x1

0

1

0 1

3 2 (10)x x

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1 - -

1 0

x0

x1

0

1

0 1

3 2 (00)x x

0 1

0 1

x0

x1

0

1

0 1

3 2 (01)x x

0 1

1 0

x0

x1

0

1

0 1

3 2 (11)x x

- -

1 0

x0

x1

0

1

0 1

3 2 (10)x x

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


- -

1 0

x0

x1

0

1

0 1

0

23 )00(

xY

xx

0 1

0 1

x0

x1

0

1

0 1

0

23 )10(

xY

xx

0 1

1 0

x0

x1

0

1

0 1

01

23 )11(

xxY

xx

- -

1 0

x0

x1

0

1

0 1

0

23 )01(

xY

xx

Y

0x0x0x

01 xx


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


- -

1 0

x0

x1

0

1

0 1

3 2

1 0

(00)x x

Y x x

0 1

0 1

x0

x1

0

1

0 1

0

23 )10(

xY

xx

0 1

1 0

x0

x1

0

1

0 1

01

23 )11(

xxY

xx

- -

1 0

x0

x1

0

1

0 1

3 2

1 0

(10)x x

Y x x

Y0x

01 xx

01 xx

01 xx


Or hellip




(Ex 86)

Slide 3

Slide 4

Slide 5

BV 61

Slide 7

Slide 8

Ex 87

(87a)

Slide 11

Slide 12

Slide 13

87b

Slide 15

87c

Slide 17

Slide 18

Slide 19

Slide 20

Slide 21

87d

Slide 23

Slide 24

Slide 25

Slide 26

BV 65

Slide 28

Slide 29

Slide 30

Slide 31

(Ex 89)

(89)

Slide 34

Slide 35

(Ex 88)

(88)

Slide 38

Slide 39

Slide 40

(BV ex 631)

Slide 42

Slide 43

Slide 44

Slide 45


Barrel shifter

BV ex 632

Slide 49

Slide 50

Slide 51

Slide 52

Slide 53

Slide 54

= Lowcost FPGA

BV 616

Slide 57

Slide 58

Slide 59

Slide 60

Slide 61

VHDL BV 251a

Slide 63

Slide 64

VHDL BV 621

Slide 66


Slide 68

Slide 69

Slide 70

Slide 71

Slide 72

Slide 73


VHDL BV 251a

)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf






VHDL BV 251a

)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf



VHDL BV 621







Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1

Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


023 xxx

301 xxx

01xx

02 xx

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1

x0

x1

0

1

0 1

3 2 (00)x x

x0

x1

0

1

0 1

3 2 (01)x x

x0

x1

0

1

0 1

3 2 (11)x x

x0

x1

0

1

0 1

3 2 (10)x x

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1 - -

1 0

x0

x1

0

1

0 1

3 2 (00)x x

0 1

0 1

x0

x1

0

1

0 1

3 2 (01)x x

0 1

1 0

x0

x1

0

1

0 1

3 2 (11)x x

- -

1 0

x0

x1

0

1

0 1

3 2 (10)x x

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


- -

1 0

x0

x1

0

1

0 1

0

23 )00(

xY

xx

0 1

0 1

x0

x1

0

1

0 1

0

23 )10(

xY

xx

0 1

1 0

x0

x1

0

1

0 1

01

23 )11(

xxY

xx

- -

1 0

x0

x1

0

1

0 1

0

23 )01(

xY

xx

Y

0x0x0x

01 xx


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


- -

1 0

x0

x1

0

1

0 1

3 2

1 0

(00)x x

Y x x

0 1

0 1

x0

x1

0

1

0 1

0

23 )10(

xY

xx

0 1

1 0

x0

x1

0

1

0 1

01

23 )11(

xxY

xx

- -

1 0

x0

x1

0

1

0 1

3 2

1 0

(10)x x

Y x x

Y0x

01 xx

01 xx

01 xx


Or hellip




(Ex 86)

Slide 3

Slide 4

Slide 5

BV 61

Slide 7

Slide 8

Ex 87

(87a)

Slide 11

Slide 12

Slide 13

87b

Slide 15

87c

Slide 17

Slide 18

Slide 19

Slide 20

Slide 21

87d

Slide 23

Slide 24

Slide 25

Slide 26

BV 65

Slide 28

Slide 29

Slide 30

Slide 31

(Ex 89)

(89)

Slide 34

Slide 35

(Ex 88)

(88)

Slide 38

Slide 39

Slide 40

(BV ex 631)

Slide 42

Slide 43

Slide 44

Slide 45


Barrel shifter

BV ex 632

Slide 49

Slide 50

Slide 51

Slide 52

Slide 53

Slide 54

= Lowcost FPGA

BV 616

Slide 57

Slide 58

Slide 59

Slide 60

Slide 61

VHDL BV 251a

Slide 63

Slide 64

VHDL BV 621

Slide 66


Slide 68

Slide 69

Slide 70

Slide 71

Slide 72

Slide 73


VHDL BV 251a

)()()( 432421312

41214332311

xxxxxxxxf

xxxxxxxxxxf



VHDL BV 621







Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1

Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


023 xxx

301 xxx

01xx

02 xx

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1

x0

x1

0

1

0 1

3 2 (00)x x

x0

x1

0

1

0 1

3 2 (01)x x

x0

x1

0

1

0 1

3 2 (11)x x

x0

x1

0

1

0 1

3 2 (10)x x

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1 - -

1 0

x0

x1

0

1

0 1

3 2 (00)x x

0 1

0 1

x0

x1

0

1

0 1

3 2 (01)x x

0 1

1 0

x0

x1

0

1

0 1

3 2 (11)x x

- -

1 0

x0

x1

0

1

0 1

3 2 (10)x x

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


- -

1 0

x0

x1

0

1

0 1

0

23 )00(

xY

xx

0 1

0 1

x0

x1

0

1

0 1

0

23 )10(

xY

xx

0 1

1 0

x0

x1

0

1

0 1

01

23 )11(

xxY

xx

- -

1 0

x0

x1

0

1

0 1

0

23 )01(

xY

xx

Y

0x0x0x

01 xx


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


- -

1 0

x0

x1

0

1

0 1

3 2

1 0

(00)x x

Y x x

0 1

0 1

x0

x1

0

1

0 1

0

23 )10(

xY

xx

0 1

1 0

x0

x1

0

1

0 1

01

23 )11(

xxY

xx

- -

1 0

x0

x1

0

1

0 1

3 2

1 0

(10)x x

Y x x

Y0x

01 xx

01 xx

01 xx


Or hellip




(Ex 86)

Slide 3

Slide 4

Slide 5

BV 61

Slide 7

Slide 8

Ex 87

(87a)

Slide 11

Slide 12

Slide 13

87b

Slide 15

87c

Slide 17

Slide 18

Slide 19

Slide 20

Slide 21

87d

Slide 23

Slide 24

Slide 25

Slide 26

BV 65

Slide 28

Slide 29

Slide 30

Slide 31

(Ex 89)

(89)

Slide 34

Slide 35

(Ex 88)

(88)

Slide 38

Slide 39

Slide 40

(BV ex 631)

Slide 42

Slide 43

Slide 44

Slide 45


Barrel shifter

BV ex 632

Slide 49

Slide 50

Slide 51

Slide 52

Slide 53

Slide 54

= Lowcost FPGA

BV 616

Slide 57

Slide 58

Slide 59

Slide 60

Slide 61

VHDL BV 251a

Slide 63

Slide 64

VHDL BV 621

Slide 66


Slide 68

Slide 69

Slide 70

Slide 71

Slide 72

Slide 73

VHDL BV 621







Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1

Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


023 xxx

301 xxx

01xx

02 xx

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1

x0

x1

0

1

0 1

3 2 (00)x x

x0

x1

0

1

0 1

3 2 (01)x x

x0

x1

0

1

0 1

3 2 (11)x x

x0

x1

0

1

0 1

3 2 (10)x x

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1 - -

1 0

x0

x1

0

1

0 1

3 2 (00)x x

0 1

0 1

x0

x1

0

1

0 1

3 2 (01)x x

0 1

1 0

x0

x1

0

1

0 1

3 2 (11)x x

- -

1 0

x0

x1

0

1

0 1

3 2 (10)x x

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


- -

1 0

x0

x1

0

1

0 1

0

23 )00(

xY

xx

0 1

0 1

x0

x1

0

1

0 1

0

23 )10(

xY

xx

0 1

1 0

x0

x1

0

1

0 1

01

23 )11(

xxY

xx

- -

1 0

x0

x1

0

1

0 1

0

23 )01(

xY

xx

Y

0x0x0x

01 xx


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


- -

1 0

x0

x1

0

1

0 1

3 2

1 0

(00)x x

Y x x

0 1

0 1

x0

x1

0

1

0 1

0

23 )10(

xY

xx

0 1

1 0

x0

x1

0

1

0 1

01

23 )11(

xxY

xx

- -

1 0

x0

x1

0

1

0 1

3 2

1 0

(10)x x

Y x x

Y0x

01 xx

01 xx

01 xx


Or hellip




(Ex 86)

Slide 3

Slide 4

Slide 5

BV 61

Slide 7

Slide 8

Ex 87

(87a)

Slide 11

Slide 12

Slide 13

87b

Slide 15

87c

Slide 17

Slide 18

Slide 19

Slide 20

Slide 21

87d

Slide 23

Slide 24

Slide 25

Slide 26

BV 65

Slide 28

Slide 29

Slide 30

Slide 31

(Ex 89)

(89)

Slide 34

Slide 35

(Ex 88)

(88)

Slide 38

Slide 39

Slide 40

(BV ex 631)

Slide 42

Slide 43

Slide 44

Slide 45


Barrel shifter

BV ex 632

Slide 49

Slide 50

Slide 51

Slide 52

Slide 53

Slide 54

= Lowcost FPGA

BV 616

Slide 57

Slide 58

Slide 59

Slide 60

Slide 61

VHDL BV 251a

Slide 63

Slide 64

VHDL BV 621

Slide 66


Slide 68

Slide 69

Slide 70

Slide 71

Slide 72

Slide 73




Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1

Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


023 xxx

301 xxx

01xx

02 xx

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1

x0

x1

0

1

0 1

3 2 (00)x x

x0

x1

0

1

0 1

3 2 (01)x x

x0

x1

0

1

0 1

3 2 (11)x x

x0

x1

0

1

0 1

3 2 (10)x x

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1 - -

1 0

x0

x1

0

1

0 1

3 2 (00)x x

0 1

0 1

x0

x1

0

1

0 1

3 2 (01)x x

0 1

1 0

x0

x1

0

1

0 1

3 2 (11)x x

- -

1 0

x0

x1

0

1

0 1

3 2 (10)x x

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


- -

1 0

x0

x1

0

1

0 1

0

23 )00(

xY

xx

0 1

0 1

x0

x1

0

1

0 1

0

23 )10(

xY

xx

0 1

1 0

x0

x1

0

1

0 1

01

23 )11(

xxY

xx

- -

1 0

x0

x1

0

1

0 1

0

23 )01(

xY

xx

Y

0x0x0x

01 xx


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


- -

1 0

x0

x1

0

1

0 1

3 2

1 0

(00)x x

Y x x

0 1

0 1

x0

x1

0

1

0 1

0

23 )10(

xY

xx

0 1

1 0

x0

x1

0

1

0 1

01

23 )11(

xxY

xx

- -

1 0

x0

x1

0

1

0 1

3 2

1 0

(10)x x

Y x x

Y0x

01 xx

01 xx

01 xx


Or hellip




(Ex 86)

Slide 3

Slide 4

Slide 5

BV 61

Slide 7

Slide 8

Ex 87

(87a)

Slide 11

Slide 12

Slide 13

87b

Slide 15

87c

Slide 17

Slide 18

Slide 19

Slide 20

Slide 21

87d

Slide 23

Slide 24

Slide 25

Slide 26

BV 65

Slide 28

Slide 29

Slide 30

Slide 31

(Ex 89)

(89)

Slide 34

Slide 35

(Ex 88)

(88)

Slide 38

Slide 39

Slide 40

(BV ex 631)

Slide 42

Slide 43

Slide 44

Slide 45


Barrel shifter

BV ex 632

Slide 49

Slide 50

Slide 51

Slide 52

Slide 53

Slide 54

= Lowcost FPGA

BV 616

Slide 57

Slide 58

Slide 59

Slide 60

Slide 61

VHDL BV 251a

Slide 63

Slide 64

VHDL BV 621

Slide 66


Slide 68

Slide 69

Slide 70

Slide 71

Slide 72

Slide 73

Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


023 xxx

301 xxx

01xx

02 xx

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1

x0

x1

0

1

0 1

3 2 (00)x x

x0

x1

0

1

0 1

3 2 (01)x x

x0

x1

0

1

0 1

3 2 (11)x x

x0

x1

0

1

0 1

3 2 (10)x x

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1 - -

1 0

x0

x1

0

1

0 1

3 2 (00)x x

0 1

0 1

x0

x1

0

1

0 1

3 2 (01)x x

0 1

1 0

x0

x1

0

1

0 1

3 2 (11)x x

- -

1 0

x0

x1

0

1

0 1

3 2 (10)x x

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


- -

1 0

x0

x1

0

1

0 1

0

23 )00(

xY

xx

0 1

0 1

x0

x1

0

1

0 1

0

23 )10(

xY

xx

0 1

1 0

x0

x1

0

1

0 1

01

23 )11(

xxY

xx

- -

1 0

x0

x1

0

1

0 1

0

23 )01(

xY

xx

Y

0x0x0x

01 xx


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


- -

1 0

x0

x1

0

1

0 1

3 2

1 0

(00)x x

Y x x

0 1

0 1

x0

x1

0

1

0 1

0

23 )10(

xY

xx

0 1

1 0

x0

x1

0

1

0 1

01

23 )11(

xxY

xx

- -

1 0

x0

x1

0

1

0 1

3 2

1 0

(10)x x

Y x x

Y0x

01 xx

01 xx

01 xx


Or hellip




(Ex 86)

Slide 3

Slide 4

Slide 5

BV 61

Slide 7

Slide 8

Ex 87

(87a)

Slide 11

Slide 12

Slide 13

87b

Slide 15

87c

Slide 17

Slide 18

Slide 19

Slide 20

Slide 21

87d

Slide 23

Slide 24

Slide 25

Slide 26

BV 65

Slide 28

Slide 29

Slide 30

Slide 31

(Ex 89)

(89)

Slide 34

Slide 35

(Ex 88)

(88)

Slide 38

Slide 39

Slide 40

(BV ex 631)

Slide 42

Slide 43

Slide 44

Slide 45


Barrel shifter

BV ex 632

Slide 49

Slide 50

Slide 51

Slide 52

Slide 53

Slide 54

= Lowcost FPGA

BV 616

Slide 57

Slide 58

Slide 59

Slide 60

Slide 61

VHDL BV 251a

Slide 63

Slide 64

VHDL BV 621

Slide 66


Slide 68

Slide 69

Slide 70

Slide 71

Slide 72

Slide 73

Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1

x0

x1

0

1

0 1

3 2 (00)x x

x0

x1

0

1

0 1

3 2 (01)x x

x0

x1

0

1

0 1

3 2 (11)x x

x0

x1

0

1

0 1

3 2 (10)x x

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1 - -

1 0

x0

x1

0

1

0 1

3 2 (00)x x

0 1

0 1

x0

x1

0

1

0 1

3 2 (01)x x

0 1

1 0

x0

x1

0

1

0 1

3 2 (11)x x

- -

1 0

x0

x1

0

1

0 1

3 2 (10)x x

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


- -

1 0

x0

x1

0

1

0 1

0

23 )00(

xY

xx

0 1

0 1

x0

x1

0

1

0 1

0

23 )10(

xY

xx

0 1

1 0

x0

x1

0

1

0 1

01

23 )11(

xxY

xx

- -

1 0

x0

x1

0

1

0 1

0

23 )01(

xY

xx

Y

0x0x0x

01 xx


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


- -

1 0

x0

x1

0

1

0 1

3 2

1 0

(00)x x

Y x x

0 1

0 1

x0

x1

0

1

0 1

0

23 )10(

xY

xx

0 1

1 0

x0

x1

0

1

0 1

01

23 )11(

xxY

xx

- -

1 0

x0

x1

0

1

0 1

3 2

1 0

(10)x x

Y x x

Y0x

01 xx

01 xx

01 xx


Or hellip




(Ex 86)

Slide 3

Slide 4

Slide 5

BV 61

Slide 7

Slide 8

Ex 87

(87a)

Slide 11

Slide 12

Slide 13

87b

Slide 15

87c

Slide 17

Slide 18

Slide 19

Slide 20

Slide 21

87d

Slide 23

Slide 24

Slide 25

Slide 26

BV 65

Slide 28

Slide 29

Slide 30

Slide 31

(Ex 89)

(89)

Slide 34

Slide 35

(Ex 88)

(88)

Slide 38

Slide 39

Slide 40

(BV ex 631)

Slide 42

Slide 43

Slide 44

Slide 45


Barrel shifter

BV ex 632

Slide 49

Slide 50

Slide 51

Slide 52

Slide 53

Slide 54

= Lowcost FPGA

BV 616

Slide 57

Slide 58

Slide 59

Slide 60

Slide 61

VHDL BV 251a

Slide 63

Slide 64

VHDL BV 621

Slide 66


Slide 68

Slide 69

Slide 70

Slide 71

Slide 72

Slide 73

Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1 - -

1 0

x0

x1

0

1

0 1

3 2 (00)x x

0 1

0 1

x0

x1

0

1

0 1

3 2 (01)x x

0 1

1 0

x0

x1

0

1

0 1

3 2 (11)x x

- -

1 0

x0

x1

0

1

0 1

3 2 (10)x x

Y


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


- -

1 0

x0

x1

0

1

0 1

0

23 )00(

xY

xx

0 1

0 1

x0

x1

0

1

0 1

0

23 )10(

xY

xx

0 1

1 0

x0

x1

0

1

0 1

01

23 )11(

xxY

xx

- -

1 0

x0

x1

0

1

0 1

0

23 )01(

xY

xx

Y

0x0x0x

01 xx


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


- -

1 0

x0

x1

0

1

0 1

3 2

1 0

(00)x x

Y x x

0 1

0 1

x0

x1

0

1

0 1

0

23 )10(

xY

xx

0 1

1 0

x0

x1

0

1

0 1

01

23 )11(

xxY

xx

- -

1 0

x0

x1

0

1

0 1

3 2

1 0

(10)x x

Y x x

Y0x

01 xx

01 xx

01 xx


Or hellip




(Ex 86)

Slide 3

Slide 4

Slide 5

BV 61

Slide 7

Slide 8

Ex 87

(87a)

Slide 11

Slide 12

Slide 13

87b

Slide 15

87c

Slide 17

Slide 18

Slide 19

Slide 20

Slide 21

87d

Slide 23

Slide 24

Slide 25

Slide 26

BV 65

Slide 28

Slide 29

Slide 30

Slide 31

(Ex 89)

(89)

Slide 34

Slide 35

(Ex 88)

(88)

Slide 38

Slide 39

Slide 40

(BV ex 631)

Slide 42

Slide 43

Slide 44

Slide 45


Barrel shifter

BV ex 632

Slide 49

Slide 50

Slide 51

Slide 52

Slide 53

Slide 54

= Lowcost FPGA

BV 616

Slide 57

Slide 58

Slide 59

Slide 60

Slide 61

VHDL BV 251a

Slide 63

Slide 64

VHDL BV 621

Slide 66


Slide 68

Slide 69

Slide 70

Slide 71

Slide 72

Slide 73

Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


- -

1 0

x0

x1

0

1

0 1

0

23 )00(

xY

xx

0 1

0 1

x0

x1

0

1

0 1

0

23 )10(

xY

xx

0 1

1 0

x0

x1

0

1

0 1

01

23 )11(

xxY

xx

- -

1 0

x0

x1

0

1

0 1

0

23 )01(

xY

xx

Y

0x0x0x

01 xx


Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


- -

1 0

x0

x1

0

1

0 1

3 2

1 0

(00)x x

Y x x

0 1

0 1

x0

x1

0

1

0 1

0

23 )10(

xY

xx

0 1

1 0

x0

x1

0

1

0 1

01

23 )11(

xxY

xx

- -

1 0

x0

x1

0

1

0 1

3 2

1 0

(10)x x

Y x x

Y0x

01 xx

01 xx

01 xx


Or hellip




(Ex 86)

Slide 3

Slide 4

Slide 5

BV 61

Slide 7

Slide 8

Ex 87

(87a)

Slide 11

Slide 12

Slide 13

87b

Slide 15

87c

Slide 17

Slide 18

Slide 19

Slide 20

Slide 21

87d

Slide 23

Slide 24

Slide 25

Slide 26

BV 65

Slide 28

Slide 29

Slide 30

Slide 31

(Ex 89)

(89)

Slide 34

Slide 35

(Ex 88)

(88)

Slide 38

Slide 39

Slide 40

(BV ex 631)

Slide 42

Slide 43

Slide 44

Slide 45


Barrel shifter

BV ex 632

Slide 49

Slide 50

Slide 51

Slide 52

Slide 53

Slide 54

= Lowcost FPGA

BV 616

Slide 57

Slide 58

Slide 59

Slide 60

Slide 61

VHDL BV 251a

Slide 63

Slide 64

VHDL BV 621

Slide 66


Slide 68

Slide 69

Slide 70

Slide 71

Slide 72

Slide 73

Y

- -

- -

10

0

0

0

0

0 1

1

1

1 1


- -

1 0

x0

x1

0

1

0 1

3 2

1 0

(00)x x

Y x x

0 1

0 1

x0

x1

0

1

0 1

0

23 )10(

xY

xx

0 1

1 0

x0

x1

0

1

0 1

01

23 )11(

xxY

xx

- -

1 0

x0

x1

0

1

0 1

3 2

1 0

(10)x x

Y x x

Y0x

01 xx

01 xx

01 xx


Or hellip




(Ex 86)

Slide 3

Slide 4

Slide 5

BV 61

Slide 7

Slide 8

Ex 87

(87a)

Slide 11

Slide 12

Slide 13

87b

Slide 15

87c

Slide 17

Slide 18

Slide 19

Slide 20

Slide 21

87d

Slide 23

Slide 24

Slide 25

Slide 26

BV 65

Slide 28

Slide 29

Slide 30

Slide 31

(Ex 89)

(89)

Slide 34

Slide 35

(Ex 88)

(88)

Slide 38

Slide 39

Slide 40

(BV ex 631)

Slide 42

Slide 43

Slide 44

Slide 45


Barrel shifter

BV ex 632

Slide 49

Slide 50

Slide 51

Slide 52

Slide 53

Slide 54

= Lowcost FPGA

BV 616

Slide 57

Slide 58

Slide 59

Slide 60

Slide 61

VHDL BV 251a

Slide 63

Slide 64

VHDL BV 621

Slide 66


Slide 68

Slide 69

Slide 70

Slide 71

Slide 72

Slide 73



(Ex 86)

Slide 3

Slide 4

Slide 5

BV 61

Slide 7

Slide 8

Ex 87

(87a)

Slide 11

Slide 12

Slide 13

87b

Slide 15

87c

Slide 17

Slide 18

Slide 19

Slide 20

Slide 21

87d

Slide 23

Slide 24

Slide 25

Slide 26

BV 65

Slide 28

Slide 29

Slide 30

Slide 31

(Ex 89)

(89)

Slide 34

Slide 35

(Ex 88)

(88)

Slide 38

Slide 39

Slide 40

(BV ex 631)

Slide 42

Slide 43

Slide 44

Slide 45


Barrel shifter

BV ex 632

Slide 49

Slide 50

Slide 51

Slide 52

Slide 53

Slide 54

= Lowcost FPGA

BV 616

Slide 57

Slide 58

Slide 59

Slide 60

Slide 61

VHDL BV 251a

Slide 63

Slide 64

VHDL BV 621

Slide 66


Slide 68

Slide 69

Slide 70

Slide 71

Slide 72

Slide 73

shannon decomposition william sandqvist [email protected] claude shannon mathematician / electrical...

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