silicon solutions for the real world 1 aid-emc automotive ic design for low emc review meeting 29...
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1
Silicon Solutions for the Real WorldSilicon Solutions for the Real World
AID-EMC
Automotive IC Design for Low EMC
AID-EMC
Automotive IC Design for Low EMC
Review Meeting 29 augustus 2006
VILVOORDE
KUL-ESAT-MICAS
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Slide 2AID-EMC review meeting 29/08/2006 CONFIDENTIALAID-EMC review meeting 29/08/2006 CONFIDENTIAL
AgendaAgenda
Structure of the IWT projectProgress per workpackage
WP1:WP2:WP3:WP4:
Status DeliverablesResources usedCooperationConclusions
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Slide 3AID-EMC review meeting 29/08/2006 CONFIDENTIALAID-EMC review meeting 29/08/2006 CONFIDENTIAL
Structure of the projectStructure of the project
WP2Analog
specs
Comparisonof results
Comparisonof results
specs
Improveddesign techniques
Improveddesign
techniques
WP3Digital
WP4CAD
WP1Specs &
Measurements
WP2Analog
specs
Comparisonof results
Comparisonof results
specs
Improveddesign techniques
Improveddesign
techniques
WP3Digital
WP4CAD
WP1Specs &
Measurements
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4
Silicon Solutions for the Real WorldSilicon Solutions for the Real World
WP1: Specifications and
measurements
WP1: Specifications and
measurements
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Slide 5AID-EMC review meeting 29/08/2006 CONFIDENTIALAID-EMC review meeting 29/08/2006 CONFIDENTIAL
WP1: Technical problemsWP1: Technical problems
Nearly impossible to achieve
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Slide 6AID-EMC review meeting 29/08/2006 CONFIDENTIALAID-EMC review meeting 29/08/2006 CONFIDENTIAL
T1.1: Correlation between different test set-upsT1.1: Correlation between different test set-ups
Target is to increase current handling
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Slide 7AID-EMC review meeting 29/08/2006 CONFIDENTIALAID-EMC review meeting 29/08/2006 CONFIDENTIAL
T1.2: Influence of PCB and attached cablingT1.2: Influence of PCB and attached cabling
VDMOS is more stable and robust
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Slide 8AID-EMC review meeting 29/08/2006 CONFIDENTIALAID-EMC review meeting 29/08/2006 CONFIDENTIAL
T1.3: Validation of the ICEM modelT1.3: Validation of the ICEM model
Need for additional Selection
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Slide 9AID-EMC review meeting 29/08/2006 CONFIDENTIALAID-EMC review meeting 29/08/2006 CONFIDENTIAL
T1.4: Characterization of the coupling pathsT1.4: Characterization of the coupling paths
Need for additional Selection
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Slide 10AID-EMC review meeting 29/08/2006 CONFIDENTIALAID-EMC review meeting 29/08/2006 CONFIDENTIAL
T1.5: MeasurementsT1.5: Measurements
Need for additional Selection
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Slide 11AID-EMC review meeting 29/08/2006 CONFIDENTIALAID-EMC review meeting 29/08/2006 CONFIDENTIAL
Contributions by partnersContributions by partners
AMISAa
bb
KUL-ESATaa
KHBOcc
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Slide 12AID-EMC review meeting 29/08/2006 CONFIDENTIALAID-EMC review meeting 29/08/2006 CONFIDENTIAL
WP1: Innovation RealisedWP1: Innovation Realised
Improved
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13
Silicon Solutions for the Real WorldSilicon Solutions for the Real World
WP2: EMC susceptibility of
analogue circuits
WP2: EMC susceptibility of
analogue circuits
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Slide 14AID-EMC review meeting 29/08/2006 CONFIDENTIALAID-EMC review meeting 29/08/2006 CONFIDENTIAL
WP2: Technical problemsWP2: Technical problems
LDMOS Surface
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Slide 15AID-EMC review meeting 29/08/2006 CONFIDENTIALAID-EMC review meeting 29/08/2006 CONFIDENTIAL
T2.1: Finalization of the LIN driverT2.1: Finalization of the LIN driver
Design Use
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Slide 16AID-EMC review meeting 29/08/2006 CONFIDENTIALAID-EMC review meeting 29/08/2006 CONFIDENTIAL
T2.2: Design DC current regulator with low EMST2.2: Design DC current regulator with low EMS
ESD
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Slide 17AID-EMC review meeting 29/08/2006 CONFIDENTIALAID-EMC review meeting 29/08/2006 CONFIDENTIAL
T2.3: Design input structure with low EMST2.3: Design input structure with low EMS
Optimize
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Slide 18AID-EMC review meeting 29/08/2006 CONFIDENTIALAID-EMC review meeting 29/08/2006 CONFIDENTIAL
T2.4: Design input structure with high common mode rejectionT2.4: Design input structure with high common mode rejection
Optimize
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Slide 19AID-EMC review meeting 29/08/2006 CONFIDENTIALAID-EMC review meeting 29/08/2006 CONFIDENTIAL
T2.3: Design guidelines for low EMS T2.3: Design guidelines for low EMS
Optimize
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Slide 20AID-EMC review meeting 29/08/2006 CONFIDENTIALAID-EMC review meeting 29/08/2006 CONFIDENTIAL
Contributions by partnersContributions by partners
AMISAa
bb
KUL-ESATaa
KHBOcc
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Slide 21AID-EMC review meeting 29/08/2006 CONFIDENTIALAID-EMC review meeting 29/08/2006 CONFIDENTIAL
WP2: Innovation RealisedWP2: Innovation Realised
New
Better
Guidelines
Technical RisksProtection
Protection
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Silicon Solutions for the Real WorldSilicon Solutions for the Real World
WP3: Digital techniquesWP3: Digital techniques
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Slide 23AID-EMC review meeting 29/08/2006 CONFIDENTIALAID-EMC review meeting 29/08/2006 CONFIDENTIAL
WP3: Technical problemsWP3: Technical problems
Logic families with reduced current variation how logic circuits can be designed in such a way that they generate less current variation (di/dt) in the supply lines
EMC-friendly clock strategy how the electromagnetic radiation caused by digital circuits can be reduced by adapting the clock strategy.
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Slide 24AID-EMC review meeting 29/08/2006 CONFIDENTIALAID-EMC review meeting 29/08/2006 CONFIDENTIAL
T3.1: Design of EMC-friendly logic families - I
T3.1: Design of EMC-friendly logic families - I
Selection of EMC-friendly logic family:6 different logic design techniques are compared, The design goal is to reduce di/dt noise while still keep the compromise on the speed, power, area trade-off under control, Based on the simulations, we conclude that CSL logic is the best choice.
Comparison of CSL and SCMOS:The CSL logic produces an amount of di/dt noise almost 36dB smaller than the SCMOS logic,
If controlled properly, we can keep the power of CSL circuit comparable to the SCMOS,
CSL show a smaller area per logic function for complex digital gates and systems.
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Slide 25AID-EMC review meeting 29/08/2006 CONFIDENTIALAID-EMC review meeting 29/08/2006 CONFIDENTIAL
T3.1: Design of EMC-friendly logic families - IIT3.1: Design of EMC-friendly logic families - II
Target : Mixed-Mode Automotive Electronics Design
Key aspects : di/dt + Power + Area + Speed
P eak to P eak value of di/ dt
1.0E+00
1.0E+01
1.0E+02
1.0E+03
1.0E+04
1.0E+05
1.0E+06
1.0E+07
SCMOS PNMOS RSBMOS CSL MCML FSCL
Inv erter Power in different logic techniques
0.00E+00
5.00E+01
1.00E+02
1.50E+02
2.00E+02
2.50E+02
SCMOS PNMOS RSBMOS CSL MCML FSCL
Pow
er [
μW]
Inv erter area in different logic techniques
0
0.5
1
1.5
2
2.5
3
3.5
4
SCMOS PNMOS RSBMOS CSL MCML FSCL
Area
[μm
2]
Ring Oscillator of 21-stages
(Static + Dynamic)
Current Steering Logic
But there is static power !!
di/dt Peak-Peak PowerArea
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Slide 26AID-EMC review meeting 29/08/2006 CONFIDENTIALAID-EMC review meeting 29/08/2006 CONFIDENTIAL
T3.1: Design of EMC-friendly logic families - IIIT3.1: Design of EMC-friendly logic families - III
Power spectrum densityPower spectrum density
of di/dt comparisonof di/dt comparison
SCMOS
CSL
36dB
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Slide 27AID-EMC review meeting 29/08/2006 CONFIDENTIALAID-EMC review meeting 29/08/2006 CONFIDENTIAL
T3.2: EMC-friendly clock strategies - I
T3.2: EMC-friendly clock strategies - I
Clock skewClock skew: based on the introduction of different skews to the branches of a clock tree.
Only 2-5dB reduction,Need smart algorithm to control and optimize the skew.
Spread Spectrum Clock Generation(SSCG)Spread Spectrum Clock Generation(SSCG): based on an existing DLL idea.
Spread the clock period by a programmable amount,Fully digital and simple implementation,More than 12dB on the maximum di/dt power spectrum reduction.
2 different clock strategies are studied:
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Slide 28AID-EMC review meeting 29/08/2006 CONFIDENTIALAID-EMC review meeting 29/08/2006 CONFIDENTIAL
T3.2: EMC-friendly clock strategies - II
T3.2: EMC-friendly clock strategies - II
Spectrum from 300MHz to 800MHz
Spread Spectrum
Clock
Regular Clock
12dB reduction
Zoom in
A test chip for SSCG will be designed to prove the A test chip for SSCG will be designed to prove the simulation(next project phase). simulation(next project phase). Problem remains: introduction into a standard Problem remains: introduction into a standard design flow.design flow.
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Slide 29AID-EMC review meeting 29/08/2006 CONFIDENTIALAID-EMC review meeting 29/08/2006 CONFIDENTIAL
T3.3: Test chip for the EMI Suppressing Regulator - I
T3.3: Test chip for the EMI Suppressing Regulator - I
The EMI suppressing regulator replaces the EMC-friendly logic:
Control the way the current delivered to the internal digital core, hence keep the EMI under control,
Compatible with conventional CMOS logic,
Large EMI reduction is ensured (40dB), comparable with low noise digital cells only,
More power efficient than low noise logic cells,
Can be adjusted to a wide range of chip size and power consumption level.
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Slide 30AID-EMC review meeting 29/08/2006 CONFIDENTIALAID-EMC review meeting 29/08/2006 CONFIDENTIAL
T3.3: Test chip for the EMI Suppressing Regulator - II T3.3: Test chip for the EMI Suppressing Regulator - II
current of Vbat
di/dt p-p =8.5x104 [A/s]
load current of digital core
FFT FFT
di/dt p-p =1.8x109 [A/s]
di/dtof Vbat
di/dtof V3v3
40dB (EMI regulator) + 20dB (Serial regulator40dB (EMI regulator) + 20dB (Serial regulator))
9x106
7x103
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Slide 31AID-EMC review meeting 29/08/2006 CONFIDENTIALAID-EMC review meeting 29/08/2006 CONFIDENTIAL
T3.3: Test chip for the EMI Suppressing Regulator - III T3.3: Test chip for the EMI Suppressing Regulator - III
Micrograph of the RD2E test chip and the EMI suppressing regulator
EMISuppressing
regulator
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Slide 32AID-EMC review meeting 29/08/2006 CONFIDENTIALAID-EMC review meeting 29/08/2006 CONFIDENTIAL
T3.3: Test chip for the EMI Suppressing Regulator - IV T3.3: Test chip for the EMI Suppressing Regulator - IV
Measurements
di/dt@Vbat
di/dt@source
> 5x reduction> 5x reduction
TBD: • figure out low current capability problem,
• detailed measurements will be ready in 2nd phase
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Slide 33AID-EMC review meeting 29/08/2006 CONFIDENTIALAID-EMC review meeting 29/08/2006 CONFIDENTIAL
Contributions by partnersContributions by partners
AMISDeliver specifications for the chip,
Deliver design kit,
Process the chip,
Evaluate the chip measurement results.
KUL-ESAT-MICASScientific analysis,
Chip design,
Chip measurements.
KHBOAdvice on the EMC measurements.
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Slide 34AID-EMC review meeting 29/08/2006 CONFIDENTIALAID-EMC review meeting 29/08/2006 CONFIDENTIAL
WP3: Innovation RealizedWP3: Innovation Realized
Innovative characters:
It addresses the problem of electromagnetic radiation at its very source,
A systematic approach for radiation reduction is developed (includes a EMI suppressing regulator).
A clever clock design strategy to guarantee low EMI is designed.
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35
Silicon Solutions for the Real WorldSilicon Solutions for the Real World
WP4: Computer-aided EMC
analysis
WP4: Computer-aided EMC
analysis
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Slide 36AID-EMC review meeting 29/08/2006 CONFIDENTIALAID-EMC review meeting 29/08/2006 CONFIDENTIAL
WP4: Technical problemsWP4: Technical problems
Technical problem
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Slide 37AID-EMC review meeting 29/08/2006 CONFIDENTIALAID-EMC review meeting 29/08/2006 CONFIDENTIAL
T4.1: Models for EMS simulation frameworkT4.1: Models for EMS simulation framework
Improve
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Slide 38AID-EMC review meeting 29/08/2006 CONFIDENTIALAID-EMC review meeting 29/08/2006 CONFIDENTIAL
T4.2: Development of EMS simulation frameworkT4.2: Development of EMS simulation framework
Design
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Slide 39AID-EMC review meeting 29/08/2006 CONFIDENTIALAID-EMC review meeting 29/08/2006 CONFIDENTIAL
T4.3: Automated generation of EM-inclusive behavioral modelsT4.3: Automated generation of EM-inclusive behavioral models
The best
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Slide 40AID-EMC review meeting 29/08/2006 CONFIDENTIALAID-EMC review meeting 29/08/2006 CONFIDENTIAL
T4.4: Industrial EMC design flowT4.4: Industrial EMC design flow
The best
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Slide 41AID-EMC review meeting 29/08/2006 CONFIDENTIALAID-EMC review meeting 29/08/2006 CONFIDENTIAL
Contributions by partnersContributions by partners
AMISAa
bb
KUL-ESATaa
KHBOcc
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Slide 42AID-EMC review meeting 29/08/2006 CONFIDENTIALAID-EMC review meeting 29/08/2006 CONFIDENTIAL
WP4: Innovation RealisedWP4: Innovation Realised
Self-protecting
Know-how
Design guidelines
Technical risksConflicting
aaa
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Slide 43AID-EMC review meeting 29/08/2006 CONFIDENTIALAID-EMC review meeting 29/08/2006 CONFIDENTIAL
Status DeliverablesStatus Deliverables
Main result:
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Slide 44AID-EMC review meeting 29/08/2006 CONFIDENTIALAID-EMC review meeting 29/08/2006 CONFIDENTIAL
CooperationCooperation
Flemish partnersKUL ESAT
KHBO
AMIS
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Slide 45AID-EMC review meeting 29/08/2006 CONFIDENTIALAID-EMC review meeting 29/08/2006 CONFIDENTIAL
Resources (1)Resources (1)
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Slide 46AID-EMC review meeting 29/08/2006 CONFIDENTIALAID-EMC review meeting 29/08/2006 CONFIDENTIAL
Resources (2)Resources (2)
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Slide 47AID-EMC review meeting 29/08/2006 CONFIDENTIALAID-EMC review meeting 29/08/2006 CONFIDENTIAL
ConclusionsConclusions
38% basis funding percentage
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Slide 48AID-EMC review meeting 29/08/2006 CONFIDENTIALAID-EMC review meeting 29/08/2006 CONFIDENTIAL
Silicon Solutions for the Real World!
KUL-ESAT-MICAS