simplification using map method - philadelphia · pdf file · 2014-04-21... (pos)...
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Philadelphia University
Faculty of Information Technology
Department of Computer Science
Computer Logic Design
By
Dareen Hamoudeh
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Simplification Using Map Method
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Why map method?
• Complex algebraic expression Complex Logic gates.
• Several algebraic expressions for same function.
• Function minimization using algebraic expression is awkward no specific rules to predict each step in the manipulative process.
• Map Method:
– Provides simple, straightforward procedure in minimizing functions.
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Map method(K-map)
• Also known as:– Veitch diagram.
– Karnaugh map.
• The Diagram made up of squares , each square represents one minterm.
• Represents visual diagram of all possible ways a function may expressed in standard form.
• We will assume: the simplest algebraic expression is any one in(SOP) or (POS) that has minimum numbers of literals.
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Two Variables Map
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Two Variables Map
• There are 4 minterms for two variables, so the map consists of 4 squares one for each minterm.
• We mark 0 and 1 for each row & column designate x and y:
X: primed in row 0.
Unprimed in row 1.
y: primed in col. 0.
Unprimed in col. 1.
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Two Variables Map
• We only mark the squares whose minterm belong to the given function.
• If we have F=x.y, it is equal to m3 ,because it is = 1 when x=1 and y=1. so, we place 1 inside the square that belong to m3:
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Two Variables Map
• If we have F=x+y, then its minterms are:
X+y=X’.y+x.y’+x.y=m1+m2+m3
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Three Variables Map
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Three Variables Map• There are 8 minterms.
• Map consists of 8 squares.
• Minterms are arranged in a sequence similar to reflected code.
• Only one bit changes from 1 to 0 or from 0 to 1 in the sequence.
• There are 4 squares where each variable =1, and 4 squares where each variable =0.
• We write the variable with its letter symbol under the four squares where it is unprimed.
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Map in simplification
• Basic property for adjacent squares in the map:
– Any two adjacent squares differ by only one variable: primed in square & unprimed in the other.
– EX:
In m5 & m7 : y is primed in m5 and unprimed in m7, from postulates m5+m7= xy’z+ xyz = xy(y’+y) = xy.
Sum of minterms in adjacent squares can simplified to a single AND term with 2 literals.
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Example 1
• Simplify the Boolean function using K-map
F=x’yz + x’yz’+ xy’z’+ xy’zSolution:
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Represents x’.y
Represents x.y’
(m0 + m2) and (m4 + m6)
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Most minimization example
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F= Z’
Most minimization example
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F= x’+y
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Four Variables Map
• Like three-variable map: we minimize function using Adjacent squares property.
• In addition the map is considered to lie on surface with the top and bottom edges as well as the right and the left, for Example:
– m0 and m2 form adjacent squares.
– m3 and m11 form adjacent squares.
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Four Variables Map
• Combination of adjacent squares is easily determined:
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Self Study & Practice
Five Variables Map
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Five Variables Map
• Number of squares = number of minterms:25 =32• Rows & columns are numbered in reflected code
sequence.• There are 16 squares where each variable =1, and 16
squares where each variable =0.• As it consists of 2 four-variable maps.• Each four-variable maps is recognized from the double
line in the center:– Each retains the previously defined adjacency, individually.– In addition, the center lines considered as the center of a
book, with each half of the map being a page
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Five Variables Map
• When the book is closed, two adjacent squares will fall one in each other, beside its four neighboring squares.
• Example: m31 is adjacent to m30,m15,m29,m23
and m27
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Five Variables Map
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NAND and NOR Implementation
• Digital circuits are frequently constructed with only NAND or NOR gates.
– because these gates are easier to fabricate with electronic components.
• Because of the importance of NAND and NOR in the design of digital circuits.
– rules and procedures have been developed for the conversion from Boolean functions in terms of AND, OR and NOT into equivalent NAND or NOR logic diagrams.
• NAND and NOR are called universal gates.
– because any digital system or Boolean function can be implemented with only these gates.
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NAND and NOR Implementation
• Two-level implementation is presented here.
• There are two other graphic symbols for these gates, to facilitate conversions.
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NAND and NOR Implementation
• NAND equivalent symbols:
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NAND equivalent symbols
• Consists of an AND symbol followed by small circle.
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NAND equivalent symbols:
• OR symbol preceded by small circles in all the inputs.
• It follows DeMorgan’s theorem where small circles denote complementation.
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NAND and NOR Implementation
• NOR equivalent symbols:
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NOR equivalent symbols
• Consists of an OR symbol followed by small circle.
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NOR equivalent symbols:
• AND symbol preceded by small circles in allthe inputs.
• It follows DeMorgan’s theorem where small circles denote complementation.
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NAND and NOR Implementation
• One-input NAND or NOR gate:
– Inverter.
• Three different graphic symbols for inverter:
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NAND and NOR Implementation
• NAND Simple Examples:
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NAND and NOR Implementation
• NOR Simple Examples:
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Implementing Functions usingNAND
• First Way:
• Boolean function can be implemented with 2-levels of NAND gates by following the rules:
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Implementing Functions usingNAND
• Second Way:
• Boolean function can be implemented with 3-levels of NAND gates by following the rules:
1) combine the 0’s in the map(obtain complement in SOP).
2) Implement the complement with 2-way NAND.
3) To obtain the normal output: insert one-input NAND (or inverter)to generate the true value of the output.
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Example
• Implement the following function with NAND gates:
F(x,y,z)= ∑(0,6)
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SolutionFirst Way
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• 1)simplify function:
F=x’y’z’+xyz’
Solution
• 2)
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SolutionSecond Way
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• 1) simplify Complement (0’s):
F’= x’y + xy’+ z
• 2)
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• NOR function is the dual of the NAND.
• Require that the function simplified in POS.
• First Way:
• Boolean function can be implemented with 2-levels of NOR gates by following the rules:
1) combine the 0’s in the map(obtain complement).
2) Complement the function.
2) Implement the complement with 2-way NOR.
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Implementing Functions usingNOR
Implementing Functions usingNOR
• Second Way:• Boolean function can be implemented with 3-
levels of NOR gates by following the rules:1) combine the 1’s in the map.2) Obtain the function in SOP.3) Complement the function to obtain the
complement in POS (DeMorgan’s).4) Implement the complement with 2-way NOR.5) To obtain the normal output: insert one-input
NOR(or inverter)to generate the true value of the output.
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Example
• Implement the following function with NOR gates:
F(x,y,z)= ∑(0,6)
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SolutionFirst Way
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• 1)combine the 0’s:
F’=x’y+xy’+z
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Solution
• 2) complement the function to obtain POS.
F= (x+y’)(x’+y)z’
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SolutionSecond Way
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• 1) Combine (1’s):
F’= x’y’z’ + xyz’
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• 2) complement the function
F’=(x+y+z)(x’+y’+z)
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Rules for NAND & NOR
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Don’t Care Conditions
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Example
• Simplify the Boolean function
F(w,x,y,z)=∑(1,3,7,11,15)
That has the do not-care conditions:
d(w,x,y,z)=∑(0,2,5)
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• We notice that don’t care conditions are treated differently
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• We can obtain simplified POS for the function:• We combine the 0’s.
– We see that the only way to combine them is to include don’t-care minterms 0 & 2:
F’ = z’+wy’• Take the complement of F’• F(w,x,y,z)=z(w’+y)=∑(1,3,5,7,11,15)• We include :
– minterms 0&2 with the 0’s.– Minterm 5 with the 1’s.
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