simplified thermal stress analysis

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    Simplified Thermal Stress

    AnalysisReference: Sergent, J., and Krum, A., Thermal ManagementHandbook for Electronic Assemblies, McGraw-Hill, New York,1998. Chapter 7

    Another helpful source: Vaynman, S., Mavoori, H., Chin, J., Fine,M.E., Moran, B, and Keer, L.M., Stress management and reliabilityassessment in electronic packaging, National ElectronicPackaging and Production Conference--Proceedings of theTechnical Program (West and East), v 3, 1996, p 1711-1726.

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    TCEProblem: when one material is bonded to another with a

    much smaller temperature coefficient of expansion(TCE)

    E=TCEx D TE=strain (length/length)D

    T=temperature differential across sampleS=EYS=stress (psi/in or Pa/m)Y=modulus of elasticity (lb/in 2 or Pa)

    When total stress (S*max dimension of sample) exceedstensile strength, cracks will form

    Note that this analysis is simplified (Dr. Yee might notapprove.)

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    Types of cracks from thermal stress

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    Other thermal stress properties

    The stress can cause displacement in thetangential direction.

    Poissons ratio n =strain in tangential direction /strain

    in normal direction =e T/ e N

    Shear modulus G=E/2/(1+ n )

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    Die-Die Attach-Substrate

    Two types of problems caused by TCE die

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    Total strain when both cases occur

    E=(TCE D-TCE S )(TD-T A)+TCE S (TD-TS )*where D=die, S=substrate, A=ambient with power off

    Experimental results will usually be somewhat less thanthis. However, note that there are other causes of stress,too, such as vibrations or material faults.

    *Note again that this is simplified, so other sources mayhave a somewhat different version of this equation.

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    Stress due to processingProcessing temps are usually higher than operating temps, so theymay cause the maximum stress. The stress maximum in this case

    is at the corners.

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    Stress concentrationsDuring manufacturing, small stress concentrations often occur small

    cracks when a semiconductor die is sawed, small voids formed.When external stress is applied, these concentrations amplify thestress and may cause a fracture.

    For an elliptical microcrack with major axis perpendicular to appliedstress, max stress at crack tip

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    Force required to cause breakage

    aK ZS IC

    c

    KIC=plain strain fracture toughness in psi-in 1/2 or MPa-m 1/2Z=dimensionless constant, usually 1.2a=microcrack length/2

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    To Minimize Stress

    1. Match TCE of component and substrate as much as possible2. Use an intermediate layer with a TCE in between that of the die

    and substrate; molybdenum often used (TCE between that ofsilicon and alumina)

    3. Choose materials that need the lowest processing temperatures a large amount of stress is induced on the components as theycool from the processing temp

    4. Small voids in the bond distributed uniformly over the bond canhelp reduce stress. However, these voids will increase thermalresistance, increasing the junction temp, so this may not be a goodthing. Also, watch out for stress concentrations, such as thosecaused by large voids.

    5. Use compliant bonding materials, such as soft solders and softepoxies. Pb-Sn solder balls in BGA, or J-, gull-wing, and othertypes of leads in surface mounted devices are good. Again, notethat a bonding material with a high thermal resistance will increaseT j.

    6. Reduce temperature fluctuations due to better thermalmanagement.

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    Helpful properties to use with examples