UNIT 2Digital Logic Families

Example Logic Families• General comparison or three commonly available logic

families.

the most important to understand

Digital IC

• There are many IC packages, differing inphysical size, environmental & power consumption conditions, and circuit board mounting

The DIP (dual-in-line package)has pins (leads) down the

two long sides of therectangular package.

The notch on one end,is used to locate pin 1.

Some DIPs use a smalldot to locate pin 1.

SSI Devices

• Each package contains a code identifying the package

N74LS00

Manufacturers Code

N = National SemiconductorsSN = Signetics

Specification

FamilyLLSH

Member00 = Quad 2 input NAND02 = Quad 2 input Nor04 = Hex Invertors20 = Dual 4 Input NAND

INTRODUCTION

• Logic Family: It is a group of compatible ICs with the same logic levels and the supply voltages for performing various logic functions

• They have been fabricated using a specific circuit configuration.

• They are the building block of logic circuits.

• It is set of techniques used to implement logic within large scale ICs (LSI).

ICs are integrated using following integration techniques

• SSI (upto 12)• MSI (12 to 99)• LSI (100 to 9,999)• VLSI (10,000 to 99,999)• ULSI (> 1,00,000)

Classification of Logic families

Bipolar

Saturated

RTL

DTL

DCTLI2L

TTL

HTL

Unsaturated

Schottky TTL ECL

Unipolar

PMOS NMOS CMOS

Electrical Characteristics

• TTL – faster (some versions)– strong drive capability– larger power consumption

• CMOS– lower power consumption– simpler to make– greater packing density– better noise immunity– slower

• Complex IC’s contain many millions of transistors• If constructed entirely from TTL type gates would melt• A combination of technologies (families) may be used• CMOS has become most popular and has had greatest development

Basic Characteristics of ICs

• Propagation delay• Power dissipation• Fan in and fan out• Noise immunity• Power supply requirement• Figure of merits i.e. speed power product• Operating temperature• Current and voltage parameters

Electrical Characteristics

• Important characteristics are:

– VOHmin min value of output recognized as a ‘1’– VIHmin min value input recognized as a ‘1’

– VILmax max value of input recognized as a ‘0’– VOLmax max value of output recognized as a ‘0’

– Values outside the given range are not allowed.logic 0

logic 1

indeterminate

input voltage

• For a High-state gate driving a second gate, we define:– VOH (min), high-level output voltage, the minimum voltage level that a

logic gate will produce as a logic 1 output.– VIH (min), high-level input voltage, the minimum voltage level that a

logic gate will recognize as a logic 1 input. Voltage below this level will not be accepted as high.

– IOH, high-level output current, current that flows from an output in the logic 1 state under specified load conditions.

– IIH, high-level input current, current that flows into an input when a logic 1 voltage is applied to that input.

Voltage & Current

Ground

VIHVOH

I OH I IHTest setup for measuring values

• For a Low-state gate driving a second gate, we define:– VOL (max), low-level output voltage, the maximum voltage

level that a logic gate will produce as a logic 0 output.– VIL (max), low-level input voltage, the maximum voltage

level that a logic gate will recognize as a logic 0 input. Voltage above this value will not be accepted as low.

– IOL , low-level output current, current that flows from an output in the logic 0 state under specified load conditions.

– IIL , low-level input current, current that flows into an input when a logic 0 voltage is applied to that input.

Voltage & Current

Inputs are connected to Vcc instead of Ground

Ground

V ILV OL

I OL I IL

Voltage Level Definitions

VIH – High Level Input Voltage

Vinput ≥ VIH to be recognized as a “1”

TTL Ex: VIH = 2V, thus at the input

a “1” is between 2V and VCC

Voltage Level Definitions

VOH – High Level Output Voltage

TTL Ex: VOH = 2.4V, thus at the output

a “1” is between 2.4V and VCC

Voltage Level Definitions

VIL – Low Level Input Voltage

Vinput ≤ VIL to be recognized as a “0”

TTL Ex: VIL = 0.8V, thus at the input

a “0” is between 0V and 0.8V

Voltage Level Definitions

VOL – Low Level Output Voltage

TTL Ex: VOL = 0.4V, thus at the output

a “0” is between 0V and 0.4V

Current Level Definitions

IOL – Low Level Output Current

Maximum current that an output terminal of a gate can sink when the output is “0”.

IOUT

“0”

Current Level Definitions

IIL – Low Level Input Current

Maximum current that an input terminal of a gate can source when the input is “0”.

TTL Ex: IIL = -1.6mA, VIN ≤ 0.8V

IIN

“0”

Current Level Definitions

IOH – High Level Output Current

Maximum current that an output terminal of a gate can source when the output is “1”.

IOUT

“1”

Current Level Definitions

IIH – High Level Input Current

Maximum current that an input terminal of a gate can sink when the input is “1”.

TTL Ex: IIH = +40mA, VIN ≥ 2.0V

IIN

“1”

Typical acceptable voltage ranges for positive logic 1 and logic 0 are shown below

• A logic gate with an input at a voltage level within the ‘indeterminate’ range will produce an unpredictable output level.

Logic Level & Voltage Range

Logic 1

Logic 0

5.0V

0V

2.5VIndeterminate

0.8V

TTL

Logic 1

Logic 0

5.0V

Indeterminate

0V

1.5V

CMOS

3.5V

Propagation Delay Time

A measure of howlong it takes for a gate to change state.Ideally, should be as short as possible.

tPHL - the time it takes the output to go from a high to a low

tPLH - the time it takes the output to go from a low to a high

Average Propagation Delay

Time tp =

Vin Vout

2pHL pLHt t

Power Requirements

• Every IC needs a certain amount of electrical power to operate.

• Vcc (TTL)/VDD(MOS)

• Power dissipation determined by Icc and Vcc.

• Average Icc(avg)= (ICCH + ICCL)/2

• PD(avg) = Icc(avg) x Vcc

•IccL The value of ICC for a low gate o/p i.e IOL

•Icch The value of ICC for a high gate o/p i.e. IOH

• For proper operation, logic circuit input voltage levels must be kept out of the indeterminate range. – Lower than VIL(max) or higher than VIH (min).

• Invalid voltage will produce unpredictable output.

• It is important to know valid voltage ranges for the logic family being used so invalid conditions can be recognized when testing or troubleshooting.

• Logic families can be described by how current flows between the output of one logic circuit and the input of another.

Fan-Out and Fan-In Fan-out – number of load gates connected

to the output of the driving gate gates with large fan-out are slower

N

M

Fan-in – the number of inputs to the gate gates with large fan-in are bigger

and slower

Static or DC Fan-OutFan-Out (N) is defined as the number of

loads (gate inputs) that can be driven by a single gate output at DC or low frequencies.

Low Level Fan-out

NL = High Level Fan-out

NH =N = min{NL,NH}Ex: For most TTL families, N = NL.

of the driving gate

of the load gateOL

IL

I

I

of the driving gate

of the load gateOH

IH

I

I

Fan out• Also known as loading factor• Defined as the maximum number of logic inputs that

an output can drive reliably• A logic circuit that specify to have 10 fan out can

drive 10 logic inputs.The maximum number of standard logic inputs that an output can drive reliably.

• Related to the current parameters (both in high and low states.)

• For TTL (10),CMOS(50)

Fan-In• Number of input signals to a gate

– Not an electrical property– Function of the manufacturing process

NAND gate with a Fan-in of 8

Noise Margin• If noise in the circuit is high

enough it can push a logic 0 up or drop a logic 1 down into the indeterminate or “illegal” region

• The magnitude of the voltage required to reach this level is the noise margin

• Noise margin for logic high is:– NMH = VOHmin – VIHmin

VOHmin

VIHmin

VILmax

VOLmaxlogic 0

logic 1

indeterminate

input voltage

Noise Margin• Noise immunity refers to the circuit’s ability to tolerate

noise without changes in output voltage.– A quantitative measure is called noise margin.High-state noise margin: Low-state noise margin:

Digital IC Terminology – Power Requirements• The amount of power an IC requires is determined by the current, ICC

(or IDD) it draws from the supply.– Actual power is the product ICC x VCC (IDD x VDD ).

In some logic circuits, averagecurrent is computed basedon the assumption that gate

outputs are LOW half thetime and HIGH half the time.

Current Sourcing

• Current-sourcing action.– When the output of gate 1 is HIGH, it supplies

current IIH to the input of gate 2.• Which acts essentially as a resistance to ground.

– The output of gate 1 is acting as a source ofcurrent for the gate 2 input.

Current Sinking

• Current-sinking action.– Input circuitry of gate 2 is represented as a resistance tied to +VCC

—the positive terminal of a power supply. – When gate 1 output goes LOW, current will flow from the input

circuit of gate 2 back through the output resistance of gate 1, to ground.• Circuit output that drives the input of gate 2 must be able to sink

a current, IIL , coming from that input.

Few examples

CMOS Logic Families

• CMOS Logic Families– 40xx/45xx Metal-gate CMOS– 74C TTL-compatible CMOS– 74HC High speed CMOS– 74ACT Advanced CMOS -TTL compatible

TTL configuration

• TTL gates are available in three different types of output configuration.

• Totem Pole• Open collector• Tri state

Totem pole output

• Totem pole output gates are used in most logic; in this case, the gate by itself drives its output HIGH or LOW depending on the gate’s inputs

• Connecting the outputs of two or more totem pole gates together produces undefined output values, may damage the device and should never be done.

Open collector output

• Open collector output gates can only drive their output LOW; for input combinations where the output should be HIGH, an external pull up resistor connected the supply voltage is needed to produce the HIGH

• The outputs of open collector gates to be wired together; the result is to effectively AND all the output signals together.

Tri state output

• Tri-state Output Gates provide, three output states. Like totempole output gates, tristate gates can drive their output either HIGH or LOW, as determined by the input combination, but they also have a control input that overrides the effect of the other inputs and places the gate output in a ‘third state’ t or high impedance state.

41

Totem Pole Outputs

• The standard TTL output configuration with a HIGH output and a LOW output transistor, only one of which is active at any time.

• A phase splitter transistor controls which transistor is active.

42

Advantages of Totem Pole Configuration

• Changes state faster than open-collector outputs.

• No external components are required.

The basic TTL logic circuit is the NAND gate.

Basic TTLNAND gate.

Diode equivalent for Q1 .

44

Totem Pole Outputs

45

Connecting Totem Pole Outputs

• Outputs must never be connected together.

• Connecting outputs causes excessively high currents to flow.

• Outputs will eventually be damaged.

46

Connecting Totem Pole Outputs

If any input is low, the corresponding base emitter junction becomes forward biased and the transistor conducts

IN1 IN2 T1 T2 T3 T4 outputLo LO ONfor OFF OFF ON HILO HI ONfor OFF OFF ON HIHI LO ONfor OFF OFF ON HIHI HI ONrev ON ON OFF LO

IN1 IN2 T1 T2 T3 T4 outputLo LO ONfor OFF OFF ON HILO HI ONfor OFF OFF ON HIHI LO ONfor OFF OFF ON HIHI HI ONrev ON ON OFF LO

Typical TTL series characteristics.

Open Collector/Open Drain Outputs

• One solution to the problem of sharing a common wire among gates is to remove the active pull-up transistor from each gate’s output circuit. – In this way, none of the gates will ever try to

asserta logic HIGH.

52

Open-Collector Outputs

• A circuit that has LOW-state output circuitry, but no HIGH-state output circuitry requires an external pull-up resistor to enable the output to produce a HIGH-state.

53

Advantages of Open-Collector Outputs

• Allows the outputs of multiple gates to be directly connected.– – Called wired-AND.

• Can produce voltage levels in excess of 5 V.

• Can drive high-input current devices.

Open Collector/Open Drain OutputsTTL outputs modified this way

are called open-collector outputs.

CMOS outputs modified this wayare called open-drain outputs.

55

Open-Collector Applications

The MOSFETS

• P-MOS: P-channel MOS• N-MOS: N-channel MOS, fastest• CMOS: complementary MOS, higher

speed, lower power dissipation.• CMOS consumes very little power, has

excellent noise immunity, and is used with a wide range of voltages.

• TTL can drive more current and uses more power than CMOS.

CMOS Properties

• Full rail-to-rail swing• Symmetrical VTC• Propagation delay function of load capacitance

and resistance of transistors• No static power dissipation• Direct path current during switching

• In general, CMOS devices have greater noise margins than TTL.

• When a CMOS logic circuit is in a static state—not changing—its power dissipation is extremely low. – Ideally suited for applications using battery

power.• Power dissipation of a CMOS IC will be

very low as long as it is in a dc condition. – PD will increase in proportion to the frequency

at which the circuits are switching states.

• CMOS logic is exemplified by its extremely low power consumption and high noise immunity.

• Hence, it is prevalently used in devices demanding low power dissipation, such as digital wristwatches and other battery powered devices, or in devices operated in noisy environments, such as industrial plants

• Unlike TTL logic, CMOS logic requires two supply voltages, VDDand VSS. In typical logical designs, VDD ranges from +3 V to +16V. The other supply, VSS, is normally grounded.

• Input voltages ranging from 3.5 to 5 V are recognized as HIGH and voltages from 0 to 1.5 V as LOW

61

CMOS Inverter

• Depends on the biasing of the complementary transistors Q1 and Q2.

• Q1 and Q2 are always in opposite states.

• When Q1 is ON, Q2 is OFF.

Complementary MOS Logic – CMOS Inverter• The CMOS INVERTER has two MOSFETs in

series.– Gates of the two devices are connected

together as a common input. – Drains are connected together as common

output.

Basic CMOS INVERTER.

63

CMOS Inverter

CMOS Inverter: Steady State Response

VDD VDD

VoutVout

Vin = VDD Vin = 0

Ron

Ron

VOH = VDD

VOL= 0

VM = Ronp) f(Ronn,

IC Interfacing• Interfacing means connecting output(s) of one

circuit/system to input(s) of another circuit/system.• The simplest and most desirable interface circuit

between a driver and a load is a direct connection. – Often a direct connection cannot be made due

to a difference in electrical characteristics. • An interface circuit is connected between the driver

and the load, to condition the driver output signal so it is compatible with requirements of the load.

• The amount of current that can be supplied by outputs and that can be assimilated by inputs of gates within each logic family is another consideration

• Specifically, when CMOS drives TTL logic, the crucial question is whether the CMOS output, in the LOW state, can sink enough of the current originating at the TTL input to ensure that the voltage at the TTL input does not exceed its maximum LOW level input voltage of 0.8 V

• Typical CMOS gates can sink about 0.4 mA in the LOW state while maintaining an output voltage of 0.4 V less. This is sufficient to drive two low power TTL inputs, but generally insufficient to drive even one standard TTL input.

• It is better to use a special buffer such as a 74C901 to drive standard TTL from CMOS. The HIGH state poses no problems.

• In the LOW state, a TTL output can drive CMOS directly

Open Collector/Open Drain Outputs

Conventional CMOS or TTL totem pole outputsshould never be connected to the same point.

Two outputs contending for control of a wire.

CMOS Series Characteristics - Terms

• CMOS ICs provide all TTL logic functions, and special-purpose functions not provided by TTL.

• Terms used when ICs from different families or series are to be used together or as replacements.

– Pin-compatible—two ICs are pin-compatible when their pin configurations are the same.

– Functionally equivalent—ICs are functionally equivalent when the logic functions they perform are exactly the same.

– Electrically compatible—ICs are electrically compatible when they can be connected directly to each other without special measures to ensureproper operation.

• Logic devices will be voltage-compatible, and no interface will be necessary under the following circumstances:

Nominal values for different families/series of digital devices.

IC Interfacing

IC Interfacing

External pull-up resistoris used when TTL drives CMOS.

Equivalent CMOS outputcircuits for both logic states.

• A substantial shift in voltage because driver & load operate on different supply voltages requires a voltage-level translator interface circuit.

The simplest way to accomplish this is with

a buffer that has anopen drain—witha pull-up resistor.

• A substantial shift in voltage because driver & load operate on different supply voltages requires a voltage-level translator interface circuit.

Another solution isa dual-supply-level

translator circuit using two different supply voltages, one eachfor inputs & outputs, translating between

the two levels.

• A substantial shift in voltage because driver & load operate on different supply voltages requires a voltage-level translator interface circuit. Another common solution is an interface using a

buffer from a series that can withstand higher input.

A low-voltage series with 5-V tolerant

inputsas an interface.

Characteristics: TTL and MOS

• TTL stands for Transistor-Transistor Logic– uses BJTs

• MOS stands for Metal Oxide Semiconductor– uses FETs

• MOS can be classified into three sub-families:– PMOS (P-channel)– NMOS (N-channel)– CMOS (Complementary MOS, most common)

Remember:

A Comparison of Logic Families25.5

Parameter CMOS TTL ECL

Basic gate NAND/NOR NAND OR/NOR

Fan-out >50 10 25

Power per gate (mW) 1 @ 1 MHz 1 - 22 4 - 55

Noise immunity Excellent Very good Good

tPD (ns) 1 - 200 1.5 – 33 1 - 4

Key Points

• Physical gates are not ideal components

• Logic gates are manufactured in a range of logic families

• The ability of a gate to ignore noise is its ‘noise immunity’

• Both MOSFETs and bipolar transistors are used in gates

• All logic gates exhibit a propagation delay when responding to changes in their inputs

• The most widely used logic families are CMOS and TTL

• CMOS is available in a range of forms offering high speed or very low power consumption

• TTL logic is also produced in many versions, each optimised for a particular characteristic

• Unconnected (floating) inputs.– On any TTL IC, all of the inputs are 1s if they

are not connected to some logic signal.• An input left unconnected, it is said to be floating

Three ways to handle unused logic inputs.

• Frequently, not all inputs on a TTL IC are being used in a particular application.

– A common example is when not all the inputs to a logic gate are needed for the required logic function.

– Unused input can be connected to +5V through a1k-Ohm resistor, so the logic level is a 1.

– A third possibility is where the unused input is tiedto a used input.

• Most of the MOS digital ICs are constructed entirely of MOSFETs and no other components.– MOSFETs are relatively simple and inexpensive

to fabricate, small, and consume very little power.

• The principal disadvantage of MOS devices is their susceptibility to static-electricity damage. – Although minimized by proper handling, TTL

is still more durable for laboratory experimentation

CMOS Series Characteristics – Static Sensitivity

• Precautions against Electrostatic discharge:– Connect the chassis of all test instruments,

soldering-iron tips, and your metal workbench to earth ground.

– Connect yourself to ground with a special wrist strap.

– Keep ICs in conductive foam or aluminum foil.• So no dangerous voltages develop between any

pins.

– Avoid touching IC pins—insert the IC into the circuit immediately after removing from the protective carrier.

– Place shorting straps across the edge connectors of PC boards when the boards are carried/transported.• Avoid touching the edge connectors.

– Do not leave any unused IC inputs unconnected.• Open inputs tend to pick up stray static charges