smps topology

7/29/2019 SMPS topology

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SMPS topologies

Hello,

I want to open a topic with my latest research findings regarding trafo designs for

DIY SMPS. This info is took from friends, internet so maybe nothing new but I thinkcould be persons not familiar with all these aspects.

I would like to begin with smps topologies, as far as I read there are 2 main classes

for SMPS: feed forward converters and push pull converters.

Feed Forward converteres have the advantage of using less switching elements,cheaper elements: ex. replacing 1 transistor with a diode or 2 transistors from the

full bridge with 2 diodes. But the big disadvantage is they use the B in only one

direction having higher chances of saturating the core. You can see in attacheddocument. Due to this you have not only the disadvantage of using the trafo at half

of the maximum power also you can add the Br with is the magnetic remanencewhich lower even more to ~40% of the maximum power.

Push Pull Converters like half bridge, full bridge, 2 transistor push-pull. Those

converters have the advantage of using the core to maximum power using themaximum B swing from - to + B. Because the current is circulating in 2 directions

having less chances of saturating the core. But the disadvantages could be usingboostrap drivers like IRS21xxx having some charge-pump to drive the highside or

GDT transformers so more elements needed.
http://i.imgur.com/ZAAJW.png


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For design equations I use pretty simple formulas likethey can be adapted depending

on each topology like Vin/2 or stuff like this)

Minimum nr or turns per primary winding:(imporntant here is Bs = ~Bs - Br for feed forward topology and Bs = 2xBs for push

pull)

T = ON switch time

Nr of turns per secondary winding:

Core maximum power transfer.
http://i.imgur.com/6bpD6.pnghttp://i.imgur.com/llpHp.pnghttp://i.imgur.com/cKz9w.png


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This formula is based on current density of 420A/cm2 in the windings, and assumesa window

utilization of 40% copper. At low frequencies, the flux swing is limited by saturation,but above 50kHz (ferrite), B is usually limited by core losses. Use the B value that

results in a core loss of 100mW/cm 3 (2times the flux density given in the corelosscurves).

Capacitors estimations

DC blocking cap calculations:

Input capacitor:

Primary peak current and rms current:
http://i.imgur.com/Z1aET.pnghttp://i.imgur.com/DbJRZ.pnghttp://i.imgur.com/hYaKc.png


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All formulas from above are implemented successfully in the software "ExcellentIT-

En(4000)" and on Halbbrucken the german online calculator. I've try them andobtained similar results.

With this in mind you must start building the transformer. Better to separate theprimary and secondary with PVC shild tape, if you need 2 primary windings for push

pull and supply to 325Vdc you might use the method of using 2 wires in parallel butnot sure if the wire isolation laquer will stand up to 650V what do you think?

Another think you must choose your transistors for the converter and to be capableto withstand the input currents, and the breakdown voltage should be high enough

not to punchthrough the transistor jonction.

Better to mount transistors on heatsinks and monitor the temperature when testing.Put snubbers only if necessary, this you can check with an oscilloscope. For example

check the Vds on Low side transistor. This you can do safe without any galvanicisolation for the oscilloscope.

Testing. Here I had an interesting idea. To test backwards is more convinient due tosmall voltage on secondary and less danger, not to pop-up the MOS like popcorn. So

you must reverse the primary and secondary and connect on your half, full bridgewhat ever topology you have... use the frequency as in calculation above and

increase the voltage slowly monitoring the current shape with an oscilloscope wouldbe better on primary if the current is going liniar then is ok if the slope is changing

going steeper then this is a sign of saturation and you must avoid that area byincreasing frequency or modify the nr of turns or lowering the Vin voltage(usually

this you cannot do). Please correct me if I'm wrong.Also I saw the primary inductance saturation phenomen is not influenced by the

secondary's load. So why not testing at the beggining without load to check wherethe saturation ocours and to recalibrate your calculations and evreything. For more

details like pictures nr of turns evreything on this I will come up with another post.

Special thanks to Mihai (Mgm2000).

Much of the info was took from:http://www.lodestonepacific.com/dist...tion_Notes.pdf

http://www.ti.com/lit/ml/slup126/slup126.pdfhttp://www.ti.com/lit/ml/slup083/slup083.pdf

I will continue with 2 more topics like: Testing trafo backwards and Full bridge

converter functionality -> an aspect of energy circulation between primary windingand Vin capacitor.
http://schmidt-walter.eit.h-da.de/smps_e/trafo_hilfe_e.htmlhttp://www.lodestonepacific.com/distrib/pdfs/Magnetics/Design_Application_Notes.pdfhttp://www.ti.com/lit/ml/slup126/slup126.pdfhttp://www.ti.com/lit/ml/slup083/slup083.pdfhttp://i.imgur.com/E07gq.pnghttp://www.lodestonepacific.com/distrib/pdfs/Magnetics/Design_Application_Notes.pdfhttp://www.ti.com/lit/ml/slup126/slup126.pdfhttp://www.ti.com/lit/ml/slup083/slup083.pdfhttp://schmidt-walter.eit.h-da.de/smps_e/trafo_hilfe_e.html

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