SMSC Debugger Toolset Overview

By Jesse ChangVersion 1.5

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Introduction

The Pegasus debugger Toolset provides a full set of integrated tools helpful to PC keyboard controller hardware and firmware development during the design phase.

A fully configured design will support a USB2.0 based high speed serial flash programmer, a USB2.0 based trace debugger, a UART based ROM monitor, and a UART based serial flash programmer.

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Pegasus Mechanical Description

PEGASUS PCB OVERVIEW

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Connection to KBC/EC 1100 EVB via target connector

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System Development SMSC KBC/EC 1100 Environment (Pegasus Toolkit)

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KBC1100 INTERFACE FOR FIRMWARE DEVELOPMENT

PIN NAME DESCRIPTON

1. GPIO20 / 8051RX 8051-Driven 16550 UART Receive Pin

2. GPIO21 / 8051TX 8051-Driven 16550 UART Transmit Pin

3. LGPIO77 / 1.8432MHz_IN

8051-Driven 16550 UART External Baud Clock Input

4. GPIO73/MSCLK MCU Serial Debug Port Clock Pin

5. GPIO74/MSDATA MCU Serial Debug Port Data Pin

6. GPIO39/TF_RESET Trace FIFO Reset Pin

7. Vcc

8. GND

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PEGASUS TARGET CONNECTOR AND SIGNAL

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1 2

3 4

5 6

7 89 10

11 12

13 14

1

357

9

11

13

2

468

10

12

14

2 x 7 Shrouded Male Header0.025" Sq Posts, 0.100" on Center

Pin Signal Pin Signal

1 8051_TX 2 Vcc(5/3.3)

3 8051_RX 4 Vcc(5/3.3)

5 FIFO_FULL 6 GND

7 TF_RESET/

CSSRT0_nCTSnRTS_nSS

8 OPEN for 1.8432MHz_in

9 MSDATA/CSSRT0_SCL

K

10 GND

11 MSCLK/CSSRT0_TX_

RX

12 GND

13 1.8432MHz 14 GND

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USB-TO-TARGET CONNECTOR CONFIGURATION

The SMSC Debug Trace environment was designed for the purpose of easing BIOS development, firmware development, and system debug. The trace method developed by SMSC is non-intrusive, minimizing the debugging tool’s impact on actual code implementation. Data is written to either the FLASH Memory bus or the SMSC Serial Debug Port (for targets that have one) in a very low overhead format. The extra XDATA space writes (0x7FBA) make only marginal differences in code execution speed. Furthermore, this method allows debug data to be gathered without activation of any normally unused chip hardware, such as the serial port, making it more closely emulate the actual firmware implementation.

Firmware coding for Pegasus board initialization rMultiplx_12_95_88 = 0x08; // MMCR 0x7f65 rMultiplx_12_95_88 == 0x08 for TFIFO INIT.

rGPIO_N_DIR_45_38 |= 0x02; // Set 0x7FCC bit 1, which sets GPIO39's direction as output.

// the default output is low (0).

rGPIO_N_OUT_45_38 |= 0x02; // Set 0x7FCD bit 1, which sets GPIO39 output as Hi to release // Pegasus's reset signal.

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SMSC Debug Trace acquisizer Either Windows 2000 or Windows XP operation system is required. There is no installation program. Just copy USB_DFT.exe to a working

directory and execute it after trace FIFO board is connected.

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UART CONFIGURATION

Serial FLASH Programmer

The SMSC Serial Flash Programming Interface is used as a remedial measure for Flash crisis recovery. When the VCC1 supply is asserted, the SFPI_EN strap option can enable the Serial Flash Programming Interface. An external 1.8432MHz clock must be provided using the 1.8432MHZ_IN pin, which is an alternate function of the LGPIO77 pin. When the Serial Flash Programming Interface is enabled, the 8051 executes bootstrap code from a small internal ROM that allows the 8051 to send and receive data using the 8051-Driven 16550 UART to download firmware to the 8051 Scratch Memory. This firmware can be used to reprogram the Flash.

This feature of this configuration is intended for use with the SMSC Serial FLASH Programming Utility.

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Serial FLASH Programming Utility

Using the Serial Flash Programming Interface an SMSC KBC device’s 8051 can execute bootstrap code from a small internal ROM. That code allows the 8051 to send and receive data using its 16550 UART to download firmware to Scratch Memory.

Also provides a compact set of debug capabilities.

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Serial FLASH Programming Utility Installation

Boot the Host PC to Windows 2000 or Windows XP. Execute the SFPU installation program setup.exe. Follow the on screen instructions.

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GUI of Serial FLASH Programming Utility (Flash Update)

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GUI of Serial FLASH Programming Utility (Debugger : Read From Scratch ROM )

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GUI of Serial FLASH Programming Utility (Debugger : Write Internal Memory )

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Connection to Pegasus companion KBC/EC 1100 EVB Via UART

Directly Without Pegasus

RS232 NULL MODEM

ROM EMULATOR CONNECTION

(Pin 2 (Tx) and Pin 3 (Rv) are connected crosswise)

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KBC1100 EVB UNIROM HEADER PIN-OUTS FOR ROM EMULATOR

A ROM emulator usually connects to the target board using a ribbon cable. One end of the ribbon cable has a DIP connector that plugs into a FLASH memory socket and the other end has an IDS connector that plugs into the ROM emulator. If your ROM emulator connector has one of the following IDS pin-outs, then it can be used with the KBC1100 EVB.

Note: The EconoROMIII and UniROM from TechTools have a IDS pin-out A connector

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REWORK FOR CONNECTING WITH LEAP ROM EMULATOR

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Terminal Display of KBC/EC 1100 Demo program (UART connecting directly)

THE END