software architecture of the 8088 and 8086
TRANSCRIPT
Microsoft PowerPoint - C15_LECTURE_NOTE_02.ppt 611 37100 Lecture
02-2
SOFTWARE ARCHITECTURE OF THE 8088 AND 8086 MICROPROCESSORS
2.1 Microarchitecture of the 8088/8086 Microprocessor
2.2 Software Model of the 8088/8086 Microprocessor 2.3 Memory Address Space and Data Organization 2.4 Data Types 2.5 Segment Registers and Memory Segmentation 2.6 Dedicated, Reserved, and General-Used Memory 2.7 Instruction Pointer
2
SOFTWARE ARCHITECTURE OF THE 8088 AND 8086 MICROPROCESSORS
2.8 Data Registers 2.9 Pointer and Index Register 2.10 Status Register 2.11 Generating a Memory Address 2.12 The Stack 2.13 Input/Output Address Space
611 37100 Lecture 02-4
2.1 Microarchitecture of the 8088/8086 Microprocessor
8088/8086 both employ parallel processing 8088/8086 contain two processing unit – the bus interface unit (BIU) and execution unit (EU) The bus interface unit is the path that 8088/8086 connects to external devices. The system bus includes an 8-bit bidirectional data bus for 8088 (16 bits for the 8086), a 20-bit address bus, and the signal needed to control transfers over the bus.
3
2.1 Microarchitecture of the 8088/8086 Microprocessor
Components in BIU Segment register The instruction pointer Address generation adder Bus control logic Instruction queue
Components in EU Arithmetic logic unit, ALU Status and control flags General-purpose registers Temporary-operand registers
611 37100 Lecture 02-6
2.1 Microarchitecture of the 8088/8086 Microprocessor
Pipeline architecture of the 8086/8088 microprocessors
MPU
2.1 Microarchitecture of the 8088/8086 Microprocessor
EU and BIU of the 8086/8088 microprocessors
611 37100 Lecture 02-8
2.2 Software Model of the 8088/8086 Microprocessor
8088 microprocessor includes 13 16-bit internal registers.
The instruction pointer, IP Four data registers, AX, BX, CX, DX Two pointer register, BP, SP Two index register, SI, DI Four segment registers, CS, DS, SS, ES
The status register, SR, with nine of its bits implement for status and control flags. The memory address space is 1 Mbytes and the I/O address space is 64 Kbytes in length.
5
Software model of the 8088/8086 microprocessors
611 37100 Lecture 02-10
2.3 Memory Address Space and Data Organization
The 8088 microcomputer supports 1 Mbytes of external memory. The memory of an 8088-based microcomputer is organized as 8-bit bytes, not as 16-bit words.
FFFFF FFFFE FFFFD FFFFC
3 2 1 0
6
The two bytes represent the word 01010101000000102 = 550216
611 37100 Lecture 02-12
2.3 Memory Address Space and Data Organization
EXAMPLE What is the data word shown in the previous figure? Express the result in hexadecimal form. Is it stored at an even- or odd- addressed word boundary? Is it an aligned or misaligned word of data?
Solution: 111111012 = FD16 = FDH 101010102 = AA16 = AAH
Together the two bytes give the word 11111101101010102 = FDAA16 = FDAAH
Expressing the address of the least significant byte in binary form gives 0072BH = 0072B16 = 000000000111001010112 Therefore, it is misaligned word of data.
7
611 37100 Lecture 02-13
2.3 Memory Address Space and Data Organization
Even- or odd-addressed word If the least significant bit of the address is 0, the word is said to be held at an even- addressed boundary. Aligned word or misaligned word
611 37100 Lecture 02-14
2.3 Memory Address Space and Data Organization
A double word corresponds to four consecutive bytes of data stored in memory.
8
611 37100 Lecture 02-15
2.3 Memory Address Space and Data Organization
A pointer is a double word. The higher address word represents the segment base address while the lower address word represents the offset .
Example: Segment base address = 3B4C16 = 00111011010011002 Offset value = 006516 = 00000000011001012
611 37100 Lecture 02-16
2.3 Memory Address Space and Data Organization
EXAMPLE How should the pointer with segment base address equal to A00016 and offset address 55FF16 be stored at an even-address boundary starting at 0000816? Is the double word aligned or misaligned?
Solution: Storage of the two-word pointer requires four consecutive byte locations in memory, starting at address 0000816. The least- significant byte of the offset is stored at address 0000816 and is shown as FF16 in the previous figure. The most significant byte of the offset, 5516, is stored at address 0000916. These two bytes are followed by the least significant byte of the segment base address, 0016, at address 0000A16, and its most significant byte, A016, at address 0000B16. Since the double word is stored in memory starting at address 0000816, it is aligned.
9
2.4 Data Types
Integer data type Unsigned or signed integer Byte-wide or word-wide integer
D7 D0
MSB LSB
D15 D0
MSB LSB
611 37100 Lecture 02-18
2.4 Data Types The most significant bit of a signed integer is a sign bit. A zero in this bit position identifies a positive number. The range of a signed byte integer is +127 ~ -128. The range of a signed word integer is +32767 ~ -32768. The 8088 always expresses negative numbers in 2’s- complement.
D7 D0
MSB LSB
D15 D0
MSB LSB
Sign bit
2.4 Data Types
EXAMPLE A signed word integer equals FEFF16. What decimal number does it represent?
Solution: FEFF16 = 11111110111111112
The most significant bit is 1, the number is negative and is in 2’s complement form. Converting to its binary equivalent by subtracting 1 from the least significant bit and then complement all bits give
FEFF16 = -00000001000000012
611 37100 Lecture 02-20
2.4 Data Types The 8088 can also process data that is coded as binary-coded decimal (BCD) numbers. BCD data can be stored in packed or unpacked forms.
BCD Numbers
D3 D0
MSB LSB
BCD Digit
Unpacked BCD digit
Packed BCD digit
2.4 Data Types
EXAMPLE The packed BCD data stored at byte address 0100016 equals 100100012. What is the two digit decimal number?
Solution: Writing the value 100100012 as separate BCD digits gives
100100012 = 1001BCD0001BCD = 9110
611 37100 Lecture 02-22
2.4 Data Types The ASCII (American Standard Code for Information Interchange) digit
12
2.4 Data Types
EXAMPLE Byte addresses 0110016 through 0110416 contain the ASCII data 01000001, 01010011, 01000011, 01001001, and 01001001, respectively. What do the data stand for?
Solution: Using the ASCII table, the data are converted to ASCII code:
(01100H) = 010000012 = A (01101H) = 010100112 = S (01102H) = 010000112 = C (01103H) = 010010012 = I (01104H) = 010010012 = I
611 37100 Lecture 02-24
2.5 Segment Registers and Memory Segmentation
A segment represents an independently addressable unit of memory consisting of 64K consecutive byte- wide storage locations. Each segment is assigned a base address that identifies its starting point. Only four segments can be active at a time:
The code segment The stack segment The data segment The extra segment
The addresses of the active segments are stored in the four internal segment registers: CS, SS, DS, ES.
13
2.5 Segment Registers and Memory Segmentation
8088/8086
611 37100 Lecture 02-26
2.5 Segment Registers and Memory Segmentation
Four segments give a maximum of 256Kbytes of active memory.
Code segment – 64K Stack – 64K Data storage – 128K
The base address of a segment must reside on a 16- byte address boundary. User accessible segments can be set up to be contiguous, adjacent, disjointed, or even overlapping.
14
2.5 Segment Registers and Memory Segmentation
B
E
H
J
611 37100 Lecture 02-28
2.6 Dedicated, Reserved, and General- Used Memory
The dedicated memory (0000016 ~ 0001316) are used for storage of the pointers to 8088’s internal interrupt service routines and exceptions. The reserved memory (0001416 ~ 0007F16) are used for storage of the pointers to user-defined interrupts. The 128-byte dedicated and reserved memory can contain 32 interrupt pointers. The general-use memory (0008016 ~ FFFEF16) stores data or instructions of the program. The dedicated memory (FFFE016 ~ FFFEB16) are used for hardware reset jump instruction.
15
0H
RESERVED
DEDICATED
OPEN
RESERVED
DEDICATED
2.7 Instruction Pointer
The instruction pointer (IP) identifies the location of the next word of instruction code to be fetched from the current code segment of memory. The offset in IP is combined with the current value in CS to generate the address of the instruction code. During normal operation, the 8088 fetches instructions from the code segment of memory, stores them in its instruction queue, and executes them one after the other.
16
2.8 Data Registers
Data registers are used for temporary storage of frequently used intermediate results. The contents of the data registers can be read, loaded, or modified through software. The four data registers are:
Accumulator register, A Base register, B Counter register, C Data register, D
Each register can be accessed either as a whole (16 bits) for word data or as 8-bit data for byte-wide operation.
611 37100 Lecture 02-32
2.8 Data Registers
Accumulator AH AL
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2.8 Data Registers
Dedicated register functions
Variable shift and rotateCL
AL
OperationsRegister
2.9 Pointer and Index Register
The pointer registers and index registers are used to store offset addresses. Values held in the index registers are used to reference data relative to the data segment or extra segment. The pointer registers are used to store offset addresses of memory location relative to the stack segment register. Combining SP with the value in in SS (SS:SP) results in a 20-bit address that points to the top of the stack (TOS). BP is used to access data within the stack segment of memory. It is commonly used to reference subroutine parameters.
18
2.9 Pointer and Index Register
The index register are used to hold offset addresses for instructions that access data in the data segment. The source index register (SI) is used for a source operand, and the destination index (DI) is used for a destination operand. The four registers must always be used for 16-bit operations.
SP
BP
SI
DI
2.10 Status Register
The status register, also called the flags register, indicate conditions that are produced as the result of executing an instruction. Only nine bits of the register are implemented. Six of these bits represent status flags and the other three bits represent control flags The 8088 provides instructions within its instruction set that are able to use these flags to alter the sequence in which the program is executed.
19
2.10 Status Register
x x x x OF DF IF TF SF ZF x AF x PF x CF 015
Status and control bits maintained in the flags register
Generally Set and Tested Individually 9 1-bit flags in 8086; 7 are unused
611 37100 Lecture 02-38
2.10 Status Register
CF Carry Flag Arithmetic Carry/Borrow
OF Overflow Flag Arithmetic Overflow
ZF Zero Flag Zero Result; Equal Compare
SF Sign Flag Negative Result; Non-Equal Compare
PF Parity Flag Even Number of “1” bits
AF Auxiliary Carry Used with BCD Arithmetic
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2.10 Status Register
IF Interrupt Flag Enables Interrupts allows “fetch-execute” to be interrupted
TF Trap Flag Allows Single-Step for debugging; causes interrupt after each op
611 37100 Lecture 02-40
2.11 Generating a Memory Address
A logical address in the 8088 microcomputer system is described by a segment base and an offset. The physical addresses that are used to access memory are 20 bits in length. The generation of the physical address involves combining a 16-bit offset value that is located in the instruction pointer, a base pointer, an index register, or a pointer register and a 16-bit segment base value that is located in one of the segment register.
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2.11 Generating a Memory Address
Generating a physical address
ADDER
2.11 Generating a Memory Address
Boundary of a segment
2.11 Generating a Memory Address
EXAMPLE
SEGMENT BASE
2.11 Generating a Memory Address
EXAMPLE What would be the offset required to map to physical address location 002C316 if the contents of the corresponding segment register are 002A16?
Solution: The offset value can be obtained by shifting the contents of the segment of the segment register left by four bit positions and then subtracting from the physical address. Shifting left give
002A016
002C316 – 002A016 = 002316
2.11 Generating a Memory Address
Different logical addresses can be mapped to the same physical address location in memory.
2C3H 2C2H 2C1H 2C0H 2BFH 2BEH 2BDH 2BCH 2BBH 2BAH 2B9H 2B8H 2B7H 2B6H 2B5H 2B4H
2B2H 2B1H 2B0H
611 37100 Lecture 02-46
2.12 The Stack The stack is implemented for temporary storage of information such as data or addresses. The stack is 64KBytes long and is organized from a software point of view as 32K words. The contents of the SP and BP registers are used as offsets into the stack segment memory while the segment base value is in the SS register. Push instructions (PUSH) and pop instructions (POP) Top of the stack (TOS) and bottom of the stack (BOS) The 8088 can push word-wide data and address information onto the stack from registers or memory. Many stacks can exist but only one is active at a time.
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2.12 The Stack
2.12 The Stack
EXAMPLE Push operation
ABOS = 0105016 +FFFE16
2.12 The Stack
EXAMPLE Pop operation
2.13 Input/Output Address Space
The 8088 has separate memory and input/output (I/O) address space. The I/O address space is the place where I/O interfaces, such as printer and terminal ports, are implemented. The I/O address range is from 000016 to FFFF16. This represents 64KByte addresses. The I/O addresses are 16 bits long. Each of these addresses corresponds to one byte-wide I/O port. Certain I/O instructions can only perform operations to addresses 000016 thru 00FF16 (page 0).
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2.13 Input/Output Address Space
SOFTWARE ARCHITECTURE OF THE 8088 AND 8086 MICROPROCESSORS
2.1 Microarchitecture of the 8088/8086 Microprocessor
2.2 Software Model of the 8088/8086 Microprocessor 2.3 Memory Address Space and Data Organization 2.4 Data Types 2.5 Segment Registers and Memory Segmentation 2.6 Dedicated, Reserved, and General-Used Memory 2.7 Instruction Pointer
2
SOFTWARE ARCHITECTURE OF THE 8088 AND 8086 MICROPROCESSORS
2.8 Data Registers 2.9 Pointer and Index Register 2.10 Status Register 2.11 Generating a Memory Address 2.12 The Stack 2.13 Input/Output Address Space
611 37100 Lecture 02-4
2.1 Microarchitecture of the 8088/8086 Microprocessor
8088/8086 both employ parallel processing 8088/8086 contain two processing unit – the bus interface unit (BIU) and execution unit (EU) The bus interface unit is the path that 8088/8086 connects to external devices. The system bus includes an 8-bit bidirectional data bus for 8088 (16 bits for the 8086), a 20-bit address bus, and the signal needed to control transfers over the bus.
3
2.1 Microarchitecture of the 8088/8086 Microprocessor
Components in BIU Segment register The instruction pointer Address generation adder Bus control logic Instruction queue
Components in EU Arithmetic logic unit, ALU Status and control flags General-purpose registers Temporary-operand registers
611 37100 Lecture 02-6
2.1 Microarchitecture of the 8088/8086 Microprocessor
Pipeline architecture of the 8086/8088 microprocessors
MPU
2.1 Microarchitecture of the 8088/8086 Microprocessor
EU and BIU of the 8086/8088 microprocessors
611 37100 Lecture 02-8
2.2 Software Model of the 8088/8086 Microprocessor
8088 microprocessor includes 13 16-bit internal registers.
The instruction pointer, IP Four data registers, AX, BX, CX, DX Two pointer register, BP, SP Two index register, SI, DI Four segment registers, CS, DS, SS, ES
The status register, SR, with nine of its bits implement for status and control flags. The memory address space is 1 Mbytes and the I/O address space is 64 Kbytes in length.
5
Software model of the 8088/8086 microprocessors
611 37100 Lecture 02-10
2.3 Memory Address Space and Data Organization
The 8088 microcomputer supports 1 Mbytes of external memory. The memory of an 8088-based microcomputer is organized as 8-bit bytes, not as 16-bit words.
FFFFF FFFFE FFFFD FFFFC
3 2 1 0
6
The two bytes represent the word 01010101000000102 = 550216
611 37100 Lecture 02-12
2.3 Memory Address Space and Data Organization
EXAMPLE What is the data word shown in the previous figure? Express the result in hexadecimal form. Is it stored at an even- or odd- addressed word boundary? Is it an aligned or misaligned word of data?
Solution: 111111012 = FD16 = FDH 101010102 = AA16 = AAH
Together the two bytes give the word 11111101101010102 = FDAA16 = FDAAH
Expressing the address of the least significant byte in binary form gives 0072BH = 0072B16 = 000000000111001010112 Therefore, it is misaligned word of data.
7
611 37100 Lecture 02-13
2.3 Memory Address Space and Data Organization
Even- or odd-addressed word If the least significant bit of the address is 0, the word is said to be held at an even- addressed boundary. Aligned word or misaligned word
611 37100 Lecture 02-14
2.3 Memory Address Space and Data Organization
A double word corresponds to four consecutive bytes of data stored in memory.
8
611 37100 Lecture 02-15
2.3 Memory Address Space and Data Organization
A pointer is a double word. The higher address word represents the segment base address while the lower address word represents the offset .
Example: Segment base address = 3B4C16 = 00111011010011002 Offset value = 006516 = 00000000011001012
611 37100 Lecture 02-16
2.3 Memory Address Space and Data Organization
EXAMPLE How should the pointer with segment base address equal to A00016 and offset address 55FF16 be stored at an even-address boundary starting at 0000816? Is the double word aligned or misaligned?
Solution: Storage of the two-word pointer requires four consecutive byte locations in memory, starting at address 0000816. The least- significant byte of the offset is stored at address 0000816 and is shown as FF16 in the previous figure. The most significant byte of the offset, 5516, is stored at address 0000916. These two bytes are followed by the least significant byte of the segment base address, 0016, at address 0000A16, and its most significant byte, A016, at address 0000B16. Since the double word is stored in memory starting at address 0000816, it is aligned.
9
2.4 Data Types
Integer data type Unsigned or signed integer Byte-wide or word-wide integer
D7 D0
MSB LSB
D15 D0
MSB LSB
611 37100 Lecture 02-18
2.4 Data Types The most significant bit of a signed integer is a sign bit. A zero in this bit position identifies a positive number. The range of a signed byte integer is +127 ~ -128. The range of a signed word integer is +32767 ~ -32768. The 8088 always expresses negative numbers in 2’s- complement.
D7 D0
MSB LSB
D15 D0
MSB LSB
Sign bit
2.4 Data Types
EXAMPLE A signed word integer equals FEFF16. What decimal number does it represent?
Solution: FEFF16 = 11111110111111112
The most significant bit is 1, the number is negative and is in 2’s complement form. Converting to its binary equivalent by subtracting 1 from the least significant bit and then complement all bits give
FEFF16 = -00000001000000012
611 37100 Lecture 02-20
2.4 Data Types The 8088 can also process data that is coded as binary-coded decimal (BCD) numbers. BCD data can be stored in packed or unpacked forms.
BCD Numbers
D3 D0
MSB LSB
BCD Digit
Unpacked BCD digit
Packed BCD digit
2.4 Data Types
EXAMPLE The packed BCD data stored at byte address 0100016 equals 100100012. What is the two digit decimal number?
Solution: Writing the value 100100012 as separate BCD digits gives
100100012 = 1001BCD0001BCD = 9110
611 37100 Lecture 02-22
2.4 Data Types The ASCII (American Standard Code for Information Interchange) digit
12
2.4 Data Types
EXAMPLE Byte addresses 0110016 through 0110416 contain the ASCII data 01000001, 01010011, 01000011, 01001001, and 01001001, respectively. What do the data stand for?
Solution: Using the ASCII table, the data are converted to ASCII code:
(01100H) = 010000012 = A (01101H) = 010100112 = S (01102H) = 010000112 = C (01103H) = 010010012 = I (01104H) = 010010012 = I
611 37100 Lecture 02-24
2.5 Segment Registers and Memory Segmentation
A segment represents an independently addressable unit of memory consisting of 64K consecutive byte- wide storage locations. Each segment is assigned a base address that identifies its starting point. Only four segments can be active at a time:
The code segment The stack segment The data segment The extra segment
The addresses of the active segments are stored in the four internal segment registers: CS, SS, DS, ES.
13
2.5 Segment Registers and Memory Segmentation
8088/8086
611 37100 Lecture 02-26
2.5 Segment Registers and Memory Segmentation
Four segments give a maximum of 256Kbytes of active memory.
Code segment – 64K Stack – 64K Data storage – 128K
The base address of a segment must reside on a 16- byte address boundary. User accessible segments can be set up to be contiguous, adjacent, disjointed, or even overlapping.
14
2.5 Segment Registers and Memory Segmentation
B
E
H
J
611 37100 Lecture 02-28
2.6 Dedicated, Reserved, and General- Used Memory
The dedicated memory (0000016 ~ 0001316) are used for storage of the pointers to 8088’s internal interrupt service routines and exceptions. The reserved memory (0001416 ~ 0007F16) are used for storage of the pointers to user-defined interrupts. The 128-byte dedicated and reserved memory can contain 32 interrupt pointers. The general-use memory (0008016 ~ FFFEF16) stores data or instructions of the program. The dedicated memory (FFFE016 ~ FFFEB16) are used for hardware reset jump instruction.
15
0H
RESERVED
DEDICATED
OPEN
RESERVED
DEDICATED
2.7 Instruction Pointer
The instruction pointer (IP) identifies the location of the next word of instruction code to be fetched from the current code segment of memory. The offset in IP is combined with the current value in CS to generate the address of the instruction code. During normal operation, the 8088 fetches instructions from the code segment of memory, stores them in its instruction queue, and executes them one after the other.
16
2.8 Data Registers
Data registers are used for temporary storage of frequently used intermediate results. The contents of the data registers can be read, loaded, or modified through software. The four data registers are:
Accumulator register, A Base register, B Counter register, C Data register, D
Each register can be accessed either as a whole (16 bits) for word data or as 8-bit data for byte-wide operation.
611 37100 Lecture 02-32
2.8 Data Registers
Accumulator AH AL
17
2.8 Data Registers
Dedicated register functions
Variable shift and rotateCL
AL
OperationsRegister
2.9 Pointer and Index Register
The pointer registers and index registers are used to store offset addresses. Values held in the index registers are used to reference data relative to the data segment or extra segment. The pointer registers are used to store offset addresses of memory location relative to the stack segment register. Combining SP with the value in in SS (SS:SP) results in a 20-bit address that points to the top of the stack (TOS). BP is used to access data within the stack segment of memory. It is commonly used to reference subroutine parameters.
18
2.9 Pointer and Index Register
The index register are used to hold offset addresses for instructions that access data in the data segment. The source index register (SI) is used for a source operand, and the destination index (DI) is used for a destination operand. The four registers must always be used for 16-bit operations.
SP
BP
SI
DI
2.10 Status Register
The status register, also called the flags register, indicate conditions that are produced as the result of executing an instruction. Only nine bits of the register are implemented. Six of these bits represent status flags and the other three bits represent control flags The 8088 provides instructions within its instruction set that are able to use these flags to alter the sequence in which the program is executed.
19
2.10 Status Register
x x x x OF DF IF TF SF ZF x AF x PF x CF 015
Status and control bits maintained in the flags register
Generally Set and Tested Individually 9 1-bit flags in 8086; 7 are unused
611 37100 Lecture 02-38
2.10 Status Register
CF Carry Flag Arithmetic Carry/Borrow
OF Overflow Flag Arithmetic Overflow
ZF Zero Flag Zero Result; Equal Compare
SF Sign Flag Negative Result; Non-Equal Compare
PF Parity Flag Even Number of “1” bits
AF Auxiliary Carry Used with BCD Arithmetic
20
2.10 Status Register
IF Interrupt Flag Enables Interrupts allows “fetch-execute” to be interrupted
TF Trap Flag Allows Single-Step for debugging; causes interrupt after each op
611 37100 Lecture 02-40
2.11 Generating a Memory Address
A logical address in the 8088 microcomputer system is described by a segment base and an offset. The physical addresses that are used to access memory are 20 bits in length. The generation of the physical address involves combining a 16-bit offset value that is located in the instruction pointer, a base pointer, an index register, or a pointer register and a 16-bit segment base value that is located in one of the segment register.
21
2.11 Generating a Memory Address
Generating a physical address
ADDER
2.11 Generating a Memory Address
Boundary of a segment
2.11 Generating a Memory Address
EXAMPLE
SEGMENT BASE
2.11 Generating a Memory Address
EXAMPLE What would be the offset required to map to physical address location 002C316 if the contents of the corresponding segment register are 002A16?
Solution: The offset value can be obtained by shifting the contents of the segment of the segment register left by four bit positions and then subtracting from the physical address. Shifting left give
002A016
002C316 – 002A016 = 002316
2.11 Generating a Memory Address
Different logical addresses can be mapped to the same physical address location in memory.
2C3H 2C2H 2C1H 2C0H 2BFH 2BEH 2BDH 2BCH 2BBH 2BAH 2B9H 2B8H 2B7H 2B6H 2B5H 2B4H
2B2H 2B1H 2B0H
611 37100 Lecture 02-46
2.12 The Stack The stack is implemented for temporary storage of information such as data or addresses. The stack is 64KBytes long and is organized from a software point of view as 32K words. The contents of the SP and BP registers are used as offsets into the stack segment memory while the segment base value is in the SS register. Push instructions (PUSH) and pop instructions (POP) Top of the stack (TOS) and bottom of the stack (BOS) The 8088 can push word-wide data and address information onto the stack from registers or memory. Many stacks can exist but only one is active at a time.
24
2.12 The Stack
2.12 The Stack
EXAMPLE Push operation
ABOS = 0105016 +FFFE16
2.12 The Stack
EXAMPLE Pop operation
2.13 Input/Output Address Space
The 8088 has separate memory and input/output (I/O) address space. The I/O address space is the place where I/O interfaces, such as printer and terminal ports, are implemented. The I/O address range is from 000016 to FFFF16. This represents 64KByte addresses. The I/O addresses are 16 bits long. Each of these addresses corresponds to one byte-wide I/O port. Certain I/O instructions can only perform operations to addresses 000016 thru 00FF16 (page 0).
26
2.13 Input/Output Address Space