SolidSolid--State Spatial Combiner Modules for TWT State Spatial Combiner Modules for TWT ReplacementReplacement

Bob YorkUniversity of California,Santa Barbara

Redstone ArsenalApril 5-6, 2000

AcknowledgementAcknowledgement

Dr. Edgar Martinez DARPA ETODr. Nick Cheng ConextantDr. Angelos Alexanian RF Micro DevicesDr. Elliot Brown UCLA (formerly DARPA)Dr. James Harvey ARODr. Michael Case HRL LaboratoriesDr. David Rensch HRL LaboratoriesDr. Michael Steer NC State UniversityVicki Chen UCSBPengcheng Jia UCSBProf. Dave Rutledge Caltech MURI Director

OutlineOutline

•Spatial Power Combining

•Waveguide-based Combiners

•X-band Array Development (MAFET)

•K-band and Coaxial Systems

•Projections and Summary

KK--band SSPA Benchmark Databand SSPA Benchmark Data

20

25

30

35

40

45

50

55

60

65

70

0.1 1 10

HRL K4 (Amplifier)HRL K4 (Load Pull)HRL K3TRWTIMartin mariettaAvantekMIT

Power Added Efficiency, %

Output Power, Watts

1996 Industry Trend

18 GHz Power Devices: Industry ComparisonSource: Mike Delaney, Hughes Space & Communications, El Segundo, CA

Path to Broadband PowerPath to Broadband Power

• High efficiency favors small-area devicesHeat removal (see empirical chart)

• Broad bandwidth favors small-area devicesSmall Cgs and high output impedance

• Lower phase noise favors large number of devicesExcess phase noise goes as 1/N

Conclusion:Conclusion:Use a large number of small devices for broadband power

Efficient broadband combining of many devices favors spatial combining

AROMURI

Spatial vs. CorporateSpatial vs. Corporate

Using general expression for system PAE shown earlier:Assumes: G=10, ηa = 50%

Typical numbers at X-band:• Corporate: 0.15 dB loss/stage

• Spatial: 0.5dB output loss

• Transition point: N≈≈≈≈16

When does it make sense to use a spatial combiner?

Combining efficiency:• Binary Wilkinson tree, η η η η =Lk,

where L=loss per stage, k=number of stages

• Spatial combiner: η η η η =L0

(independent of number of amplifiers)

15

20

25

30

35

40

45

50

1 10 100 1000

L = 0.1dB (Corporate)L = 0.2dB (Corporate)L = 0.3dB (Corporate)L = 0.5dB (Spatial)L = 1.0dB (Spatial)L = 1.5dB (Spatial)

Pow

er A

dded

Effi

cien

cy, %

Number of Amplifiers

AROMURI

Array Architectures inArray Architectures inSpatial Power CombiningSpatial Power Combining

• normal incident/outgoing wavesnormal incident/outgoing waves•• limited bandwidth in generallimited bandwidth in general•• challenge in thermal managementchallenge in thermal management

Tile ApproachTile Approach

Tray ApproachTray Approach

• parallel incident/outgoing wavesparallel incident/outgoing waves•• broadband characteristicsbroadband characteristics•• good heatgood heat--sinking propertysinking property

AROMURI

Inputwave

Tapered-slottransition

Input wave

Outputwave

Rectangularwaveguide

Microstrip

Rectangularwaveguide

! Broadband antenna arrays! Waveguide environment! Slotline-to-microstrip transition! Off-the-shelf MMIC amplifiers! Hybrid circuit configuration! Ceramic substrate with good thermal conductivity

GuidedGuided--Wave Spatial CombinerWave Spatial Combiner

MMIC amplifiers

US Patent: 5,736,908 Awarded April 7, 1998 (University of California)

DARPA

Circuit TopologyCircuit Topology

M MIC Amplifier

Tapered-SlotAntenna

M icrostripTran sformer

Modular Tray ArchitectureModular Tray Architecture

Excellent Thermal PropertyExcellent Thermal Property

High Power PerformanceHigh Power Performance

Broadband CharacteristicsBroadband Characteristics

• Ease of Operation & Maintenance

• MMICs Directly Attached to Test Fixture

• Capability for Large Scale Integration

• Adapt to Different Device Technology

. . . . .

. . . . .

. . . . .

. . . . .

DARPA

Loss, Gain, PAE

dca

ia

dca

iaoaa P

PGP

PP )1( −=−=η

60

65

70

75

80

85

90

95

100

4.0 6.0 8.0 10.0 12.0 14.0 16.0 18.0 20.0

Normalized PAE, %

Power Amplifier Gain (linear)

Li = L

o=-0.2 dB

Li = L

o=-0.5 dB

Li = L

o=-1.0 dB

Combining Efficiency

Single Amplifier Cell

N-way Combiner System

Splitter CombinerPia

G

Poa

Pdca

Li Lo

Pi Po

ai

oi

dca

ioi

dc

iosys GL

GLLNP

PGLLP

PP ηη)1()1()1(

−−=−=−=

Pia

G

Poa

Pdca

gainhigh for oasys Lηη →

Conclusions: → Output losses alone determine ultimate performance of a combiner→ Input losses can be overcome by pre-amplification

PAE of pre-amplified system can easily approach combining efficiency based on output losses only

DARPA

88--MMIC (4 tray) CombinerMMIC (4 tray) Combiner

!CW Operation (2x4 Array)!Pout, max = 42.9W!Combining Efficiency � 70%!Gain = 15.1 � 1.2dB @ 2dB Gain

Compression

0

10

20

30

40

50

60

0

10

20

30

40

50

60

8.0 8.5 9.0 9.5 10.0 10.5 11.0

Pin,

dB

m Gain, dB

Frequency, GHz

Gain Variation = 2.4dBGain

Pin

PoutPout, max = 42.9W at 8.7GHz

Primary Sponsorship through DARPA MAFET

Results presented at 1998 IEEE MTT Symposium (Baltimore), N.-S. Cheng and R. A. York, “20 Watt Spatial Power Combiner in Waveguide,”

DARPA

TI 9083 MMIC AmplifierTI 9083 MMIC Amplifier

• 6.5 to 11.5-GHz Frequency Range

• 5-Watt Output Power at 7V, 6-Watt at 8V

• 18-dB Typical Small Signal Gain

• 35% Power Added Efficiency at 7V, 30% PAE at 8 Volt Bias

• 12-dB Typical Input Return Loss, 9-dB Typical Output Return Loss

• On-chip Active Bias Circuit Option Simplifies Biasing

We wish to acknowledge the generous support of TriQuint/TI in providing a large quantity of these excellent devices at a substantial discount to the University and MAFET project5.0

5.5

6.0

6.5

7.0

7.5

8.0

8.5

8.0 8.5 9.0 9.5 10.0 10.5 11.0

MMIC #1MMIC #2MMIC #3MMIC #4

MMIC #5MMIC #6MMIC #7MMIC #8

Out

put R

F Po

wer

, W

Frequency, GHz

DARPA

40W X40W X--band Array Databand Array Data

0

10

20

30

40

50

60

-10

0

10

20

30

40

50

8.0 8.5 9.0 9.5 10.0 10.5 11.0

Pout

, dB

m Gain, dB

Frequency, GHz

-- 8 MMICs-- 7 MMICs-- 6 MMICs

-30

-25

-20

-15

-10

-5

0

8.0 8.5 9.0 9.5 10.0 10.5 11.0

Ret

urn

Loss

, dB

Frequency, GHz

! Return Loss < -10dB! Psat = 43.1W at 8.7GHz! Linear Gain = 18.2dB! Graceful Degradation

41

42

43

44

45

46

47

48

13

14

15

16

17

18

19

20

25 26 27 28 29 30 31 32

Pout

, dB

m Gain, dB

Pin, dBm

Psat = 43.1WGain, linear = 18.2dB

Return Loss MeasurementReturn Loss Measurement

Pout vs. Pin MeasurementPout vs. Pin MeasurementGracefulGraceful

DegradationDegradation

Results using 8 MMIC (4Results using 8 MMIC (4--tray) Array tray) Array ConfigurationConfiguration

DARPA

Design of Finline ArraysDesign of Finline Arrays

! Target slotline gaps are specified at both ends! Operating band is specified! Taper length and shape optimized to minimize return loss over the

band

gap size chosen to match waveguide openingß Z0 and b0

gap size chosen to preset valueß ZL and bL

Taper ShapeTo Be

DeterminedMMIC amplifiers

Layout of a single antenna card

Complication: wave impedances and propagation constants are all functions of frequency. Standard taper theory is based on TEM guides.

taper length, L

DARPA

Computational ResultsComputational Results

0 . 2 0 . 4 0 . 6 0 . 8 1

No r m a lize d S lo t W id th, 2 g /b

0 . 5

1

1 . 5

2

2 . 5

3

3 . 5

4

7 GH z

1 2 GH z

b

g

0 ac

x

y

! 2x2 finline array in standard WR-90 waveguide! Propagation constant (effective permittivity) calculated for

expected slot widths and frequencies using SDM! Optimized taper designed for S11 < -20dB from 8-12 GHz

Theory assumes taper is matchedNeed to know target slot-line characteristic impedance

0 0.25 0.5 0.75 1 1.25 1.5 1.750

0.2

0.4

0.6

0.8

1

n or m

aliz

e d g

ap w

idth

Position along taper, cm

optimized taper

DARPA

-30

-25

-20

-15

-10

-5

0

7.5 8.5 9.5 10.5 11.5 12.5

Measured (100 Ohm termination)Theory

Ref

lect

ion

coef

ficie

nt, d

B

Frequency, GHz

Two Card Array, optimized taper10mil AlN substrate4mm card spacing

Passive Return Loss Passive Return Loss MeasurementMeasurement

! Theoretical and measured results agree quite well

! Suggests additional impedance transformation needed for 50W MMIC amplifiers

! Microstrip transformer terminated with 50W chip resistor

! Return loss <-15dB for X-band for 2-card system

Slotline Antenna with Microstrip Taper

Simulation vs. Measurement

-35

-30

-25

-20

-15

-10

-5

0

8.50 9.00 9.50 10.0 10.5 11.0 11.5 12.0

Ret

urn

Loss

, dB

Frequency, GHz

DARPA

Thermal SimulationsThermal Simulations

Copper carrier, 24 elements (120 W)Four (4) 5-Watt MMICs per tray

Results from Tanner Thermal Simulator

More cards in standard aperture→→→→ thinner cards

Copper fixture doubles thermal capacity

Air-cooled heatsink system will be employed

DARPA

UCSB/HRL 120W SystemUCSB/HRL 120W System

!! CW Operation (6x4 Array)CW Operation (6x4 Array)!! 4 MMICs on each tray4 MMICs on each tray!! Pout, max = 126W at 8.1GHzPout, max = 126W at 8.1GHz!! Gain = 11.2 Gain = 11.2 ≤≤ 1.9dB (81.9dB (8--11GHz)11GHz)!! VdVd = 8.0 V, Pin = 38dBm= 8.0 V, Pin = 38dBm

Tapered-SlotAntennas MMIC Amplifiers

MicrostripTransformersBiasing Pins

Preliminary Results using 24 MMIC Preliminary Results using 24 MMIC (6(6--tray) Array Configurationtray) Array Configuration

0

10

20

30

40

50

60

0

10

20

30

40

50

60

8.0 8.5 9.0 9.5 10.0 10.5 11.0

Gai

n, d

B

Pout, dBm

Frequency, GHz

DARPA

Overview of Combiner CircuitOverview of Combiner Circuit DARPA

Graceful DegradationGraceful Degradation

D.B. Rutledge, N.-S. Cheng, R.A. York, R.M. Weikle, and M.P. Delisio, “Failures in power-combining arrays”, to appear in IEEE Trans. Microwave Theory Tech., 1999

DARPA

30

35

40

45

50

-5 0 5 10 15 20 25

Out

put P

ower

,dB

m

Number of Device Failures

20 )1(

NmP −

150W Combiner (8x4)150W Combiner (8x4)

! CW Operation (8x4 Array)! 4 MMICs on each tray! Pout, max = 150W at 8.1GHz! Gain = 10.0 ≤ 1.9dB (8-11GHz)! Vd = 8.0 V, Pin = 40dBm

Tapered-SlotAntennas

MMIC Amplifiers

MicrostripTransformersBiasing Pins

Preliminary Results using 32 MMIC Preliminary Results using 32 MMIC (8(8--tray) Array Configurationtray) Array Configuration

10

20

30

40

50

60

0

10

20

30

40

50

8.0 8.5 9.0 9.5 10.0 10.5 11.0

Pout

, dB

m Gain, dB

Frequency, GHz

Pout, max = 150 Watts at 8.1 GHz

Pout

GainGain = 10.0 +/- 1.9 dBCombiner

WG Taper Transition

DC Bias

DARPA

WR42 waveguide opening

Waveguide Opening designed to accommodate the six cards antenna array

Incident Wave

Horn Antenna

The waveguide opening has the dimension of 2.0cmX0.71cm, which is designed to have at most two modes propagating in the system.

Waveguide EnvironmentWaveguide EnvironmentAROMURI

Frequency (GHz)

(dB)

Return loss measurementfor a 6 cards system

Slot line taper section

Incidentwave

50 ohm Chip resistor

Return Loss MeasurementReturn Loss Measurement

-50

-40

-30

-20

-10

0

18.0 19.0 20.0 21.0 22.0 23.0 24.0 25.0 26.0

50 ohmshort

AROMURI

20GHz Flip20GHz Flip--Chip Amplifier and TrayChip Amplifier and Tray

-40

-30

-20

-10

0

10

1.6 1010 1.8 1010 2 1010 2.2 1010 2.4 1010

S21(

dB)

S11 MAG [dB]S21 MAG [dB]S22 MAG [dB]

Frequency [Hz] Bondingpad

Thin-filmCapacitor

Biasing Pad

Spiral Inductor

Resistor

Bridge

Input output

40 mm

8.6 mm

Design LayoutDesign Layout

All are built monolithicallyAll are built monolithically

6-tray system with 80% C.E. currently under testing

AROMURI

Coaxial Combiner SystemCoaxial Combiner System

! Antennas uniformly loading an oversized coaxial (TEM) waveguide

! Array is uniformly illuminated

! No low-frequency cutoff: bandwidth limited by finline transitions

! Accomodates large numbers of amplifiers

! Electrically and thermally symmetrical

OuterConductor

InnerConductor

Type N(DC-18 GHz)Connector

1.77''6.067'' Inner Conductor Diameter 0.092 ''Outer Conductor Diameter 0.210 ''

1.2 ''

30 CenterSection

11.25o

32 cards

Center Coaxial SectionLoaded with Tapered SlotlineCards

0.4 ''

AROMURI

55--15 GHz Coaxial Array15 GHz Coaxial Array

• 32 Card System, 2 transitions per card (64-way splitter/combiner)• Broadband coaxial tapers cover 2-20GHz• AlN-based slot tapers cover 5-18GHz range

Front view of loaded section Exploded perspective

AROMURI

32 Card (6432 Card (64--Way) ResponseWay) Response

Insertion and Return Loss Close-up of insertion loss

• Need to improve impedance match• cards introduce <1dB loss

• 64-way splitter/combiner system• 1-2 dB insertion loss over 5-20GHz range• some suppression of high-order modes

-30

-25

-20

-15

-10

-5

0

0 5 10 15 20

S11S21

Relative power, dB

Frequency, GHz

11.25o

32 cards

-8

-7

-6

-5

-4

-3

-2

-1

0

0 5 10 15 20

S21LossesCoax losses

Relative power, dB

Frequency, GHz

finline transition cutoff

|S11

|2+|S21

|2

AROMURI

Performance PredictionsPerformance Predictions

Combiner Module6-card (24 MMICs)70% C.E.

GaAs GaN

4/Volume

8/Area3

2

λλ∝

∝

X-band: 5 Watt MMIC, 20% PAE

25°C base temp

100 Watts(38 W/cm2, 4 W/cm3)

X-band: 20 Watt cell, 40% PAE

25°C base temp

400 Watts(150 W/cm2, 16 W/cm3)

Ku-band: 1.5 Watt MMIC, 20% PAE

25°C base temp

25 Watts(50 W/cm2, 12 W/cm3)

Ku-band: 6 Watt MMIC, 40% PAE

25°C base temp

100 Watts(200 W/cm2, 52 W/cm3)

λ/4

λ/2

2λ

Note: CW Power

DARPAIMPACT: Innovative Microwave Power Amplifier Consortium

UCSB ARO MURI Effort UCSB ARO MURI Effort

Amplifier arrayAmplifier array••powerpower••bandwidthbandwidth••efficiencyefficiency••stabilitystability

BST BST TriplersTriplers••bandwidthbandwidth••efficiencyefficiency

EnclosureEnclosure••thermal managementthermal management••modingmoding

AntennasAntennas••Impedance matchingImpedance matching••Field distributionField distribution

88--12 GHz in12 GHz in

2424--36 GHz out36 GHz outMMMM--wave Power Modules using BST wave Power Modules using BST TriplersTriplers

AROMURI

ConclusionsConclusionsConclusionsConclusionsConclusionsConclusionsConclusionsConclusions

• Waveguide Combiners demonstrated• Good Combining Efficiency (>70%)• C.E. independent of number of devices• K-band and Coaxial Systems udner development• Some “Fundamental” issues being explored

Influence of non-uniform fieldEfficiency considerationsImproved design conceptsNoise & Linearity characterization underwayOversized waveguide environment

AROMURI