southeast asia · 18 improving product reliability through halt and hass testing mark r. chrusciel,...

PLUS: Why no-cLean cLeaning works today • IMProVING ProdUCt ReLiaBiLiTy ThRoUgh haLT anD Hass • tHe eleGaNCe of lINe sCaN teCHNoloGy for aoI & more

3D PRinTing in The eLecTRonicS inDUSTRy

RangSonS eLecTRonicS eMs focus inside

Covering India, thailand, Malaysia, singapore, the Philippines and Hong kong

Volume 4 Number 5 september/october 2013

www.globalsmtsea.com

Southeast AsiaSoutheast Asia

ELECTRONICSBENCH TOOLSOLUTIONS

www.metcal.comVisit our new website:

When it comes to soldering and rework, thermal demands of lead-free solders and high mass boards challenge throughput andoperator skill. But the Metcal Soldering andRework Systems change that:

• Accelerated power for enhanced soldering, desoldering and rework capabilities

• SmartHeat® Technology generates fixed temperature and power-on-demand precision control

• Virtually no operator training required

Looking for higher productivity, a way of tackling a wide range of applications whilekeeping training costs minimized? Contact us today and put a system in your hands. Request a Soldering demo:

[email protected]

Increase productivity and keep processes in control

Global SMT India Sept 2013_Layout 1 05/08/2013 11:36 Page 1

Global SMT & Packaging Southeast Asia – September/October 2013 – 1www.globalsmtsea.com

Contents

ELECTRONICSBENCH TOOLSOLUTIONS

www.metcal.comVisit our new website:

When it comes to soldering and rework, thermal demands of lead-free solders and high mass boards challenge throughput andoperator skill. But the Metcal Soldering andRework Systems change that:

• Accelerated power for enhanced soldering, desoldering and rework capabilities

• SmartHeat® Technology generates fixed temperature and power-on-demand precision control

• Virtually no operator training required

Looking for higher productivity, a way of tackling a wide range of applications whilekeeping training costs minimized? Contact us today and put a system in your hands. Request a Soldering demo:

[email protected]

Increase productivity and keep processes in control

Global SMT India Sept 2013_Layout 1 05/08/2013 11:36 Page 1

Global SMT & Packagingis distributed by controlled circulation to qualified personnel. For all others, subscriptions are available at a cost of €270 for the current volume (twelve issues).

No part of this publication may be reproduced, stored in a retrieval system, transmitted in any form or by any means electronic, mechanical, photocopying, recording or otherwise without prior written consent of the publisher. No responsibility is accepted for the accuracy of information contained in the text, illustrations or advertisements. The opinions expressed in the articles are not necessarily those of the editors or publisher.

ISSN No. 1474-0893© Trafalgar Publications Ltd

Designed and Published byTrafalgar Publications Ltd,London, UK

DOwnlOAD ThiS iSSue TO yOur MObile PhOne:

Visit www.globalsmtsea.com for the latest news and more, every day.

If you don’t already have one, search for a QR code reader app in your smartphone’s app marketplace. Then use it to scan the code above & download this magazine issue right to your phone.

Volume 4, No. 5

September/October 2013

Contents

8

12

18

eDiTOriAl2 National Electronics Manufacturing Policy spurs activity in the industry Dr. Sripathy Karur

TeChnOlOGy FOCuS8 3D printing in the electronics industry Arjen Koppens, TNO12 The elegance of Line Scan Technology for AOI Mike Riddle, ASC International18 Improving product reliability through HALT and HASS testing Mark R. Chrusciel, Cincinnati Sub Zero22 Why no-clean cleaning works today Mike Konrad, Aqueous Technologies

SPeCiAl FeATureS26 IPC APEX India: The Pathway to Growth27 SMALED Conference34 Company Profile— RANGSONS ELECTRONICS PVT. LTD, Mysore

reGulAr COluMnS6 Is soldering truly necessary for electronic assembly? Joe Fjelstad

4 Industry News36 International Diary

OTher reGulAr FeATureS 34

Title

2 – Global SMT & Packaging Southeast Asia – September/October 2013 www.globalsmtsea.com

0

5

25

75

95

100

0

5

25

75

95

100

0

5

25

75

95

100

0

5

25

75

95

100

EL Advert Global SMT India 203x275mm_072013

09 July 2013 16:56:03

editorial officesEuropeTrafalgar Publications Ltd.Globals SMT & PackagingCrown House, 72 Hammersmith Rd, Hammersmith, London, W14 8THUnited KingdomTel: +44 (0) 207 559 1467 Fax: +44 (0) 207 559 1468E-mail: [email protected]: www.globalsmt.net

United StatesTrafalgar Publications Ltd.Global SMT & PackagingPO Box 7579Naples, FL 34102, USATel: +1 (239) 245-9264Fax: (239) 236-4682

AsiaTrafalgar Publications Group Pvt LtdM-161/1 G.L. House, Gautam NagarBehind India Oil BhawanNew Delhi – 110049Office: +86 351 652 3813Fax: +86 351 652 0409

Editor-in-ChiefTrevor GalbraithTel: +44 7924 581 523 (Europe)Tel: +44 20 7792 0792 (UK)Tel: +1 (239) 245-9264 x101 (US)E-mail: [email protected]

Managing EditorTel: +1 (239) 245-9264 x108E-mail: [email protected]

China EditorLu ShuzhenE-mail: [email protected]

South East Asia Technical EditorAmitava SarkarEmail: [email protected]

Business Development/ Marketing ManagerElisangela DahlkeTel: +1 239 245 9264 x110 (US)Cell: +1 239 287 5398 (US)Cell: +44 7924 554456 (UK)E-mail: [email protected]

BillingTel: +1 (239) 245-9264 x106E-mail: [email protected]

Web DeveloperTorrence GermanyTel: +1 (239) 245-9264 x105E-mail: [email protected] advertisingEuropeAlex KlocksinCell: +49.1577.893.4884 (Ger.) [email protected] AmericaSandy DaneauTel: +1 (239) 245-9264 [email protected] Asia—IndiaAmitava [email protected]

Dr. Sripathy Karur

editorial

National electronics Manufacturing Policy spurs activity in the industryThe showtime has started for the electron-ics manufacturing industry after the release of the National Electronics Manufacturing Policy. Many states have started forming clusters, modifying the state industrial policy, formation of clusters, etc. Many activities have been triggered in the elec-tronics industry sector, including the EMS. Some players have already moved forward planning for more investments based on the provisions of the policy. Some have applied for the M-Sips in the emerging sectors. All of this means that the policy is welcomed positively by the industry with many hopes of growing with new related businesses like ESDM, embedded systems development, fab designs, fab facility, com-ponent manufacturing, bulk manufactur-ing facility for set top boxes, tablets and so on. Still the challenges are plenty to build an ecosystem and move towards the big figure of US$ 400 Bn. Added to this is the domestic demand of defence and avionics also growing, posing many challenges.

Many of the EMS companies in the SMB category are drawing their strategies to grow, looking out for investment oppor-tunities, technology, building skill sets in an attempt to respond to the growing market and convert opportunities.

Global SMT & Packaging South East Asia, in an attempt to capture the reactions and responses and the plans to grow, has interviewed an EMS company published in

this issue, and some or many an industries may be making similar attempts to analyse their existing status and plan to convert the big opportunities ahead, at the same time trying to meet the challenges required by the market and against the odds of the bureaucracy, power problems, limited infrastructure & ecosystem particularly on component availability, fab facility, testing facility, etc.

— Dr. Sripathy Karur

0

5

25

75

95

100

0

5

25

75

95

100

0

5

25

75

95

100

0

5

25

75

95

100

EL Advert Global SMT India 203x275mm_072013

09 July 2013 16:56:03

Title


amkor acquires toshiba electronics MalaysiaAmkor has completed it acquisition of Toshiba Electronics Malaysia Sdn. Bhd., Toshiba Corporations’s semiconduc-tor packaging operation in Malaysia. The transaction also includes Toshiba’s license to Amkor of related intellectual property rights and a manufacturing services agree-ment between Toshiba and Amkor.

Under the manufacturing services agreement, Toshiba has agreed to purchase and TEM has agreed to supply pack-aging and test services for certain discrete semiconductor products and analog LSI products.

Established in 1973, TEM has steadily expanded the scale of its packaging opera-tions, primarily of discrete and analog semiconductors. In recent years, its main product has been power semiconductors.

Toshiba will continue to subcontract power semiconductor packaging and test to Amkor as an important source of key products. As it does so, Toshiba will shift its focus and resources to front-end wafer fabrication for power semiconductors by reinforcing production capabilities at Kaga Toshiba Electronics Corporation, Toshiba Group’s discrete semiconductor production facility in Ishikawa Prefecture, Japan. www.amkor.com, www.toshiba.co.jp

Indian Government to fund and Nurture electronics startupsGovernment of India will be soon announcing the guidelines for financially aiding startups in the electronics sector. It is said that the government may chip in 15 to 25 percent of total investments for proj-ects through fund managers that include large IT companies and banks, reports HBL. This is the first time that the country is coming up with such an initiative which will primarily help the private R&D sector said a senior official from the department of Electronics and Information Technology. This comes as a real booster, considering the slow pace at which the country’s GDP is growing in terms of research and develop-ment. It is also reported that once the final guidelines are out, the return on investment will be then chalked out.

The guidelines which will be a part of National Electronic Mission which in turn comes under National Electronics Policy

2012. The funds will be routed through the Government’s ‘Electronic Development Fund’ scheme which expects to invest over 12,000 crores by the end of 2020.

It is also reported that a high level committee under the chairmanship of R. Chidambaram, Principal Scientific Adviser to the Government, will be preparing the guidelines. ‘We expect additional mobi-lization of around Rs 30,000 crore — to be raised from the industry by 2020. The industry is nascent right now, so we expect it to start slowly and invest around Rs 50 crore or Rs 100 crore to start with’ said the official.

singapore’s electronics sector set to see potential growthSingapore’s electronics sector is likely to see an upswing in the next few quarters, as the semiconductor cluster shifts from manufacturing chips for traditional PCs to mobile computing devices. Still, analysts say Singapore has some catching up to do with its North Asian counterparts, who are further ahead in this mobile technol-ogy game. Stats ChipPAC is one such com-pany in the semiconductor industry that is expected to pump an additional S$620 mil-lion (US$500 million) over the next three years into packaging chips used for mobile communications.

StatsChippac is one of the few compa-nies in Singapore competing in this new technology market, one that is typically dominated by the likes of players in Taiwan and South Korea. Singapore’s tech output contracted in the last two years as global demand slumped.

Singapore’s chip manufacturers also typically produced chips used in automo-tives and disk drives, which saw a slowdown in its exports when worldwide demand was hit by the global recession. But there was a slight reversal in industrial production numbers this April. Electronics output was up from a 7 per cent fall in the previous month.

Singapore’s total manufacturing output grew 4.7 per cent year on-year in April. On a month-on-month basis, manufacturing output increased 2.5 per cent on-year in April. Excluding biomedical manufac-turing, output rose 4 per cent. Deputy Prime Minister Teo Chee Hean said: “Singapore is well positioned to partici-

pate in the growth of the semiconductor industry through innovation and commer-cialisation in a diverse range of high growth markets. “Today more than half of the top semiconductor companies in the world have substantial R&D and manufacturing operations here and the industry employs a pool of more than 25,000 skilled workers.

“In 2012, the semiconductor industry alone accounted for almost 20 per cent of all R&D expenditure in Singapore. Many companies have invested in and bene-fited in the current pool of the mobile communications market.” Mr Song Seng Wun, economist at CIMB Singapore, said: “In terms of investment, the north Asian giants—the Koreans, the Japanese, and even Taiwan—are still taking a big lead. But there are companies diversifying their risks somewhat.

“Here in Singapore, what we’re still seeing is, Singapore is still a very impor-tant centre for chip making. There are still important chip foundries in Singapore owned by some of the biggest companies themselves, and they are also tweaking their output based on where they see market demand is heading too as well. “So if we were to see sustained strength in mobile computing devices plus recovery in tradi-tional demand for other chips, we probably will see much more balanced recovery in the coming year.”

Analysts say Singapore’s electronics cluster is likely to see low single-digit growth in the coming months.

Brownfield electronics cluster in Vellore soonVellore, India, is set to emerge as the first district in Tamil Nadu to develop an Electronics Manufacturing Cluster (EMC) soon. A group of over 40 entrepreneurs have resolved to apply to the Department of Electronics and Information Technology (DEITY) to get Vellore district notified as a ‘Brownfield’ EMC. A number of clus-ters focused on automotive, footwear, coir, embroidery among others are already functioning with government support in the district. The EMC will be the first such electronics initiative supported by the Government of India.

S Nagarajan, general manager (opera-tions) of Kramski, said Vellore had suitable climatic conditions (extreme heat with low humidity conditions) and geographical

Industry newsindustry news


industry news

location, along with logistics and support from the training and educational institu-tions to promote electronics industries in a big way. He said that Vellore would be an ideal district to develop a Brownfield cluster, as a number of tiny, small and medium enterprises were already involved in manufacturing value added components to support electronic industries.

The first step would be to work towards getting the government notification for the district to promote the EMC.

Nagarajan said Kramski wants to help local entrepreneurs utilise the Modified Special Incentives Package Scheme (MSIPS) as the government had already allocated around `10,000 crore for the scheme. Once notified, any entrepreneur who wants to be a part of the cluster can approach the DEITY for assistance. The existing industries could also seek assis-tance for expansion, improving R&D and testing facilities, he added.

Indian electronics industry facing BIs certification challengeIndia’s electronics industry is on the edge with the sale of products such as laptops facing a possible blackout from next month onwards. According to a missive by the department of electronics and informa-tion technology, major electronics prod-ucts could not be sold or imported into the country unless they are tested for quality standards and certified by the Bureau of Indian Standards(BIS). However, despite a three-month extension in the original deadline and around 1,500 applications, BIS has registered just one product so far.

“A complete licence raj has been unleashed on the industry by way of this compulsory registration, which is neck-deep in bureaucratic red tape,” said a senior official of a major personal computer manufacturer, who did not want to be iden-tified due to the sensitivity of the matter. “The delay is worrying the industry no end,” the official added, saying test reports of products, which were globally certified before worldwide launches, were being returned with a “volley of questions”. J V Ramamurthy, president of the electronics hardware industry body Manufacturer’s Association for Information Technology (MAIT), said unless this issue was resolved or the government further extended the deadline, the industry would not be able to import or sell any product after July 3. “Since the list of products required to be certified includes major items such as note-books, tablets, plasma and LCD television

sets, along with printers and scanners, the turnover of companies is expected to be severely impacted,” said Ramamurthy, who is also the president and chief operating officer of HCL Infosystems Ltd.

The department introduced the Electronics and Information Technology Goods (Requirements for Compulsory Registration) Order late last year to check the sales of substandard and spurious elec-tronic items in the country, which were considered not only to be a health hazard but also a security risk.

asia-Pacific holds majority share of printed electronics marketThe global printed electronics market is a widely growing sector in recent years owing to the many benefits it offers such as long switching times, simple fabrication and low fabrication cost. The Asia Pacific market holds majority of the market share closely followed by North America. The market in Europe also holds immense growth opportunities owing to develop-ments in Eastern Europe.

The global printed electronics market could be segmented into three major categories, on the basis of materials into: substrates and inks, substrates could be segmented into glass, plastic and paper and inks could be segmented into conduc-tive inks and dielectric inks. On the basis of technology it is segmented into ink-jet printing, flexography, screen printing and gravure printing.

Some factors inhibiting the growth of the global printed electronics market are increasing competition from non printed electronics products, complexity of the value chain and lack of awareness. Challenges of electrically functional inks will also limit the growth of the global printed electronics market. Emergence of new functionalities and applications and integration into multiple products will serve as an opportunity, fuelling the growth of the global printed electronics market.Browse the report at www.transparency-marketresearch.com/printed-electronics-market.html

New rebound sales & procurement office opens in singaporeRebound Electronics opened a new office in Singapore, allowing the company to con-tinue to increase its service offering and geographical reach by working closely with its customers, providing them with global

sourcing and supply capabilities.Located in central Singapore, the

new office operates both as a sales and a procurement hub, servicing all customers including blue chip OEMs, CEMs and EMS providers throughout Asia Pacific.

Commenting on the office opening, Simon Thake, Rebound’s group managing director said, “A fixed presence in Asia is a significant development for Rebound and is in line with our objective of providing a truly global procurement platform to all customers. We recognise the need to continually provide enhanced services throughout the region, and our ability to handle all of our customers’ standard requirements within the supply chain, regardless of their complexity, means that we will continue to grow as more customers discover the true value of supply chain management.” www.reboundeu.com

stI Certified electronics opens singapore officeSTI Certified Electronics Inc., a compo-nents distributor with corporate headquar-ters in Fremont, CA opened a Singapore office. STI has a broad and growing prod-uct portfolio of semiconductor, active and passive integrated circuits and has a repu-tation for excellent customer service and design support.

“A growing number of our customers have product development activities and design centers in North America, but manufacturer product in their own facto-ries or outsource production to contract manufacturers in South East Asia. We need to provide our customers local purchasing and application support. The Singapore office will service the needs of all customers in the region and add to our presence in Asia,” said Alex Woo, President of STI Certified Electronics.

“The STI Certified Electronics Singapore Office is headed by Mr. Nelson Chow, a seasoned senior manager with over fifteen years of experience in the Franchised Distribution business. We are pleased to add a manager with Nelson’s background to our sales team,” he added.

The STI Certified Electronics Singapore Office Location is 50 Tagore Lane #05-01C, Entrepreneur Center, Singapore 787494. Phone: (65) 64991867 www.sticertified.com


is soldering truly necessary for electronic assembly?

There is an adage of long-standing that goes like this: “If the only tool in your tool chest is a hammer, the

tendency is to treat everything like a nail.” Such is the case of soldering in the electronics assembly industry. To be fair, solder was a reliable workhorse in the elec-tronics industry for many years… actually many decades. However, the forced imple-mentation of lead-free solder that was foisted upon the electronics industry by the European Union altered forever that long-standing paradigm. The electronics

industry now struggles daily to meet the challenge of the lead-free solder mandate. The reader is invited to look at virtually any journal or newsletter on electronics manufacturing (including Global SMT & Packaging) and therein will be found article

after article and advertisement after adver-tisement on how to address problem after problem, nearly all of them related to the process of soldering.

The simple fact is that managing the electronics assembly process using solder technology, especially since the intro-duction of lead-free solder, has become increasingly complex. Moreover lead-free soldering has introduced to the industry a host of new types of defects and a number of new failure mechanisms (exclusive of the reintroduction of failure mechanisms which at one time had been fully put to rest, the most prominent being tin whiskers). Among the new types of solder-related defects are champagne voids, head-on-pillow defects, and poor wetting, to name but a few. While these defects are primarily related to the formation of a solder joint, a host of other types of defects have arisen that are artifacts of the higher-temperature soldering required for traditional SAC alloys. These include blistering of packages, excessive warpage of components, pad cratering, delamination of circuit boards, and others.

Post assembly processing, there is an ongoing challenge of cleaning baked-on fluxes in order to give the board a fighting chance at not evidencing ionic contami-nation failures at some point in the future. Clearly soldering, as faithful a servant as it has been over the years, has become as much a liability as it has been benefit. Given the challenge, a question that could or should rightfully be asked is “Is soldering really the only possible solution for making an electronics assembly?” The short answer is “No.”

The truth is that solderless intercon-nections have been used for many decades to make electrical and electronic intercon-nections. In the case of electrical intercon-nections, solderless interconnections go back to the 18th century, and perhaps even

earlier, when experimenters simply twisted wires together to make electrical intercon-nections. The method remains common today in the electrical wiring of electrical equipment as well as in nearly every home and building where wires are compressed into connector blocks using screws or by the use of wire nuts which are designed to force two or more wires into intimate physical contact, assuring a good electrical connection without using solder.

Elsewhere in electronics industry of today, solderless interconnection tech-nology based on twisted wires persists in the form of “wire wrap” technology, where round wire is wrapped tightly to square posts or leads to make a reliable intercon-nection. There is, as well, “press fit pin” tech-nology, which has been used successfully for decades to assemble connectors in the manufacture of backplane motherboards. In practice, connectors with specially designed pins are pressed into plated through holes of the backplane, making highly reliable interconnections between connector pins and plated through holes in the large backplanes used by the telecom-munications and internet server industry.

This particular solderless interconnec-tion method was developed because, like many of today’s printed board assemblies, the boards simply could not withstand the temperature and duration required of the soldering process to make a reliable inter-connection between the connector pins and the backplane. Even with traditional tin-lead solder, the temperature required for soldering was simply too high for the organic-resin-based laminate of the back plane to survive.

In the world of printed circuit manu-facture, there is a very specific terminology for one version the technology. It is called wire wrap, and it has been used as a method for making point-to-point interconnec-tions for prototypes and special small run

Joe Fjelstad

Is soldering truly necessary for electronic

assembly?

The simple fact is that managing the electronics assembly process using solder technology, especially since the introduction of lead-free solder, has become increasingly complex.

Alternative approaches to the manufacture of electronic assemblies bypass the soldering process and all of its shortcomings.


is soldering truly necessary for electronic assembly?

products for more than four decades. In the process, a wire is wrapped multiple times around a metal post to make elec-trical interconnection. Since the pin is normally a square post, the soft copper wire deforms around the pin, creating a gas-tight connection, assuring a long, reliable life.

While not a direct descendant of wire wrap technology, there is another way of making solderless interconnec-tion between boards, based on the use of specially fabricated wires called twisted wire interconnect. The approach has been around for a number of years, having been developed initially by Cray Computer Corporation in the late 80’s. The tech-nology is now available from Medallion Technology (www.medalliontech.com), as the industry begins to face some of the challenges that faced Cray Computer at that time. The fundamental unit of TWI technology is based on a twisted wire bundle of a high modulus (i.e. spring-like) metal that, by means of a specially devel-oped tool, is clamped on one end and then twisted in reverse to unwind the wires, creating something that looks similar to a string of small birdcages. These “spring bulges” can then be inserted into plated through hole vias to make interconnec-tion between traditional PCB assemblies where required. (Please visit the company’s website for more information.)

There are other types of solder-free metallurgical interconnection technolo-gies that are worth mentioning: sintered pastes (which have seen renewed interest in recent months with an announcement and articles by both Ormet and Sumitomo) and transient liquid phase joining and welding. The sintered paste solution is somewhat similar to soldering except that the materials used are different, and the joining temperatures are lower. Transient liquid phase bonding is somewhat of a hybrid of soldering and welding, in that two metals are joined by heat and pressure. The metals react instantly once joining temperature is achieved, and the resulting alloy has a melting temperature above either of the two joining metals.

The last of the just-mentioned list of solderless interconnection alternatives is welding. Welding can be accomplished by several different methods, including the use of lasers and resistance welding. The former case is fairly well known; the latter is less common. In the process, the leads of a device are welded to the circuit by completing a momentary high current circuit with pressure applied, resulting in a

metallurgical weld being formed between lead and circuit. This process is relatively slow but may be of use in certain applica-tions.

In addition to the mechanical intercon-nection solutions just reviewed, there are a host of adhesive-based technologies that have been, and still are being, successfully used to make electromechanical intercon-nections. In general, there are three basic types of adhesive based interconnections: conductive, anisotropic and non-conduc-tive.

The first type of adhesive used for making interconnection without solder is comprised of a resin mixed with a conduc-tive material, most commonly silver, though there is an increasing interest in carbon-based nanomaterials. Conductive adhesives have been used in applications where the component is heat sensitive. An example of one such application is with plastic encapsulated LEDs. Such adhesives are also commonly used with membrane switch assemblies, which are typically fabricated using screen-printed or sten-ciled silver ink conductors.

The second type is anisotropic conduc-tive adhesive, in film or liquid form. Such adhesives are infused with widely dispersed conductive particles that, in use, allow for the conduction of electricity in the Z axis but not in X nor Y directions. These joining materials are very commonly used for the interconnection of display driver circuits used to deliver the signals to various types of flat panel displays. The advantage of this type of adhesive is that it can reliably make the very fine pitch inter-connections required for such applications.

The last type is nonconductive adhesive that can be used where signals are capaci-tively coupled or where operating voltages are sufficiently high to break through the thin bond line. Also, in some cases a metal feature will actually pierce the adhesive. Still it is the first two adhesive methods that see the greatest use.

Finally, there is the method that has been the subject of discussion a number of times over the last several years in this space and elsewhere, and that is the Occam approach, wherein electrical interconnec-tions between circuits and components are made almost exclusively by electroplating copper. This approach is being increasingly looked to for the manufacture of assemblies that are the reverse of traditional products, in that rather than putting components on circuit boards, circuits are built up on component boards. A fairly recent article describing an aluminum circuit board

using the solder-free methods alluded to can be found in GSMT&P archives of this column.

In summary, solder, while it has certain advantages, also has a growing list of liabil-ities. History and recent advances in tech-nology provide credence to the belief that it is not necessary for electronic assembly in many if not most instances. That said, solder is an incumbent technology with a long history of its own, and despite the abusive challenges thrust upon the industry by the lead-free mandate, solder continues to be used, and this will go on for many years to come.

However, what is appealing to some of the more enlightened technologists in the industry is the knowledge that reliable solder-free solutions are out there, both on the horizon and in the past. Maybe having a tool other than just a hammer might be an appealing thought to other technolo-gists in the industry at some point as well.

Verdant Electronics founder and president Joseph (Joe) Fjelstad has more than 40 years of international experience in electronic interconnection and packaging technology in a variety of capacities from chemist to process engineer and from international consultant to CEO. Mr. Fjelstad is also a well known author writing on the subject of electronic interconnection technologies. Prior to founding Verdant, Mr. Fjelstad co-founded SiliconPipe a leader in the development of high speed interconnection technologies. He was also formerly with Tessera Technologies, a global leader in chip-scale packaging, where he was appointed to the first corporate fellowship for his innovations. He has 150 US patents to his credit.

A host of adhesive-based technologies have also been, and still are being, successfully used to make electromechanical interconnections.


3D printing in the electronics industry

The inception of 3D printing can be traced back to 1976, when the inkjet printer was invented. In 1984, adaptations and advances on the inkjet concept morphed the tech-nology from printing with ink to printing with materials. In the decades since, a variety of applications of 3D printing tech-nology have been developed across several industries. The most common are:

• Stereolithography • Selective laser sintering• Fused deposition modeling• Digital light processing• Material jetting• Powder bed fusionThrough the years, different terms have

been used for building a product layer by layer. If, however, we look at the amount of hits on search engines, we definitely see three major terms taking the lead. Besides

3D printing, rapid prototyping and additive manufacturing are the most popular ones. The material focus has been on plastics, metals and ceramics.

3D printers are often used to produce concept models for the visual and tactile inspection of a proposed design. using additive manufacturing (AM) for part production is considered the next frontier, with opportunities beyond measure. Corporations, entrepreneurs, investors, and researchers are considering ways in which they can use AM to manufacture an exciting array of products in quantities of one to several thousands.

Two relatively distinct markets are developing for products made by additive manufacturing. One consists of profes-sionals and includes the medical, dental, aerospace, automotive and motorsports

3D printing, or additive manufacturing, is on the top of the hype curve, especially if we look at mechanical constructions and complex shapes. We have even had an uproar in the United States with a 3D printed functional gun. But what about 3D printed electronics? Can the electronics industry profit from new developments in this field of expertise as well?

Arjen Koppens, TNO, The Netherlands

3d printing in the electronics industry

Figure 2. 3D printed MEMs. Figure 3. 3D printed hearing aids.

Figure 1. 3D printed mechanical parts.



industries. The other is the broad and interesting consumer market. Examples are home accessories, toys, game avatars and fashion products.

But where does the electronics Industry fits into this picture? Most of today’s electronic products consist of tradi-tional-made parts: plastic molded housings containing PCBs with soldered THT and SMT components. In many cases even the design of a product is based on the elec-tronics that should fit inside! Shouldn’t it be the other way around? Shouldn’t the electronics be a part of the design based on ergonomics and aesthetics?

The only way to establish this is by placing the electronics in some kind of way inside the design. The substrate on which the components should be placed would be on the inside of the designed housing itself.

Since most housings are of a three-dimen-sional shape, the components might need to be placed under an angle, but moreover the interconnections between the compo-nents could no longer be on a separate piece of FR4 material.

Also if we look on an advanced 3D chip packaging level, interconnects are an important driver. This holds for through silicon vias (TSVs) for chip stacking but also for other interconnect steps, like re-distri-bution layers and solder bumps. Especially in applications with a low number (<100 mm-2) of relatively large features (10-100 μm diameter) with high aspect ratios (up to 1:10), conventional plating processes are slow and become cumbersome as aspect ratios increase, becoming cost ineffective. Hence industrially feasible, alternative direct-write processes are of interest for advanced interconnects.

A general trend in IC manufacturing is that, driven by ever-increasing perfor-mance and form-factor requirements, chips become more and more integrated into very thin packages. Integration takes place on the chip level, on silicon inter-posers and also by integrating ultra-thin chips into foil-based devices.

Such integration requires new inter-connect strategies like through-silicon vias (TSVs), through-mold vias in wafer-level packages, redistribution layers for chip-scale ball grid arrays and all kinds of hybrid approaches to integrate thin silicon chips into foils or laminates. All these applications share the problem that existing industrial patterned metalliza-tion approaches are either costly or lack accuracy.

Traditionally in IC manufacturing, a combination of sputtering and (electro)plating is the technology of choice. To create a pattern, the plating process always has to be combined with one or more lith-ographic masking and etching steps. All together, this combination of processing steps makes for a costly approach, espe-cially when series are small. Further, novel packaging and interconnect approaches typically require metallization at enhanced aspect ratios, e.g. in TSVs, which leads to an even sharper cost increase. At the same time, the total area coverage of the structures is often relatively small. Finally, novel packaging approaches are not always compatible with wet processing.

Direct-write technologies can form a low-cost alternative approach to creating interconnects by eliminating mask and etch costs as well as by being more efficient at low area coverage and high aspect ratio.

All kinds of techniques have already been developed to print interconnects.

Existing direct-write technologies to print interconnects are summarized in Table 1. In most cases, either a metallic ink or paste (typically containing nanoparti-cles) is used or an ink containing precursor for electroless plating. Metallic inks containing nanoparticles always require a

Figure 5. Printed interconnects.

Method dimensions reported Curing/plating required

Plasma technology 200-2000 μm no

ink jet/micro-dispensing 20-100 μm yes

Aerosol jet (lenS) 10-50 μm yes

laser induced forward transfer (liFT)

1-10 μm no

Table 1. Overview of existing direct-write approaches.

Figure 4. Example of 3D printed electronics.

Figure 6. Graphic explanation of LIFT process.



thermal or photonic treatment to achieve sintering, hence electrical conductivity. Plating precursors need an (electro)less plating step to create the actual track, solving only part of the problems associ-ated with the conventional approach.

In general, the approaches listed in Table 1 are well-established technologies (except for LIFT), and many amongst them are incorporated into industrial processes like printed circuit board production, solar cell production or electronics packaging. To be able to write structures compatibly with advanced IC packaging approaches, a deposition resolution of 1-5 μm is required. As can be seen from Table 1, this is at least a factor of 10 smaller than most of the existing direct-write figures. Only laser induced forward transfer (LIFT) shows the potential to overcome this limitation.

LIFT uses a laser to shoot small droplets of conductive material from a carrier onto a substrate as shown in Figure 6.

Note that the deposition size is typi-cally smaller than the hole in the donor layer. Further, the substrate and the donor

both move with respect to the laser beam, each with their own velocity. This is needed in order to create overlapping deposits that form a conducting line.

Inkjet printing can be used in elec-tronics packaging to create interconnec-tions between electronic components. Conductive inks and dielectric inks are used when substituting traditional printed circuit board (PCB) with inkjet-printed interconnections. Although both organic and inorganic inks can be used for conduc-tive purposes, at the moment inorganic inks offer better conductivity. Inorganic ink consists of metal nanoparticles and organic solvent that makes the ink print-able.

Aerosol jet printing is another material deposition technology for printed elec-tronics. The aerosol jet process begins with atomization of an ink, which can be heated to 80˚C, producing droplets on the order of one to two microns in diameter. The atomized droplets are entrained in a gas stream and delivered to the print head. An annular flow of clean gas is

introduced around the aerosol stream to focus the droplets into a tightly colli-mated beam of material. The combined gas streams exit the print head through a converging nozzle that compresses the aerosol stream to a diameter as small as 10 microns. The jet of droplets exits the print head at high velocity (~50 meters/second) and impinges upon the substrate. Electrical interconnects for passive and active components are formed by moving the print head, equipped with a mechanical stop/start shutter, relative to the substrate. The resulting patterns can have features ranging from 10 microns wide, with layer thicknesses from 10s of nanometers to >10 microns. A wide nozzle print head enables efficient patterning of millimeter size elec-tronic features and surface coating applica-tions. All printing occurs without the use of vacuum or pressure chambers and at room temperature. The high exit velocity of the jet enables a relatively large separation between the print head and the substrate, typically 2-5 mm. The droplets remain tightly focused over this distance, resulting in the ability to print conformal patterns over three dimensional substrates. Despite the high velocity, the printing process is gentle; substrate damage does not occur and there is generally no splatter or over-spray from the droplets. Once patterning is complete, the printed ink typically requires post treatment to attain final electrical and mechanical properties.

3D MID technology (moulded inter-connect devices) is another way to create an electrical interconnect inside a moulded plastic housing. An electrical conductive circuit is created by means of two-shot moulding or by laser activation patterning. After this step the structures get metallized through an electroless plating process and become conductive. After the circuitry is created, the conventional SMT machines (stencil printing, pick & place and reflow ovens) can make sure that components are added to the part.

Things can get even more interesting when we change our conventional way of thinking! What if we would first place Figure 8. 3D printed copper tracks.

Figure 7. 3D MID examples (far right shows a functional 3D MID.)



the components inside the housing and secondly print the interconnects? In that case we do not need the reflow process either! It would, however, be beneficial to be able to print copper interconnects without a post treatment. Plasma tech-nology could be a good option in this case. This kind of technology could revolu-tionize manufacturing processes for sensi-tive surfaces under atmospheric pressure. Cold active atmospheric plasma encom-passes a multitude of applications in the industries like solar and semiconductors and could become a substitute technology for 3D MID. Plasma technology, however, still needs some extra attention to be able to create fine pitch tight tolerance intercon-nects.

What needs to be consid-ered as well is the placement of the components. In case we create the electrical circuitry inside the housing and the shape is three-dimensional, we need to be able to place components in a three-dimensional way. We need to be able to apply solder paste or glue in a three-dimen-sional way as well. If we could first place the components and afterwards print the conductive copper tracks, there might even be a need to change the design of certain components that have their connections or heat sinks on the bottom side.

What advantages can these changes bring the electronics industry? Besides the feature of having a product designed for purpose and not one to fit the electronics, there are some major cost saving advantages. If the interconnects can be printed inside a housing, there is no more need for a printed circuit board. This is not only a cost saving advantage but also an environ-mental advantage. Furthermore the assembly steps of integrating the PCB into a housing are no longer needed, which is another cost saving argument. If some of the components can be part of the printed interconnects, then these components are no longer needed as conventional THT or SMT components. If we could first place components and secondly print the copper interconnects, no more solder paste needs to be applied and

no reflow process is needed either. The solder paste, however, probably needs to be replaced by a gluing process to hold the components in place, especially if compo-nents will be placed in a three-dimensional way. Reducing production steps could lead to faster production cycles, especially where this process could simplify a current complex sub-assembly. For sure it will be a reduction of floor space and energy cost.

As you can see, 3D printing is not only focussed on the mechanical industry. There are several very interesting features that should be thoroughly investigated for the electronics industry as well. Pushing the technical limits and challenging the industry is the next step to be taken. TNO,

a research institute in The Netherlands, has started with a strategic research program on the topic of 3D printed elec-tronics to develop new techniques and further develop existing techniques in close co-operation with the electronics industry and its partners. We expect that, due to fast developments in 3D printing, the technology will mature in the coming years into a cost effective approach for elec-tronics industry.

www.vitechnology.com

Revolutionary

See your process like never before

Paste Inspection

Actual image from PI


The elegance of line Scan Technology for AOi

And the answer seems simple enough: employ additional cameras, surrounding the downward-looking principle camera, and position them at oblique angles so that they can provide a “side view” of the region of interest, capturing images of defects that seem undetectable from overhead.

But drilling deeper into this solution uncovers several questions:1. There are some AOI systems on the

market that tout using up to eight cameras. So, how many cameras are enough?

2. How does an AOI system process the images generated by these multiple cameras to produce useable inspection data? Typically, most AOI systems with side view cameras perform only image comparison on side view data. In other words, they use a “golden” image gener-ated from one or multiple samples as a model and compare that golden image to the current area of interest. But what happens if the area of interest is good, but there is a difference in color or lighting, or board-to-board, lot-to-lot variations? Will the same golden image work on the same component package type placed anywhere on the PCB…in

any orientation? In other words, can one use the same component library no matter where the component is located, or what taller components surround it (shadowing issues)? Does a multiple camera system take more time to program and debug? Does increasing the number of cameras increase the number of false failures or false calls?

3. How sensitive is the calibration and alignment of the optical system on an AOI using multiple cameras?

4. How reliable is an AOI system using additional cameras? Does attaching more sensitive hardware make it more prone to mechanical and electrical problems in a production environ-ment?

5. How does adding more cameras (and more images to process) affect the inspection speed?

6. What does the additional hardware—as well as the software to support it—add to the price and operating cost of the AOI system?

Line Scan Technology may offer an elegant alternative to multiple camera AOI systems. Since the mid-1990s, SAKI

There seems to be a trend in the AOI market: more is better. On the surface this trend seems logical, because how can just one single downward-looking FOV (field-of-view) camera circled by a ring light detect production errors in solder quality, lifted leads…head-in-pillow defects?

Mike Riddle, ASC International

the elegance of line scan technology for aoI

Figure 1. Line Scan Technology

Since the mid-1980s, Mike Riddle has worked in electronics inspection and test, helping companies with leading edge technologies find their paths to market leadership. Customer-focused and growth-oriented, Mike has held various roles in business development, marketing, sales and international distribution. He is currently serving as AOI Product Manager for ASC International. You can learn more about Mike by visiting: http://www.linkedin.com/pub/mike-riddle/12/491/710



Corporation has employed this reliable yet flexible machine vision concept in over 7,000 AOI installations worldwide, mostly in high-production environments across Asia. This paper will provide an explana-tion of Line Scan Technology and how it’s being applied in AOI to solve difficult inspection problems such as soldering and lifted lead defects without the use of addi-tional imaging hardware.

what is line scan technology? SAKI’s Line Scan Technology (LST) drives a high-resolution linear CCD array sensor over the PCB surface rapidly capturing the complete PCB image. Scanning a 460 x 550 mm (18” x 20”) PCB takes 10 sec-onds. The scanning speed is unaffected by the number of components on the PCB, and smaller PCBs take less time to scan. The lighting system for SAKI’s LST con-tains over 3000 LEDs, arranged in multiple banks, generating Toplight, Sidelight and Lowlight Illumination. During each scan, the LED lighting is modulated several thousand times to produce over twenty dif-ferent lighting schemes, providing remark-able flexibility for finding just the right contrast for any inspection problem.

foV vs. lst The principle sensor used in conventional AOI system design—whether or not side cameras are included—is a downward-looking large area array CCD camera. Typically, this camera is surrounded by ring lighting projected at an oblique angle. In order to inspect a PCB, the camera is positioned over multiple areas of interest, gathering snapshots. Depending on the camera’s Field of View (FOV), the size of the PCB and its component density, data acquisition can take anywhere from a few seconds (small, sparsely populated assem-

blies), to several minutes (large, densely populated assemblies). In contrast, LST scans at a constant speed, collecting the complete PCB image in one single, rapid motion.

Co-axial toplight is born Since different components have different heights—and some are much taller than their neighbors—SAKI realized that the best illumination for solder inspection was from a light source projected directly per-pendicular to the PCB surface. Any other off-axis illumination would lend itself to creating shadows, as the heights of taller components blocked the light from reach-

ing the smaller ones, which could increase the number false calls, creating more pro-gramming and de-bugging work. SAKI also discovered that good solder fillets reflected overhead lighting or “Co-axial Toplight” much differently than cold solder or no solder, and that the contrasting reflections could be used to clearly distinguish “Good” vs. “No Good” solder.

Further refinement in SAKI’s Co-axial Toplight concept introduced telecentric optics, increasing the sensor’s Depth of Field, and removing parallax associated with other highly focused optical designs. This virtually eliminated shadowing and optical distortion altogether, enabling the use of flexible component inspection libraries that could be deployed anywhere on the PCB surface, without regard to the heights of adjacent components – a problem that can still plague a number of AOI system designs.

which lighting is best?While Co-axial Toplight has proven to be the best for solder fillet inspection, there are other inspection tasks that require different projection angles and illumina-tion color to obtain the highest contrast between “G” and “NG” conditions. Tasks such as optical character recognition (OCR) and optical character verification (OCV) may require different projection

Figure 2. Multi-Field-of-View Capturing (left) vs. Line Scanning (right).

Figure 3. LST generates over 20 different lighting schemes with each inspection.



angles—as well as data from multiple pro-jection angles—to accurately determine that the correct part has been placed. In some cases, the color of the component is used to detect presence/absence, or the correct part. Color inspection usually requires another unique illumination set-ting. In some cases, the contrast of color and/or reflectivity between the component and the substrate is very subtle. This may require a special, “user-defined” lighting scenario to highlight the differences that will provide repeatable results.

To enhance its Co-axial Toplight concept, SAKI added banks of LEDs to project off-axis “Sidelight”, which has been found best for color inspection and

“Lowlight”, which uses a very acute projec-tion angle, and is ideal for OCR and OCV inspection tasks. Further testing demonstrated that sometimes a combi-nation such as “Toplight-Sidelight” or “Sidelight-Lowlight” produced superior results. Still, SAKI discovered other inspec-tion tasks requiring even more lighting options. Rather than add more lighting hardware and creating more servicing issues, SAKI decided to solve the problem using software. Today, with each scan of the PCB, SAKI AOI systems generate over twenty different lighting schemes. Any one of those lighting schemes—plus a user-defined option that allows the user to decide the best Toplight/Sidelight/

Lowlight blend—can be applied to any inspection window and algorithm used in any component library. This lighting flex-ibility—unique to the industry—employs a very simple electro-mechanical design to accomplish what other systems strive for using complex hardware. Furthermore, producing these numerous lighting schemes generates no impact on scanning time.

why not inspect the whole board?In conventional AOI systems employing FOV—or FOV with side cameras—the regions for inspection are only where the camera(s) are positioned on the X/Y plane of the PCB. Usually, these regions are con-fined to where the PCB has been popu-lated, since taking multiple FOV snapshots to cover the whole PCB area increases tact time. Limiting inspection to only popu-lated regions can mean that large areas of the PCB can pass through without scru-tiny. Foreign materials such as loose chips, solder balls and other debris could go undetected, causing production problems downstream.

With LST, each inspection captures an image of the entire PCB in one rapid, continuous scan. To ensure no foreign material on the PCB passes to the next process, SAKI provides an Extra Component Detection (ECD) algorithm that compares a database comprised of ten known good sample images to the inspec-tion image, looking for irregularities across the entire PCB surface. Built-in flexibility enables the user to select size boundaries so that only variations considered prob-lematic are flagged, minimizing false calls. This unique feature enables SAKI AOI with LST to provide a thorough and compre-hensive inspection of the entire board without affecting production beat rates.

sakI’s answer to side view camerasAs discussed above, mounting side view cameras on an otherwise downward look-ing large FOV camera seems like a logi-cal solution to detecting defects like lifted leads, dryjoint solder, and “head-in-pillow” non-solder problems. But what if there were solutions to these issues that didn’t require additional sensitive hardware and complex software, as well as considerably longer programming and de-bugging times?

SAKI has come across its share of these defects and through many years of research

Figure 4. LST can inspect the full area of the PCB for debris and foreign materials.



and thorough testing the Company has implemented smart algorithms in its inspection libraries to accurately detect and report these production errors using the power of its LST and flexible lighting technology. Below are a few examples of how these algorithms work:

solder qualityWith Co-axial Toplight, solder quality of components as small as 01005s can be inspected based on simple principles. When a fillet is correctly formed, light pro-jected perpendicular to the PCB will reflect off at an angle, generating a “low bright-ness” condition, and produce a dark area where the fillet is formed. On the other hand, when there is no fillet—as in cases where there is no component or insuffi-cient solder—light will reflect in an equal but opposite direction, as in a mirror, creat-ing a “high brightness.”

In SAKI’s inspection libraries, high and low thresholds for brightness can be set for each inspection window. In addition, several windows can be used for one inspec-tion task, and configured with conditional jumps. In this way, one component library, “0805smc” in the above example, can be used for part numbers with the same

component package size and type, even though the component color, PCB color, solder brightness or surrounding reflec-tivity levels may vary. This produces faster program and de-bug times, in addition to lower false call rates.

Component lead inspectionThe necessity to detect lifted lead conditions is probably the driving force behind implementation of side view cameras in AOI. That being said, SAKI’s LST can accurately detect lifted leads using a number of principles that work in conjunc-tion—without the addi-

tional hardware, software and operational expense of using side view cameras.

Lead LengthFrom a perpendicular, overhead view, a lifted lead will exhibit a different length than its neighbors. By making a compari-son—either using a measured length value as benchmark, or comparing the length of an individual lead to the length of its neighbors—the length of a component

lead is a symptom of its condition, either “OK” or “NG.” The length of the lead is measured from the body to the tip of the lead foot. As with other SAKI algorithms, acceptable thresholds are user-selectable, providing a robust inspection while reduc-ing false calls.

Lead Tip/Pad Solder QualityAnother symptom of a lifted lead condi-tion is the quality of the reflowed solder on the pad. As shown below and when using Toplight illumination, the reflective char-acteristics of the remaining pad of a good solder fillet and that of a pad with no lead attached exhibit very different brightness conditions.

Therefore, taking stock of the lead length, as well as the reflectivity of the solder fillet and reflectivity of pad end, a lot can be learned about the condition of a component lead solder fillet.

ConclusionIn scientific circles, the word “elegant” is used to describe an idea or concept that combines simplicity, power and a certain ineffable grace of design. SAKI’s Line Scan Technology is an example of an elegant yet comprehensive approach to AOI design, without relying on the use of multiple cameras and sensors that add significant hardware expense and increased program-ming time, while providing fewer opportu-nities for reliability issues. This paper has provided only a broad conceptual glimpse into the capabilities of LST, which in prac-tice uses a combination of these as well as other “smart” algorithms to provide accu-rate, high-speed inspection capability. In today’s ‘rough and tumble’ manufacturing environments, production tools that are proven to be powerful yet simple are keys to efficiency and economy.

w w w . m i r t e c . c o m

JOIN...the Winner’s Circle!

AW A R D S

AN

D

C O U N T I NG

MS-153D SPI

MV-92D/3D AOI

MW-MI-23-CA-ad_203x275_Global-SMT5.indd 1 4/4/13 11:11 AM

Figure 5. Light reflection indicates whether a fillet is correctly formed or not.

Figure 6. Lifted lead inspection. The brightness profile of the pad end area is also a symptom of a lifted lead.

OK – Using Toplight illumination, the brightness level of the fillet area (1) is low. If the value of (1) is below a user defined threshold, the pad end area (2) will not be inspected.

NG – “No Solder” – The brightness level of the fillet area (1) is ≥ the brightness in the pad end (2).

OK – “High Solder Volume”– The brightness level of the fillet area (1) is higher than the user-‐defined threshold, therefore the pad end area (2) is inspected, looking for high brightness.

NG – “Lifted Lead”– The brightness level of the fillet area (1) is higher than the user-‐defined threshold, AND the brightness of the pad end area (2) is also low, indicating a poor solder fillet.

Figure 7. What the brightness level says about the fillet area and pad end area.

w w w . m i r t e c . c o m

JOIN...the Winner’s Circle!

AW A R D S

AN

D

C O U N T I NG

MS-153D SPI

MV-92D/3D AOI

MW-MI-23-CA-ad_203x275_Global-SMT5.indd 1 4/4/13 11:11 AM


improving product reliability through hAlT and hASS testing

Both techniques use stresses far beyond the normal operating condition. The pro-cess uses discovery testing in which prob-lems are found by testing to failure using accelerated stress conditions. HALT is a discovery test as opposed to a compliance test. The goal is to find problems, remove them and improve the product making it more robust.

HALT is an acronym for “highly accel-erated life tests” that was coined Dr. Gregg Hobbs in 1988 after having used the term “Design Ruggedization” for 18 years. In HALT testing, every stimulus of poten-tial value is used to find the weak links in the design and fabrication processes of a product. These stimuli may include vibra-tion, thermal cycling, burn-in, voltage, humidity, and whatever else will expose relevant weaknesses. The stresses are not meant to simulate the field environments at all but to find the weak links in the design and processes using only a few units and in a very short period of time. In order to obtain time compression in finding design weaknesses HALT steps up the stresses

to well beyond the expected field envi-ronment. HALT has, on many occasions, provided substantial (5 to 1000 times) MTBF gains. Even when used without production screening it has reduced the time to market substantially and also reduced the total development costs.

HASS is an acronym for “highly accel-erated stress screens.” HASS uses acceler-ated stresses (beyond product specifica-tions and as determined appropriate by earlier HALT testing) in order to detect product defects in manufacturing produc-tion screens. The accelerated stresses of the HASS program shorten the time to failure of defective units and therefore shorten the corrective action time and the number of units built with similar flaws. Many issues caused by process changes after HALT screening were previously seen only as early life failures in the field. With an appro-priate HASS implementation, these defects can now be detected and corrected prior to shipment. HASS is generally not recom-mended unless a comprehensive HALT has been performed, since without HALT,

HALT & HASS technology uses a combination of accelerated stresses to expose product flaws early in the design and manufacturing stages, which improves product reliability and customer confidence. HALT & HASS is used to uncover many of the weak links inherent to the design and fabrication process of a new product as well as during the production phase to find manufacturing defects that could cause product failures in the field.

Mark R. Chrusciel, Cincinnati Sub Zero, Cincinnati, Ohio, USA

Improving product reliability through Halt and Hass testing

Figure 1. Defect by test type [Chuck Laurenson, Parker Hannifin].



fundamental design limitations and flaws will restrict stress levels that can be applied in the HASS process. HASS can generate significant savings in screening costs as less equipment (shakers, chambers, moni-toring systems, power and liquid nitrogen) is necessary due to time compression in the screening process. As with HALT, HASS is discovery testing as compared to compli-ance testing.

“HALT testing is primarily used during the product design phase to reveal any defects and make the product more rugged and reliable. HASS testing is prin-cipally used to screen for manufacturing defects by stressing the product without causing damage or a significant reduc-tion of the product’s expected lifespan,” explains Glenn Kruschinski, Test Lab Director at Cincinnati Sub-Zero. “The most commonly-tested products include printed circuit boards, power supplies, medical products, monitors/displays, avionics, gears, transmissions, and GPS systems,” he adds.

the Halt processIn HALT, every stimulus of potential value, temperature, all-axis vibration, humid-ity, UV, radiation, etc., can be used under accelerated test conditions during the development phase of a product to find the weak links in the design and fabrication processes. Accelerated stresses in combina-tion (e.g. high-temperature ramp rates and all-axis vibration levels together) are neces-sary to compress or minimize the time to failure. Once again this method is aimed

at discovering and then improving weak links in a product during the design phase. This is a discovery test with the goal to find problems.

The chart in Figure 1 shows where design flaws were discovered during the HALT process and why all-axis vibration is important. As you can see, the All Axis Vibration Step Stress (blue) discovers 43% of defects while the Combined Temperature and Vibration (purple) discovers 31% of defects. Therefore, 74% of the flaws would have been missed without simultaneous, all axis vibration. By stressing the product beyond its design specification, operational and destruct limits can be determined, and decisions can be made on how to increase these margins. Each weak link provides an opportunity to improve the design or the processes, which will lead to reduced design time, increased reliability, and decreased

costs. Used properly, HALT compresses this design cycle while providing a signifi-cantly more reliable and mature product at introduction. Studies have shown that a six-month advantage in product introduc-tion can result in a lifetime profit increase of up to 50% for the market mover.1

Basic steps in Halt/Hass detection processPrecipitation means to change a defect that is latent or undetectable to one that is patent or detectable. A poor solder joint is such an example. When latent, it is prob-ably not detectable electrically unless it is extremely poor. The process of precipita-tion will transpose the flaw to one that is detectable, that is, cracked. The stresses used for the transformation may be vibra-tion combined with thermal cycling and perhaps electrical overstress. Precipitation is usually accomplished in HALT or in a precipitation screen.

Detection means to determine that a fault exists. After precipitation by whatever means, it may become patent, that is, detectable. Just because it is patent does not mean that it will actually be detected, as it must first be put into a detectable state. Assuming that we actually put the fault into a detectable state and that the built-in test or external test setup can detect the fault, we can then proceed to the most difficult step, which is failure analysis.

Failure analysis means to determine why the failure occurred. In the case of the solder joint, we need to determine why the joint failed. If doing HALT, the failed joint

74% of the flaws would have been missed without simultaneous, all axis vibration.

Figure 2. HALT/HASS chamber. Figure 3. HALT testing.



could be due to a design flaw; that is, an extreme stress at the joint due to vibration or possibly due to a poor match of thermal expansion coefficients. When doing HASS, the design is assumed to be satisfactory (which may not be true if changes have occurred) and in that case, the solder joint was probably defective. In what manner it was defective and why it was defective needs to be determined in sufficient detail to perform the next step, which is correc-tive action.

Corrective action means to change the design or processes as appropriate so that the failure will not occur again. This step is absolutely essential for success. In fact, corrective action is the main purpose of performing HALT or HASS. One of the major mistakes happening in the industry is that manufacturers “do HALT” and discover weaknesses and then dismiss them as due to overstress conditions. It is true that the failures occurred sooner than they would in the field, due to the overstress conditions, but they would have eventually occurred in the field at lower stress levels.

Verification of corrective action needs to be accomplished to determine that the product is really fixed and that the flaw that caused the problem is no longer present. The fix could be ineffective or there could be other problems causing the anomaly that are not yet fixed. Additionally, another fault could be induced by operations on the product, and this necessitates a repeat of the conditions that prompted the fault to be evident. One method of testing a fix during the HALT stage is to perform HALT again and determine that the product is at least as robust as it was before and it should be somewhat better. If in the HASS stage, performing HASS again on the product is in order. If the flaw is correctly fixed, then the same failure should not occur again.

The last step of the six is to put the

lesson learned into a database from which one can extract valuable knowledge whenever a similar event occurs again. Companies that practice correct HALT and utilize a well-kept database soon become very adept at designing and building very robust products with the commensurate high reliability.1

Comparing Halt and Hass chambersThere are many factors that need to be con-sidered when evaluating a HALT chamber purchase. One of the first obvious criteria is to look at a size that will handle the size of your DUT. Other factors to consider are the high and low vibration limits of the chamber, and the characterization of the table (how well is the vibration dis-tributed). A safety door interlock system should be in place to prevent the door from being open when liquid nitrogen is flowing into the chamber. It would also be useful to have multiple cable ports for any con-nections you need to make to your DUT, and front and rear doors on the larger size units. You will also want to check out the nitrogen and compressed air usage along with their sound levels.

With liquid nitrogen being the cooling media predominantly used in HALT testing, you need to consider how many tests you will be running per day, per month, to try to get a handle on the amount of liquid nitrogen that will be required, as you do not want to run out during the middle of a test. You can then contact a local gas supplier to find out what is the most cost effective solution to choose. If you currently have a source of liquid nitrogen in your facility, you will need to find out where it is located and where you plan to locate your chamber. Running the vacuum jacketed connection lines from the source to the chamber is very expensive

(estimates at approximately $200/running foot). It is also a good idea to put an oxygen sensor in your lab, in the event that too much nitrogen is escaping into the lab.

An ideal situation is to be able to run your DUT on a chamber before you make a purchase decision. Many chamber manu-factures will have a chamber available for your use and I would suggest that you take them up on their offer. This will also give you an opportunity to determine what fixtures will be necessary. They can also guide you through the first steps in setting up your HALT test.

Using fixturing that does not transmit the stress to the product under test can be a problem because sufficient levels of stress never reach the product. Three examples are: 1. Using a vibration fixture that will not

transmit the frequencies associated with critical modes of vibration of the product under test or isolates the mid-and high-ranges.

2. Using a thermal fixture that does not transmit the conditioned air to the product such that the product can be rapidly changed in temperature over a broad range.

3. Using electrical overstress and having some circuitry such as the lightning arrestor circuitry bleed off the high voltage before it gets to the internal circuits.

4. If the stress does not get to the product, then nothing has been accomplished.2

the basic steps of Halt Determination of operational and destruct limits for temperature and vibration is an important part of HALT. Some companies do not test to destruction due to the high costs of test units (like aerospace prod-ucts). Some engineers incorrectly think that HALT only consists of determining

Figure 4. Operating & destruct limits. Figure 5. Low temp test graph [IPC-9592A].



operational and destruct limits. However operation margins are important indica-tors of product robustness, and therefore reliability. Figure 4 shows the operating and destruct levels relative to the product specification.

Usually the starting point for HALT testing is to begin with each stress being applied separately, in a step-like fashion and then in combination. IPC-9592A Requirements for Power Conversion Devices for the Computer and Telecommunication Industries makes the same recommendation. A typical progres-sion of HALT would be: • Cold Thermal Step Stress (see Figure 5,

from IPC-9592A) • Hot Thermal Step Stress • Rapid Thermal Shock Stress • Vibration Step Stress • Combined Thermal and Vibration

Stress You may also uncover some intermit-

tent failures that the traditional HALT method may not uncover. Experience has shown that modulated six-axis vibration combined with slow temperature changes have exposed many flaws that could not be found any other way. Modern HALT and HASS equipment will easily do the modu-

lation and it increases detection efficiency by at least a factor of ten or more in many cases. It has been repeatedly demonstrated that patent defects could not be found until the Modulated Excitation was done. Many times, 100% of the patent defects cannot be found without it. This is especially true for cracked plated through-hole solder joints and cracked surface mount solder joints. Very low vibration levels are important if not essential.2

Since HALT and HASS may identify failure modes using “unrepresentative” stress conditions, it is easy for engineers to ignore important product improve-ment opportunities. Corrective action should also be verified, which may require a re-HALT to verify that a problem has indeed been solved (and that new problems were not introduced).3

summaryEvery weakness found in HALT offers an opportunity for improvement. Large margins translate into high reliability and that can result in improved profit margins. Today, HALT is required on an ever-increasing number of commercial and military programs. Many of the lead-ing companies are using HALT and HASS

techniques successfully; however, most of the leaders are being quiet about it because of the phenomenal improvements in reli-ability and vast cost savings attained. The basic philosophy is, “find the weak spots however we can and then make them more robust.”

Correct application of the techniques is essential to success and there are many incorrect sources of information on the techniques today. Consistently, completely and correctly used HALT and HASS always works to the benefit of the manufacturer and to the benefit of the end user. A typical return on investment for the techniques was 1,000:1 some 20 years ago and, with the improved techniques and much better equipment available today, we can do much better. This is why the real leaders do not publish.1

references1. G.K. Hobbs, Accelerated Reliability

Engineering: HALT & HASS, Hobbs Engineering, 2005

2. G.K. Hobbs, “Pitfalls to avoid in HALT and HASS”, 2007

3. A. Barnard, “The Ten things You Should Know about HALT & HASS”, 2012 IEEE

4. IPC-9592A Requirements for Power Conversion Devices for the Computer and Telecommunications Industries, 2010

Supplier of IPC certification and

SMT process training in Chennai – India

Contact:Tel: +91 (44) 425 508 14E-mail: [email protected]: www.scanditron.in

Training can take place at your own premises or in our

Training Centre with modern production equipment.

Please contact us for any inquiries.

Connect with us at:Meet us at Productronica

Hall no. 11 & Booth no 1232


Anthropologists believe that the great plagues of the middle ages can be attrib-uted, in part, to the decline in cleanliness standards including personal hygiene in that era. It seems that throughout history, the lack of cleanliness results in undesirable outcomes. Ironic, to say the least, is the fact that in our modern society cleanliness is valued greatly. There is, however, one area in which we pay little attention to cleanli-ness. This area affects almost every aspect of our lives. This area affects how we com-municate, travel, protect ourselves, play, work, eat, and even how we access medi-cal care. This area is electronics. It is nearly

impossible to think of life without electron-ics. We depend on electronics assemblies in nearly every aspect of our lives. Why then do we not demand a higher level of cleanli-ness with electronics assemblies?

Unfortunately, the answer to that question is common. When industry-favorite solvents were banned due to envi-ronmental concerns in 1989, the industry, rather than switching to environmentally responsible alternative solvents chose instead to adopt a no-clean approach. New low-residue flux formulations were intro-duced, leaving only small amounts of flux residue on the assemblies. The volume of

Over the past 28 years, the electronics assembly cleaning industry has gone through three distinct periods. There was the period before 1989 when virtually all assemblies were cleaned after soldering. Then there was the period between 1989 and 2005 when cleaning was the nearly exclusive realm of military, aerospace and medical (high-reliability assemblers). Now is the current period—2005 to present—where, according to industry poles, two thirds of all assemblers are cleaning their assemblies and 52 percent of all no-clean solder paste applications result in cleaning.

Mike Konrad, Aqueous Technologies Corporation

why no-clean cleaning works today


New Jade FP

Performance Beyond Expectations



residues left on the assemblies was, at that time, considered to be acceptable. The industry weighed the cost of switching to alternative solvents and compatible equip-ment against accepting small amounts of residues on assemblies. Cost savings won. But not everyone abandoned cleaning. Military, medical, aerospace and other high-reliability maintained a cleaning program. Most of these industries switched to alternative cleaning technologies, most often aqueous-based cleaning methods. It seems that cleaning is required only when reliability is paramount.

This dual alternate universe, 100 percent cleaning of every assembly with high-reliability assemblers vs. 100 percent not-cleaning of commercial assemblers, lived mostly happily side by side for many years. Over time, however, many commer-cial assemblers have adopted a cleaning process. As referenced earlier, two thirds of all assemblers state that they clean between 25-100 percent of their assemblies. Of the multitude of commercial assemblers using no-clean solder pastes, 52 percent of them are cleaning after reflow. What is the driver for the rapid rise in the amount of assem-blers adopting or readopting a cleaning process?

There are many factors that drive our industry back to cleaning. In fact, the primary driver is identical to the one that, 24 years ago, steered assemblers away from cleaning in the first place—economics.

One frequently overlooked factor is that when assemblers stopped removing flux from their assemblies due to the implementation of low-residue fluxes, all cleaning stopped. Contamination from the bare board fabrication, component fabrica-tion and assembly processes were allowed to remain on the assembly along with flux residues. The fact is that modern miniatur-ized, lead-free assemblies cannot tolerate as much contamination as assemblies of the past. Smaller assemblies, higher densities,

lower component standoff heights, faster speeds, and higher reflow temperatures all combined to create the perfect storm of events that are causing electrical migration and electrical leakage failures on assemblies throughout the world. In field assembly, failure is costly in terms of both economic and reputation concerns. A measurable percentage of the electronics industry has determined that it is more cost effective to remove contamination than to reap the cost of contamination-related failures.

There are many perceived challenges when one considers the adaptation of a cleaning process: What is the cost of cleaning (cost per assembly)? What is the cost to the environment (kudos to those who consider the environment)?

So, what is the cost of cleaning? Many assemblers have discovered that it is surprisingly low. There are many cleaning methods, machines and processes avail-able from which to choose. The correct specific method is determined by several variables including desired throughput, types of contamination being removed, environmental restrictions, etc. While there is no “one size fits all” solution, there are a handful of solutions that fit almost all assemblers. We spend a lot of time talking

about a “properly optimized process” (the correct machine to match the required throughput, equipment readiness, cleanli-ness requirement and discharge configu-ration). When one has a properly opti-mized process, one may expect total cleaning costs per assembly to be under USD $0.06 per assembly for low discharge cleaning applications (environmentally beneficial) to USD $0.16 per assembly for zero-discharge (environmentally respon-sible).

Many assemblers have resisted cleaning processes for strictly envi-ronmental reasons. Many have been concerned that by solving one issue (assembly failures), they would exchange that issue for another (environmental

regulatory issues). The fact is that recent advances in cleaning technology have allowed assemblers to clean assemblies, regardless of flux type, and operate in a completely zero-discharge configura-tion. By operating a cleaning process that reuses the cleaning chemical, lowering operational costs, without a connection to a drain, and bypassing environmental regulations, one can experience an opti-mized cleaning process that eliminates contamination-caused assembly failures while obtaining an acceptable cost per cleaned assembly, and a total avoidance of environmentally-based regulation. This is a win-win scenario.

Mike Konrad is President and Founder of Aqueous Technologies, a California-based manufacturer of automated cleaning/defluxing equipment and cleanliness testing equipment. Mike travels the world teaching cleaning and reliability workshops, provid-ing valuable cleaning process information to companies wishing to implement clean-ing processes. Mike can be reached at 9055 Rancho Park Ct., Rancho Cucamonga, CA 91730; 909-944-7771E-mail: [email protected]; Web site: www.aqueoustech.com.

So, what is the cost of cleaning? Many assemblers have discovered it is surprisingly low.

[email protected]

Discover all of our cleaning products

Discover VOC-Free Flux Remover UltraClean™

Cleans rosin-based fluxes & pastes, “no-clean” fluxes and silicone residuesCleans “no-clean” fluxesVOC-exempt formula

Discover Perfectly Clean

•

•

•

“MicroCare”, the MicroCare logo and “UltraClean” are trademarks or registered trademarks of MicroCare Corp.


iPC APeX india: The Pathway to Growth

India has a growing electronics manufac-turing market and is expected to expand, with the Indian government and entrepre-neurs taking steps to create a $100 billion (USD) electronics products industry in India over this decade. To help manufac-turers meet this demand, IPC APEX India™ will present the latest innovations from some of the world’s leading companies in the areas of printed board design and manufacturing, electronics assembly and test. The electronics products industry in India is projected to grow substantially, and IPC APEX India will show attendees how to grow with it.

Only IPC APEX India provides the content that meets the highest standards of relevance for real-world challenges and ambitions. Because IPC — Association Connecting Electronics Industries® is the world leader in setting standards for the estimated $2.17 trillion global electronics manufacturing industry, users expect only the best from this program. In this climate of opportunity, IPC APEX India will bring the latest research findings, best practices, knowledge and partners to attendees.

IPC will host IPC APEX India from 26–29 August 2013, at the NIMHANS Convention Centre in Bangalore, India. A

global leader among standards-developing organizations in electronics manufac-turing, IPC brings its technical expertise to provide a pathway for growth to manufac-turers in India. IPC APEX India will offer professional development workshops on 26–29 August, as well as a technical confer-ence on 27–29 August. It also will feature the IPC PCB design contest and a hand soldering competition. These events are all in addition to the three-day exhibition on 27–29 August, which will allow visitors to meet with the industry’s top suppliers as well as compare, touch and see demos of the most innovative, leading-edge equip-ment that the industry has to offer.

Kicking off the event, the IPC PCB Design Contest will recognize design expertise. The contest is open to PCB designers with advanced knowledge in any of the Mentor Graphics Expedition/Pads, Cadence-Allegro/OrCAD and Altium tools. It will be judged by a panel of industry experts on the following criteria: CAD tool expertise, design technology, design standards, overall understanding of PCB design requirements and speed to perform. Participants will be able to bench-mark their PCB design skills against peers, network with some of the most talented

designers in the industry and receive recommendations from CID+ and world-class specialists in the field about how to improve performance. The winner and runner-up will receive a cash award as well as free registration to the IPC CID+ certi-fication course.

The IPC APEX India technical confer-ence will feature paper presentations that reveal new research and innovations in the electronics manufacturing industry. Attendees will have the opportunity to interact with the experts who are charting the course for tomorrow’s technology. The three-day technical conference provides sessions focused on counterfeiting, design advancements, industry innovations, quality assurance, failure analysis and design reliability, and more.

In addition to a cutting-edge confer-ence session, IPC APEX India will offer a comprehensive schedule of both half- and full-day professional workshops designed to help attendees find solutions to their most pressing concerns in electronics tech-nology or industry-related business issues. These seminars will focus on a variety of educational courses lead by knowledgeable, well-known instructors.

The reliability of electronic equip-ment is ensured by zero-defect soldering processes. To help hone these skills, IPC APEX India will present the IPC Hand Soldering Competition, which is designed to recognize the best skills in hand soldering complex electronic equipment. Over three days, participants will compete against one other to build a functional electronics assembly within a 30-minute time limit. Assemblies will be judged on soldering in accordance with IPC-A-610E Class 3 criteria, speed and overall elec-trical functionality. IPC-A-610 Master Instructors will serve as the judges. Cash awards and free admission to certifica-tion courses will be awarded to the winner and runner-up. The winner of the Hand Soldering Competition at IPC APEX India 2013 is eligible to participate in the IPC APEX EXPO 2014 Hand Soldering World Championship. The stakes are high, so plan to attend this event.

For more information about IPC APEX India, visit www.ipcapexindia.in.

IPC aPeX India: the Pathway to Growth

iPc aPeX inDia aT a gLance

Monday, 26 August08.00–17.00 PCb Design Competition and Awards Presentations08.00–17.00 Professional Development workshops

Tuesday, 27 August10.00–12.00 inauguration10.00 Show Opens13.00–17.00 Technical Conference13.00–17.00 Professional Development workshops13.00–17.00 hand Soldering Competition

Wednesday, 28 August08.00–17.00 hand Soldering Competition08.30–17.00 Professional Development workshops09.00–12.00 Technical Conference

Thursday, 29 August08.00–12.00 hand Soldering Competition — Finals08.30–12.00 Professional Development workshops09.00–12.00 Technical Conference13.00–15.00 Felicitations & Concluding Ceremony

IPC APEX India Gold Sponsors: Kaynes Technology and Sumitron®

5 September 2013 | Hall #8, Pragati Maidan, New Delhi | www.smaled.com

Co-located with electronica India and productronica India

brochure.indd 1 8/21/13 10:56 AM

5 September 2013 | Hall #8, Pragati Maidan, New Delhi | www.smaled.com

Co-located with electronica India and productronica India


This conference, now in its third year, offers a unique and timely focus on SMT and LED manufacturing technologies to manufacturers and assemblers across India. It provides attendees with a unique opportunity to examine, learn and debate business-critical manufacturing issues through industry discussion, technical collaboration and information sharing with international experts in the �ield.

SMALED 2013, the Surface Mount and Light Emitting Diodes conference is being held in New Delhi, Pragati Maidan (conference Hall no. 8) on 5th September 2013 in conjunction with the electronica India and productronica India events and will comprise a one day conference.

Register online at www.smaled.com.

The conference takes place 5 September 2013, Hall #8, Pragati Maidan, New Delhi, IndiaRegister for electronica India at www.electronica-india.com or productronica India at www.productronica-india.com

Organisers Event sponsored by

KEYNOTE ADDRESS BY RAHUL CHOUDHARY, CEO, TATA POWERMr. Rahul Chaudhry, after two decades of experience in the Telecom arena with multinationals such as AT&T, Motorola and British Telecom, returned to India in 2001, joining the Tata Group as the CEO Tata Power Broadband.

In 2004, Mr. Chaudhry took over the most diversi�ied Indian private sector defence prime contractor Tata Power SED. He was nominated as a member of Vijay Kelkar Committee constituted by Hon. Raksha Mantri to recommend measures for strengthening self-reliance in defence preparedness with increased participation of the Indian Industry.

He brings an extensive multinational experience in technology, project management, business development, mergers & acquisitions, operations, corporate governance and developing strategic partnership. His key strengths are evaluating complex technology issues for their ef�icacy in meeting customer requirements, developing partnerships and uncovering win-win situations.

Mr. Rahul Chaudhry currently serves as Co-Chairman of the FICCI National Defence Committee and Chairman of the CII’s National Defence Policy and Strategy Sub-Committee. He is also a fellow of IETE.

Come learn about current commercial developments in electronics manufacturing and solid state lighting, including high brightness (HB) LEDs. Network with your peers and industry experts. Exchange ideas. Meet new business partners. Explore the latest in surface mount and LED equipment, materials and components. Open yourself to enormous business opportunities.

Held alongside the venerable electronica India and productronica India trade fairs, delegates enjoy access to India and South-Asia’s leading exhibitions for electronics components, systems and applications (electronica India) and electronics production technologies (productronica India).

CONFERENCE ON SURFACE MOUNT & LIGHT EMITTING DIODES


Accurate in-line 3D measurement for process controlThorsten Niermeyer, Koh Young, IncProcess control is essential to maintain quality and enable process improvement. To �ind gross defects, 2D inspection may be suf�icient, but in order to reliably �ind all defects and detect process deviations, 3D measurement is mandatory. This presentation demonstrates the ability of 3D measurement to provide vital feedback on the production process and contribute to essential process improvement.

Design for manufacturing and assemblyMs. Savita R. Ganjigatti, SIENNA ECAD Technologies Pvt LtdProduct iterations happen due to yield issues. How to overcome yield issue? Design for Assembly and Design for Fabrication are crucial for any PCB design. This shrink the proto design phase and drastically minimize project expenses while assuring a direct drive from prototyping to production. This paper attempts to summarize how PCB design could be made exceptionally ef�icient by taking care of DFA/DFF aspects.

Improving electronic circuit reliability in harsh environmentsChris Palin, HumisealThis presentation looks at the basic causes of electronic circuit failure due to high humidity and corrosive atmospheres and the steps that can be taken to prevent failure and improve reliability.

LED—Forward and backward inte-gration opportunities for EMS industryRamesh Agrahar, KAYNES Technology IndiaLED as a light source has attracted government incentives and thrown open a big opportunity for the manufacturing sector. This presentatino covers the strategic considerations facing EMS providers seeking to expand their services to include the design and manufacture of LED based products.

Low Temperature Assembly of LEDsRavi Bhatkal, ALPHALow temperature assembly of LEDs has the potential to lower process energy costs and system costs. This talk presents a low temperature solder technology for LED assembly for T8 tubes, providing recommendations for the use of the low temperature solder, examples of potential process energy consumption reduction, and a path to system cost reduction.

Regulatory requirements for LED luminariesKalyan Varma, TUV Rheinland India Pvt. Ltd.With the revolution of LED technology, the lighting industry has undergone a huge transformation. As with any technology, there is concern for the safety of LED lighting. Regulations a numerous and differ from country to country. A basic understanding of these regulations is necessary for manufacturers to gain access to new market segments.

Rework Challenges for LED/LGA/QFN/POP/Micro-Smd PackagesPaul Wood and Dilip Rane, OK InternationalThis presentation will detail how to remove the device safely from the PCB, clean the site, then either print solder paste or �lux dip on to the part for successful rework replacement.

Solder paste jetting, an alternative or add-on tool for paste depositionDavid Koh, MYDATA Asia Pvt LtdThis non-contact method of applying solder paste, which builds up volume by single dots to achieve the precise amount for each component, has a large number of advantages compared to standard screen printing or dispensing. Depending on the volume requirements, jet printing can be an alternative tool to cope with mixes of large and small components on the same board or be used as an add-on tool to compliment the screen printer in a high volume environment. Special applications, like pin in paste, applying paste in cavities and many more current challenges, can easily be accommodated with this technology. Practical production challenges will

be covered in this presentation, and a suggested solution will be provided.

Strategic electronics—Opportunities for Indian manufacturers under defense off setsS Gnyana Sundar, Tata Power Company Ltd, Strategic Electronics DivisionThe Defense Procurement Policy (DPP) lays down the guidelines for defense procurement. The important aspect of DPP that helps the Indian manufacturing industry is “Defense Offsets.” This presentation will discuss the opportunities, quali�ication requirements, investments and responsibilities expected of Indian manufacturers in order to bene�it from the emerging defense market in the country.

Technological developments in solid state lighting and opportunities for IndiaVijay Gupa, Quality PhotonicsGiant technological advances and a steep fall in prices in LEDs have pushed them into the domain of mainstream lighting, presenting a great potential for India. The rapidly emerging solid-state lighting technology can fortify the nation’s energy security, reduce carbon emissions and support in economic upturn by saving 50 terawatts of power and Rs 30000Cr (US$30b). This presentation will illustrate the fast-paced technological developments in LEDs and the manufacturing ecosystem required for LED-based lighting products.

Yield improvement utilising AOI and x-rayKeith Bryant, Nordson DAGEMaximising yield and monitoring quality are two key areas in achieving success in today’s challenging environment Many businesses still rely on the eyes of their operators and basic lab style equipment to ensure the quality of their processes. This presentation compares visual examination and basic lab style equipment with the use of AOI and x-ray systems to monitor production. The real numbers produced when AOI and x-ray are is added to small or large enterprises will be shared.

FEATURED PRESENTATIONS


Time Topic Presenter09:30 - 09:45 Registration09:45 - 10:00 Inaugural address Organizer & co-organizer10:00 - 10:25 Keynote address Rahul Choudhary, CEO

Tata PowerStrategic Electronics Division

10:25 - 10:50 Accurate in-line 3D measurement for process control Thorsten Niermeyer, Global Sales DirectorKoh Young Inc

10:50 - 11:15 Yield improvement utilising AOI and x-ray Keith Bryant, Sales & Marketing DirectorNordson DAGE

11:15 - 11:40 Reliability requirements for supply to defense avionics

Col. V. Kuber (Retired)

11:40 - 11:55 Tea/Coffee Break11:55 - 12:20 Solder paste jetting, an alternative or add on tool for

paste depositionDavid Koh, Managing DirectorMYDATA Asia Pvt Ltd

12:20 - 12:45 LED- forward and backward integration opportunities for EMS industry

Ramesh Agrahar , VP TechnicalKaynes Technology India Pvt. Ltd.

12:45 - 13:10 Improving Electronic Circuit Reliability in Harsh Environments

Chris Palin, European Sales ManagerHumiseal Inc

03:10 - 13:35 Strategic electronics—Opportunities, challenges and responsibilities in defense offsets

S Gnyana Sundar, Ex-Program Director Offsets & AvionicsTata Power, Strategic Electronics Division

13:35 - 14:30 Lunch14:30 - 14:55 TBA Makrand Sainis – VP, Wipro*14:55 - 15:20 Low temp. assembly of LEDs Ravi Bhatkal, VP, Energy Technologies

ALPHA15:20 - 15:45 Design for manufacturing and assembly Ms. Savita R. Ganjigatti,

VP Engineering—PWB DesignSIENNA ECAD Technologies Pvt Ltd

15:45 - 16:00 Tea/Coffee Break16:00 - 16:25 Technological developments in solid state lighting and

opportunities for IndiaVijay Gupa, Managing DirectorQuality Photonics

16:25 - 16:50 Regulatory requirements for LED luminaires Kalyan Varma,Country Head—Business Stream ProductsTUV Rheinland India Pvt Ltd

16:50 - 17:15 Solid state LED lighting technology performance evaluation

Central Power Research Institute spokesperson *

17:15 - 17:30 Vote of thanks

Trafalgar Publications Group Pvt Ltd is a wholly-owned division of Trafalgar Publications Limited. Headquartered in New Delhi, the company publishes South East Asia editions of Global SMT & Packaging and Global Solar Technology magazines. TPG also publishes websites and newsletters and produces video programming at major Indian trade shows.

Trafalgar Publications Ltd is headquartered in London, England. It was founded in 1999 and publishes the magazine imprints Global SMT & Packaging, Global Solar & Alternative Energies (formerly Global Solar Technology) and Global LED/OLEDs. Print editions are published in Europe, USA, China and South East Asia.

Event Producer

CONFERENCE PROGRAMME

SMALED 2013 is co-organized by Global SMT & Packaging magazine, Global LEDs/OLEDs magazine and Messe München International.

Register online at www.smaled.com.

SMALED 2013 is co-organized by Global SMT & Packaging magazine, Global LEDs/OLEDs magazine and Messe München International.


Title


messe münchen

november 12 – 15, 2013

www.productronica.com

20th international trade fair for

innovative electronics production

for electronic manufacturing

more informationwww.productronica.com/en/2013

p13-Helga-Dach_203x275-GlobalSMTPackag_E.indd 1 12.06.13 14:24

The ASYS Group is a globally operating technology company and leading supplier of machines for the electronic, photovoltaic, semiconductor and pharmaceutics indus-tries. The company has installed more than 41,000 systems worldwide.

The ASYS brand guarantees the same high standards of quality and workman-ship all over the world. The company invests continuously in state-of-the art production processes at its worldwide sites. The production space at the headquarters in Dornstadt is constantly increasing and currently amounts to more than 22,000m².

The ASYS Group provides a unique product portfolio from different fields of technology such as handling, marking, depaneling, final assembly, testing, and screen printing. Therefore, complete production lines can be offered from a single source. Thanks to synergy between the various product areas, new solutions and products can be optimized.

Products are developed at different company locations. A powerful network connects the locations, enabling tech-nology transfer from the research and development departments.

Under the SMD business, ASYS offers the following products & services:• Handling systems, tray handling and

transfer systems, marking and reading systems, depaneling systems, screen and stencil printers, test and measure-ment systems, final assembly systems

• Customized line solutions• Cleanrooms, dry storage and storage

lift systems

Under the ASYS SOLAR brand, the company provides equipment and produc-tion lines for the back end of solar cell manufacturing:• Complete Metallization Lines in single,

dual and triple lane configuration• Platform solutions for wafer prestruc-

turing (laser and screen printing) and bare wafer classification

• Process machines such as screen printing systems, laser systems, inspec-tion and test systems, handling systems and cell sorters

ASYS and EKRA products are manu-factured in three manufacturing plants, two in Germany and one in Singapore.

Advertorial

asys Group: transforming Ideas into solutions

Advertorial—

key MIlestoNes

1992 Founding of ASyS Automation Systems

1996 extension to 3,000m²

1998 iF Design Award winner

1999 Founding of ASyS Singapore

2000 Founding of ASyS China, Shanghai

2001 bosch Supplier Award

2002 Market entry into solar business

2004 Siemens Partnership Award

2005 The eKrA Gmbh becomes a member of the ASyS Group

2008 extension to 18,840 m²

2009 botest Systems and botest Printed Sensors become a member of the ASyS Group

2011 ASyS TeCTOn becomes a member of the ASyS Group

2012 extension to 23,505 m².

messe münchen

november 12 – 15, 2013

www.productronica.com

20th international trade fair for

innovative electronics production

for electronic manufacturing

more informationwww.productronica.com/en/2013

p13-Helga-Dach_203x275-GlobalSMTPackag_E.indd 1 12.06.13 14:24

Title


A princely city with its pristine beauty has metamorphosed from being a pensioner’s paradise to being one of the major cities of Karnataka; home for many great musicians, scholars, dancers, intellectuals; delightfully laid out gardens, Mysore is fast emerging as one of the investor’s favorite destina-tions. The very name Mysore conjures up fascinating Silks, Magnificent Palaces, Sandalwood and Enchanting Agarbathies.

Perhaps it is little known that, Mysore is also host to one of the country’s major EMS providers- the Company started up in the late 80s and was christened as Rangsons Electronics Pvt Ltd [REPL] in 1993, when it underwent substantial restructuring. Rangsons is evolving as a major global player with an impressive list of customers from several continents and a veritable defense clientele from the Mediterranean region. Rangsons Electronics is a part of the proud legacy of the US $200 mn NR Group, established in 1948 and now a repu-table business house in the South, that pioneered Agarbathi, made in Mysore and successfully put India on the global map.

Rangsons Electronics boasts a state-of-the-art infrastructure and a dynamic team of professionals. With a relentless focus on quality and delivery, Rangsons Electronics is aiming to be the market leader in high-mix, high-tech electronic manufacturing segments—medical electronics, indus-trial electronics, automotive electronics, defense and aviation. REPL along with value chain/partners has built up an ECO system to offer products and services that are required to transform “ideas into

tangible benefits”” including pre-assembly services like Design for Manufacturability, Design for Assembly, Design for Testability, Reliability Evaluation, Design Validation, sourcing & procurement of electronic components, mechanical, plastic/polymer parts and aluminum parts.

As a measure of forward integration, REPL has been launching a slew of new business initiatives and forming up joint ventures. The resulting technology trans-fers are intended for elevating product deliverables to global standards. Today, with many a differentiating factor and having a global footprint, REPL is recog-nized as the preferred partner to leading OEMs across the world. Global giants like ABB, Honeywell, GE, Bosch worldwide, Thales, IAI- Israel, Larsen and Toubro, are partnering with the company on major projects/products on turnkey basis. REPL’s long association with its customers is mainly attributed to its robust processes and systems.

the journey so far…REPL initially worked on the consigned kit model for PCB assembly services and catered to the domestic market. REPL was able to leave their ‘quality’ imprint with all customers and soon made rapid progress. Within a span of three years, REPL was the most sought after supplier for several major customers in India.

The next milestone was achieved when REPL became one of the first few EMS companies of Indian origin to be approved by one of the global giants for health-

care products, followed by yet another milestone; offering PCB assemblies on a turnkey basis.

By 2000, REPL had established itself as a strong player in PCB assembly. It was at this juncture that Mr. Pavan Ranga took over the helm at Rangsons Electronics. This helped in expanding growth strategies by entering into new verticals, developing strong relationships with leading global brands. The focus on customer satisfac-tion has elevated REPL into becoming one of the fastest growing EMS companies with an established track record of serving customers in India, North America, Europe, Japan and China. In 2001, Rangsons actively involved itself in the ems-Alli-ance, a global alliance of EMS giants from various countries, to make inroads into the global arena. In order to establish itself as a

“Total Electronics Manufacturing Solutions” company, REPL has introduced new services to its portfolio such as design vali-dation, New Product Integration (NPI) and product integration. In 2004, an exclusive plant was set up to offer box build services to the major customers. By 2005, REPL was established as a provider of integrated solu-tions and product life cycle management by adding cable harness and design / re-engi-neering services. Operating in world-class, state-of-the-art facilities in Mysore, REPL delivers high reliability to all sectors.

Being one of the first AS 9100C certi-fied companies in India, Rangsons has to its credit the successful execution of various Aerospace and Defense programs. REPL is in a joint-venture with Schuster to develop

Company Profile—Company Profile—rangsons electronics Pvt. ltd.

RangSonS eLecTRonicS PVt. ltd, Mysore


Title

high-end tubes & hoses and similar special parts for aviation applications, ATE solu-tions for military and space requirements that have highly critical applications.

Rangsons Electronics rigorously follows quality control/assurance tools like PFMEAs, DOE, Gauge R&R, SQC tools, 8D, SGAs, Kaizens, CIPs for continuous improvements and customer satisfaction.

REPL has consistently been awarded with “Best Supplier” awards from majority of the customers in addition to winning national level competitions by QCFI, IPC and similar organizations.

The Infrastructure supports capacities of 2 Billion components a year and the latest high technology equipment -such as Sonoscan X-ray, JTAG testing, ICT, AOIs, functional testers, flying probe tester, envi-ronmental testing facility, ATE test, BGA rework stations, etc all set up in an ESD controlled environment.

REPL has established a separate dedi-cated cable harness facility to service the high end requirements of avionics and space sectors. Added to this they have an independent NPI entity for completing total bandwidth of solutions in the EMS. Apart from this they have acquired a fine machining facility for the supply of critical parts to the defense & avionics sector. The NPI facility is independent and focuses on high-tech development, design services and handles projects with leading customers to develop end-to-end solutions.

The company has matured processes and follows all international standards of IPC like IPC JSTD 001, 610, WHMA 620, CH65, A 600 and many related standards and have IPC certified people in all areas. They have the quality certifications to their credit like ISO9001, ISO 14001, OHSAS 18001, ISO 13485, and AS9100. The orga-nization is now working towards IRIS and NADCAP certification/approval.

REPL is the only company to have set up a HALT/HASS facility with the environ-mental and reliability testing in-house.

differentiating factors and strategiesWhile interacting with Mr. Pavan Ranga, CEO, many critical success factors of man-aging the company were realized. Indeed, they also hold truefor many EMS compa-nies offering services covering the whole gamut of PCBA. The verticals include, PCB assembly, system integration, independent NPI, HLA, testing, reliability evaluation, etc and the horizontal spread includes Critical sectors like the avionics, defense, healthcare, cable assemblies, RF cable test-

ing, magnetics, etc. The ability to integrate all these with a strong and effective pro-gram management is the differentiating factors said, Mr. Pavan. “We are building up competencies in advanced solutions in the EMS sector and we have already set up an MRO facility for the first time as an EMS to service the avionics equipment in this direction” he adds. Further, he says, “We have built up an ECO system for effective technology transfers, and we have defined a route/process for global players to come to India. The vision is to satisfy the needs of the defense and avionics industry in India, because once the challenges are met, you are automatically building up on the skill sets which can easily be deployed to serve the global market needs”

REPL has made it’s mark by part-nering with the top three companies in all sectors they are servicing, which is also a very healthy strategy. The philosophy and the strengths of the company are in caring for its people and customers. REPL prides itself for its long standing associa-tion with all its customers. Almost 60% of its growth, in recent years, comes from existing customers, but the company is still broadening it’s service bandwidth. People management is effective to the extent everyone understands their value contribution for the qualitative and quan-titative growth of the company. People are empowered and the show goes on without much interference from the top management, on all running projects. The attrition rate at REPL is less than 7% compared to the industry average of 20% in the electronics industry. All the interna-tional customers have rated the facility and infrastructure in line with the global EMS players, not to mention, on one occasion they were directly placed in line with one of the Flextronics facilities overseas and in

another case study, the order fulfillment rating exceeded 95% over a continuous period of 18 months. “All these bear testi-mony of Our Company marching towards global recognition” says Pavan.

When asked about his reactions on the National Electronics policy, he says, “it is highly encouraging and we have already planned to leverage upon the M-SIPS announced in the policy, where EMS is also included. We have already advanced on major decisions leveraging on the policy provisions”.

The Vision for REPL is to become a “Total Solution Provider” with zero gaps in all sectors, and move towards bulk manufacturing in the high-tech area for the domestic sectors. The capacities, skill sets and the infrastructure are established. Presently, nearly 75% of the revenues are from Exports, but the company would

‘change its strategies to focus on domestic critical applications, to build upon its strengths, and this would allow a smooth transition to the global market’ feels Pavan.

“We have already implemented JVs for manufacture of special parts & the facility is managed by experts from overseas and with a very clear vision and strategies, we don’t fore see any major hurdles internally or externally from competition or other-wise. Also, the market and the opportuni-ties are big enough for everybody with the right vision and strategies supported by the strong, integrated program manage-ment skill sets” concludes Pavan.

Address:Rangsons Electronics Pvt Ltd,Plot 347-D1& D2, KIABD Electronics city,Hebbal Indl Area, Mysore 570016, IndiaPh: +91 821 428 0000 Fax: +91 821 400 0369URL: www.Rangsons.com

Company Profile—rangsons electronics Pvt. ltd.


International diary4-6 September 2013electronica India productronica IndiaNew Delhi, Indiaproductronica-india.com

4-6 September 2013SEMICON TaiwanTaipei, Taiwansemicontaiwan.org

5 September 2013SMaLEDNew Delhi, Indiasmaled.com

29 September-3 October 2013IMAPS Intl Symposium MicroelectronicsOrlando, Florida, USAimaps2013.org

8-10 October 2013SEMICON EuropeDresden, Germanysemiconeuropa.org

10-12 October 2013NEPCON VietnamHanoi, Vietnamnepconvietnam.com

13-16 October 2013electronicAsiaHong Kongelectronicasia.com

15-16 October 2013SMTA InternationalFort Worth, Texas, USAsmta.org/smtai

12-15 November 2013productronicaMunich, Germanyproductronica.com

4-6 December 2013SEMICON JapanMakuhari, Japansemiconjapan.org

15-17 January 2014INTERNEPCON JapanTokyo, Japannepcon.jp

12-14 Feburary 2014SEMICON Korea Seoul, Koreasemiconkorea.org

international Diary

Demands for higher quality and accuracy of PCB cutting are rising constantly. See for yourself how interesting laser depaneling is for your thin rigid and flex PCBs. Learn more at: www.lpkf.com/laser-depaneling

It’s Time for a Change

Productronica: 12. – 15 November 2013 Munich, Hall B2, Booth 105

NEW SM & SLM SERIES SOLUTIONS n 75,000 CPH (optimum) n 2-gantry x 10 spindles/head n Places 0402 (01005 inch) chips to 14 mm ICs n PCBs to 510 x 460 mm (standard) n Electrically driven high-speed & high-precision feeder n Automatically aligns pickup positions n Compatible with SM pneumatic feeders n Pickup by on-the-fl y image recognition technology

n 39,000 CPH (optimum) n 1-gantry x 10 spindles/head n Places 0402 (01005 inch) chips to 42 mm ICs n PCBs to 460 x 400 mm (standard) n Electrically driven high-speed & high-precision feeder n Automatically aligns pickup positions n Compatible with SM pneumatic feeders n Pickup by on-the-fl y image recognition technology

n 28,000 CPH (optimum) n 1-gantry x 6 spindles/head n Places 0402 (01005 inch) chips to 55 mm ICs n Up to 75 mm connectors n Electrically driven high-speed & high-precision feeder n Automatically aligns pickup positions n Compatible with SM pneumatic feeders n Pickup by on-the-fl y image recognition technology

n 21,500/43,000 CPH n Places 0603 to 32 mm n Super-large PCBs to 1200 x 356 mm n Compact size: 1650 mm long x 1200 mm deep n Non-stop recognition by fl ying vision system n Reinforced convenience function dedicated to LED n Simultaenous placement of two PCBs n Simultaneous pickup solution with one feeder

Flexible High Speed Chip Shooter

SM471

SM481Advanced High Speed

Flexible Mounter

SM482Advanced

Flexible Mounter

SLM110/SLM120

High-Speed SMART LED Mounter

Samsung GSP SEA 4.5-v4.indd 1 8/21/13 10:05 AM

NEW SM & SLM SERIES SOLUTIONS n 75,000 CPH (optimum) n 2-gantry x 10 spindles/head n Places 0402 (01005 inch) chips to 14 mm ICs n PCBs to 510 x 460 mm (standard) n Electrically driven high-speed & high-precision feeder n Automatically aligns pickup positions n Compatible with SM pneumatic feeders n Pickup by on-the-fl y image recognition technology

n 39,000 CPH (optimum) n 1-gantry x 10 spindles/head n Places 0402 (01005 inch) chips to 42 mm ICs n PCBs to 460 x 400 mm (standard) n Electrically driven high-speed & high-precision feeder n Automatically aligns pickup positions n Compatible with SM pneumatic feeders n Pickup by on-the-fl y image recognition technology

n 28,000 CPH (optimum) n 1-gantry x 6 spindles/head n Places 0402 (01005 inch) chips to 55 mm ICs n Up to 75 mm connectors n Electrically driven high-speed & high-precision feeder n Automatically aligns pickup positions n Compatible with SM pneumatic feeders n Pickup by on-the-fl y image recognition technology

n 21,500/43,000 CPH n Places 0603 to 32 mm n Super-large PCBs to 1200 x 356 mm n Compact size: 1650 mm long x 1200 mm deep n Non-stop recognition by fl ying vision system n Reinforced convenience function dedicated to LED n Simultaenous placement of two PCBs n Simultaneous pickup solution with one feeder

Flexible High Speed Chip Shooter

SM471

SM481Advanced High Speed

Flexible Mounter

SM482Advanced

Flexible Mounter

SLM110/SLM120

High-Speed SMART LED Mounter

Samsung GSP SEA 4.5-v4.indd 1 8/21/13 10:05 AM

Depaneling

Tray and Transfer Systems

Final AssemblyEKRA Screen and Stencil Printing

HandlingMarking

Solder Paste Printing Systems

CONTACT:

ASYS Group Asia Pte Ltd 30 Shaw Road #01-02/03, Singapore 367957Mr. Wolfgang Heinecke, Tel +65 6280 8887, [email protected]

ASYS Group Asia Pte Ltd – India, Indonesia, Malaysia, S.Korea, Taiwan, Thailand, Vietnam

Visit our new website: www.asys-group.com

XPRT 2 | Entry-Level Designed in Germany, Made in Singapore Alignment accuracy: ± 10µm Quickest product changeover For printing of fl exible & rigid substrates Additional options can be integrated

XPRT 3 | Midrange Alignment repeatability: ± 15µm @ 6 Sigma Cycle time: 10 s + print Printing area 508 x 508 mm (20 x 20 inches) Patented EKRA Vision Alignment System (EVA™) Quickest product changeover in < 5 min Additional options can be integrated

XPRT 5 | Compact Alignment repeatability: ± 12.5µm @ 6 Sigma Cycle time: 10 s + print Printing area 508 x 508 mm (20 x 20 inches) Patented EKRA Vision Alignment System (EVA™) Quickest product changeover in 3 min Most user friendly operator interface

That´s our business...

More than

8000 Systems

Worldwide

installed

southeast asia · 18 improving product reliability through halt and hass testing mark r. chrusciel,...

Documents