spie proceedings [spie is&t/spie electronic imaging - burlingame, california, usa (sunday 3...

13
A CABAC codec of H.264AVC with Secure Arithmetic Coding Nihel NEJI a,b , Maher Jridi a , Ayman Alfalou a,* , Nouri MASMOUDI b a Équipe Vision, L@bISEN, 20 rue Cuirassé Bretagne, 29228 Brest Cedex 2, FRANCE b University of Sfax, LETI, National School of Engineering, BP W 3038, Sfax, TUNISIA * : [email protected] ABSTRACT This paper presents an optimized H.264/AVC coding system for HDTV displays based on a typical flow with high coding efficiency and statics adaptivity features. For high quality streaming, the codec uses a Binary Arithmetic Encoding/Decoding algorithm with high complexity and a JVCE (Joint Video compression and encryption) scheme. In fact, particular attention is given to simultaneous compression and encryption applications to gain security without compromising the speed of transactions [1]. The proposed design allows us to encrypt the information using a pseudo-random number generator (PRNG). Thus we achieved the two operations (compression and encryption) simultaneously and in a dependent manner which is a novelty in this kind of architecture. Moreover, we investigated the hardware implementation of CABAC (Context-based adaptive Binary Arithmetic Coding) codec. The proposed architecture is based on optimized binarizer/de-binarizer to handle significant pixel rates videos with low cost and high performance for most frequent SEs. This was checked using HD video frames. The obtained synthesis results using an FPGA (Xilinx’s ISE) show that our design is relevant to code main profile video stream. Keywords: Compression, H.264/AVC, CABAC, encryption, JVCE, FPGA 1. INTRODUCTION Today, over 1 GB/sec streaming of HD video frame needs to be encoded and securely transmitted, which requires huge bandwidth on real-time networks [2]. Therefore, video encoders should provide a high RD (Rate Distortion) performance. This requirement can be achieved with the more recent standard named H.264/AVC. In fact, H.264/AVC provides a better compromise between quality of image reconstruction and the compression ratio compared to other previous standards [3]. This comes at the expense of high computational complexity which becomes a major bottleneck in many applications as HD streaming. Consequently, the reduction of computational requirements becomes an attractive issue for real-time video processing. One approach to reduce the computational resources consists in using statistical analysis in order to identify the most binding blocks. J. Chen et al in [4] have found that CABAC can consume more than 10% to decode the main profile. Therefore, reducing the complexity of CABAC has been considered in many research [5]. In this article, we have focused in CABAC part. Our objective is to use statistics about the appearance of syntax elements (SE), the dependency between occurrences of SE and some coding parameters like QP, GOP, Video resolution… Also, we are interested in having information about the repartition between residual information and headers. The statistical analysis performed to encode the SEs gives us predetermining frequencies of each type and especially lets us knowing the relationship between them and their appearances. So, we will be able to discard some SE values and types, i.e. MVD (Motion Vector Difference) and Macroblock type, in order to reduce the computational requirement without any video quality degradation. According to the distribution of different types of syntax elements for coding information in [6], it is mentioned that residual information contribute to more than 80% of total bins with 60% of either “1” or “-1” coefficients. So, hardware acceleration for this data must be reported to enhance the coding efficiency. For the headers, it is mentioned , as an example, that MVD SEs could account for up to 30% of total bins in I-type and 15% of total bins in a P-type or B-type macroblock and Coded_block_flag SEs account for 3%~6% of total bins. These experiment results are generated for HD video test sequences. The statistics reflect the complexity of CABAC processing and each percentage of most used syntax elements has allowed us to propose and validate our optimized architecture. Real-Time Image and Video Processing 2013, edited by Nasser Kehtarnavaz, Matthias F. Carlsohn, Proc. of SPIE-IS&T Electronic Imaging, SPIE Vol. 8656, 86560G · © 2013 · SPIE-IS&T CCC code: 0277-786X/13/$18 · doi: 10.1117/12.2006351 SPIE-IS&T/ Vol. 8656 86560G-1 Downloaded From: http://proceedings.spiedigitallibrary.org/ on 03/20/2013 Terms of Use: http://spiedl.org/terms

Upload: nouri

Post on 07-Dec-2016

215 views

Category:

Documents


2 download

TRANSCRIPT

A CABAC codec of H.264AVC with Secure Arithmetic Coding

Nihel NEJIa,b, Maher Jridia, Ayman Alfaloua,*, Nouri MASMOUDIb a Équipe Vision, L@bISEN, 20 rue Cuirassé Bretagne, 29228 Brest Cedex 2, FRANCE

b University of Sfax, LETI, National School of Engineering, BP W 3038, Sfax, TUNISIA * : [email protected]

ABSTRACT

This paper presents an optimized H.264/AVC coding system for HDTV displays based on a typical flow with high coding efficiency and statics adaptivity features. For high quality streaming, the codec uses a Binary Arithmetic Encoding/Decoding algorithm with high complexity and a JVCE (Joint Video compression and encryption) scheme. In fact, particular attention is given to simultaneous compression and encryption applications to gain security without compromising the speed of transactions [1].

The proposed design allows us to encrypt the information using a pseudo-random number generator (PRNG). Thus we achieved the two operations (compression and encryption) simultaneously and in a dependent manner which is a novelty in this kind of architecture.

Moreover, we investigated the hardware implementation of CABAC (Context-based adaptive Binary Arithmetic Coding) codec. The proposed architecture is based on optimized binarizer/de-binarizer to handle significant pixel rates videos with low cost and high performance for most frequent SEs. This was checked using HD video frames. The obtained synthesis results using an FPGA (Xilinx’s ISE) show that our design is relevant to code main profile video stream.

Keywords: Compression, H.264/AVC, CABAC, encryption, JVCE, FPGA

1. INTRODUCTION Today, over 1 GB/sec streaming of HD video frame needs to be encoded and securely transmitted, which requires huge bandwidth on real-time networks [2]. Therefore, video encoders should provide a high RD (Rate Distortion) performance. This requirement can be achieved with the more recent standard named H.264/AVC. In fact, H.264/AVC provides a better compromise between quality of image reconstruction and the compression ratio compared to other previous standards [3]. This comes at the expense of high computational complexity which becomes a major bottleneck in many applications as HD streaming. Consequently, the reduction of computational requirements becomes an attractive issue for real-time video processing. One approach to reduce the computational resources consists in using statistical analysis in order to identify the most binding blocks. J. Chen et al in [4] have found that CABAC can consume more than 10% to decode the main profile. Therefore, reducing the complexity of CABAC has been considered in many research [5].

In this article, we have focused in CABAC part. Our objective is to use statistics about the appearance of syntax elements (SE), the dependency between occurrences of SE and some coding parameters like QP, GOP, Video resolution… Also, we are interested in having information about the repartition between residual information and headers. The statistical analysis performed to encode the SEs gives us predetermining frequencies of each type and especially lets us knowing the relationship between them and their appearances. So, we will be able to discard some SE values and types, i.e. MVD (Motion Vector Difference) and Macroblock type, in order to reduce the computational requirement without any video quality degradation. According to the distribution of different types of syntax elements for coding information in [6], it is mentioned that residual information contribute to more than 80% of total bins with 60% of either “1” or “-1” coefficients. So, hardware acceleration for this data must be reported to enhance the coding efficiency. For the headers, it is mentioned , as an example, that MVD SEs could account for up to 30% of total bins in I-type and 15% of total bins in a P-type or B-type macroblock and Coded_block_flag SEs account for 3%~6% of total bins. These experiment results are generated for HD video test sequences. The statistics reflect the complexity of CABAC processing and each percentage of most used syntax elements has allowed us to propose and validate our optimized architecture.

Real-Time Image and Video Processing 2013, edited by Nasser Kehtarnavaz, Matthias F. Carlsohn,Proc. of SPIE-IS&T Electronic Imaging, SPIE Vol. 8656, 86560G · © 2013 · SPIE-IS&T

CCC code: 0277-786X/13/$18 · doi: 10.1117/12.2006351

SPIE-IS&T/ Vol. 8656 86560G-1

Downloaded From: http://proceedings.spiedigitallibrary.org/ on 03/20/2013 Terms of Use: http://spiedl.org/terms

For that, we propose an effective CABAC architecture based on several features for full HD streaming. More specially, we are interested in the binarization/de-binarization process in CABAC. Indeed, according to the signal flow graph of CABAC, the first operation is the binarization (Figure 1.a). When designed correctly, it can have influence in the speed performance of the entire structure.

Along with design efforts in the binarization, we are also investigating a JVCE technique. In fact, our architecture uses a specific interpretation of Arithmetic Coding which enables us to provide easily encryption schemes based on pseudorandom number generator (PRNG). Moreover, the codec hardware implementation was checked using various video frames, only four test simulations are shown in this paper. The obtained experimental results using an FPGA (Xilinx’s ISE) show that our design is relevant to encode/decode main profile HD video stream.

The remainder of the paper is organized as follows: the functionalities of the CABAC encoder are explained in Section 2. Its conception and FPGA synthesis results are presented in section 3, focusing in specific knowledge needed to integrate and debug the CABAC entropy decoder. RAC scheme and Encryption algorithm considered in this work and simulations are explained in section 4. Finally, in section 5 concluding remarks and future works are indicated.

2. REVIEW OF CABAC 2.1 Principal of CABAC

H.264/AVC is one of the latest in video compression standards using CABAC to compress HD video. This encoder is targeted for several applications like HDTV, video conferencing, etc [5, 7]. Indeed, it has been proven that CABAC achieves 10-20 % higher compression ratio than CAVLC (Context-based adaptive Variable Length Coding). Moreover, code words encoded by CABAC are presented in fractional bits instead of integer values with CAVLC.

Non-binary valued syntax element

Binarizer Context modeler

Bypass Coding Engine

Regular Coding Engine

Bin string

Syntax element

Bin value.Context modelBin

Bin value

regular

bypass

regular

bypass

Coded bits

Coded bits

Bitstream

Bin value for context model update

context

Binary valued syntax element

Loop over bins

Binary Arithmetic Coding

(a) (b) (c) Figure 1. Flowchart of CABAC

The flowchart of CABAC is presented in Figure 1. The main essence of encoding in CABAC is to reduce size of SE’s (Syntax Element) by converting it to bins, either logic 0 or logic 1 [5]. This step is called binarization and presented in (Figure 1.a). Converted bits are assigned with probabilities based on previous encoded bits (Figure 1.b). The associated bins probability is calculated by Range and Symbol to be encoded i.e. More Probable Symbol (MPS) or Less Probable Symbol (LPS). Indeed, the context modeler maps absolute values of SE to context model probability distribution, which is encoded by BAC. In each iteration, the context is updated using feedback and output is normalized in order to keep up values greater than the threshold limit of accuracy (Figure 1.c). All the operations inside CABAC core must be controlled by control unit which generates signals based on specific tasks.

CABAC inputs are residual coefficients and parameters for the spatial and temporal prediction. Data compression is reached applying principles of arithmetic coding, and it depends on an accurate estimation of symbol occurrence

SPIE-IS&T/ Vol. 8656 86560G-2

Downloaded From: http://proceedings.spiedigitallibrary.org/ on 03/20/2013 Terms of Use: http://spiedl.org/terms

jusçsctS ÍVrI

probabilities. CABAC entropy decoder uses previously decoded syntax elements values to select context models to estimate symbols occurrence probabilities [7]. So, it is necessary to organize those syntactic element values in memories and provide them as neighbor values to the current syntax element being decoded. Every syntactic element is obtained by decoding bins of a binstring. The binstring is converted into a syntax element value by a de-binarization process. For each bin to be decoded, a context model is selected. The context model stores the probability of a bin being ‘0’ or ‘1’. The selection of the context model is based on values of previously decoded syntax elements, at the neighborhood of the current macroblock or partition.

2.2 BAC algorithm

In the literature, arithmetic encoding has been proposed as an enhancement to other compressions methods (e.g., Ziv-Lempel coding, Lossless image compression) [8]. International standards incorporate this type of coding and some of the standards using it are JBIG, JPEG2000 and MPEG-4. AC (Arithmetic coding) can be separated into two main parts: modeling (Figure 1.b) and compression (Figure 1.c):

1) We can mention two types of modeling: - Context modeling (CM) to eliminate inter-symbol redundancies. There are more than 1015 effective context

models defined for different symbols in sequence [9] built to predict the value of the next symbol to be coded with high probability

- Adaptative modeling to calculate the statistics of the source sequence. There are different natures for syntax elements (unary, binary, equiprobable...); CABAC computes various combinations for these many parameters.

2) Compression: for this part, we aim to maximize coding efficiency and limit the number of arithmetic coding operations.

AC takes a stream of symbols as input and outputs a floating point number between 0 and 1 based on the probability of occurrence of each symbol in the input stream. The longer the input stream size, the more bits required to represent the floating point number. Since the coder and its modeler use binary symbols, it is useful to distinguish the two cases with single probability suffices to encode each decision. Binary arithmetic coding (BAC) is a recursive procedure that codes a stream of only two symbols 0 and 1. This coder assigns intervals to the MPS and the LPS so that the LPS subinterval is always above the MPS subinterval as shown in Figure below.

Figure 2. BAC encoding process outline

Encoding a binary symbol essentially consists of four steps: computing a range for the symbol, adjusting registers, renormalizing and adapting the probability. Coding the symbol changes the interval and the code stream as follows:

After LPS (Figure 2.a) After MPS (Figure 2.b) R(LPS) = Range · pLPS R(MPS) = Range − R(LPS) (1) LowLPS = Low + R(MPS) LowMPS = Low

SPIE-IS&T/ Vol. 8656 86560G-3

Downloaded From: http://proceedings.spiedigitallibrary.org/ on 03/20/2013 Terms of Use: http://spiedl.org/terms

The pseudo code to implement the BAC logic flow is as follows (Table 1) [10]:

Table 1. Algorithm to implement the BAC logic flow

BAC Algorithm

Initialize U (Upper) and L (Low)Get symbol {0, 1}

L = L + Fj-1 * (U-L+1) U = l + Fj * (U+L+1)-1

While (MSB of U and L are both equal to B or E3 conditions holds) If (MSB of U and L are both equal to B) // B = {0.1}

{ Send B // PutBit (0) or (1) Shift L to left by 1 bit and shift 0 into LSB Shift U to left by 1 bit and shift 1 into LSB

While ( Scale_ E3 > 0) { Send complement of B

Decrement Scale_ E3} }

If (E3 conditions holds) { Shift L to left by 1 bit and shift 0 into LSB Shift U to left by 1 bit and shift 1 into LSB

Complement (new) MSP of L and U Increment Scale_ E3} // Accumulate Outstanding bit

Otherwise, we repeat the following steps as many times as possible:

1) If the new subinterval is not entirely within one of the intervals [0, 0.5), [1/4, 3/4), [0.5, 1), we stop iterating; 2) If the new subinterval lies entirely within [0, 0.5) (E1), we output 0 and any 1s left over from previous symbols;

then we double the size of the interval [1, 0.5) expanding toward the right (Equation 3); 3) If the new subinterval lies entirely within [0.5 , 1) (E2), we output 1 and any 0s left over from previous symbols;

then we double the size of the interval [0.5 , 1) expanding toward the left (Equation 4); 4) If the new subinterval lies entirely within [1/4, 3/4) (E3), we keep track of this fact for future output; then we double

the size of the interval [1/4, 3/4), expanding in both directions away from the midpoint (Equation 5).

Figure 3. Renormalization and bit output of BAC

SPIE-IS&T/ Vol. 8656 86560G-4

Downloaded From: http://proceedings.spiedigitallibrary.org/ on 03/20/2013 Terms of Use: http://spiedl.org/terms

For the software realization, we can calculate the number of times nj that symbol j occurs in a sequence of length TC. Its frequency Fj is estimated by:

Fj = TCn j

(2)

For the integer implementation, x ∈ [0, 1) is mapped to the range of 2N binary words and for every new subinterval, the mappings required are: xxE *2)()5.0,0[ 1 =→ (3)

)5.0(*2)()1,5.0[ 2 −=→ xxE (4)

)25.0(*2)()75.0,25.0[ 3 −=→ xxE (5) As illustrated in Figure 3, renormalization is the process by which arithmetic encoder determines how many bits to output and what their values should be. The core engine needs to be terminated so as to enable a decoder to properly reconstruct all symbols.

3. SYNTHESIS RESULTS OF SOME BINARIZATIONS While lot of efforts has been made to enhance compression efficiency in H.264, different architectures promising high-performance [11], low-cost implementation [12], low-power design [12] of CABAC have been proposed so far. Having choice between FPGA, ASIC, ASSP or DSP, the use of FPGA for implementing complex algorithms like H.264 is a wise option as FPGA enables modification of individual core with constantly changing conditions [14]. As illustrated in (Figure 1.a), binarization process is used as the first step for the encoding. In literature, many works have been published to implement it in electronic devices [15-18]. Some of these works like [17] are dedicated to only one type of binarization. In this section, we propose FPGA design of many types of binarization and de-binarization (Table 2) which are the truncated unary code method and the fixed-length method.

For each SE type, we will use a specific binarization method which generates a predefined number of output bits. The proposed design includes synthesis results and has the advantage to be reconfigurable. Indeed, the binarization and de-binarization are implemented in the same circuit. Moreover, to accelerate the stream processing, binarizer/de-binarizer are implemented by means of memories. In this section, five basic binarization methods and their concatenation used by CABAC codec are studied:

Unary code method: for a syntax element value equivalent to x, the encoding result consists of x"1" bits plus a terminating "0" bit. For example, if the result is "1110", syntax element value is "3".

Truncated unary code method: if the element value is less than a truncated value S, the encoding result is the same as the result of the unary code. Otherwise, the result is presented as S "1"s.

For example, when the truncated value is "3", the encoding result"110" implies that the syntax element value is "2" while the syntax element value "5" should be presented as "111".

Fixed-length code method: this is the standard binary representation method. For example, the encoding result "110" is equivalent to the syntax element value "6".

kth order Exp-Golomb code method: CABAC encoder uses two kinds of Exp-Golomb code methods EG0 (0th order Exp-Golomb code) and EG3 (3th order Exp-Golomb code). The pseudo code of Exp-Golomb code methods is explained bellow (Table 3):

SPIE-IS&T/ Vol. 8656 86560G-5

Downloaded From: http://proceedings.spiedigitallibrary.org/ on 03/20/2013 Terms of Use: http://spiedl.org/terms

Exp-Golomb Algorithm

SE_value= 0 do { L= the output bit value of the CABAC decoder if (L=1) { SE_value= SE_value + (1<<k) k++;} } while (L!=0) while (k--) if (the output bin value of the CABAC decoder equals to 1) SE_value = SE_value + (1<<k)

Table 2. Binarization methods for different syntax elements [9]

Syntax element Binarization method N° of the decoding bits Range of SE value

Mb_type (I slice) Table mapping 1-7 0-25 Mb_type (P slice) Table mapping 3 0-30 Mb_type (B slice) Table mapping 1-7 0-48

Mb_skip_flag Fixed-length 1 0-1 Sub_Mb_type (P slice) Table mapping 1-3 0-3 Sub_Mb_type (B slice) Table mapping 1-6 0-12

Ref_idx_L0 Unary 1-6 0-5 Ref_idx_L1 Unary 1-6 0-5

Mvd_L0 Truncate unary and EG3, truncated value 9 1-21 -128-127

Mvd_L1 Truncate unary and EG3, truncated value 9 1-21 -128-127

intra4x4_pred_mode Fixed-length 1 0-1 Rem_intra_pred_mode Fixed-length 3 0-7

chroma_pred_mode Truncate unary truncated value 9 1-3 0-3

Coded_block_pattern Fixed-length ,

Truncate unary and EG3, truncated value 2

5-6 0-63

Mb_qp_delta Unary and table mapping 1-53 -26-25 Coded_block_flag Fixed-length 1 0-1

Significant_coeff_flag Fixed-length 1 0-1 Last_ Significant_coeff Fixed-length 1 0-1

Coeff_abs_level_minus1 Truncate unary and EG0, truncated value 14 1-28 -256-255

Coeff_sig_flag Fixed-length 1 0-1 End_slice_flag Fixed-length 1 0-1

Table 3. Algorithm of kth order Exp-Golomb code method [9]

SPIE-IS&T/ Vol. 8656 86560G-6

Downloaded From: http://proceedings.spiedigitallibrary.org/ on 03/20/2013 Terms of Use: http://spiedl.org/terms

Table mapping code method: CABAC decoder gets the syntax element value by looking up a table with the decoding result as index. For example, if the encoding result of the syntax element mb_type (P slice) is "011", we can get the syntax element value "1" by looking up the mb_type table.

In the draft (Table 3), each SE uses one or several methods of binarizations as described in Table 3. For example, MVD (Motion Vector Differential) bins are the concatenation of Prefix and Suffix. The suffix is usually generated from the truncate unary method and its prefix uses the EG3 with a truncated value equal to 9.

Indeed, many SE use the same method of binarization but not the same threshold, e.g. Coded_block_flag and Significant_coeff_flag. The binarization/de-binarization are described by a VHDL model and synthesized with Virtex 4 FX60 Xilinx FPGA. The maximum clock frequency of 180 MHz is higher than the frequency established in [19] and enough for the CABAC entropy codec to process HD video compressed data. FPGA synthesis summary for binarization/de-binarization are presented in Tables 4 and 5.

Table 4. Synthesis results of TU method

Resources Binarization Debinarization

Macro Statistics

ROM

4*70 bits -

8*70 bits 8*70 bits

16*70 bits 16*70 bits

Registers 6 bits 6 bits

64 bits 64 bits

Micro Statistics Slices 19 13

LUTs 33 26

Table 5. Synthesis results of FL method

Resources Binarization Debinarization

Macro Statistics

ROM 4*70 bits 16*16 bits

8*70 bits 8*16 bits

Registers 6 bits 16 bits

64 bits -

Multiplexer

6 bits 4 to 1 -

6 bits 8 to 1 -

64 bits 4 to 1 -

64 bits 8 to 1 -

Micro Statistics Slices 81 18

LUTs 139 31

We presented results of TU and FL method since the first is a simple method and the second is contributes strongly to characterize the performance of the whole system. Indeed, an interesting study in [18] shows that FL method binaries 58% of syntax elements and produces more than 30% of bitstream.For this reason we paid a special attention on designing this method. The obtained maximum operating frequency is about 582 MHz on Virtex 4 FX60 family.

SPIE-IS&T/ Vol. 8656 86560G-7

Downloaded From: http://proceedings.spiedigitallibrary.org/ on 03/20/2013 Terms of Use: http://spiedl.org/terms

BAC[18] MC[18] Gate counts 8.22K Gate counts 11.07K

Max Frequency: 280 MHZ Max Frequency: 280 MHZ

BAD[19] Gate counts 11.475K

Max Frequency: 188 MHZ

The first area and frequency report is for the CBP (Coded Block Pattern) binarization. We reach the max frequency (909MHz) for the Mb_qp_delta (macroblock quantification step differential). Indeed, we have to mention that we use a special method of binarization for Mb_type (type of Macroblock and sub-macroblock) named Tree which based on Tree structured codeword. We note that the EG0 is the least fast process for binarizer and the UT is the least fast process for de-binarizer. The largest surface area consumed is at the level of EG0 binarizer and U de-binarizer.

Since the proposed binarization/de-binarization designs are standard compliant, they can be used with existing coder and CM designs. We present in Table 6 some synthesis results for designs integrated into H.264/AVC codec and successfully demonstrated an FPGA prototype [20-21]. In our future work, we propose to have our BAC/BAD and CM design.

Table 6. Synthesis results for BAC/BAD and MC

So, the compression is performed by using BAC as entropy coding. Now, we will present an encryption scheme simultaneously to the coding for assuring a secure transmission.

4. JOINT VIDEO COMPRESSION AND ENCRYPTION 4.1 Encryption algorithm principle

The JVCE technique has been introduced in order to perform encryption and compression simultaneously. This algorithm can be presented as an iterative division of the interval [0, 1[which is based on the probability of the target symbols. Jointly, we use the randomized arithmetic coding (RAC) technique which is based on a special iterative division of the interval that depends not only on the probability of symbols, but also on the value of the generated random number. Note that a similar study application to JPEG 2000 is given in [8].

Hence, this work is considered as the first investigation of the use of RAC in H.264 encoders. Therefore, we used BAC for compression and the randomization by interval swapping is explained in Figure 4.

Figure 4. Interval swapping in RAC.

(a) R = 1; (b) R =0

The basic principle of this swapping-based encryption scheme is to utilize a true random number generator (TRNG). We do swapping before coding if the random number is 1 (Figure 4.a) and get ordinary coding process otherwise (Figure 4.b).

SPIE-IS&T/ Vol. 8656 86560G-8

Downloaded From: http://proceedings.spiedigitallibrary.org/ on 03/20/2013 Terms of Use: http://spiedl.org/terms

RAC Algorithm

Initialize U (Upper) and L (Low) Get symbol {0, 1} L = L + Fj-1 * (U-L+1) U = l + Fj * (U+L+1)-1 While (MSB of U and L are both equal to B or E3 conditions holds) If (MSB of U and L are both equal to B) // B = {0.1} {{If (random binary number = 0) Send B else Send complement of B} Shift L to left by 1 bit and shift 0 into LSB Shift U to left by 1 bit and shift 1 into LSB

While (Scale_ E3 > 0) {{If (random binary number = 0) Send complement of B else Send B} Decrement Scale_ E3}}

If (E3 conditions holds) {Shift L to left by 1 bit and shift 0 into LSB Shift U to left by 1 bit and shift 1 into LSB Complement (new) MSP of L and U Increment Scale_ E3} // Accumulate Outstanding bit

Slices 2 (%5472) LUTS 1(%10944)

Max Frequency: 820MHZ

Our encryption technique consists in changing the coding algorithm which depends on the encryption key (probability and position of "1"). Instead of sending the B value or the complement of B value, we trigger this value with a random number. The algorithm to implement the RAC logic flow is as described in Table 7.

Table 7. Algorithm to implement the RAC logic flow

Note that E3 of table 3 is indicated in equation 4. For the random number we can use biometric key like iris, fingerprint or data coming from a chosen key image [22]. To validate our scheme, in this paper, we have generated TRNG by implementing LFSR structure in FPGA. This choice is motivated by the fact that the BAC engine is often used as hardware accelerator embedded on FPGA as illustrated in Figure 5. On the decoder process, we receive the encoded B bits concatenated with the last updated low limit. In case of a JVCE application, the received bitstream is encrypted with a secret key. Consequently, before starting the decoding process, we should decrypt the bitstream. Here, we have to underline that the compression and encryption processes are executed simultaneously, however in the receiver side we first decrypt and then we decode the bitstream.

4.2 Simulations results

Regarding the TRNG, we implement it by using an LFSR structure ( Figure 5). This consists of a cascade of 4 latches D and 4 bits are used as outputs and shifted every clock cycle. Indeed, this LFSR structure is a simple way to generate a TRNG. We use it to validate the feasibility of our approach. The overall architecture is simulated and synthesized by VHDL. The results are shown in Table 8:

Table 8. FPGA synthesis summary for TRNG

This scheme to adapt the RAC-based JVCE to the H.264/AVC standard reduces the computational costs involved with traditional encryption optical approach after compression. The maximum clock frequency is 820 MHz, which does not affect compression rapidity.

SPIE-IS&T/ Vol. 8656 86560G-9

Downloaded From: http://proceedings.spiedigitallibrary.org/ on 03/20/2013 Terms of Use: http://spiedl.org/terms

Transmission vias :cure channel

Sykur fllstty0:4 Binarizer I Modified BAC I Decryption

tlipitsa fs

Validated k' frailfsai`e

Original BAD

De-Binarizer

Figure 5. Block diagram of proposed scheme.

Simulations for JVCE using RAC for H.264/AVC codec are done for different video sequences and the color space YcbCr is used. A simplified block diagram of the CABAC codec is presented in Figure 5. A video bitstream is processed by the entropy encoder to supply parameters of the prediction and residual blocks. The SEs such as transform coefficient block size, inter-decision, intra-decision, motion vectors, quantization parameters etc. are usually non-binary input to CABAC from all other stages of video encoder. To ensure effective compactness of data values, SE’s have to be binarized to form strings of bins based on probability distribution of SE’s.

All syntax elements will be sent to the modified BAC (based on RAC). After the whole image has been encoded and encrypted, it is transmitted to secure transfer. At the decoder, images are reconstructed by the entropy decoder in the form of coefficients that must pass through the processes of inverse encryption and inverse coding (BAD).

Table 9. Simulations for videos with various resolutions

Original video Encrypted video Decrypted video

Qcif

PSNR(Y)= 3.7578

SPIE-IS&T/ Vol. 8656 86560G-10

Downloaded From: http://proceedings.spiedigitallibrary.org/ on 03/20/2013 Terms of Use: http://spiedl.org/terms

IlÌllîlllll IIIÌIIIiIIIIIIVÌNNIRNINNINÌMW'NM

1E-

wnllnnrouliooudHHiHhdiHHiHiMmam

PSNR(U)= 3.5342 PSNR(V)= 5.1728

PSNR(Y)= 54.2004 PSNR(U)= 54.1440 PSNR(V)= 55.9797

Cif

PSNR(Y)= 3.8786 PSNR(U)= 2.9823 PSNR(V)= 5.7608

PSNR(Y)= 54.0219 PSNR(U)= 54.2708 PSNR(V)= 56.1242

480 P

PSNR(Y)= 4.8161 PSNR(U)= 3.2938 PSNR(V)= 5.4633

PSNR(Y)= 55.1993 PSNR(U)= 56.9736 PSNR(V)= 57.5031

720P

PSNR(Y)= 3.6178 PSNR(U)= 2.8876 PSNR(V)= 7.7349

PSNR(Y)= 54.1494 PSNR(U)= 54.1261 PSNR(V)= 55.9404

Table 9 presents some simulations of diagram flow described above for video with qcif, cif, 480p and 720p resolutions. We can show the encrypted and decrypted frames of video with the corresponding PSNR of three subsamplings. The PSNR does not exceed on average 4.6 % for the encrypted pictures. For decompression process, the PSNR is 56.5 % on average for the decrypted pictures. However, encryption does not meet our expectations as shown in Table 9 (Column 2) and we will try soon to strengthen our coding encryption for more security. Indeed, it is required to optimize the method used (RAC) so that emerged details are completely hidden, we can see that the texts, face details, grayscale variations are hidden but there are the outlines of such objects, edges of some forms are not fully encrypted.

5. CONCLUSION In this paper, the entropy coding adopted by the H.264/AVC video compression standard targeting the Main profile is presented in both algorithms and architecture. The main purpose of this work is to remove the bottleneck of the entropy

SPIE-IS&T/ Vol. 8656 86560G-11

Downloaded From: http://proceedings.spiedigitallibrary.org/ on 03/20/2013 Terms of Use: http://spiedl.org/terms

encoding/decoding by an adequate integration of CABAC into an H.264/AVC video codec, reaching the frequency of 50MHz necessary for HD.

Also, we have presented and validated a new JVCE method suitable for H.264 codec. The simulation results and the above-mentioned implementation issues show the good performance of the proposed design and increase the robustness against different attacks.

As future work, the control & synchronization module and context models memory must be integrated and the final architecture must reach the required frequency to decode HD videos. Also, the parser with CABAC entropy codec must go through a rigorous validation process, with a wider variety of video bitstreams.

ACKNOWLEDGEMENT

The authors thank Dominique Maratray for her help and advice.

REFERENCES

[1] A. Alfalou, C. Brosseau, "Optical image compression and encryption methods," Adv. Opt. Photon. 1, 589-636 (2009).

[2] Min Qin and Roger Zimmermann, “HD video Transmission”, University of Southern California, USA <http://encyclopedia.jrank.org/articles/pages/6756/High-Definition-Live-Streaming.html> (November 2011).

[3] AXIS communications, “White Paper -H.264 video compression standard: New possibilities within video surveillance”, www.axis.com (2008).

[4] J. Chen, C. Chang and Y. Lin, A hardware accelerator for context-based adaptive binary arithmetic decoding in H.264/AVC, In Proceedings of ISCAS (5), 4525-4528 (2005).

[5] Tian Xiaohua, Le Thinh M and Lian Yong, Entropy Coders of the H.264/AVC Standard, Algorithms and VLSI Architectures Series: Signals and Communication Technology, chapter 2: Review of CAVLC, Arithmetic Coding, and CABAC, Springer Heidelberg Dordrecht London, New York (2011).

[6] Jian-Wen Chen, and Youn-Long Lin, “A High-performance Hardwired CABAC Decoder for Ultra-high Resolution Video”, IEEE Transactions on Consumer Electronics, Vol. 55, No. 3 (August 2009).

[7] D. Marpe, H. Schwarz, and T. Wiegand: Context-Based Adaptive Binary Arithmetic Coding in the H.264/AVC Video Compression Standard, IEEE Transactions on Circuits and Systems for Video Technology, Vol. 13, No. 7, pp. 620-636 (July 2003).

[8] M. Grangetto, E. Magali and G. Olmo, “ Multidia selective encryption by means of randomized arithmetic coding, ” IEEE Trans. Multimedia, Vol. 8, No. 5, pp. 905-917 (October 2006).

[9] Advanced Video Coding for Generic Audiovisual Services, Draft ITU-T Recommendation H.264 and ISO/IEC, Geneva (Mars 2010).

[10] Khalid Sayood, Introduction to data compression, Morgan Kaufmann series in multimedia information and systems, ISBN 012620862X, pp 96-103, Elsevier (2006).

[11] Vivienne Sze, Vivienne Sze, Madhukar Budagav , “Acceleration of Bypass Binary Symbol Processing in Video Coding”, US patent / 20120300839 (2012).

SPIE-IS&T/ Vol. 8656 86560G-12

Downloaded From: http://proceedings.spiedigitallibrary.org/ on 03/20/2013 Terms of Use: http://spiedl.org/terms

[12] Lingfeng Li, Yang Song, Shen Li, Takeshi Ikenaga, Satoshi Goto, “A Hardware Architecture of CABAC Encoding and Decoding with Dynamic Pipeline for H.264/AVC”, The Journal of VLSI Signal Processing 2007, Springer Netherlands (August 2007).

[13] Jian-Long Chen, Yu-Kun Lin and Tian-Sheuan Chang, “A Low Cost Context Adaptive Arithmetic Coder for H.264/MPEG-4 AVC Video”, Acoustics, Speech and Signal Processing (2007).

[14] G. Lienhart, R. Manner, R. Lay, K.H. Noffz, “An FPGA-based Video Compressor for H.263 Compatible Bit Streams”,International Symposium on FPGA, California, USA.

[15] Lei S-F, Lo C-C, Kuo C-C, Shieh M-D, “Low-power context-based adaptive binary arithmetic encoder using an embedded cache”, Nat. Cheng Kung Univ, Image Processing, IET, Tainan, 309 - 317 (June 2012).

[16] Xingguo Zhu and Zhejiang Provincial, “Binarization and context model selection of CABAC based on the distribution of syntax element”, Picture Coding Symposium (PCS) , Lab. of Inf. Network Technol (May 2012).

[17] Yizhong Liu, Tian Song, Takashi Shimamoto, “High performance binarizer for H.264/AVC CABAC”, Tokushima University, IEEE (2011).

[18] Del Mestre Martins, A.L.Rosa, V.Bampi, “A low-cost hardware architecture binarizer design for the H.264/AVC CABAC entropy coding”, Electronics, Circuits, and Systems (ICECS), 392 - 395 (2010) .

[19] A. C. Bonatto, A. B. Soares, A. Renner, A. A. Susin, L. Silva, S. Bampi, “A 720p H.264/AVC Decoder ASIC Implementation for Digital Television Set-top Boxes”, SBCCI, São Paulo-SP (2010).

[20] Wei Fei, Dajiang Zhou, Satoshi GOTO, “A 1 Gbin/s CABAC encoder for H 264/AVC”, EURASIP (September 2011).

[21] Jian Wen Chen, Youn Long Lin, “A high performance hardwired CABAC decoder”, IEEE ICASSP, 37-40, (2007).

[22] A. Alfalou, C. Brosseau, N. Abdallah, and M. Jridi, “Simultaneous fusion, compression, and encryption of multiple images“Opt. Express 19, Issue 24, 24023-24029 (2011).

SPIE-IS&T/ Vol. 8656 86560G-13

Downloaded From: http://proceedings.spiedigitallibrary.org/ on 03/20/2013 Terms of Use: http://spiedl.org/terms