spmu037a

EK-LM3S1968-03 Copyright © 2007–2010 Texas Instruments

User ’s Manual

Stellaris® LM3S1968 Evaluation Board

2 January 6, 2010

CopyrightCopyright © 2007–2010 Texas Instruments, Inc. All rights reserved. Stellaris and StellarisWare are registered trademarks of Texas Instruments. ARM and Thumb are registered trademarks, and Cortex is a trademark of ARM Limited. Other names and brands may be claimed as the property of others.

Texas Instruments108 Wild Basin, Suite 350Austin, TX 78746http://www.ti.com/stellaris


January 6, 2010 3

Table of ContentsChapter 1: Stellaris® LM3S1968 Evaluation Board ....................................................................................... 7Features.............................................................................................................................................................. 8Block Diagram .................................................................................................................................................... 8Evaluation Kit Contents ...................................................................................................................................... 9

Evaluation Board Specifications ..................................................................................................................... 9Features of the LM3S1968 Microcontroller......................................................................................................... 9

Chapter 2: Hardware Description.................................................................................................................. 11LM3S1968 Evaluation Board ............................................................................................................................ 11

LM3S1968 Microcontroller Overview ............................................................................................................ 11Hibernation Module....................................................................................................................................... 11Clocking ........................................................................................................................................................ 11Reset............................................................................................................................................................. 11Power Supplies ............................................................................................................................................. 12Debugging..................................................................................................................................................... 12

USB Device Controller Functions ..................................................................................................................... 13USB Overview............................................................................................................................................... 13USB to JTAG/SWD....................................................................................................................................... 13Virtual COM Port........................................................................................................................................... 13Serial Wire Out.............................................................................................................................................. 14

Organic LED Display ........................................................................................................................................ 14Features........................................................................................................................................................ 14Control Interface ........................................................................................................................................... 14Power Supply................................................................................................................................................ 14Design Guidelines......................................................................................................................................... 14Further Reference......................................................................................................................................... 14

Other Peripherals.............................................................................................................................................. 15Speaker......................................................................................................................................................... 15Push Switches .............................................................................................................................................. 15User LED ...................................................................................................................................................... 15

Bypassing Peripherals ...................................................................................................................................... 15Interfacing to the EVB....................................................................................................................................... 16Using the In-Circuit Debugger Interface ........................................................................................................... 16

Appendix A: Schematics................................................................................................................................ 19Appendix B: Connection Details ................................................................................................................... 25Component Locations....................................................................................................................................... 25Evaluation Board Dimensions........................................................................................................................... 26I/O Breakout Pads ............................................................................................................................................ 27Recommended Connectors .............................................................................................................................. 28ARM Target Pinout ........................................................................................................................................... 28References ....................................................................................................................................................... 29

4 January 6, 2010

List of TablesTable 2-1. Stellaris LM3S1968 Evaluation Board Hardware Debugging Configurations................................ 12Table 2-2. Isolating On-Board Hardware........................................................................................................ 15Table B-1. I/O Breakout Pads ......................................................................................................................... 27Table B-2. Recommended Connectors........................................................................................................... 28Table B-3. 20-Pin JTAG/SWD Configuration .................................................................................................. 28


List of FiguresFigure 1-1. Stellaris LM3S1968 Evaluation Board Layout ................................................................................. 7Figure 1-2. LM3S1968 Evaluation Board Block Diagram .................................................................................. 8Figure 2-1. ICD Interface Mode ....................................................................................................................... 16Figure B-1. Component Locations ................................................................................................................... 25Figure B-2. LM3S1968 Evaluation Board Dimensions..................................................................................... 26

January 6, 2010 5

6 January 6, 2010

C H A P T E R 1

Stellaris® LM3S1968 Evaluation BoardThe Stellaris® LM3S1968 Evaluation Board is a compact and versatile evaluation platform for the Stellaris LM3S1968 ARM® Cortex™-M3-based microcontroller. The evaluation kit design highlights the LM3S1968 microcontroller's peripherals and its Hibernation module.

A 3V lithium battery, included in the kit, supplies power to the Hibernation module and maintains data and real-time clock information for about two years in the absence of USB power.

You can use the EVB either as an evaluation platform or as a low-cost in-circuit debug interface (ICDI). In debug interface mode, the on-board microcontroller is disabled, allowing connection of the debug signals to an external Stellaris microcontroller target. The kit is also compatible with high-performance external JTAG debuggers.

This evaluation kit enables quick evaluation, prototype development, and creation of application-specific designs using the LM3S1968's broad range of peripherals. The kit also includes extensive source-code examples, allowing you to start building C code applications quickly.

Figure 1-1. Stellaris LM3S1968 Evaluation Board Layout

USB Device Interface

Lithium coin cell

66 pin I/O break-out header

Navigation Switches

Select switch

Status LEDs

Speaker

Reset switch

Power LED

OLED Graphics Display

JTAG/SWD input and output

StellarisTM

LM3S1968 Microcontroller

In-circuit Debug Interface

Hibernate LED

January 6, 2010 7


FeaturesThe Stellaris LM3S1968 Evaluation Kit includes the following features:

Stellaris LM3S1968 microcontroller

Simple setup; USB cable provides serial communication, debugging, and power

OLED graphics display with 128 x 96 pixel resolution

User LED, navigation switches, and select pushbuttons

8Ω magnetic speaker with class D amplifier

Internal 3 V battery and support for on-chip hibernation module

USB interface for debugging and power supply

Standard ARM® 20-pin JTAG debug connector with input and output modes

LM3S1968 I/O available on labeled break-out pads

Block DiagramFigure 1-2. LM3S1968 Evaluation Board Block Diagram

USB

StellarisLM3S1968

Microcontroller

DualUSB

DeviceController

I/O S

igna

ls

OLED Display128 x 96

Debu

g

I/O Signal Break-out

JTAG/SWD Output/Input

USB Cable

Reset

SW

D/JT

AG M

ux

UART0

Targ

et

Cab

le

Debug

SelectSwitch

NavSwitch

Speaker

LED

LM3S1968 Evaluation Board

I/O Signal Break-out

I/O Signal Break-outI/O Signal Break-out

3VCoin Cell

+3V to debug

interface

+3V to MCU

+3.3VRegulator

+3.3VRegulator

Amp

and peripherals

8 January 6, 2010


Evaluation Kit ContentsThe evaluation kit contains everything needed to develop and run applications for Stellaris microcontrollers including:

LM3S1968 evaluation board (EVB)

USB cable

20-pin JTAG/SWD target cable

CD containing:

– A supported version of one of the following (including a toolchain-specific Quickstart guide):

• Keil™ RealView® Microcontroller Development Kit (MDK-ARM)

• IAR Embedded Workbench

• Code Sourcery GCC development tools

• Code Red Technologies development tools

• Texas Instruments’ Code Composer Studio™ IDE

– Complete documentation

– Quickstart application source code

– Stellaris® Firmware Development Package with example source code

Evaluation Board SpecificationsBoard supply voltage: 4.37–5.25 Vdc from USB connector

Board supply current: 130 mA typ (fully active, CPU at 50 MHz)17 uA (Hibernate mode, operating from battery)

Break-out power output: 3.3 Vdc (60 mA max), 15 Vdc (15 mA max)

Speaker power: 0.3 W max

Dimensions: 3.20” x 3.50” x 0.5” (LxWxH)

RoHS status: Compliant

Features of the LM3S1968 Microcontroller32-bit RISC performance using ARM® Cortex™-M3 v7M architecture

– 50-MHz operation

– Hardware-division and single-cycle-multiplication

– Integrated Nested Vectored Interrupt Controller (NVIC)

– 42 interrupt channels with eight priority levels

256-KB single-cycle Flash

64-KB single-cycle SRAM

Four general-purpose 32-bit timers

Three fully programmable 16C550-type UARTs

January 6, 2010 9


Eight 10-bit ADC channels (inputs) when used as single-ended inputs

Three independent integrated analog comparators

Two I2C modules

Three PWM generator blocks

– One 16-bit counter

– Two comparators

– Produces two independent PWM signals

– One dead-band generator

Two QEI modules with position integrator for tracking encoder position

5 to 52 GPIOs, depending on user configuration

On-chip low drop-out (LDO) voltage regulator

Hibernation module

10 January 6, 2010

C H A P T E R 2

Hardware DescriptionIn addition to a microcontroller, the Stellaris LM3S1968 evaluation board includes a range of useful peripherals and an integrated in-circuit debug interface (ICDI). This chapter describes how these peripherals operate and interface to the microcontroller.

LM3S1968 Evaluation BoardLM3S1968 Microcontroller Overview

The heart of the EVB is a Stellaris LM3S1968 ARM Cortex-M3-based microcontroller. The LM3S1968 offers 256-KB Flash memory, 50-MHz operation, and a wide range of peripherals. Refer to the LM3S1968 data sheet (order number DS-LM3S1968) for complete device details.

The LM3S1968 microcontroller is factory programmed with a quickstart demo program. The quickstart program resides in the LM3S1968 on-chip Flash memory and runs each time power is applied unless the quickstart has been replaced with a user program.

Hibernation ModuleThe Hibernation Module manages removal and restoration of power to the microcontroller and peripherals while maintaining a real-time clock (RTC) and non-volatile memory. The EVB includes a 3 V Lithium battery to maintain Hibernate module power when USB power is unavailable.

The Hibernation state is initiated in software. Leaving Hibernation mode requires either an RTC timer match event or assertion of the WAKE signal. Pressing the Select switch on the EVB asserts WAKE. The Hibernate LED (LED4) signals that the EVB is in Hibernate state (+3.3 V disabled) as long as USB power is present. When USB power is removed, the EVB will remain in the Hibernate state, however, the LED will not be on.

ClockingThe EVB uses an 8.0-MHz crystal to complete the LM3S1968 microcontroller's main internal clock circuit. An internal PLL, configured in software, multiples this clock to 50 MHz for core and peripheral timing.

The real-time clock oscillator is part of the microcontroller's Hibernation module and uses a 4.194304 MHz crystal for timing. This frequency divides by 128 to generate a 32.7680 kHz standard timing frequency.

ResetThe LM3S1968 microcontroller shares its external reset input with the OLED display. In the EVB, reset sources are gated through the CPLD, though in a typical application a simple wired-OR arrangement is sufficient.

External reset is asserted (active low) under any one of three conditions:

Power-on reset

Reset push switch SW1 held down

January 6, 2010 11

Hardware Description

Internal debug mode—By the USB device controller (U5 FT2232) when instructed by debugger

The LM3S1968 microcontroller has an internal power-on reset, so the external circuits used in the EVB are not required in typical applications.

Power SuppliesIn normal operating mode, the LM3S1968 is powered from a +3.3-V supply. A low drop-out (LDO) regulator converts +5-V power from the USB cable to +3.3-V. +3.3-V power is available for powering external circuits.

If +5-V is removed, the Hibernation module will remain powered by the 3-V lithium battery. Other microcontroller and board functions will not function until power is restored.

+15-V power is available when the OLED display power supply is active. The speaker and OLED display boost-converter operate directly from the +5-V power.

DebuggingStellaris microcontrollers support programming and debugging using either JTAG or SWD. JTAG uses the signals TCK, TMS, TDI, and TDO. SWD requires fewer signals (SWCLK, SWDIO, and, optionally, SWO, for trace). The debugger determines which debug protocol is used. For example, Keil RealView tools support only JTAG debugging.

The JTAG TRST signal is not required for debugging and is not connected to the 20-pin JTAG/SWD header. TRST may be asserted by the CPLD in debug Mode 2.

Debugging ModesThe LM3S1968 evaluation board supports a range of hardware debugging configurations. Table 2-1 summarizes these configurations.

Modes 2 and 3 automatically detect the presence of an external debug cable. When the debugger software connected to the EVB's USB controller the EVB automatically selects Mode 2 and illuminates the red Debug Out LED.

Table 2-1. Stellaris LM3S1968 Evaluation Board Hardware Debugging Configurations

Mode Debug Function Use Selected by

1 Internal ICDI Debug on-board LM3S1968 microcontroller over USB interface.

Default mode

2 ICDI out to JTAG/SWD header

The EVB is used as a USB to SWD/JTAG interface to an external target.

Connecting to an external target and starting debug software.

The red Debug Out LED will be ON.

3 In from JTAG/SWD header For users who prefer an external debug interface (ULINK, JLINK, etc.) with the EVB.

Connecting an external debugger to the JTAG/SWD header

12 January 6, 2010


Debug In ConsiderationsDebug Mode 3 supports evaluation board debugging using an external debug interface. Mode 3 is automatically selected when a device such as a Segger J-Link or Keil ULINK is connected.

Boards marked Revision B or later automatically configure pin 1 to be a 3.3-V reference, if an external debugger is connected. To determine the revision of your board, locate the product number on the bottom of the board; for example, EK-LM3S6965-B. The last character of the product number identifies the board revision.

A configuration or board-level change may be necessary when using an external debug interface with revision A of this evaluation board. Because the evaluation board supports both debug out and debug in modes, pin 1 of the 20-pin JTAG/SWD header is, by default, not connected to +3.3 V. Consequently, devices requiring a voltage on pin 1 to power their line buffers may not work.

Two solutions exist. Some debugger interfaces (such as ULINK) have an internal power jumper that, in this case, should be set to internal +3.3-V power. Refer to debugger interface documentation for full details. However, if your debugger interface does not have a selectable power source, it may be necessary to install a 0-Ω resistor on the evaluation board to route power to pin 1. Refer to the schematics and board drawing in the appendix of this manual for the location of this resistor.

USB Device Controller FunctionsUSB Overview

An FT2232 device from Future Technology Devices International Ltd manages USB-to-serial conversion. The FT2232 is factory-configured to implement a JTAG/SWD port (synchronous serial) on channel A and a Virtual COM Port (VCP) on channel B. This feature allows two simultaneous communications links between the host computer and the target device using a single USB cable. Separate Windows drivers for each function are provided on the Documentation and Software CD.

A small serial EEPROM holds the FT2232 configuration data. The EEPROM is not accessible by the LM3S1968 microcontroller.

For full details on FT2232 operation, go to www.ftdichip.com.

USB to JTAG/SWDThe FT2232 USB device performs JTAG/SWD serial operations under the control of the debugger. A CPLD (U6) multiplexes SWD and JTAG functions and, when working in SWD mode, provides direction control for the bidirectional data line. The CPLD also implements logic to select between the three debug modes. The target microcontroller selection is determined by multiplexing TCK/SWCLK and asserting TRST.

In Hibernate state, the JTAG/SWD interface circuit remains powered. Although debugging is not possible, maintaining power avoids re-enumeration of the USB device after each wake transition. To avoid powering the microcontroller, the CPLD sets its output signals to a high-impedance state whenever the Hibernation signal is asserted.

Virtual COM PortThe Virtual COM Port (VCP) allows Windows applications (such as HyperTerminal) to communicate with UART0 on the LM3S1968 over USB. Once the FT2232 VCP driver is installed, Windows assigns a COM port number to the VCP channel.

January 6, 2010 13


Serial Wire OutThe evaluation board supports the Cortex-M3 serial-wire output (SWO) trace capabilities. Under debugger control, the CPLD can route the SWO datastream to the virtual communication port (VCP) transmit channel. The debugger can then decode and interpret the trace information received from the VCP. The normal VCP connection to UART0 is interrupted when using SWO. Not all debuggers support SWO. Refer to the Stellaris LM3S3748 data sheet for additional information on the trace port interface unit (TPIU).

Organic LED DisplayThe EVB features an Organic LED (OLED) graphics display with 128 x 96 pixel resolution. OLED is a new technology that offers many advantages over LCD display technology. The display is protected during shipping by a thin, protective plastic film. The film can be removed using a pair of tweezers.

FeaturesRiT Display P14201 series display

128 columns by 96 rows

High-contrast (typ. 500:1)

Excellent brightness (120 cd/m2)

Fast 10 us response

Control InterfaceThe OLED display has a built-in controller IC with synchronous serial and parallel interfaces. Synchronous serial (SSI) is used on the EVB as it requires fewer microcontroller pins. Data cannot be read from the OLED controller; only one data line is necessary. The Stellaris® Firmware Development Package (included on the Documentation and Software CD) contains complete drivers with source-code for the OLED display.

Power SupplyA +15-V supply is needed to bias the OLED display. A FAN5331 device from Fairchild combines with a few external components to complete a boost converter. A GPIO (PH3/FAULT) is assigned to turn on and off the controller as necessary for power rail sequencing. When the OLED display is operating, a small amount of power can be drawn from the +15-V supply to power other devices.

Design GuidelinesThe OLED display has a lifetime of about 13,000 hours. It is also prone to degradation due to burn-in, similar to CRT and plasma displays. The quickstart application includes both a screen saver and a power-down mode to extend display life. These factors should be considered when developing EVB applications that use the OLED display.

Further ReferenceFor additional information on the RiT OLED display, visit www.ritekdisplay.com.

14 January 6, 2010


Other PeripheralsSpeaker

The LM3S1968 evaluation board's speaker circuit can be used in either tone or waveform mode. The quick-start application uses tone mode.

In tone mode, the LM3S1968 microcontroller's PWM module directly generates tones within the audible frequency range. The width of the pulses determines the volume. If only one PWM signal (PWM2 or PWM3) is used, the non-PWM signal should be configured as a general-purpose output. For increased speaker volume, PWM2 and PWM3 can be configured as complementary drive signals. In tone mode, be careful to avoid large DC currents in the speaker.

Waveform mode uses two high-frequency PWM signals to drive a MOSFET H-bridge with an output filter. This circuit is essentially a Class-D amplifier. The symmetrical 2nd order low-pass L-C filter has a cut-off frequency of approximately 33 kHz. The microcontroller's PWM module should be configured with a PWM frequency of at least 100 kHz. Using 500 kHz improves audio quality even further. Once configured, audio waveform data can be used to update the PWM duty cycle at a rate equal to the audio sampling rate.

The speaker on the evaluation board has standard 8Ω impedance. Audio quality can be enhanced by adding a small, vented enclosure around the speaker.

Push SwitchesThe EVB has five general-purpose input switches. Four are arranged in a navigation-style configuration. The fifth functions as a Select switch on PG7. The Select switch also connects to the WAKE signal of the Hibernate module which has an internal pull-up resistor. A diode (D2) blocks current into the PG7 pin when in the Hibernate state.

User LEDA user LED (LED3) is provided for general use. The LED is connected to PG2/PWM0, allowing the option of either GPIO or PWM control (brightness control). Refer to the Quickstart Application source code for an example of PWM control.

Bypassing PeripheralsThe EVB's on-board peripheral circuits require 15 GPIO lines. This leaves 31 GPIO lines and 8 ADC channels immediately available for connection to external circuits. If an application requires more GPIO lines, the on-board hardware can be disconnected. The EVB is populated with 15 jumper links, which can be cut with a knife to isolate on-board hardware. The process can be reversed by installing 0603- 0-ohm chip resistors. Table 2-2 shows the microcontroller assignments and how to isolate specific pins.

Important: The quickstart application will not run if one or more jumpers are removed.

Table 2-2. Isolating On-Board Hardware

Microcontroller Pin Microcontroller Assignment To Isolate, Remove...

Pin 16 PG3 Up switch JP1

Pin 17 PG2/PWM0 User LED JP2

Pin 26 PA0/U0RX Virtual COM port receive JP4

January 6, 2010 15


Interfacing to the EVBAn array of accessible I/O signals makes it easy to interface the EVB to external circuits. All LM3S1968 I/O lines (except those with both JTAG and SWD functions) are brought out to 0.1” pitch pads. For quick reference, silk-screened labels on the PCB show primary pin functions.

Table B-2 on page 28 has a complete list of I/O signals as well as recommended connectors.

Most LM3S1968 I/O signals are +5-V tolerant. Refer to the LM3S1968 data sheet for detailed electrical specifications.

Using the In-Circuit Debugger InterfaceThe Stellaris LM3S1968 Evaluation Kit can operate as an In-Circuit Debugger Interface (ICDI). ICDI acts as a USB to the JTAG/SWD adaptor, allowing debugging of any external target board that uses a Stellaris microcontroller. See “Debugging Modes” on page 12 for a description of how to enter Debug Out mode.

Figure 2-1. ICD Interface Mode

Pin 29 PA3/SSI0FSS OLED display chip select JP5

Pin 37 PG6/PHA1 Right switch JP6

Pin 36 PG7/PHB1 Select switch JP7

Pin 40 PG5 Left switch JP8

Pin 41 PG4 Down switch JP9

Pin 31 PA5/SSI0TX OLED display data in JP10

Pin 28 PA2/SSI0CLK OLED display clock JP11

Pin 34 PA6/I2C1SCL OLED display data/control select JP12

Pin 27 PA1/U0TX Virtual COM port transmit JP13

Pin 86 PH0/PWM2 Sound+ JP14

Pin 85 PH1/PWM3 Sound- JP15

Table 2-2. Isolating On-Board Hardware (Continued)

Microcontroller Pin Microcontroller Assignment To Isolate, Remove...

Evaluation Board Target Board

Stellaris MCU

Target Cable

`USB

PC with IDE/debugger

Stellaris MCU

TCK/SWCLK bypasses the on-board microcontroller

JTAG or SWD connects to the external microcontroller

Connecting Pin 18 to GND sets external debug mode

16 January 6, 2010


The debug interface operates in either serial-wire debug (SWD) or full JTAG mode, depending on the configuration in the debugger IDE.

The IDE/debugger does not distinguish between the on-EVB Stellaris microcontroller and an external Stellaris microcontroller. The only requirement is that the correct Stellaris device is selected in the project configuration.

January 6, 2010 17


18 January 6, 2010

January 6, 2010 19

SchematicsThis section contains the schematics for the LM3S1968 Evaluation Board:

LM3S1968 Microcontroller on page 20

OLED Display, Switches and Audio on page 21

USB and Debugger Interfaces on page 22

USB, Debugger Interfaces and Power on page 23

JTAG Logic with Auto Mode Detect and Hibernate on page 24

A P P E N D I X A

1

1

2

2

3

3

4

4

5

5

6

6

D D

C C

B B

A A

Document Number:

RevSheetDate: of3/4/2008 1 4

Drawing Title:

Page Title:

Size

Stellaris LM3S1968 Evaluation Board


B

B

EK-LM3S1968

Revision Date Description

0 8/9/07 Final prototype release

History

INT_TCKTMS/SWDIO

PC2/TDIPC3/TDO/SWO

ADC3ADC2ADC1ADC0

MCURSTn

C14.033UF

C7.033UF

C8.033UF

C100.1UF

C90.1UF

C10.1UF

+3.3V

+3.3V

PA1/U0TxPA2/SSI0CLKPA3/SSI0FSSPA4/SSI0RXPA5/SSI0TX

PA0/U0Rx

PA6/I2C1SCLPA7/I2C1SDA

PC4/PhA0PC5/C1+PC6/C2+PC7/C2-

PE0/SSI1CLKPE1/SSI1FSSPE2/SSI1RXPE3/SSI1TX

PD3/U1TXPD2/U1RXPD1/PWM1PD0/IDX0

PB6/C0+PB5/C1-PB4/C0-PB3/I2C0SDAPB2/I2C0SCL

C150.1UF

C114.7UF

On-board Peripheral Signals

free GPIO lines as required.

Jumpers can be cut to I/O Break-out HeaderR110K

+3.3V

1 2Y1

8.00MHz

10PF

C2

10PF

C3

Stellaris LM3S1968 Microcontroller

PB7/TRST

EN+15VPH3/FAULT

PB7/TRST

PA0/U0Rx

PA1/U0Tx

VCP_RX

VCP_TX

OLEDCLK

OLEDCSn

PA2/SSI0CLK

PA3/SSI0FSS

OLEDDINPA5/SSI0TX

SOUND+

UP_SWn

DOWN_SWn

LEFT_SWn

RIGHT_SWn

SOUND-

PH0/PWM2

PG3

PG4

PG5

PG6/PHA1

PH1/PWM3

OLEDDCPH2

JP11

JP5

JP12

JP10

JP14

JP1

JP9

JP8

JP6

JP15

PB1/CCP2PB0/CCP0

PG0/U2RXPG1/U2TX

PF2/PWM4PF3/PWM5PF4/C0OPF5PF6/CCP1PF7

PG2/PWM0PG3PG4PG5PG6/PHA1

PH0/PWM2PH1/PWM3PH2PH3/FAULT

PG7/PHB1

ADC7ADC6ADC5ADC4

PF0/PHB0PF1/IDX1

1 2Y2

4.194304MHz

27PF

C4

27PF

C5

C130.1UF

HIBERNATEn

LEDPG2/PWM0

WAKEnPG7/PHB1JP7

SELECT_SWn

CR2032

BT13V Li Battery

C124.7UF

C160.1UF

PA0/U0RX26

PA1/U0TX27

PA2/SSI0CLK28

PA3/SSI0FSS29

PA4/SSI0RX30

PA5/SSI0TX31

PC0/TCK/SWCLK80

PC1/TMS/SWDIO79

PC2/TDI78

PC3/TDO/SWO77

PC4/PhA025

PC5/C1+24

PC6/C2+23

PC7/C2-22

PD0/IDX0 10

PD1/PWM1 11

PD2/U1RX 12

PD3/U1TX 13

ADC599 ADC4100

GND9

GND15

GND21

GND33

RST64

LDO 7

MOSCin48

MOSCout49

PB0/CCP0 66

PB1/CCP2 67

PB2/I2C0SCL 70

PB3/I2C0SDA 71

PB4/C0- 92

PB5/C1- 91

PB6/C0+ 90

PB7/TRST 89

PE0/SSI1CLK72

PE1/SSI1FSS73

PE2/SSI1RX74

PE3/SSI1TX75

ADC36 ADC25

PA6/I2C1SCL34

PA7/I2C1SDA35

ADC12 ADC01

PF0/PHB0 47

PF1/IDX1 61

PF2/PWM4 60

PF3/PWM5 59

PF4/C0O 58

PF5 46

PF6/CCP1 43

PF7 42

PG0/U2RX 19

PG1/U2TX 18

PG2/PWM0 17

PG3 16

PG4 41

PG5 40

PG6/PHA1 37

PG7/PHB1 36

PH0/PWM2 86

PH1/PWM3 85

PH2 84

PH3/FAULT 83

AVDD 3

AVDD 98

AGND97 AGND4

VDD33 8

VDD33 20

VDD33 32

VDD33 44

VDD33 56

VDD33 68

VDD33 81

VDD33 93

GND39

GND45

GND54

GND57

GND63

GND69

GND82

GND87

GND94 VDD25 14

VDD25 38

VDD25 62

VDD25 88

WAKE50

HIB51

OSC32in52

OSC32out53

VBAT 55

CMOD065

CMOD176

ADC795 ADC696

U1

LM3S1968

PC3/TDO/SWOPC2/TDI

PA0/U0RxPA1/U0TxPA2/SSI0CLKPA3/SSI0FSSPA4/SSI0RXPA6/I2C1SCL

PC4/PhA0

ADC0ADC1ADC2ADC3

+3.3V

PC6/C2+

PB4/C0-PB5/C1-PB6/C0+

PD2/U1RXPD3/U1TX

ADC6ADC4

PG0/U2RXPG1/U2TX PG2/PWM0PG3

PG6/PHA1

ADC7ADC5

PC7/C2-PC5/C1+

PA5/SSI0TXPA7/I2C1SDA

PD0/IDX0PD1/PWM1

2 1

66

PG7/PHB1

PC2/TDIPC3/TDO/SWO

+5V

PE0/SSI1CLKPE2/SSI1RX

PE3/SSI1TX

PB0/CCP0

PB7/TRST

PF0/PHB0

PF2/PWM4PF4/C0O

PF5PF6/CCP1PF7PG4PG5

PH0/PWM2PH2

PH3/FAULTPH1/PWM3

PE1/SSI1FSS

PB1/CCP2

PF1/IDX1PF3/PWM5HIBERNATEn

PB2/I2C0SCLPB3/I2C0SDA

65

+15V

Power Break-out Header

R2

1M

A 8/13/07 Production release with simplified wake cct.

VBAT

VBAT

JP4

JP13

JP3

JP2

D2

MBR0520

R3OMIT

+3.3V

B 3/3/07 Add TVCC control to debug circuit.


1

1

2

2

3

3

4

4

5

5

6

6

D D

C C

B B

A A

Document Number:


Drawing Title:

Page Title:

Size


OLED Display, Switches and Audio

B

B

EK-LM3S1968

R7

330

R5

200K

OLEDDINOLEDCLK

+3.3V

DBGOUTLED

ResetSW1

SW-B3S1000

WAKEn

UP_SWn

DOWN_SWn

LEFT_SWn

RIGHT_SWn

RESET_SWn

R410K

+3.3V

Select/Power

Up

Down

Left

Right

Debug Out

R6

330LED

Status

R10

330

Power

128x96 OLED Graphics Display

Status LEDs

User Switches

+3.3V

C17

4.7UF

SW2

SW-B3S1000

SW3

SW-B3S1000

SW4

SW-B3S1000

SW5

SW-B3S1000

SW6

SW-B3S1000

MCURSTnOLEDDC

LED1Green

LED2Red

LED3Green

C18OMIT

+15V

OLEDCSn

C190.1UF

NC1

VCIR2

VCOMH3

LVSS4

VSS5

BS16

BS27

IREF8

CSn9

RESn10

D/Cn11

R/Wn12

E13

D0/SCLK14

D1/SDIN15

D216

D317

D418

D519

D620

D721

VDDIO22

VDD23

VCC24

NC25

U2

OLED-RIT-128X96

1

2

6 Q3AFDG6322C

3

5

4

Q2BFDG6322C

+3.3V

SOUND+R8200K

SOUND-

R9200K

0.2W Audio Amplifier

C210.1UF

C220.1UF

4.7uH

L1

4.7uH

L21 2

SPK1

HIBERNATEn

HibernateLED4Red

DBG+3.3VR30

330

1

2

6Q2AFDG6322C

3

5

4 Q3BFDG6322C

+3.3V

C6

4.7UF

OLED Display, Switches and Audio

1

1

2

2

3

3

4

4

5

5

6

6

D D

C C

B B

A A

Document Number:


Drawing Title:

Page Title:

Size


USB and Debugger Interfaces

B

B

EK-LM3S1968

FB1

60ohm @ 100 MHz

GND18

GND25

GND34

ADBUS0 24

ADBUS1 23

ADBUS2 22

ADBUS3 21

ADBUS4 20

ADBUS5 19

ADBUS6 17

ADBUS7 16

ACBUS0 15

ACBUS1 13

ACBUS2 12

ACBUS3 11

BDBUS0 40

BDBUS1 39

BDBUS2 38

BDBUS3 37

BDBUS4 36

BDBUS5 35

BDBUS6 33

BDBUS7 32

BCBUS0 30

BCBUS1 29

BCBUS2 28

BCBUS3 27

SI/WUA 10

SI/WUB 26

GND9

AGND45

VCC 3

VCC 42

VCCIOA 14

VCCIOB 31

AVCC 46

PWREN# 41

XTOUT44 XTIN43

EECS48

EESK1

EEDATA2

TEST47

RESET#4

RSTOUT#5

3V3OUT6

USBDM8

USBDP7

U7

FT2232D

DBG+3.3v

+5V

R16 27

R17 27

1 23 45 67 89 1011 1213 1415 1617 1819 20

P3

Header 10X2

DBG+3.3V

DBG+3.3V

DBG_JTAG_EN

R2010K

R21

1.5K

R181.5K

R24

330

+5V

+5V

+5V+5V

XTDIXTMS

TCKTDI/DITDO/DOTMS/OUTEN

0.1UF

C420.1UF

C38

0.1UF

C39

0.1UF

C40

0.1UF

C41

0.1UF

C33

USB Device Controller

Channel A : JTAG / SW Debug

Channel B : Virtual Com PortR27

27

R26

27

R22

27

XTCK

R25

27

VCP_RX

VCP_TX

PC2/TDI

PC3/TDO/SWO

TMS/SWDIO

C34

.033UF

5V D- D+ ID G

1 2 3 4

7

5

6

P2 54819-0572 DBG+3.3V

SRSTN

TARGETCABLEn

XTDO

R23

27

TP4

TP3

TP2

TP1

TP5

TP6DBG+3.3V

PLD JTAG TEST POINTS

PLD_TCK

PLD_TMS

PLD_TDI

PLD_TDO

R28

4.7K

DBG+3.3v

Debug Interface Logic

JTAG/SWD InterfaceInput/Output

USB Interface

TDI

1

A52

A63

A74

GN

D (B

ank

0)5

VCC

O (B

ank

0)6

A87

A98

A109

A1110

TCK

11

VC

C12

GN

D13

A1214

A13

15

A14

16

A15

17C

LK1/

I18

CLK

2/I

19

B0 20

B1 21

B2 22

B3 23

B4 24

TMS

25

B5 26

B6 27

B7 28

GN

D (B

ank

1)29

VCC

O (B

ank

1)30

B8 31

B9 32

B10 33

B11 34

TDO

35

VC

C36

GN

D37

B12 38

B13

39B

1440

B15

/GO

E141

CLK

3/I

42

CLK

0/I

43

A0/GOE044

A145

A246

A347

A448

Bank 0 Bank 1

U6LC4032V-75TN48C

DBG+3.3V

MCURSTn

DBGOUTLED

TARGETCABLEn

RESET_SWn

0.1UFC32

DBG+3.3V

Omit

JP16USBSH

CS 1

SK 2

DI 3

DO 4GND5 ORG6 NC7 VCC8

1K 64X16

U8

CAT93C46

1 2Y3

6.00MHz

27PF

C36

27PF

C37

PB7/TRST

0.1UF

C35

R194.7K

DBG+3.3V

INT_TCK

SWO_EN

VCP_TX_SWOMODE

MODE is reserved for future use.

TCK

/SW

CLK

TMS/

SWD

IO

R294.7K

HIBERNATEn

DBG+3.3V

TVCC_CTRL

USB and Debugger Interfaces

1

1

2

2

3

3

4

4

5

5

6

6

D D

C C

B B

A A

Document Number:


Drawing Title:

Page Title:

Size


USB, Debugger Interfaces and Power

B

B

EK-LM3S1968

DBG+3.3V

Debugger +3.3V 200mA Power Supply

+5V

C234.7UF C24

4.7UF

+15V 50mA Power Supply for OLED Display

+15V

FB 3

VIN5

SHDNn4 GND 2

SW 1

U5

FAN5331

+5V

C304.7UF C31

4.7UF

D1

MBR0520

120pF

C29R13200K

R1417.8KEN+15V

R1510K

10uH

L3

NR4018T100M

+3.3V

Main +3.3V 300mA Power Supply

C264.7UF

C274.7UF

R111M

R121M

0.033UF

C28

0.033UF

C25

HIBERNATEn

JP17

OUT 1

SENSE 3

VEN6

GND4

BYPASS 5

GND 7

IN2U3

LP3981ILD-3.3

OUT 1

SENSE 3

VEN6

GND4

BYPASS 5

GND 7

IN2U4

LP3981ILD-3.3

JP18

OMIT

JP19 DBG+3.3V+3.3V

Schematic page 1USB, Debugger Interfaces and Power

A B C D E F G H

A B C D E F G H

1

2

3

4

5

6

7

8

1

2

3

4

5

6

7

8

I102

I100C

D QI96

I105

I104

I36

I35

I18AB

S

I89AB

S I85AB

S

I17AB

S

I10633

I8644

I221

I10738

I707

I4231

I9034

I347

I646

I9232

I1624

I10816

I1326

I159

I7414

I9110

I745

I373

I54

I448

I87

41

I8

40I9

I99

I111

I112

I95

I109

I20

FTDI_DBG

DBGOUTVCP_TX ITCK

SWO_EN

FTDI_TCK XTCK

FTDI_TDI_DO U0TX

XTDOFTDI_TDO_DI

JTAGEN

FTDI_TMS

XTDIJTAGEN

FTDI_DBG

FTDIJTAGEN SWDEN

FTDI_SRSTnXTMS

FTDI_DBG DBGOUT DBGLED

INTDBG TEST

TRSTn

RSTSWMCURSTn

RC

EXTCABLEn

HIBn DRVENAUG 23, 2007JTAG Logic with Auto Mode Detect and Hibernate

Texas Instrumens Inc.LM3S1968 Evaluation Kit

JTAG Logic with Auto Mode Detect and Hibernate

A P P E N D I X B

Connection DetailsThis appendix contains the following sections:

Component Locations

Evaluation Board Dimensions

I/O Breakout Pads

ARM Target Pinout

References

Component LocationsFigure B-1. Component Locations

January 6, 2010 25

Evaluation Board Dimensions

Evaluation Board DimensionsFigure B-2. LM3S1968 Evaluation Board Dimensions

26 January 6, 2010


I/O Breakout PadsThe LM3S1968 EVB has 58 I/O pads, 13 power pads, and 1 control connection, for a total of 71 pads. Connection can be made by soldering wires directly to these pads, or by using 0.1” pitch headers and sockets.

Note: In Table B-1, an asterisk (*) by a signal name (also on the EVB PCB) indicates the signal is normally used for on-board functions. Normally, you should cut the associated jumper (JP1-15) before using an assigned signal for external interfacing.

Table B-1. I/O Breakout Pads

Description Pad No. Description Pad

No. Description Pad No. Description Pad

No.

PB4/C0- 1 PB1/CCP2 18 PA6/I2C1SCL 35 PG3* 52

GND 2 PB0/CCP0 19 PA7/I2C1SDA 36 PD1/PWM1 53

PB5/C1- 3 GND 20 PA4/SSI0RX 37 PD2/U1RX 54

PB6/C0+ 4 PF1/IDX1 21 PA5/SSI0TX* 38 GND 55

PB7/TRST 5 PF2/PWM4 22 PA2/SSI0CLK* 39 PD0/IDX0 56

PH0/PWM2* 6 PF3/PWM5 23 PA3/SSI0FSS* 40 ADC3 57

PH1/PWM3* 7 PF4/C0O 24 PA0/U0RX* 41 GND 58

PH2* 8 HIBn 25 PA1/U0TX* 42 ADC1 59

PH3/FAULT* 9 PF0/PHB0 26 PC4/PhA0 43 ADC2 60

PC2/TDI 10 PF5 27 GND 44 ADC4 61

PC3/TDO/SWO 11 PF6/CCP1 28 PC6/C2+ 45 ADC0 62

PE3/SSI1TX 12 PF7 29 PC5/C1+ 46 ADC6 63

PE2/SSI1RX 13 PG4* 30 PG0/U2RX 47 ADC5 64

PE1/SSI1FSS 14 PG5* 31 PC7/C2- 48 GND 65

PE0/SSI1CLK 15 GND 32 PG2/PWM0* 49 ADC7 66

PB3/I2C0SDA 16 PG7/PHB1* 33 PG1/U2TX 50

PB2/I2C0SCL 17 PG6/PHA1* 34 PD3/U1TX 51

January 6, 2010 27

Recommended Connectors

Recommended ConnectorsConnection can be made by soldering wires directly to pads or using 0.1” pitch headers and sockets.

ARM Target PinoutIn ICDI input and output mode, the Stellaris LM3S1968 Evaluation Kit supports ARM’s standard 20-pin JTAG/SWD configuration. The same pin configuration can be used for debugging over serial-wire debug (SWD) and JTAG interfaces. The debugger software, running on the PC, determines which interface protocol is used.

The Stellaris target board should have a 2x10 0.1” pin header with signals as indicated in Table B-3. This applies to both an external Stellaris microcontroller target (Debug Output mode) and to external JTAG/SWD debuggers (Debug Input mode).

ICDI does not control RST (device reset) or TRST (test reset) signals. Both reset functions are implemented as commands over JTAG/SWD, so these signals are not necessary.

It is recommended that connections be made to all GND pins; however, both targets and external debug interfaces must connect pin 18 and at least one other GND pin to GND.

Table B-2. Recommended Connectors

Pins 1-66 (2 x 33 way) PCB Socket Sullins PPPC332LFBN-RC Digikey S7136-ND

Pin Header Sullins PEC20DAAN Digikey S2012E-20-ND

Table B-3. 20-Pin JTAG/SWD Configuration

Function Pin Pin Function

VCC (optional) 1 2 nc

nc 3 4 GND

TDI 5 6 GND

TMS 7 8 GND

TCK 9 10 GND

nc 11 12 GND

TDO 13 14 GND

nc 15 16 GND

nc 17 18 GND

nc 19 20 GND

28 January 6, 2010


ReferencesIn addition to this document, the following references are included on the Stellaris LM3S1968 Evaluation Kit CD-ROM and are also available for download at www.ti.com/stellaris:

Stellaris LM3S1968 Evaluation Kit Quickstart Guide for appropriate tool kit (see “Evaluation Kit Contents,” on page 9)

Stellaris LM3S1968 Read Me First for the CAN Evaluation Kit

StellarisWare® Driver Library, Order number SW-DRL

StellarisWare® Driver Library User’s Manual, publication number SW-DRL-UG

Stellaris LM3S1968 Data Sheet, publication DS-LM3S1968

Additional references include:

Solomon Systech SSD0323-OLED Controller Datasheet

Future Technology Devices Incorporated FT2232C Datasheet

Information on development tool being used:

– RealView MDK web site, www.keil.com/arm/rvmdkkit.asp

– IAR Embedded Workbench web site, www.iar.com

– Code Sourcery GCC development tools web site,www.codesourcery.com/gnu_toolchains/arm

– Code Red Technologies development tools web site, www.code-red-tech.com

– Texas Instruments’ Code Composer Studio™ IDE web site, www.ti.com/ccs

January 6, 2010 29

http://www.code-red-tech.com/

http://www.code-red-tech.com/

http://www.iar.com

http://www.codesourcery.com/gnu_toolchains/arm/

http://www.keil.com/arm/rvmdkkit.asp

References

30 January 6, 2010

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Documents

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