std10pq

STD10PF06P - CHANNEL 60V - 0.18 - 10A TO-252

STripFET POWER MOSFET

n TYPICAL RDS(on) = 0.18 n EXCEPTIONAL dv/dt CAPABILITYn 100% AVALANCHE TESTEDn LOW GATE CHARGEn APPLICATION ORIENTED

CHARACTERIZATIONn ADD SUFFIX T4 FOR ORDERING IN TAPE

& REEL

DESCRIPTIONThis Power MOSFET is the latest development ofSTMicroelectronics unique Single FeatureSize strip-based process. The resulting transi-stor shows extremely high packing density for lowon-resistance, rugged avalanche characteristicsand less critical alignment steps therefore a re-markable manufacturing reproducibility.

APPLICATIONSn MOTOR CONTROLn DC-DC & DC-AC CONVERTERS

INTERNAL SCHEMATIC DIAGRAM

April 1999

ABSOLUTE MAXIMUM RATINGS

Symbol Parameter Value UnitVDS Drain-source Voltage (VGS = 0) 60 V

VDGR Drain- gate Voltage (RGS = 20 k) 60 VVGS Gate-source Voltage 20 VID Drain Current (continuous) at Tc = 25 oC 10 AID Drain Current (continuous) at Tc = 100 oC 7 A

IDM() Drain Current (pulsed) 40 APtot Total Dissipation at Tc = 25 oC 40 W

Derating Factor 0.27 W/oCdv/dt Peak Diode Recovery voltage slope 6 V/nsTstg Storage Temperature -65 to 175 oCTj Max. Operating Junction Temperature 175 oC

() Pulse width limited by safe operating area ( 1) ISD 10 A, di/dt 300 A/s, VDD V(BR)DSS, Tj TJMAXNote: For the P-CHANNEL MOSFET actual polarity of voltages and current has to be reversed

TYPE VDSS RDS(o n) IDSTD10PF06 60 V < 0.20 10 A

13

DPAKTO-252

(Suffix T4)

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THERMAL DATA

Rthj -caseRthj -ambRthc-sink

T l

Thermal Resistance Junction-case MaxThermal Resistance Junction-ambient MaxThermal Resistance Case-sink TypMaximum Lead Temperature For Soldering Purpose

3.751001.5275

oC/WoC/WoC/W

oC

AVALANCHE CHARACTERISTICS

Symbol Parameter Max Value UnitIAR Avalanche Current, Repetitive or Not-Repetitive

(pulse width limited by Tj max)10 A

EAS Single Pulse Avalanche Energy(starting Tj = 25 oC, ID = IAR, VDD = 25V)

50 mJ

ELECTRICAL CHARACTERISTICS (Tcase = 25 oC unless otherwisespecified)OFF

Symbol Parameter Test Conditions Min. Typ. Max. UnitV(BR)DSS Drain-source

Breakdown VoltageID = 250 A VGS = 0 60 V

IDSS Zero Gate VoltageDrain Current (VGS = 0)

VDS = Max RatingVDS = Max Rating Tc = 125 oC

110

AA

IGSS Gate-body LeakageCurrent (VDS = 0)

VGS = 20 V 100 nA

ON ()Symbol Parameter Test Conditions Min. Typ. Max. UnitVGS(th) Gate Threshold Voltage VDS = VGS ID = 250 A 2 3.4 4 VRDS(on) Static Drain-source On

ResistanceVGS = 10V ID = 5 A 0.18 0.20

ID(o n) On State Drain Current VDS > ID(o n) x RDS(on )maxVGS = 10 V

10 A

DYNAMIC

Symbol Parameter Test Conditions Min. Typ. Max. Unitgfs () Forward

TransconductanceVDS > ID(o n) x RDS(on )max ID = 5 A 2 5 S

CissCossCrss

Input CapacitanceOutput CapacitanceReverse TransferCapacitance

VDS = 25 V f = 1 MHz VGS = 0 85023075

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ELECTRICAL CHARACTERISTICS (continued)SWITCHING ON

Symbol Parameter Test Conditions Min. Typ. Max. Unittd(on)

trTurn-on Delay TimeRise Time

VDD = 30 V ID = 6 ARG = 4.7 VGS = 10 V(Resistive Load, see fig. 3)

2040

nsns

QgQgsQgd

Total Gate ChargeGate-Source ChargeGate-Drain Charge

VDD = 48 V ID = 12 A VGS = 10 V 1646

21 nCnCnC

SWITCHING OFF

Symbol Parameter Test Conditions Min. Typ. Max. Unittd(of f)

tfTurn-off Delay TimeFall Time

VDD = 30 V ID = 6 ARG = 4.7 VGS = 10 V(Resistive Load, see fig. 3)

4010

nsns

tr (Voff)tftc

Off-voltage Rise TimeFall TimeCross-over Time

VDD = 48 V ID = 12 ARG = 4.7 VGS = 10 V(Induct ive Load, see fig. 5)

101730

nsnsns

SOURCE DRAIN DIODE

Symbol Parameter Test Conditions Min. Typ. Max. UnitISD

ISDM ()Source-drain CurrentSource-drain Current(pulsed)

1040

AA

VSD () Forward On Voltage ISD = 10 A VGS = 0 2.5 Vtrr

Qrr

IRRM

Reverse RecoveryTimeReverse RecoveryChargeReverse RecoveryCurrent

ISD = 12 A di/dt = 100 A/sVDD = 30 V Tj = 150 oC(see test circuit, f ig. 5)

100

260

5.2

ns

C

A

() Pulsed: Pulse duration = 300 s, duty cycle 1.5 %() Pulse width limited by safe operating area

Safe Operating Area Thermal Impedance

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Output Characteristics

Transconductance

Gate Charge vs Gate-sourceVoltage

Transfer Characteristics

Static Drain-source On Resistance

Capacitance Variations

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Normalized Gate Threshold Voltage vsTemperature

Source-drain Diode Forward Characteristics

Normalized On Resistance vs Temperature

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Fig. 1: Unclamped Inductive Load Test Circuit

Fig. 3: Switching Times Test Circuits ForResistive Load

Fig. 2: Unclamped Inductive Waveform

Fig. 4: Gate Charge test Circuit

Fig. 5: Test Circuit For Inductive Load SwitchingAnd Diode Recovery Times

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DIM.mm inch

MIN. TYP. MAX. MIN. TYP. MAX.

A 2.2 2.4 0.086 0.094

A1 0.9 1.1 0.035 0.043

A2 0.03 0.23 0.001 0.009

B 0.64 0.9 0.025 0.035

B2 5.2 5.4 0.204 0.212

C 0.45 0.6 0.017 0.023

C2 0.48 0.6 0.019 0.023

D 6 6.2 0.236 0.244

E 6.4 6.6 0.252 0.260

G 4.4 4.6 0.173 0.181

H 9.35 10.1 0.368 0.397

L2 0.8 0.031

L4 0.6 1 0.023 0.039

==

DL2

L4

13

==

B

E

==

B2 G2

A

C2

C

H

A1

DETAIL A

A2

DETAIL A

TO-252 (DPAK) MECHANICAL DATA

0068772-B

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Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibil ity for the consequencesof use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license isgranted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication aresubject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics productsare not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.

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