Slide 1

Steve McMahon RAL Towards Phase II tracking at ATLAS Mini-Workshop on ATLAS Upgrades for High Luminosity May 20 th 2014 Prague S. McMahon : Prague May 20141 Slide 2 The Current ATLAS Inner Detector (ID) Initial Specifications & Limitations Radiation Damage Bandwidth Limitation Occupancy limits Current Inner Detector 3 layers of Pixels (PIX), 4 layers of Si micro-strips (SCT), straw tracker (TRT) Additional PIX-layer (IBL) to be inserted in Long Shut-Down 1 (LS1 - 2014) ID designed for 10 years of operation, peak luminosity of 1 x 10 34 cm -2 s -1 The assumed pile up ( ) was 23, bunch crossing frequency 25ns and the L1 trigger rate of 100kHz. 2 Tesla Magnetic field PIX: designed to withstand 10 15 1MeV neq/cm 2 or about 400fb -1 IBL: designed to about 850fb -1 SCT: designed to withstand 2x10 14 1MeV neq/cm 2 or about 700fb -1 Both SCT and PIX apply zero suppression to accommodate up to 50 This is being expanded in LS1 to get bveyond 75 (3 x 10 34 cm -2 s -1 @ 25ns) However, there are hard wired limitations which mean one cannot go beyond this. PIX-Limits 0.2-0.4 pixels per 25ns. For SCT data rate between FE chip and ReadOut Driver (ROD) limit us to 3 x 10 34 cm -2 s -1 With the occupancy expected at the HL-LHC the SCT would not be able to resolve close-by tracks in the core of High P T jets The TRT will approach 100% occupancy and tracking efficiency will suffer accordingly S. McMahon : Prague May 20142 Slide 3 The Current ATLAS Inner Detector (ID) Initial Specifications & Limitations Radiation Damage Bandwidth Limitation Occupancy limits Current Inner Detector 3 layers of Pixels (PIX), 4 layers of Si micro-strips (SCT), straw tracker (TRT) Additional PIX-layer (IBL) to be inserted in Long Shut-Down 1 (LS1 - 2014) ID designed for 10 years of operation, peak luminosity of 1 x 10 34 cm -2 s -1 The assumed pile up ( ) was 23, bunch crossing frequency 25ns and the L1 trigger rate of 100kHz. 2 Tesla Magnetic field PIX: designed to withstand 10 15 1MeV neq/cm 2 or about 400fb -1 IBL: designed to about 850fb -1 SCT: designed to withstand 2x10 14 1MeV neq/cm 2 or about 700fb -1 Both SCT and PIX apply zero suppression to accommodate up to 50 This is being expanded in LS1 to get bveyond 75 (3 x 10 34 cm -2 s -1 @ 25ns) However, there are hard wired limitations which mean one cannot go beyond this. PIX-Limits 0.2-0.4 pixels per 25ns. For SCT data rate between FE chip and ReadOut Driver (ROD) limit us to 3 x 10 34 cm -2 s -1 With the occupancy expected at the HL-LHC the SCT would not be able to resolve close-by tracks in the core of High P T jets The TRT will approach 100% occupancy and tracking efficiency will suffer accordingly S. McMahon : Prague May 20143 Slide 4 The Current ATLAS Inner Detector (ID) Initial Specifications & Limitations Radiation Damage Bandwidth Limitation Occupancy limits Current Inner Detector 3 layers of Pixels (PIX), 4 layers of Si micro-strips (SCT), straw tracker (TRT) Additional PIX-layer (IBL) to be inserted in Long Shut-Down 1 (LS1 - 2014) ID designed for 10 years of operation, peak luminosity of 1 x 10 34 cm -2 s -1 The assumed pile up ( ) was 23, bunch crossing frequency 25ns and the L1 trigger rate of 100kHz. 2 Tesla Magnetic field PIX: designed to withstand 10 15 1MeV neq/cm 2 or about 400fb -1 IBL: designed to about 850fb -1 SCT: designed to withstand 2x10 14 1MeV neq/cm 2 or about 700fb -1 Both SCT and PIX apply zero suppression to accommodate up to 50 This is being expanded in LS1 to get bveyond 75 (3 x 10 34 cm -2 s -1 @ 25ns) However, there are hard wired limitations which mean one cannot go beyond this. PIX-Limits 0.2-0.4 pixels per 25ns. For SCT data rate between FE chip and ReadOut Driver (ROD) limit us to 3 x 10 34 cm -2 s -1 With the occupancy expected at the HL-LHC the SCT would not be able to resolve close-by tracks in the core of High P T jets The TRT will approach 100% occupancy and tracking efficiency will suffer accordingly S. McMahon : Prague May 20144 Slide 5 The Current ATLAS Inner Detector (ID) Initial Specifications & Limitations Radiation Damage Bandwidth Limitation Occupancy limits Current Inner Detector 3 layers of Pixels (PIX), 4 layers of Si micro-strips (SCT), straw tracker (TRT) Additional PIX-layer (IBL) to be inserted in Long Shut-Down 1 (LS1 - 2014) ID designed for 10 years of operation, peak luminosity of 1 x 10 34 cm -2 s -1 The assumed pile up ( ) was 23, bunch crossing frequency 25ns and the L1 trigger rate of 100kHz. 2 Tesla Magnetic field PIX: designed to withstand 10 15 1MeV neq/cm 2 or about 400fb -1 IBL: designed to about 850fb -1 SCT: designed to withstand 2x10 14 1MeV neq/cm 2 or about 700fb -1 Both SCT and PIX apply zero suppression to accommodate up to 50 This is being expanded in LS1 to get bveyond 75 (3 x 10 34 cm -2 s -1 @ 25ns) However, there are hard wired limitations which mean one cannot go beyond this. PIX-Limits 0.2-0.4 pixels per 25ns. For SCT data rate between FE chip and ReadOut Driver (ROD) limit us to 3 x 10 34 cm -2 s -1 With the occupancy expected at the HL-LHC the SCT would not be able to resolve close-by tracks in the core of High P T jets The TRT will approach 100% occupancy and tracking efficiency will suffer accordingly S. McMahon : Prague May 20145 Slide 6 The Current ATLAS Inner Detector A few selected silicon highlights (with personal bias) S. McMahon : Prague May 20146 Slide 7 The Current ATLAS Inner Detector A few selected silicon highlights (with personal bias) S. McMahon : Prague May 20147 Slide 8 The Current ATLAS Inner Detector A few selected silicon highlights (with personal bias) S. McMahon : Prague May 20148 Slide 9 The Current ATLAS Inner Detector A few selected silicon highlights (with personal bias) S. McMahon : Prague May 20149 Slide 10 The Current ATLAS Inner Detector A few selected highlights (with personal bias) S. McMahon : Prague May 201410 Slide 11 IBL : Phase-0 upgrades (LS-1) 11 Insertable B Layer (IBL) Inserted at small radius (see insert) Closest measurement 3.3cm from IP Significantly improves light jet rejection 3 4 layer pixel device n-in-n planar & 3D sensors Installed in May 2014 Uses the 2cm x 2cm FEI4 rad hard chip produced in 130nm CMOS IBL stays in place to Phase II NOW With IBL S. McMahon : Prague May 2014 Slide 12 ID Pixel : Phase-0 consolidation (LS-1) S. McMahon : Prague May 201412 Extraction April 2013 Surface Clean Room Return December 3 rd 2013 Improvements to the Existing pixel services The so called NSQP Slide 13 The LHC roadmap (updated December 2013) 13S. McMahon : Prague May 2014 Slide 14 The Future Phase II ATLAS Tracker Requirements Pixel Strip Detector General ITk Requirements Guided by the physics requirements (see Phils talk) Maintain and improve performance of existing ATLAS - ID to 3,000fb -1 Tracking to < 200, expect 1000 tracks per unit of rapidity Measure P T and direction of isolated particles (e and ), reconstruct vertices of pile-up events identify vertex of hard scatter Identify secondary vertices in b-jets with high efficiency and purity Measure tracks in the core of dense jets with good resolution Identify the decays of leptons, including impact parameter resolution Reconstruct tracks associated with converted photons The tracking must be robust against minor losses of acceptance Tracking at first level of triggering S. McMahon : Prague May 201414 ITk Pixels. Fluences up to 2x10 16 1MeV neq/cm 2 Low mass to reduce multiple scattering ( ATLAS Phase II Pixels Electronics Technologies & Challenges Specifications and Challenges. Radiation tolerance, Low power consumption per channel, Low noise High density of channels -> interconnects (TSV, bump-bonding=cost) Move towards deep(er) sub-micron technologies 65nm. CERN - RD53 now established and operational. On detector power conversion (DC-DC (baseline) and Serial Power under consideration) FEI4 Currently being used for IBL, requirement well matched to outer layers of ITk pixel detector. To limit cooling requirements chip plus sensor power should not exceed 450mW/cm 2. RD65 to develop the next generation of chips Choices Note that we do not necessarily need the same technologies at large and small r Extensive R&D in progress, wait for appropriate time to make decisions, cost is a driver S. McMahon : Prague May 201433 Slide 34 ATLAS Phase II : Changes to trigger architecture New design in time for Phase II 2-level system at Phase II Phase-I L1 becomes Phase-II L0, new L1 includes tracking Make use of improvements made in Phase 1 (NSW, L1Calo) in L0 Introduce precision muon and inner tracking information in L1 Better muon pT resolution Track matching for electrons, Requires changes to detector FE electronics feeding trigger system Drives ITk bandwidth requirements. ~3,200 optical links running at 5.6Gb/s S. McMahon : Prague May 201434 New (post Q2-2014) Requirements Level-0 Rate ~ 1,000 kHz, Lat. ~10 s Level-1 Rate ~ 400 kHz, Lat. ~30 s New (post Q2-2014) Requirements Level-0 Rate ~ 1,000 kHz, Lat. ~10 s Level-1 Rate ~ 400 kHz, Lat. ~30 s Slide 35 Ongoing Evolution of ITK Organisation ITK chair S. McMahon Pixel P. Morettini M.G.Sciveres Strips I.Gregor T. Affolder Performance & Layout H.Hayward A. Korn Upgrade Coordinator P. Allport Software M. Elsing Readout A. Grillo Mechanics A. Catinaccio G. Viehhauser Collaboration Institute Matters Costing and Finance C. Buttar + SJM Technical Coordinator B. Di Girolomo Production Prep & Test Facilities Upgrade-Physics Groups P. Wells 35S. McMahon : Prague May 2014 Test Beams Rap-5 Task Force K. Einsweiler A. Henriques Strip and Pixel coordinators, nominated by the community and selected by 2 search committees by November 2013 AUW. In December they were endorsed by the ITK community Slide 36 ITk: Draft Timetable : V1.0 36 2014 2015 2016 2017 2018 2019 2020 202120222023 ITk-IDR APR-OCT YR=1 23 4567 89 10 ITk-Kick off EB Approval CB Endorse ITk Commission on Surface Strips TDR Pixel TDR UCG, LHCC, Strip-MOU, RRB ~ 2018 Preproduction 3-4 Year Strip Production UCG, LHCC, Pixel-MOU, RRB Begin Integration ITk Ready for Installation PIXEL STRIP CB= collaboration board, EB=executive board, IMOU=interim memorandum of understanding, UCG=upgrade cost group, RRB= Resources review board, IDR=initial design review (internal), TDR=technical design report (external) 2-3 Years Pixel Production ~ 2019 Preproduction S. McMahon : Prague May 2014 Slide 37 Some Open Questions Optimisation of the baseline layout for performance & cost Can we reduce the material in the baseline? Fewer layers, less material per layer? Can we extend the existing layout to higher rapidities? Effect of magnetic field, material and track length Can we readout the tracker in a more efficient way Now planned to readout the Pixels at L0 Does it make sense to readout the strips at L0 What are the penalties in terms of performance and cost? What about alternate technologies Can we exploit emergent detector technologies CMOS? What about new chip technologies 65nm Can we source sensors (perhaps larger) from new vendors S. McMahon : Prague May 201437 Slide 38 ATLAS Phase II : Other Challenges Low mass high pressure ON detector cooling Thermal and environmental management local and global supports and mechanics Alignment (with tracks and possibly lasers) Integration, decommissioning, installation commissioning and possibilities for access maintenance and repair Power supplies, cables, RAD hard fibres, possible reuse of existing servies. Multiplexed powering (HV and LV) DAQ, ATCA, Fast routing of data to L1-Track. DCS, now becomes part of the detector-data-stream Long term reliability issues...electronics, mechanics, infrastructure Can we exploit 3D printing Logistics . S. McMahon : Prague May 201438 Slide 39 Some Open Questions How are we going to build the new detector? Time to develop and qualify processes and institutes Which institutes will participate with what Unique production challenges in the scale (strips = 200m 2 ) Difficult sociological challenges (see plot) Have we got all of the bases covered at the appropriate level How would we respond if/when The Funding Agencies ask can you do the same job with 10% less. The LHC changes the machine parameters Instantaneous luminosity increases Changes in the shape of the luminous region The interaction region changes and safety factors are decreased We need to be able to answer these questions efficiently and accuratly S. McMahon : Prague May 201439 Slide 40 The Open Questions Risks : How would we respond to Instabilities in vendors (ref IBM) The ongoing needs to support the existing ATLAS detector. All of the above takes an enormous amount of effort Simulation is absolutely critical still under resourced Software is critical current priority is for RUN-2 Having a balanced, appropriate R&D program, covering all of the bases at the appropriate level, on the appropriate time scale, and that starts NOW. S. McMahon : Prague May 201440 Slide 41 ATLAS Phase II : Conclusions The HL-LHC physics program will make very stringent demands of the ATLAS tracker beyond phase II It will be necessary to replace the existing tracker to meet all of these requirements. A baseline option (ITk) has been developed that builds on the performance and experience gained from the existing detector (ID) and our understanding of the harsh tracking environment at HL-LHC. We are now moving towards a TDR (2016) and construction in 2017 and we are continuing to develop There are a large number of challenges ahead of us. S. McMahon : Prague May 201441 Slide 42 ITk Institutions : 81 in total Slide 43 The End S. McMahon : Prague May 201443 Slide 44 ITk Mailing Lists : Please sign up ITk general mailing list called: atlas-ITk-general This will be used for ITk collaboration wide mails. Suggest everybody on ITk signs up to this (currently 18 69, 140 members) https://mmmservices.web.cern.ch/mmmservices/ open with approval of owner/administrators Posting is restricted to the e-group members. 44S. McMahon : Prague May 2014 ITk TWIKI https://twiki.cern.ch/twiki/bin/viewauth/Atlas/ITK https://twiki.cern.ch/twiki/bin/viewauth/Atlas/ITK Slide 45 MCH ITk - LOI Costing : Total 131 MCHF Slide 46 Known (to me) Institutional Affiliations 40 Strip 51 Pixel 17 Both 10 Not yet known. ITk Institutional : Affiliation