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STUDY & EVALUATION SCHEME M. TECH. ELECTRONIC CIRCUITS AND SYSTEMS ENGINEERING (FULL TIME) 1 st Year I Semester Sl. No. Subject Code Name of the Subject Periods Evaluation Scheme Subject Total Sessional End Sem. Exam. L T P C CT TA Total Theory Courses 1. EC 501 Semiconductor Device Modeling & Circuits Simulation (DC) 3 1 0 4 25 15 40 60 100 2. EC 502 VLSI Devices & Circuits (DC) 3 1 0 4 25 15 40 60 100 3. EC 503 Microelectronics & Technology (DC) 3 1 0 4 25 15 40 60 100 4. EC 504 Digital System Design using Verilog HDL (DC) 3 1 0 4 25 15 40 60 100 Laboratory Course 5. EC 505 Device Modeling & Circuits Simulation Lab (DC) 0 0 2 2 30 30 60 40 100 Total 12 4 2 18 130 90 220 280 500 L Lecture T Tutorial P Practical C Credits CT Class Test TA Teacher Assessment Sessional Total = Class Test + Teacher Assessment Subject Total = Sessional Total + End Semester Examination

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Page 1: STUDY & EVALUATION SCHEME M. TECH. …iul.ac.in/DepartmentalData/EC/MTech_Ecs_Full_Time.pdf · M. TECH. ELECTRONIC CIRCUITS AND SYSTEMS ENGINEERING ... M. TECH. ELECTRONIC CIRCUITS

STUDY & EVALUATION SCHEME

M. TECH. ELECTRONIC CIRCUITS AND SYSTEMS ENGINEERING (FULL TIME)

1st Year I Semester

Sl. No. Subject

Code

Name of the Subject

Periods

Evaluation Scheme

Subject

Total Sessional

End Sem.

Exam.

L T P C CT TA Total

Theory Courses

1. EC 501 Semiconductor Device Modeling

& Circuits Simulation (DC) 3 1 0 4 25 15 40 60 100

2. EC 502 VLSI Devices & Circuits (DC) 3 1 0 4 25 15 40 60 100

3. EC 503 Microelectronics & Technology

(DC) 3 1 0 4 25 15 40 60 100

4. EC 504 Digital System Design using

Verilog HDL (DC) 3 1 0 4 25 15 40 60 100

Laboratory Course

5. EC 505 Device Modeling & Circuits

Simulation Lab (DC) 0 0 2 2 30 30 60 40 100

Total 12 4 2 18 130 90 220 280 500

L – Lecture T – Tutorial P – Practical C – Credits CT – Class Test TA – Teacher Assessment

Sessional Total = Class Test + Teacher Assessment

Subject Total = Sessional Total + End Semester Examination

Page 2: STUDY & EVALUATION SCHEME M. TECH. …iul.ac.in/DepartmentalData/EC/MTech_Ecs_Full_Time.pdf · M. TECH. ELECTRONIC CIRCUITS AND SYSTEMS ENGINEERING ... M. TECH. ELECTRONIC CIRCUITS

STUDY & EVALUATION SCHEME

M. TECH. ELECTRONIC CIRCUITS AND SYSTEMS ENGINEERING (FULL TIME)

1st Year II Semester

Sl. No. Subject

Code

Name of the Subject

Periods

Evaluation Scheme

Subject

Total Sessional

End Sem.

Exam.

L T P C CT TA Total

Theory Courses

1. EC 506 VLSI Design (DC) 3 1 0 4 25 15 40 60 100

2. EC 507 Analog MOS Circuits (DC) 3 1 0 4 25 15 40 60 100

3. EC 508 ASIC Design & FPGA (DC) 3 1 0 4 25 15 40 60 100

4. EC 509 Fault Modeling & Testing of

Electronics Circuits (DC) 3 1 0 4 25 15 40 60 100

Laboratory Courses

5. EC 510 VLSI Design Lab (DC) 0 0 2 2 30 30 60 40 100

Total 12 4 2 18 130 90 220 280 500

L – Lecture T – Tutorial P – Practical C – Credits CT – Class Test TA – Teacher Assessment

Sessional Total = Class Test + Teacher Assessment

Subject Total = Sessional Total + End Semester Examination

Page 3: STUDY & EVALUATION SCHEME M. TECH. …iul.ac.in/DepartmentalData/EC/MTech_Ecs_Full_Time.pdf · M. TECH. ELECTRONIC CIRCUITS AND SYSTEMS ENGINEERING ... M. TECH. ELECTRONIC CIRCUITS

STUDY & EVALUATION SCHEME

M. TECH. ELECTRONIC CIRCUITS AND SYSTEMS ENGINEERING (FULL TIME)

2nd

Year III Semester

Sl. No. Subject

Code

Name of the Subject

Periods

Evaluation Scheme

Subject

Total

Sessional End Sem.

Exam.

L T P C CT TA Total

Theory Courses

1. EC 601 RF Circuit Design &

Technology(DC) 3 1 0 4 25 15 40 60 100

2. Elective-I (DE) 3 1 0 4 25 15 40 60 100

3. Elective-II (DE) 3 1 0 4 25 15 40 60 100

Laboratory Course

4. EC 608 Seminar (DC) 0 0 3 3 - - 50 - 50

5. EC 609 Project/M.Tech. Dissertation-I

(DC) 0 0 6 3 - - 150 - 150

Total 9 3 6 18 75 45 320 180 500

L – Lecture T – Tutorial P – Practical C – Credits CT – Class Test TA – Teacher

Assessment

Sessional Total = Class Test + Teacher Assessment

Subject Total = Sessional Total + End Semester Examination

Elective I

1. Advanced DSP EC 602 2. Advanced DIP EC 603 3. Advanced Nanoelectronics EC 604

Elective II 1. Current Mode VLSI EC 605

2. DSP Structures for VLSI EC 606

3. Advanced Computer Architecture EC 607

Page 4: STUDY & EVALUATION SCHEME M. TECH. …iul.ac.in/DepartmentalData/EC/MTech_Ecs_Full_Time.pdf · M. TECH. ELECTRONIC CIRCUITS AND SYSTEMS ENGINEERING ... M. TECH. ELECTRONIC CIRCUITS

STUDY & EVALUATION SCHEME

M. TECH. ELECTRONIC CIRCUITS AND SYSTEMS ENGINEERING (FULL TIME)

2nd

Year IV Semester

Sl. No. Subject

Code

Name of the Subject

Periods

Evaluation Scheme

Subject

Total Sessional

End Sem.

Exam.

L T P C CT TA Total

Laboratory Courses

1. EC 610 Colloquium 0 0 3 6 100 100 200 - 200

2. EC 611 Project/M.Tech. Dissertation-II

(DC) 0 0 12 12 - - 150 150 300

Total 0 0 15 18 100 100 350 150 500

L – Lecture T – Tutorial P – Practical C – Credits CT – Class Test TA – Teacher Assessment

Sessional Total = Class Test + Teacher Assessment

Subject Total = Sessional Total + End Semester Examination

Page 5: STUDY & EVALUATION SCHEME M. TECH. …iul.ac.in/DepartmentalData/EC/MTech_Ecs_Full_Time.pdf · M. TECH. ELECTRONIC CIRCUITS AND SYSTEMS ENGINEERING ... M. TECH. ELECTRONIC CIRCUITS

Semiconductor Device Modeling and Circuits Simulation (EC-501)

(Revised w.e.f. session 2016-17)

L T P

3 1 0

Unit 1:

Compound semiconductors, Lattice structures, Carrier drift, Direct and indirect semiconductors

Scattering, Recombination, Mean life time, Continuity equation 8

Unit 2:

PN junction characteristics, Current components in diode, Equivalent circuits of diode, BJT

characteristics, Second order effects in BJT: Thermal runaway, Base width modulation, Kirk effect,

Band gap narrowing, Small signal analysis. 8

Unit 3:

Eber’s moll model, Hybrid pi model, Figure of merit, approximate model and complete equivalent

model of BJT, Charge control model, Gummel poon model, SPICE model of BJT, Simulation of BJT

8

Unit 4:

N-channel, P-channel MOS characteristics and features, Enhancement and depletion mode: second

order effects of MOS: Body effect, Channel length modulation, Subthreshold conduction, DIBL, Hot

carrier effect, Mobility degradation, Velocity saturation, CMOS latch up, MOS parasitic capacitances

and resistances. 8

Unit 5:

Circuits models for MOSFET: small signal, SPICE models, BSIM model, Simulation and Layout

design DC, AC and Transient analysis of linear and non linear circuits, logic and timing simulations

8

Text Books:

1. Baker, Li, Boyce “ CMOS Layout, Design and simulation”, PHI publication

2. Rabaey Jan M, Chandrakasan Anantha, Nikolic Borivoje “ Digital Integrated Circuits” PHI

publication

3. Kanno Kannan “ Semiconductor Devices and Physics” Wiley publication

4. Sze S.M. “ Semiconductor Physics” MacGraw Hill publication

Reference Books:

1. Millman, Halkias “ Electronic Devices and Circuits” TMH publication

2. Kamins Muller “ Device Electronics for Integrated Circuis” Wiley publication

Page 6: STUDY & EVALUATION SCHEME M. TECH. …iul.ac.in/DepartmentalData/EC/MTech_Ecs_Full_Time.pdf · M. TECH. ELECTRONIC CIRCUITS AND SYSTEMS ENGINEERING ... M. TECH. ELECTRONIC CIRCUITS

VLSI Devices and Circuits (EC-502)

(Revised w.e.f. session 2016-17)

L T P

3 1 0

Unit 1:

Properties of digital systems, regenerative property, NMOS, PMOS, pull up and pull down

networks, strong 1 and strong 0, NAND/NOR, EX-OR, Decoder, MUX,Micron and Sub-micron

devices: Scaling, Short channel effects 8

Unit 2:

Standard CMOS circuits, Pseudo NMOS, Pass Transistor Logic (PTL), types of PTL, advantages

and disadvantages of PTL, Level restorer, Transmission gate Adder/ Substractor, Design of

Combinational circuits and Sizing of MOSFETs 8

Unite 3:

Dynamic CMOS and Domino CMOS, Complex gates, Sequential Circuits: Latches & Flip-flops,

Problems of race, race around and 1’s catching 8

Unit 4:

Standard cells, Circuit implementation using PAL and PLA, FPGA, Look up tables (LUTs),

Importance of FPGA 8

Unit 5:

RAM, ROM, basic cells of SRAM and DRAM, 6T RAM, 3T RAM, 1T RAM, GaAs MESFET,

its characteristics and applications, Bi-CMOS: features, inverter, conventional and full swing

BiCMOS circuits 8

Text books:

1. Rabaey Jan M, Chandrakasan Anantha, Nikolic Borivoje “ Digital Integrated Circuits”

PHI publication

2. Hodges, Jackson, Saleh “ Analysis and Design of Digital Integrated Circuits” McGraw

Hill publication

3. Kang Sung-Mo, Leblebici Yusuf “CMOS Digital Integrated Circuits” Tata McGraw Hill

publication

Reference Books:

1. Sedra ,Smith “ Microelectronic Circuits” Oxford Publication

2. Islam S.S “Semiconductor Devices and Physics” Oxford Publication

Page 7: STUDY & EVALUATION SCHEME M. TECH. …iul.ac.in/DepartmentalData/EC/MTech_Ecs_Full_Time.pdf · M. TECH. ELECTRONIC CIRCUITS AND SYSTEMS ENGINEERING ... M. TECH. ELECTRONIC CIRCUITS

Microelectronics Technology (EC-503)

(Revised w.e.f. session 2016-17)

L T P

3 1 0

Unit 1

Introduction: Basic structure of BJT, NMOS, CMOS, BiCMOS Devices .

Crystal Growth & Silicon wafer preparation: Introduction, Structure of Semiconductor,

Electron- Grade Silicon, CZ Crystal Growth, Silicon Shaping, Processing considerations

Epitaxy: Introduction, Vapour-Phase Epitaxy, Molecular beam Epitaxy, Silicon on Insulator,

Epitaxial Evaluation. 8

Unit 2

Oxidation: Introduction, Growth Mechanism and Kinetics, Thin oxidation, Oxidation Technique

and System, Oxidation Properties, Redistribution of Dopants at interface, Oxidation of

Polysilicon, Oxidation Induced Defects.

Dielectrics and Polysilicon Film Deposition: Introduction, Deposition Process, Polysilicon,

Silicon Dioxide, Silicon Nitride, Plasma Assisted Deposition. 9

Unit 3

Lithography: Introduction, Optical Lithography, Electron Lithography, X-ray Lithography, Ion

Lithography

Etching: Wet and Dry Chemical Etching, Reactive Plasma Etching

Diffusion: Introduction, Model of diffusion, in solid, Diffusivities of B, P, As and Sb,

Measurement Techniques 8

Unit 4

Ion Implantation: Introduction, Range Theory (Jon Stopping, Range Distribution, Damages,

Channeling), Annealing, Shallow Junction, High Energy Implantation.

Metallization: Chemical Vapour Deposition (CVD), Physical Vapour Deposition (PVD),

Evaporation technique, sputtering technique. 8

Unit 5

Fabrication steps of IC: Bipolar IC, MOS IC, BiCMOS IC, Fault Detection and

Characterization Technique 7

Text Books

1. SZE S M (SE) “VLSI Technology”, Mc Graw Hill International

2. Gandhi S,“VLSI fabrication principles” ,Wiley Publication

Reference Books 1. Campbell S A, “The Science and Engineering of Microelectronics fabrication” Oxford

University press

2. Geiger Randall L, Allen Phillip E, Stader Noel R, “VLSI Design Technique for Analog

and Digital Circuits”, Mc Graw Hill International

Page 8: STUDY & EVALUATION SCHEME M. TECH. …iul.ac.in/DepartmentalData/EC/MTech_Ecs_Full_Time.pdf · M. TECH. ELECTRONIC CIRCUITS AND SYSTEMS ENGINEERING ... M. TECH. ELECTRONIC CIRCUITS

Digital System Design using Verilog HDL (EC-504)

(Revised w.e.f. session 2016-17)

L T P

3 1 0

Unit 1

Introduction to VLSI Design, Combinational Circuit Design, Programmable Logic Devices,

Programmable Array Logic.

8

Unit 2

Review of Flip-Flops, Sequential Circuits, Sequential Circuit Design, Design Flow of VLSI

Circuits

8

Unit 3

Verilog Modeling of Combinational Circuits, Modeling of Verilog Sequential Circuits, RTL

Coding Guidelines, Coding Organization - Complete Realization

8

Unit 4

Writing a Test Bench, System Design using ASM Chart, Example of System Design using ASM

Chart, Examples of System Design using Sequential Circuits, Simulation of Combinational and

Sequential Circuits, Analysis of Waveforms using Modelsim

8

Unit 5

Model Sim Simulation Tool, Synthesis Tool, Synplify Tool - Schematic Circuit Diagram View,

Xilinx Place & Route Tool, Design of Memories – ROM, RAM , Design of Arithmetic Circuits,

System Design Examples

8

Text Books:

1) Samir Palnitkar, “Verilog HDL: A Guide to Digital Design and Synthesis”, PHI

Reference Books:

1) John F Wakerley,”Digital Design Principles and Practice”, PHI

Page 9: STUDY & EVALUATION SCHEME M. TECH. …iul.ac.in/DepartmentalData/EC/MTech_Ecs_Full_Time.pdf · M. TECH. ELECTRONIC CIRCUITS AND SYSTEMS ENGINEERING ... M. TECH. ELECTRONIC CIRCUITS

VLSI Design (EC-506)

(Revised w.e.f. session 2016-17)

L T P

3 1 0

Unit I

Traditional CMOS Design: System approach to VLSI design. Pseudo NMOS logic,

Transistor equivalency, CMOS logic and Gate design, Transmission Gate logic design, Delay

of MOS circuits, Basics of Low Power Design, Layout design rules and stick diagram.

8

Unit II

Advance CMOS Logic Design: Domino CMOS logic, NORA CMOS logic, Single Phase

Dynamic logic, Differential CMOS, Dynamic Differential Logic, Design of Adders/Subtractor

and Multiplexers/Decoder/Encoder/Multiplier.

8

Unit III

Sequential Circuit Design: Synchronous and Asynchronous Systems, CMOS clock Latches,

D,SR,JK,T Flip Flops, CMOS flip flop design, Synchronous design Techniques, Mely and

Moore Machines, FSM design, Design of MOS SRAM, DRAM,CMOS PROMs, EPROMs,

EEPROMs and Flash Memories.

8

Unit IV

Bipolar and BiCMOS logic Gate: Emitter coupled logic gate, Current mode logic, BiCMOS

logic gate, Alternatives BiCMOS approaches and circuits

Gallium Arsenide Digital Circuits: MESFET second order effects, Logic design with

MESFET, Capacitively enhanced logic and Heterojunction Bipolar Technology.

8

Unit V

Design of Programmable modules: Standard cells, PLA, PAL, PLDs, FPGA, Fused based

FPGA, Mixed Analog/Digital System design, Implementation using Verilog HDL/VHDL.

8

Text Books:

1. Jan.M.Rabaey, Anitha Chandrakasan, Borivoje Nikolic, "Digital Integrated Circuits", PHI, Second Edition

2. Neil H.E Weste, Kamran Eshraghian, "Principles of CMOS VLSI Design", 2nd Edition, Pearson, 1998

3. Ken Martin “Digital Integrated Circuit Design” Oxford Indian edition

4. Sung-Mo Kang, Yusuf Leblebici, "CMOS Digital IC- Analysis and Design", 3rd Edition, TMH

Reference Books:

1. Douglas A Pucknell, Kamaran Eshragian, “ Basic VLSI design”, 3rd

edition, PHI, 1994.

2. Wayne Wolf “Modern VLSI Design” 2nd Edition Prentice Hall 1998.

Page 10: STUDY & EVALUATION SCHEME M. TECH. …iul.ac.in/DepartmentalData/EC/MTech_Ecs_Full_Time.pdf · M. TECH. ELECTRONIC CIRCUITS AND SYSTEMS ENGINEERING ... M. TECH. ELECTRONIC CIRCUITS

Analog MOS Circuits (EC-507)

(Revised w.e.f. session 2016-17)

L T P

3 1 0

Unit I

Single Stage MOS Amplifiers: Common source stage with resistive load, Diode connected load and

Source degeneration, Source follower, Common gate stage, Cascode stage.

Differential Amplifiers: Quantitative and qualitative analysis of basic differential amplifier, Common

mode response, Differential pair with MOS Loads 8

Unit II

MOS Current Mirrors: Basic current mirrors, Cascode current mirrors, Active current mirrors

Frequency Response of Amplifiers: Miller effect, Poles and zeroes, Analysis of CS, CD, CG stage,

Cascode stage and Differential pair 8

Unit III

Noise: Statistical Characteristics of Noise, Thermal noise, Flicker noise, Representation of noise in

circuits, Noise in CS, CD, CG stage, Cascode stage and Differential pair

Feedback: Properties of Feedback, Feedback topologies, Effect of loading in Feedback, Effect of

feedback on noise 8

Unit IV

Oscillators: Oscillation criterion, Ring Oscillators, LC oscillators, Voltage controlled oscillators

Phase-Locked Loop: Simple PLL, Charge-Pump PLL, Delay locked loop 8

Unit V

Operational Amplifiers: Performance parameters, One stage and two stage OpAmps, Gain boosting,

Common mode feedback, Slew rate, Power supply rejection, Noise in OpAmp, Stability and Frequency

compensation in OpAmp

Switched Capacitor Circuits: MOS as a switch, Different switched capacitors circuits, Applications as

Amplifiers, Filters, Integrators and ADC/DAC 8

Text Book:

Razavi Behzad ”Design of analog CMOS Integrated Circuits” Tata McGraw-Hill Edition,2002

Reference Book:

Gregorian R , Temes G.C. ”Analog MOS Integrated Circuits for Signal Processing” J. Wiley & Sons,1986

Page 11: STUDY & EVALUATION SCHEME M. TECH. …iul.ac.in/DepartmentalData/EC/MTech_Ecs_Full_Time.pdf · M. TECH. ELECTRONIC CIRCUITS AND SYSTEMS ENGINEERING ... M. TECH. ELECTRONIC CIRCUITS

ASIC Design & FPGA (EC-508)

(Revised w.e.f. session 2016-17)

L T P

3 1 0

Unit I

Introduction to Embedded System, Design issue in system development Process, Design cycle in the

development phase 8051µc: Architecture, basic Assembly language programming concepts, Instruction

sets, Addressing Modes, Logical operation, Arithmetic Operation, Subrouters, Interrupt handling timing

subrouters, Serial Data Transmission, Serial data communication 8

Unit II

Introduction to ASIC: Types of ASIC, ASICs cell libraries CMOS logic: CMOS process, CMOS design

rule, combinational logic cell, sequential logic cell, Data path logic cell, I/O cells cell compilers 8

Unit III

ASIC library design: Transistors and resistors, transistors parasite capacitance, logical Effort, library cell

Design, Library Architecture, Gate Array Design, Standard cell design

Programmable ASIC Design: Anti fuse, Static RAM, EPROM and EEPROM Technology 8

Unit IV

Low level design Entry, Schematic Entry, low level design, language, PLA tools, EDIF, Overview

Hardware description Languages (VHDL & Verilog), Logical Synthesis VHDL Simulation, ASIC

Construction, Floor Planning and Placement Routing. 8

Unit V

FPGA Based System: Basic Concept, Digital Design & FPGA.

FPGA Fabrics: FPGA architecture, Static RAM based FPGA, Permanently Programmed FPGAs, Chips

I/O Circuit Design of FPGA fabrics, Architecture of FPGA fabrics, Logic implementation of FPGAs

Architecture 8

Text Book:

1. M.J. S. Smith /Application Specific Integrated Circuits/ Pearson Edu., 2005

Reference Book:

2. K.J. Ayla /The 8051 Microcontroller/ Paperback 3rd

Edition, July 2004

Page 12: STUDY & EVALUATION SCHEME M. TECH. …iul.ac.in/DepartmentalData/EC/MTech_Ecs_Full_Time.pdf · M. TECH. ELECTRONIC CIRCUITS AND SYSTEMS ENGINEERING ... M. TECH. ELECTRONIC CIRCUITS

Fault Modeling and Testing of Electronic Circuits (EC-509)

(Revised w.e.f. session 2016-17)

L T P

3 1 0

Unit-1

Fundamentals of silicon crystal structures, orientation planes and their effects, nature and effects

of impurities like carbon, oxygen etc., Parametric problems and effects in fabrication, circuit

sensitivities 8

Unit-2

Yield, Yield loss, failure and models of failure analysis, Gate level testing’s and their fault

models, chip level testing and their fault models 8

Unit-3

Introduction to five valued logic, truth table generation of standard gates, Boolean algebra, its

use and testing, Stuck-at faults 8

Unit-4

CMOS test methods, Functionality and manufacturing test principles, ATPG, Fault grading,

delay fault testing, Statical fault analysis design strategies 8

Unit-5

Functional testing, Adhoc scan based testing, self testing and IDDQ Testing, Chip level & system

level testing examples 8

Text Books:

1. Lala P.K.”Fault Tolerant and Fault Testable Hardware Design” BS Publication

2. Sze S.M. “VLSI Technology” TMH Publication

3. Weste Neil H.E., Eshraghian Kamran “Principle of CMOS VLSI Design” 2nd

ed Pearson

4. Hurst Stanley Leonard “VLSI Testing” IEEE Circuits and Devices Series

Page 13: STUDY & EVALUATION SCHEME M. TECH. …iul.ac.in/DepartmentalData/EC/MTech_Ecs_Full_Time.pdf · M. TECH. ELECTRONIC CIRCUITS AND SYSTEMS ENGINEERING ... M. TECH. ELECTRONIC CIRCUITS

RF Circuit Design & Technology (EC-601)

(Revised w.e.f. session 2016-17)

L T P

3 1 0

UNIT I

Introduction: Introduction to RF and wireless technology, spectrum allocation, issues in the design of RF circuits, PCB,

electronic chips, Transmission media and reflections, Maximum RF power transfer, Applications of RF. 8

UNIT II

RF circuit design: Basic building blocks in RF systems – RF Transmitters and receivers - Antenna, impedance matching, low

noise amplifier design, Oscillator, Mixer design, filter design. Input and output characteristics of RF Amplifier, Nonlinearity

and time variance, Inter-symbol interference, Random process and noise, Sensitivity and dynamic range, Passive impedance

transformation; Issues in RFIC Design, Noise, Linearity, and Filtering. 8

UNIT III

MOS Transistor at Radio Frequency: The Transistor Equivalent Circuit – Y Parameters - S Parameters, Understanding RF

Transistor Data Sheets

Small-signal RF amplifier design: MOS Transistor Biasing - Design Using Y Parameters - Design Using S Parameters

RF power MOS amplifier: RF Power Transistor Characteristics - Transistor Biasing - Power Amplifier Design - Matching to

Coaxial Feed lines - Automatic Shutdown Circuitry - Broadband Transformers. 8

UNIT IV

Use and Design of Passive Circuit Elements in RFIC Technologies: Introduction, The Technology Back End and Metallization

in IC Technologies, Sheet Resistance and the Skin Effect, Parasitic Capacitance, Parasitic Inductance, Current Handling in

Metal Lines, Poly Resistors and Diffusion Resistors, Metal-Insulator-Metal Capacitors and Poly Capacitors. 7

UNIT V

Applications of On-Chip Spiral Inductors and Transformers, Design of Inductors and Transformers, Some Basic Lumped

Models for Inductors, Calculating the Inductance of Spirals, Self-Resonance of Inductors, The Quality Factor of an Inductor,

Characterization of an Inductor, Layout of Spiral Inductors, Isolating the Inductor, The Use of Slotted Ground Shields and

Inductors, Basic Transformer Layouts in IC Technologies, Multilevel Inductors, Characterizing Transformers for Use in ICs,

On-Chip Transmission Lines, Effect of Transmission Line, Transmission, High-Frequency Measurement of On-Chip, Passives

and Some Common De-Embedding Techniques, radio architectures of GSM, CDMA and UMTS. 9

Text books:

1. RF circuit design by Chris Bowick , Elsevier’s Science & Technology Rights Department in Oxford, UK

2. RF Microelectronics by Behzard Razavi, Prentice Hall Ptr

3. Radio Frequency Integrated Circuit Design, John Rogers, Calvin Plett, Artech House

4. The RF and microwave handbook, CRC Press

5. The RF transmission systems Edited by Jerr y C. Whitaker, CRC Press

Reference books:

1. Microwave Engineering by D M Pozar, John Wiley and Sons

2. CMOS RFIC Design Principles by Robert Caverly, Artech House

3. Device Modeling for Analog and RF CMOS Circuit Design, Trond Ytterdal, Yuhua Cheng, Skyworks Tor A. Fjeldly,

John Wiley and Sons

Page 14: STUDY & EVALUATION SCHEME M. TECH. …iul.ac.in/DepartmentalData/EC/MTech_Ecs_Full_Time.pdf · M. TECH. ELECTRONIC CIRCUITS AND SYSTEMS ENGINEERING ... M. TECH. ELECTRONIC CIRCUITS

Advanced DSP (EC-602)

(Revised w.e.f. session 2016-17)

L T P

3 1 0

Unit 1

Discrete time signals and systems, Characterization & Classification of signals, Time domain

characterization of LTI Discrete –Time systems, Discrete –Time Fourier Transform, Discrete

Fourier Transform, Fast Fourier Transform, Z-Transform .

8

Unit 2

Design of IIR filters from Analog filters: Approximation of derivatives, Design of IIR filter

using impulse invariance technique, Design of IIR filter using bilinear transformation, matched

z-transform.

Realization of Digital Filters: Direct form I and II realization, signal flow graph, Cascade form

and Parallel form structure.

8

Unit 3

Design of FIR Filters using windows: Rectangular window, Triangular window, Hanning

window, Hamming window, Blackman window and Kaiser window .

Realization of FIR Filters: Transversal structure, Linear phase realization and Polyphase

realization of FIR filter.

8

Unit 4

Multirate Signal Processing: Introduction Down Sampling, Spectrum of the Down Sampled

Signal, Upsampling, Spectrum of the Up-sampled, Transversal Structure for Decimator and

Interpolator, Multistage Implementation of Sampling Rate Conversion.

8

Unit 5

Statistical Digital Signal Processing: Introduction,Statistical Properties of Random Signal, mean,

mean square, variance, autocorrelation of random process, autocovariance of random process,

Crosscorrelation of random processes and Crosscovariance of random processes, Power Density

Spectrum.

8

Reference Books:

1. Sanjit K.Mitra,’’Application DSP a Computer based approach’’,TMH

2. Allan Y.Oppenhem & Ronald W.Schater,’’Digital Signal Processing’’,PHI

3. S.Salivahanan,A.Vallavaraj & C.Gnanapriya,’’Digital Signal Processing,TMH

Page 15: STUDY & EVALUATION SCHEME M. TECH. …iul.ac.in/DepartmentalData/EC/MTech_Ecs_Full_Time.pdf · M. TECH. ELECTRONIC CIRCUITS AND SYSTEMS ENGINEERING ... M. TECH. ELECTRONIC CIRCUITS

Advanced DIP (EC-603)

(Revised w.e.f. session 2016-17)

L T P

3 1 0

Unit I

FUNDAMENTALS OF DIGITAL IMAGE PROCESSING: Elements of visual perception,

brightness, contrast, hue, saturation, mach band effect, 2D image transforms-DFT, DCT, KLT, and

SVD. Image enhancement in spatial and frequency domain, Review of morphological image

processing. 8

Unit II

SEGMENTATION: Edge detection, Thresholding, Region growing, Fuzzy clustering, Watershed

algorithm, Active contour methods, Texture feature based segmentation, Model based segmentation,

Atlas based segmentation, Wavelet based Segmentation methods. 8

Unit III

FEATURE EXTRACTION: First and second order edge detection operators, Phase congruency,

Localized feature extractiondetecting image curvature, shape features Hough transform, shape

skeletonization, Boundary descriptors, Moments, Texture descriptors- Autocorrelation, Co-occurrence

features, Runlength features, Fractal model based features, Gabor filter, wavelet features. 8

Unit IV

REGISTRATION AND IMAGE FUSION: Registration- Preprocessing, Feature selection-points,

lines, regions and templates Feature correspondence-Point pattern matching, Line matching, region

matching Template matching. Transformation functions- Similarity transformationand Affine

Transformation. Resampling- Nearest Neighbour and Cubic Splines Image Fusion-Overview of image

fusion, pixel fusion, Multiresolution based fusiondiscrete wavelet transform, Curvelet transform.

Region based fusion. 8

Unit V

3D IMAGE VISUALIZATION: Sources of 3D Data sets, Slicing the Data set, Arbitrary section

planes, The use of color, Volumetric display, Stereo Viewing, Ray tracing, Reflection, Surfaces,

Multiply connected surfaces, Image processing in 3D, Measurements on 3D images. 8

Text Books:

1. John C.Russ, “The Image Processing Handbook”, CRC Press

2. Mark Nixon, Alberto Aguado, “Feature Extraction and Image Processing”, Academic Press

3. Ardeshir Goshtasby, “ 2D and 3D Image registration for Medical, Remote Sensing and Industrial

Applications”,John Wiley and Sons

Reference Books:

1. Rafael C. Gonzalez, Richard E. Woods, Digital Image Processing', Pearson,Education R.J.Baker “CMOS: Circuit

Design, Layout, and Simulation” 3rd

Ed, Wiley, IEEE Press

2. Anil K. Jain, , Fundamentals of Digital Image Processing', Pearson Education,Inc., 2002. Edgar Sánchez-Sinencio,

Andreas G. Andreou “Low-voltage/low-power integrated circuits and systems: low-voltage mixed-signal circuits”

IEEE Solid-State Circuits Society

3. Rick S.Blum, Zheng Liu,“ Multisensor image fusion and its Applications“,Taylor& Francis,2006.

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Advanced Nanoelectronics (EC-604)

(Revised w.e.f. session 2016-17)

L T P

3 1 0

Unit I

NANOTECHNOLOGY AND REVOLUTION: Fundamental issues of Nanotechnology,

Nanotechnology: fulfilling the basics, nanotechnology: aiding the Environment. Limits and

Downsides, NASA applications, Nanotubes.

8

Unit II

NANOSTRUCTURE MATERIALS: Nanostructure science and Technology, Nanoparticle

synthesis strategies, Functional nanoscale devices.

8

Unit III

NANOCOMPOSITES: Nanocomposites, Nanomaterial Additives, Nanocomposite classification

system, Nanocomposites- Applications, Nanoclusters.

8

Unit IV

NANOMEDICINES: Prospect of Nanomedicine, Nanomedicine Taxonomy, nanomedicine,

Nanosensors and Nanoscale scanning.

8

Unit V

NANOROBOTICS: Introduction to Nanorobotics, Nature’s Nanorobotics devices, Nanorobotics

Design and control. Applications: SPM and Nanomanipulation, Robot in surgery, NanoTribology.

8

Text Books:

1) “The Nanoscope: Encyclopedia of Nanoscience and Nanotechnology”.

2) “Introduction to Nanotechnology”, C. P. Poole and F. J. Owens, Wiley.

3) “Nano Materials”, A. K. Bandyopadhyay, New Age International Publishers..

Reference Books:

1) “Nanotechnology: A Gentle Introduction to the Next Big Idea”, M. Ratner and D. Ratner, Pearson Education.

2) “Nanotechnology – Science, Innovation, and Opportunity”, L. E. Foster, Pearson Education.

3) “Nanotechnology – the fun and easy way to explore the science of mater’s smallest particles”, Richard

Booker and Earl Boysen, Wiley

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Current Mode VLSI Circuits & Applications (EC-605)

(Revised w.e.f. session 2016-17)

L T P

3 1 0

Unit I

Voltage Mode/Current Mode Overview: Comparison of Digital & Analog principles & systems,

Voltage Mode /Current Mode circuit principles,Comparison, Advantages of current mode circuits, BJT,

MOSFET and their analog models, power and fT considerations.

8

Unit II

Current mode operations: Current Mirror, Its Types(Simple cascade, high swing, regulated) and thier

performances, Translinear principle in BJT and MOS (Subthreshold and ohmic regions), Analog

switches, Differential pair and its DC/AC characteristics, Logic function realization & latches,

Multipliers.

8

Unit III

Transcondutance Amplifiers: Differential pair gm cell, fixed gain gm cell, linearized gain gm cell,

multiple differential pair gm cell, CMOS gm cell, Ohmic transistor gm cell, fixed and variable bias gm

cells, Active transistor gm cell, OTA structures and its applications.

8

Unit IV

Current conveyors(CC): Classification and generations of CCs, characteristic features, CC as analog

building block, design considerations with CC, circuit realization of CC’s, Translinear CC, I order BJT

CCI, class AB CCI, CMOS CCI, CMOS CCII, differential pair based CC cells, ±CC circuits, MOCC,

multi-X/multi-Y CCs, CCIII realization, UCC, GCC, Fully differential CMOS CCII, CC applications.

8

Unit V

Switched current techniques and applications: Switched capacitor and switched current techniques,

switched current (SI) principle, SI building blocks: Switch, Current copier, Current comparator, I and II

order integrators, Bilinear integrator, Memory cell, Multiplier applications.

8

Text Books:

1. Liu, Kramer,Indeveri,Delbruck,Douglas“Analog VLSI: Circuits and Principles”, Pearson, Education India

2. Ananda Mohan “Current Mode VLSI Analog Filters” Springer, Anne Books, India

3. Giuseppe Ferri, Nicola Carlo Guerrini “Low-voltage low-power CMOS current conveyors” Springer

Reference Books

1. M Ismail and Terri Fiez “Analog VLSI: Signal and Information Processing” McGraw Hill.

2. R.J.Baker “CMOS: Circuit Design, Layout, and Simulation” 3rd

Ed, Wiley, IEEE Press

3. C.toumazou, F.J.Lidgey, D.G.Haigh“Analog IC design: the current mode approach” IEE circuits and systems

series-2

4. Edgar Sánchez-Sinencio, Andreas G. Andreou “Low-voltage/low-power integrated circuits and systems: low-

voltage mixed-signal circuits” IEEE Solid-State Circuits Society

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DSP Structures for VLSI (EC-606)

(Revised w.e.f. session 2016-17)

L T P

3 1 0

Unit I

An overview of DSP concepts-Linear system theory, DFT, FFT, realization of digital filters.

Typical DSP algorithms, DSP applications. Data flow graph representation of DSP algorithm.

8

Unit II

Loop bound and iteration bound Retiming and its applications.

8

Unit III

Algorithms for fast convolution. Algorithmic strength reduction in filters and transforms. DCT and

inverse DCT. Parallel FIR filters. Pipelining of FIR filters. Parallel processing. Pipelining and

parallel processing for low power.

8

Unit IV

Pipeline interleaving in digital filters. Pipelining and parallel processing for IIR filters.Low power

IIR filter design using pipelining and parallel processing, Pipelined adaptive digital filters.

8

Unit V

Round off noise and its computation. State variable description of digital filters, Round off noise

computation using state variable description. Scaling using slow-down, retiming and pipelining.

8

Text Books:

1. K.K.Parhi, “VLSI Digital Signal Processing Systems”, John-Wiley

2. U. Meyer – Baese , Digital Signal Processing with FPGAs, Springer

Reference Books

1. “Digital Signal Processing Structures for VLSI (Very Large Scale Integration)” Defense Technical

Information Center.

Page 19: STUDY & EVALUATION SCHEME M. TECH. …iul.ac.in/DepartmentalData/EC/MTech_Ecs_Full_Time.pdf · M. TECH. ELECTRONIC CIRCUITS AND SYSTEMS ENGINEERING ... M. TECH. ELECTRONIC CIRCUITS

Advanced Computer Architecture (EC-607)

(Revised w.e.f. session 2016-17)

L T P

3 1 0

Unit I

Multiprocessors and multi-computers. Multi-vector and SIMD computers. PRAM and VLSI

Models. Conditions of parallelism. Program partitioning and scheduling. Program flow

mechanisms. Parallel processing applications. Speed up performance law.

8

Unit II

Advanced processor technology. Superscalar and vector processors. Memory hierarchy

technology. Virtual memory technology. Cache memory organization. Shared memory

organization

8

Unit III

Linear pipeline processors. Non linear pipeline processors. Instruction pipeline design. Arithmetic

design. Superscalar and super pipeline design. Multiprocessor system interconnects. Message

passing mechanisms.

8

Unit IV

Vector Processing principle. Multivector multiprocessors. .Compound Vector processing.

Principles of multithreading. Fine grain multicomputers. Scalable and multithread architectures.

Dataflow and hybrid architectures.

8

Unit V

Parallel programming models. Parallel languages and compilers. Parallel programming

environments. Synchronization and multiprocessing modes. Message passing program

development. Mapping programs onto multicomputers. Multiprocessor UNIX design goals.

MACH/OS kernel architecture. OSF/1 architecture and applications.

8

Text Books:

1. K. Hwang, “Advanced Computer Architecture” , TMH

2. W. Stallings,” Computer Organization and Architecture”, McMillan

Reference Books

1. M.J. Quinn, “Designing Efficient Algorithms for Parallel Computer”, McGraw Hill