summaries from day 3, wtmf 2018 - h2magazine.nl€¦ · need software to configure the device. more...

conclusions wtmf18 - June 22 2018

proceedings: magazine.photondelta.eu/wtmf18 1

Summaries from Day 3, WTMF 2018

Proceedings: magazine.photondelta.eu/wtmf18

On Friday morning June 22nd 2018, 14 short presentations were given summarising the work in the

breakout sessions on Thursday morning and afternoon.

This is an indexed PDF of all the presentations.

Fast Track Search - Click on

to jump to the respective video-presentation related to that topic.

The results of workingsessions Thursday June 21 2018

Click on the link for quick access to the video-presentation:

1. Tele/Datacom/ICTShort - Michael Robertson

2. Tele/datacom/ICTLong - Michael Lebby

3. Telecom/Datacom/ICTWireless - Peter Maat

4. Aerospace - David Mackey

5. Agro-food - Peter O’Brien

6. Back-end - Peter O’Brien

7. Industry & IoT - Christophe Py

8. Defence - Dan Hermansen

9. Healthcare - Peter Harmsma

10. EPDA - Twan Korthorst

11. Automotive - Twan Korthorst

12. Testing - Sylwester Latkowski

13. Front-end - Meint Smit

14. Ecosystems - Peter van Arkel

http://magazine.photondelta.eu/wtmf18

https://vimeo.com/276759833

https://vimeo.com/276759833#t=33s















Tele, Datacom & ICT

June 22nd 2018

ApplicationsCATV and Radio

RF Analog

Active optical cable (AOC)

Fibre to the X (FTTX)

5G front and back-haul

On-board optics

Optical wireless (Li-Fi)

Undersea and long haul systems

Metro and optical transport

Datacenters

High performance computing

Wide Area Networks (WANs)





Fiber communications technology advancing since the 1970/80s

1310nm and 1550nm single mode wavelengths for distances >1km

850nm (980nm) for shorter distance multimode fiber interconnects

WDM technologies from ~2000 onwards

First used in telecom networks, now being implemented in datacomm short distance networks andinterconnects

Various forms of WDM including C (coarse), and D (dense)

Electronics

Advanced to the point today where the electronics assists the optical and optoelectronics

Modulation architectures evolved to allow increased information per bit of signal

PICs (photonic integration)

Now advancing for versitile functionality using InP, silicon photonics, dielectrics and polymers

System design

has evolved from 10/20year lifetimes to now 3-5yr lifetimes with reduced and more relatedtemperature specifications, amongst others.

Introduction

1. Higher speed performance both at component and PIC level: 100Gbps line rate (NRZ) →today we are approaching 50Gbps NRZ

2. Advanced, qualified and product PIC platforms (InP, SiP, Dielectric, Polymer) with 4, 8, 16 channels for 400, 800, and 1600Gbps aggregated data rate fiber optic transceivers

3. Lower power consumption for optical devices and transceivers

4. Larger bandwidth cross-section through face-plates whether via standardized pluggable transceivers, on-board optics, or full integration of optics immediately adjacent to the electronics

5. Removing need for laser burn-in

6. Simpler optical coupling and non-hermetic packaging

Critical challenges

https://vimeo.com/276759833#t=1m01s




Technological Gaps1. Being able to achieve $1/Gbps at 400Gbps for fiber optic transceivers for short distance (<10km) optical interconnects

2. Athermal designs where TE coolers are not needed to alleviate power consumption and stability (wavelength) issues

3. More advanced, higher performing, lower cost packaging platforms that may include standard packaging techniques such as Chip-on-board, passive alignment, integrated optics with electronics and plastic packages

4. True 100Gbps line rate optical devices and PICs to reduce reliance on modulation techniques such as PAM-4

5. Full hetero-structure PICs that include InP, polymer, dielectrics, silicon, SiGe for more advanced monolithic platforms

6. Burn-in requirement for lasers

7. Simple optical alignment and reliable non-hermetic packaged devices

Market: Fiber optic networks

Application: 400G and beyond transceivers

Challenge: Higher speed performance of PIC platforms – how to get to 100Gbaud/s?

Boundary conditions: Limit to integrated solutions, assume electronics will be available in the next 10 years

Technological challenges (product) Economical Challenges (business)

- Reduce drive voltage of modulators <2V ideally <0.5V for direct drive

- Improve loss/bandwidth trade-off

- Develop linear optical amplifiers (SOAs)

- High-speed RF models of electrical signals on PIC platforms

- Multi-level metallization

- Integrated RF terminations

- Improve overall fabrication robustness/accuracy

- Develop compensation techniques and control methods

Telecom applications need

performance

Datacom driven by cost $/Gb and

power

Break-out on challenges





Market:

Application: ICT Telecom/datacom

Challenge: Wafer level test and assembly – including optical coupling

Boundary conditions:

Technological challenges (product) Economical Challenges (business)In this box the challenges regarding the technology are described. This can both be on the functional

as on the physical level. i.e. properties of the light, footprint, etc. See the table with parameters in the part of the application in the document.

•Hybrid transceivers

•Wafer level test and assembly – including optical coupling

•PCMs for chip checking

•Etched facet lasers, or grating couplers for on-wafer laser test

•Validate assembly process

•Test most important building blocks first

•A system level model to compare characterisation

•Mode transformer in chips – reflection sensitivity of interfaces

•Athermal –use of phase shifters

•Testing and standarization

Economical challenges are based on business metrics like cost price reduction, scalability or reliability of supply.

• ...

• ...

• ...

• ...

• ...


Market: telecom/data com

Application: PIC based optical transceivers, optical signal processing, wavelength tracking

Challenge: Low-power, self configuring capability for PIC chips to tolerate fabrication error (improve yield) and improve flexibility?

Boundary conditions: Simple, cheap, low power, fast, suitable for mass production


1. DemuX and Mux for WDM (DWDM or LAN-WDM or even CWDM)

2. Optical 90-degree hybrid

3. Interference based components

Challenges:

1. Process fluctuations create optical phase errors or coupling ratios which affect yield.

Self-configuring is needed to correct the error to make the optical circuits functional.

2. Possible solutions. Add heaters for thermal tuning. laser trimming or ablation.

3. Detecting errors

4. PN Junction

consume space on the wafer May consume power.

Need software to configure the

device.

More electrodes to control the

device






Roadmap Gaps0. Car to X communication

1. When will the 400Gbps and 800Gbps nodes for both short distance optical interconnects (<10km) as well as long distance interconnects actually ramp? 100Gbps node is late by 2-3years.

2 Traditional standards like IEEE are slow and late. They typically take 2-3yrs, and by the time things are inked and documented, the industry has moved on to different platforms, footprints, and designs. MSA based activities are becoming popular – will andthey and should they supplant standards?

3. How to take optics closer to electronics for commercial based product solutions. When optical interconnect distances lessthan 3m are considered, electrical alternatives can be competitive both in performance and cost.

4. Ramping PIC based platforms such as Silicon Photonics with limited telecom/Datacom volume. To fully utilized the economies of scale, roadmaps should consider Silicon Photonics applications over and above Datacom/telecom ICT. Examples would be GaAs VCSEL 3D sensing for mobile phones where volumes may reach 2B units.

5. How to drive metrics from $10/Gbps (@400Gbps) down towards $1/Gbps (or lower) optical PIC based solutions. Could this be a SiP volume play, or could it be 6” InP wafers, or perhaps the implementation of polymers and dielectric material based platforms to both SiP and InP? High performance computing is driving towards $0.25 and $0.5/Gbps metrics for their interconnects.

8. Communication between super computers

9. cheap tunable transmitters

10. Gap: cryptography

Topic: High speed performance

Overlaps with chapters on: InP, Silicon, polymers, GaAs, assembly, packaging, testing, standardization, substrates, PIC devices, and front end processing. Also emerging healthcare, aerospace, automotive and industrial markets.

Topic: Multi-channel PIC platforms

Overlaps with chapters on: InP, Silicon, polymers, GaAs, assembly, packaging, testing, standardization, substrates, PIC devices, and front end processing. Also emerging healthcare, aerospace, automotive and industrial markets.

Topic: Lower power consumption photonic devices and PICs

Overlaps with chapters on: InP, Silicon, polymers, GaAs, assembly, packaging, testing, standardization, substrates, PIC devices, and front end processing

Topic: Larger bandwidth cross-section on faceplates

Overlaps with chapters on: Packaging, assembly, testing, cost modeling as well as InP, silicon, GaAs, polymer and dielectric platform materials.

Overlaps





Datacom/Telecom & ICT

IntroMarket

descriptionPIC cost Attributes Challenges Alternatives Building Blocks

Information sources

Conclusion

General introduction **

CATV and radio **

RF analog ** * ** **

AOC ** ** ** * **

FTTX ** ** * * *

5G * * *

OBO * * *

Li-Fi

Under sea system **

Metro optical transport

Datacenters

High performance computing

WAN **

General conclusion

Progress

Tele/datacomlong distance

June 21st 2018





13:00 – 13:10 General welcome and introduction

13:10 – 13:30 Introduction of participants + supply chain overview.

13:30 – 13:40 WGL presents challenges morning workshop + new challenges.

13:40 – 13:50 Ranking challenges from WG presentation. (Mentimeter)

13:50 – 14:20 Break-out sessions to develop solution chains per challenge 1.

14:20 – 14:45 Presentation of results

14:45 – 15:15 Break-out sessions to develop solution chains per challenge 2.

15:15 – 15:30 Presentation of results

15:30 – 15:40 Evaluation of results

15:40 – 15:55 Set action points and timeline

15:55 – 16:00 Closing remarks

Schedule

DefinitionsLong distance

Undersea

500-1000km and beyond

Optical transport

100-500km

Metro

20km to 100km

FTTH

Up to 5-20km

Long distance

Short distance





ApplicationsLong distance

Undersea

1000km+ undersea

Amplifier and repeater driven

Coherent and complex modulation

LiNoB, InP (polymer, silicon photonics growth)

Optical transport

Coherent technologies, complex modulation

Performance driven, smaller footprints

Switch architecture, wavelength conversion

Metro

Higher sensitivity to $/Gb/end user (both ends) up to 40/80km

Increasing use of coherent/modulation systems

Use of InP, SiP and new technologies (polymer)

FTTH

Higher sensitivity to cost

$/Gb, Power consumption, footprint, standards

Scie

nce

and

rese

arch • Company

name

• Academia– UCSB, MIT, Ghent, Tu/E etc

Man

ufa

ctu

rin

g eq

uip

men

t • Company name

• Ficontec

• Amricra

• Veeco

Fro

nt-

end

pro

cess

ing • Company

name

• AMSL

• EVG

Bac

k-en

dp

roce

ssin

g • Company name

• CST

• Helia

• DISCO

des

ign

to

ols

& s

ervi

ces • Company

name

• Rsoft

• Phoenix

• VLC

• Lumerical

• PhotonDesign

• Bright Photonics

Ap

plic

atio

n b

uild

ing • Company

name

• IBM

• Google

Introduction (device tools value chain)





Waf

eran

dep

itax

ialg

row

th • Company name

• Sumitomo

• AXT

• IQE

Fou

nd

ryan

dfa

b • Company name

• TSMC, ST micro, IMEC, Global Foundry, AIM Photonics

• Smart Photonics, GCS, CPFC, Jeppix, CST

PIC

san

dd

evic

es • Company name

• Intel, IBM, Avago-Broadcom, Finisar, Lumentum-Oclaro, Neo, Sumitomo, Acacia, Luxtera

• New smaller PIC players: LightwaveLogic, POET, Effect, Artic, etc

Sub

syst

ems • Company

name

• Juniper, Cisco,

• AristaNetworks

• Alcatel, NEC

• Nokia

• Intel

Net

wo

rks • Company

name

• Cisco, Juniper

• Huawei

• Alcatel

• Fujitsu

Med

ia

• Company name

• Facebook

• Google

• Microsoft

• Amazon

• Apple

Introduction (wafer, fab, devices, value chain)

System level: The collection of well-tuned functions, e.g. performed by separate boxes/pcbs or other photonic components, which jointly constitute an independently operating appliance.

Module/PCB/Box level: A device comprising a set of functions which cannot be used independently from other modules to constitute a system or a device.

Photonic Integrated Circuit level: a Photonic Integrated Circuit (PIC) is a single chip that fulfils optical functions.

Definitions





By Michael Lebby & Jeroen Duis

Overview of main challenges in upcoming 10 years

1000km + using 100Gbps NRZ to drive 800Gbps and 1.6Tbps systems

More advanced modulation techniques (FEC, higher optical budgets for modulation)NRZ, DUO-Binary, PAM4, QAM

Faster ICs with 100Gbps NRZ data rates (DSPs, FPGAs, gearboxes)

Fiber advancements: Few mode(s) fiber, multicore fiber, (O, L, C bands)

More efficient amplifiers/repeaters, programable ROADMs/WSS, passives

Longer spans, longer distances

Greater than 300km repeater spacings

Higher capacity per fiber (WDM, multicore)

Introduction (13:30 – 13:40)


Overview of main challenges in upcoming 10 years

More efficient technologies for PICs

InP → PIC platform for 100Gbps NRZ (100GBaud)

Silicon Photonics → PIC platform for 50/100G + integrated electronics

Polymer PICs for low voltage 100Gbps NRZ (100 Gbaud)

PICs for telecom performance/specs

Advanced silicon electronics (to assist optics)

More functional/complex DSPs (with AI?)

Silicon electronics for FEC, modulation, higher optical performance

Lower cost coherent IC designs for chip architectures

Dynamic implementations IC’s: Switch of CDR for non used links







Overall system price ($/Gb/s) for long haul systems

Chip cost per applicationHigh performance low volume vs high volume low cost

High startup cost vs pay as you go

Larger wafers lower real estate costs for InP (and GaAs), (other markets driving cost...)

Volume drivers for silicon wafer platforms (long haul volume is too small)

Component complexity and density (more functionality / mm2 or even mm3)

Integral packaging solutionsMore effective and lower cost packaging for 50 and ideally 100Gbps NRZ solutions

Power BudgetMore optimized photodiode sensitivity vs laser output power for optical budgets

Intermediate amplifiers (SOA), programmable WSS/ROADMs and other passives



Standards

Faster standards process IEC 86B, WG4? Better than 3 years. Less than 1 year needed

Avanced recognition of MSAs to replace standards (as footprints evolving quickly)

Reliability of telecom devices still applicable in other markets?

Can reliability be eased through software design/architecture? SDN + perhaps?

Design, routing, processing, testing, packaging -> prevents overpromising






Next we are going to deterimine the main challenges that need to be discussed using Mentimeter.

The options are determined by the market working group, but you can all add additional challenges when needed. The working groups have described some of their challenges in a template shown on the next slide.

All participants can divide 100 points over the challenges to reflect how important they find a challenges (more points = more important)

Instruction to challenges and voting

Market: long haul

Application: terrestrial networking

Challenge: Lower cost, higher performance coherent architectures

Boundary conditions: Using 100Gbps NRZ (100GBaud) components to drive 400/800/1600G system design



•Must operate at 100Gbps NRZ/100GBaud (for 800 and 1.6Tbps system design)

•Must be able to work with tighter optical link budgets for better signal integrity

•More advanced coherent and multi modulation schemes/architectures

•Faster standards for new smaller footprint, higher performing repeaters/amplifier

designs

•More intelligent IC design for DSP for higher signal integrity.

•Denser WDM designs with more efficient mux/demux

•


•Performance metric → 100Gbps

NRZ

•Faster optical devices with lower

power designs (InP, polymer, silicon)

•More intelligent ICs using DSPs with

FEC etc

•More complex PICs (including

packaging) for coherent 100Gbps

NRZ systems.

Break-out on challenges – long haulterrestrial





Market: long haul

Application: submarine

Challenge: Faster data rates, longer repeater spans, more efficient amplification (fiber amplifiers)

Boundary conditions: Utilize baseline 100Gbps NRZ (100GBaud) data rates/optical budgets (today most advanced system is 400Gbps aggregate)



•Must operate at 100Gbps NRZ/100GBaud (for 800 and 1.6Tbps system design)

•Must be able to work with tighter optical link budgets

•Coherent and multi modulation schemes/architectures

•Faster standards for new smaller footprint, higher performing repeaters/amplifier

designs

•More intelligent IC design for DSP to assist optics in long haul fiber

•Longer repeater spans? New designs?


•More datacentre designs being submarine (heat issues) as per Microsoft in 2018



NRZ


power designs (InP, polymer)

•More intelligent Ics using DSPs with

FEC etc

• Integrity of submarine datacenters

and technology to support them.

Break-out on challenges - long haulsubmarine

Market: long haul

Application: metro

Challenge: Cost effective, low power consuming, PIC based coherent components for high speed interconnect

Boundary conditions: 100Gbps NRZ data rates/optical budgets that are more price sensitive



•Advance components performance to 100Gbps NRZ/100GBaud (for 800 and 1.6Tbps

system design)

•More advanced and cost sensitive coherent and multi modulation

schemes/architectures

•Faster standards evolution for new smaller footprint, higher performing

repeaters/amplifier designs

•More intelligent IC design for DSP to assist optics in long haul fiber

•More emphasis on lower power solutions using lower power optical and electronic

components

•Lower system cost design using advanced coherent communications techniques.




NRZ (100GBaud)



•More intelligent ICs using DSPs with

FEC for example to improve signal

integrity at 100Gbps NRZ

(100GBaud)

•Advanced manufacturing of PICs

using InP, silicon, polymers,

dielectric materials

Break-out on challenges – long haulmetro





Market: long haul

Application: FTTH

Challenge: standardized low cost optical modules with higher levels of intelligence

Boundary conditions: 25G and 50G modules with intelligence (OTDR, single mode, small footprint, low power, multi wavelength, WDM)



•Advance network design for 50Gbps (50GBaud).

•Lower module, interconnect, network cost using both coherent and non-coherent

technologies

•More advanced non-coherent and coherent multi modulation schemes/architectures

•Faster standards for new smaller footprint, higher performing OLTs

•More intelligent IC design for improved signal integrity



•Performance metric → 50Gbps NRZ



•More intelligent ICs that include

OTDR and other fault diagnosis

intelligence.

•Volume product of PIC technologies

that meet the low $/Gbps metrics

($1-2/Gbps range)

Break-out on challenges – long haulFTTH

Go to www.menti.com

89 90 49

Ranking challenges (mentimeter)


http://www.menti.com/




During the break-out session there will be three or four groups that each will tackle a challenge using the worksheet in the next slide.

The goal is to develop a “solution-train” over all supply-chain shackles to tackle the challenge.

This includes the design of the system, modules and PICs and the technologies.

Instruction break-out sessions

Break-out session part 1

Group 1:

Test equipement for 100G

- Sylverster

- Boudewijn

- Michael

- Makoto

Group 2:

Operate at 100Gbps NRZ

- Erwin

- John

Group 3:

Efficient PDK and circuit modelling for

complex circuit

- Stephane

- Yu

- Jeroen





Technology selection:

100G NRZ operation

- DML (<20km

- EML (Mach zehnder)

- LiNbO3

- InP

- Polymer

- Silicion Photonics (SIP)

- Drive voltage?

- Laser power?

Route to 1Tbit single fiber transmission from 20k m to 1000 km

Modulation techniques

- Coherent, QAM (8/16/32/64/ etc.)

- DSP speed?

DWDM

- O, L, C band

Photodetectors 80Ghz





Challenges:

- chip status: R&D

- technology selection

- product development

- packaged design

- electronics development (drivers & TIA & DSP)

- testing

- high speed electrical interface

Solution name: Solution per supply-chain shackle Challenges to realize the solution

Product

System example Bit Error Rates,Eye Diagrams ‘as per mask criteria’Type of modulation schemeFEC, Dispersion management

Module example Wavelenght, Noise performance (linewidth, RIN) Output power, recievedpower, temperature performanceEMI testingRefrence Tx and RX, RF testing (subassembly)Crosstalk

>100GHz signal integrity

PIC example Small signal S-parameter testingLarge signal testingCalibration, Crosstalk

>100GHz bandwidth sources and detectors

Tools EPDA / PDKs toolsCalibrated models in simulation tools,Test element gourps for 100G

Interpretation of test results

Process

Front endWafer-level sampling performance100GHz Process Controll Mmodules / wafer verification cell,

Chips selection strategy /performance binning

Assembly100GHz interconnectsRf design

PackagingConnector style (optical and electrical)RF design

Interconnects

TestingGolden sample, calibration Shared test facilities with 100 GHz capabilitie

Market: Long houl

Application:

Challenge: Test equipment 100GHz

Boundary conditions: 100GHz performance





Challenges: Efficient PDK and circuit modelling for complex circuit (Design for Manufacturing)

Standardisation on measurement methods (get equipment builders to build specific testing protocals.

Library’s are missing

Parametric models -> standardised

No statistics, needs to be build up over time and needs components from multiple runs to provide a complete view

Building blocks are not characterised -> Long time for manual characterisation of each individual building block

Need a broad set of test equipment for the initial characterisation that might not be required during the production any more.

How to perform 100Gb RF testing on wafer level?

Group 3

Solutions

Standardised test cell with full functionality (statistics) -> allows comparison

Technology Maturity -> Run multiple runs with identical process

Automated test equipment for testing test cells

Pre-invest in the characterisation

Measurement Methodology IEC86B WG4





Tele/datacomwireless

AIST – JP LioniX Int. – NLUISTC – CH RMIT – AUTUE – NL ASTRON – NL

Wireless........

5G

Satcom

Radar

Optical wireless communication

…

Picture: ViaSat

Integrated Photonics:

Fibre-optic Interconnections

Microwave-photonic Signal Processing





Approach:Applications in the WTMF document

5G

On-Board Optics

RF Analog

Optical Wireless Communication Li-Fi

Challenges:

Update of earlier defined challenges

New challenges

Challenges:

Focus on a single application: 5G

Challenges depend strongly on the type of application

Application: 5G

Antenna

Amplifier

Mixer / Filter

Modulated Array (256)

Laser

Photonic BeamFormer

WDM Mux/Switch

Link

WDM Demux

Coherence detector

L.O.

Central





Application: 5G

o RF interfacing to modulator

Budget for the system? Who’s paying?

o Hard to package

Who should integrate the optical/electrical components?

o Electrical and optical interfacing to the modulator array

o Thermal design laser and photonic beam former

What is the form factor?

o Bandwidth limitation due to poor performance of the A-RoF link

o Low modulator cross-talk

Time to market?

Antenna

Amplifier

Mixer / Filter

Modulated Array (256)

Laser

Photonic BeamFormer

WDM Mux/Switch

Link

WDM Demux

Coherence detector

L.O.

Central

Challenges:

Questions:

Supply chain is identified

Next Steps

Further analysis of the challenges

Descriptions of the wireless applications needupdate

Telecons for further discussions





Aerospace

June 22nd 2018

Aerospace Applications

Main impressions from the workshop session:

Defense and aerospace are markets that currently don’t require much push for photonics as the pull is already there.

Desire for SWaP and overall system performance improvements give a large pull

Larger market potential then is perhaps expected that can enable growth. It has a good mix of lower volume, higher value products but also scope for medium to high volumes.





Aerospace Workshops

We focused on 3 narrower applications:

LIDAR application - Highlighted importance of identifying capabilities and differences of PIC platforms and stages of the supply chain

Microwave photonics for Radar signal processing/conditioning - enables very broadband applications

Free space optical satellite communication -enables new satellite markets vHTS and QKD

Aerospace ApplicationsRoadmap Actions: Identify and outline more key applications and any related existing development work.

Identify photonic platforms that can best serve each application now and how better to serve the applications in the future.

Identify best ways to improve the supply chain for a bottom up market approach: continuous process improvement approach as well as advancing platform capabilities.

WTMF roadmap shall is a key tool to make PIC technology adoption have fewer barriers for applications/new entrants looking to adopt PICs.

OCT Application

Platform Comparison





Agri-Food

June 21st 2018

AWG Stakeholder Selection

1. Regulators & Public Bodies (eg. FDA, EPA)

2. Researchers & Universities

3. Industry (eg. food producers, processors, equipment vendors)

4. Large Technology Companies / Mobile Platforms (eg. Apple, Amazon [Whole Foods])





Technology Examples

1. Integrated Photonics + Energy Harvesting + Communication (eg. remote sensing)

2. Remote Gas Sensors (NH3 for Animal Growth and Health)

3. Integrated Photonics + Microfluidics

4. Portable Spectrometers (eg. hyper-spectral imaging for plant health)

5. MIR Sources, Detectors & Waveguides (> 2000nm)

52

Technology Challenges

1. Very wide spectral range from UV to Mid-IR

2. Hybrid PIC-to-PIC integration (align with backend TWG)

3. Price Points (1$ -> 10$ -> 100$ -> 1,000$ -> 10,000$)

SiN InP Si





Back-end

June 21st 2018

General Introduction

Current

‘Gold Box’ Package

Future

‘Fiber-Free’ Package

10-100 times cheaper

component-level

packaging

wafer-level

packaging





Optical Integration Electrical Thermal

GratingCoupler

EdgeCoupler

LensedFiber

FiberArray

HybridIntegration

MicroOptical

EndFacet

Wirebonding

Flipchip

2.5D 3D

ActiveCooling

PassiveCooling

Photonic Integrated Circuit

MicroOptics

Optical FiberFree SpaceInterposer Interposer

PCB Micro-Interposer

Hermetic

Non-Hermetic

Wirebonding

Flipchip

2.5D 3D

Mechanical

Backend Process Steps

1. Non-bonded optical fiber interconnect for pluggable, free-space and disposable applications withless than 0.5 -> 0.1dB loss per interface

2. Wafer-scale micro optics for pluggable/free-space connectors (grating and edge coupled) withexpanded beams to relax mechanical alignment tolerance to > 10um

3. Passive optical fiber bonding with less than 0.5 -> 0.1dB loss per interface with unit packagingtimes going from minutes to seconds

4. Combined optical and electrical (RF to 60GHz) interposers for PIC and IC co-integration

Challenges (optical & electrical)





1. Active thermal management with reduced power consumption (eg. on-PIC TECs)

2. Passive thermal management with new thermal interface materials

3. Packaged PIC modules with increased thermal resilience (eg. withstand solder reflow)

4. Low cost encapsulation techniques (eg. LED polymer encapsulation)

Challenges (thermo-mechanical)

Thermal Control

Environment

1. Less than 1dB coupling loss for PIC-to-PIC interfaces (eg. InP to SiN)

2. Coupling with spectral range of 100nm @ -3dB

3. More robust PIC-to-PIC bonding techniques (eg. non-epoxy)

4. Increased number of optical interconnects (> 20 channels)

Challenges (hybrid PIC integration)





Top 10 challenges for sensors (healthcare, agro-food, Industry & IoT) morning session

1. Disconnect between technical capability, biological understanding, and clinical application2. Development of mid IR sources and spectrometers3. Exploration of clear application for teraHertz imaging, thermal Imaging, microwave Imaging,

ground penetrating radar, (sun induced) chlorophyll fluore4. Sensor specificity / selectivity (does it actually measure what it is supposed to measure?) In

particular for POC.5. Microfluidic integration and other sampling strategies6. Bridge gap between photonics community and agrifood community (as well for industry as for

academia)7. High speed/ sensitive sensor and imaging systems for food inspections8. Assuming a need for PICs, diversity of potential applications, use cases, and form factors creates

additional challenges9. For health care: bridge the gap between the photonics technology and rather conservative

doctors10.LED technology for plant growth modules and/ or imaging applications

Top 10 challenges for sensors (healthcare, agro-food, Industry & IoT)morning session1. Disconnect between technical capability, biological understanding, and clinical application2. Development of mid IR sources and spectrometers3. Exploration of clear application for teraHertz imaging, thermal Imaging, microwave Imaging,





doctors10.LED technology for plant growth modules and/ or imaging applications





Market: Healthcare/agrifood

Application: sensors for detection/diagnostics

Challenge: There is a disconnect between the problems that matter and the technology available



Lack of multidiscipline approach/scientist/engineer to best address problem

Lacking infrastructure (other parts of the system) to bring technology to market

Determining value addedTakes time and money to train

Break-out on challenges (1)

Market: health / agro / IoT

Application: gas sensing / medical imaging

Challenge: mid-IR and THz systems: availability / performance / cost

Boundary conditions: -


• THz building blocks not available as standardized components, though technology has

been demonstrated.

• Sharp absorption peaks over broad wavelength ranges: multiple source requirements

• Sensitivity requirements: for some applications, ppm is state of the art, ppb needed

• In liquids: spectral fingerprints broaden, reducing selectivity.

• Spectral fingerprints in THz are very complex, making it hard to identify which molecules

cause the resonances.

• Spectral response in THz to measure humidity depends on soil itself. This poses a

calibration challenge.

• Believe that represented material platforms address longer wavelengths. How to get IR

sources / detectors / filters / … in the current ecosystem.

• Frequency combs are expensive and

large

• QCLs: same

• Ppb sensitivity may enable point-of-

care diagnostics based on breath

analysis. Opportunity.

Break-out on challenges (2&3)





Market: Health care / Clinical diagnostics / Ag / Food

Application:

Challenge: Ensuring specificity and selectivity of the detection



• (1) Spectroscopy: Detecting a spectral feature in the context of everything else

• (2) Evanescent field sensing: specificity of a recognition molecule and strategy for treating

the rest of the sensor to reject nonspecific binding

•Spectroscopy; depends on resolution of detection and development of libraries of reference

spectra. Detection requirements will depend on complexity of the sample being measured (i.e.

is there a unique spectral feature far from everything else, or do you need very high resolution

to pick out a feature)

•Evanescent field based sensing: Define specific requirements for antibodies or other capture

molecules (dissociation constant, specificity). Methods for anti-fouling coating. May also need

to combine with sample prep (filtration). Sensor / sampling co-design.

•Packaging (sensor functionalization for specificty)

•Signal processing methods to enhance specificity


•Cost (may be expensive to get high

specificity; will the market support?)

• IP and licensing landscape (potential

need for consortium reagent

development)


1. Need more end-user representation to ensure technical development matches market needs2. Lower cost packaging and integration platforms3. Build trust amongst industrial partners, roadmap developers, R&D to ensure the roadmap drives

developments and innovation4. Education and workforce development5. expansion of photonic platforms to longer wavelengths6. lacking building blocks for sensing7. Full hetero junction PICs8. Industrial applications9. Low temperature (<100c) packaging10.understanding system infrastructure for sensor11.Precision agriculture12.Environmental monitoring13.Athermal designs

Roadmap gaps (in order of importance)





Sensors (Automotive, Aerospace, Defence)

June 20 – 22nd 2018

The Defence market covers

Submerged

At sea

At land

In Air

In Space

Applications improved by PICs

Optical

Microwave

Applications

DEFENCE

AEROSPACEAUTO-

MOTIVE





Automotive Sensors

For a fully autonomous vehicle each sensor type (Radar, Camera, LiDAR) will be represented roughy six times to achieve long/short range and 360° coverage

Road Condition Monitoring

To meet these use cases we need support for different wavelengths and polarization….





Can photonics be used to create a hemisperical laser warning sensor with direction finding capabilities?

What are the benefits of photonics?

What are the challenges to realize this application?

Laser warning sensors

Demands for Command & Control systems are higher than ever before

Communication systems are keyelements to realize the future C2-systems

Invisible

Light and compact

License free

Data rates from 1Gb/s to 1Tb/s

Robust and jamming-resistant

Wideband Optical Communication

Laser communication has a high volume potential





The need for adaptable, phased array and software definedradars is increasing to avoid frequency conflicts and provide new features like

Countering stealth technology in air and on ground

Non-detectable radar waveforms

Adaptable to multiple target types

Low Slow Small (drones)

Fast (transport planes)

Ultra-sonic (jets, missiles andgrenades)

Ground (persons and vehicles)

Agile Microwave Radar

Find the applications where PICs have a huge impact (x10)

Apply a structured method for analysis

Match applications, market needs and unique selling points

Applications to be ranked by impact of introducing PICS

Differentiate to impact!





Integrating electronics and photonics is a challenge

Technical challenges were pointed out regarding

Reduced SWaP-C solid state LiDAR applications seems to score a high rank

A number of markets were assessed and scored where PICs can be used for LiDAR

High Volume requires High Reliability

Defence is High Margin & technology driven

Reduce SWaP-C to differentiate!

Reducing Size, Weight, Power and Cost

Healthcare: starting point

• Chapter 3.3 under construction: considerable work done, needs further updates• Considerable market potential





Healthcare: starting point

• Few applications no input yet• Other topics need further updates

Top 10 challenges for sensors (healthcare, agro-food, Industry & IoT)morning session1. Disconnect between technical capability, biological understanding, and clinical application2. Development of mid IR sources and spectrometers3. Exploration of clear application for teraHertz imaging, thermal Imaging, microwave Imaging,





doctors10.LED technology voor plant growth modules and/ or imaging applications





Market: Healthcare/agrifood

Application: sensors for detection/diagnostics

Challenge: There is a disconnect between the problems that matter and the technology available



•Lack of multidisplinary approach/scientist/engineer to best address problem

•Lacking infrastructure (other parts of the system) to bring technology to market

•Determine added value for end user•Takes time and money to educate


Market: health / agro / IoT

Application: gas sensing / medical imaging

Challenge: mid-IR and THz systems: availability / performance / cost

Boundary conditions: -


• THz building blocks not available as standardized components, though technology has

been demonstrated.

• Sharp absorption peaks over broad wavelength ranges: source requirements

• Sensitivity requirements: what is available is down to ppm, need to go to ppb

• Spectral fingerprints: broaden in liquids, reducing selectivity. Very complex in THz, making it

hard to identify which molecules cause the resonances.

• Spectral response in THz to measure humitiy depends on soil itself. This poses a calibration

challenge.

• None of the represented material platforms can address (is that so?) longer wavelengths.

How to get IR sources / detectors / filters / … in the current ecosystem.

• Frequency combs are expensive and

large

• QCLs: same

• Opportunity: humidity detection takes

only ppth

Break-out on challenges (2&3)





Market: Health care / Clinical diagnostics / Ag / Food

Application:

Challenge: Ensuring specificity and selectivity of the detection



1.Spectroscopy: detecting a spectral feature in the context of everything else

• Depends on resolution of detection and development of libraries of reference spectra.

• Detection requirements will depend on complexity of the sample being measured. i.e. is there

a unique spectral feature far from everything else, or do you need very high resolution to pick

out a feature)

2.Contact-based (evanescent field) sensing: specificity of a recognition molecule and

strategy for treating the rest of the sensor to reject nonspecific binding

•Define specific requirements for antibodies or other capture molecules (dissociation constant,

specificity).

•Methods for anti-fouling coating.

•Coating lifetime

•May also need to combine with sample prep (filtration). Sensor / sampling co-design.

•Packaging (sensor functonalization for specificity)

•Signal processing methods to enhance specificity


•Cost (may be expensive to get high

specificity; will the market support?)

• IP and licensing landscape (potential

need for consortium reagent

development)


1. Need more end-user representation to ensure technical development matches market needs2. Lower cost packaging and integration platforms3. Build trust amongst industrial partners, roadmap developers, R&D to ensure the roadmap drives

developments and innovation4. Education and workforce development5. Expansion of photonic platforms to longer wavelengths6. lacking building blocks for sensing7. Full hetero junction PICs8. Industrial applications9. Low temperature (<100c) packaging10.understanding system infrastructure for sensor11.Precision agriculture12.Environmental monitoring13.Athermal designs

Roadmap gaps (in order of importance)





Break-out sessions on solutions(Afternoon session) – supply chain

Group 1:

Development of mid IR sources and

spectrometers

Group 2:

Sensor specificity / selectivity (does

it actually measure what it is

supposed to measure?) In particular for POC.

Group 3:

Microfluidic integration and other sampling strategies

Solution name: Solution per supply-chain shackle Challenges to realize the solution

Process

Front end

PIC (with or without channels)Microfluidics wafer with channelsMicrofluidics with semi-standard cells

Planarization for good hermetic sealing of the lid with the PICCustom design wafers

Assembly

Bonding the microfluidics to the PIC either wafer level or lids to wafers.Typically adhesive bonding (epoxy). Can be also direct bonding (for that the requriement for planarity is higher)

Ensuring leak-proof sealingAccuracy of positioning is not an issue now as they are not verysmall typically. Only for certain fluids where submicronappertues?channels are needed.

Packaging

IO ports for fluids, optical, and electrical… Eeasy/fast optical inut&output optical coupling, specially fordisposable chips. High accuracy specially needed for single mode fibersFunctionalizing is typically done at the end (temperature and life time are boundaries)

Interconnects

Wire bonds, flip-chip, TSB Incorporating TSBs

Testing

Sampling Temperature control

Market: Healthcare

Application:

Challenge: Microfluids






Sensor specificity / selectivity

PIC coating packaging storage use

reader

interpretation

•Front-end / back-end supply chain

•Sensing device

•Exposure window

•Wafer level? •Process: low-temperature

•Non-destructive bonding

•uFluidics•Optical interface•Electrical interface

•Shelf life •Apply sample fluid

•Clinician•Farmaceutical

company•AI

•Decent engineering

• Test• Cost• Who pays?

•Spotting / printing/ ALD / …•Primary layer: chemical manufacturer

•Non-specific binding•Antibodies: assay developer / DNA sequencing

•Replace this by synthetic surfaces. Gap in supply chain•Selectivity / specificity / life time

•Stabilization reagent

!!

!June 22 2018 - University Twente - NL -WTMF 2018

Mid-IR sensing (1-10 um)

Health – agro – food – IoT

Market pull is real

Challenge: sources QCL: power, tunability, costsSupercontinuum: size, power, costsThermal: low power, uniform emissionRare-earth: low TRL

Challenge: detectors need cooling, bulky

Integration: not possible in ecosystem

Alternative: RamanOn-chip: waveguide Raman signal to be suppressed

Challenge: ecosystem of IR sensing unexplored. Align with MIRPHAB / AIM initiativeUnderstand supply chain & business case, take if from there.

June 22 2018 - University Twente - NL -WTMF 2018


https://vimeo.com/276759833#t=1h00m40s



General recommendations / actions

For mid-wave IR: Get a better understanding of what is available and what is neededIdentify relevant partners: knowledge/expertise/infrastructure/etc.

Need to add mid-IR platform to the eco system?

Are we talking about a photonics roadmap or an integrated photonics roadmap? Get clarification on this matter. How is the end user best served?

Make sure education is covered: stimulate multidisciplinary thinking.

Most importantly: end-users are absent in the community. Facilitate the discussion between and users and technological developers / R&D. Make sure the process involves multidisciplinary discussions.


EPDA and Building Blocks

June 22nd 2018





Workshop Participants

Andre (VPIphotonics, Germany)

Martijn (Aarhus University, Denmark)

Weiming (PITC, Netherlands)

Zhiyong (SEMI @ CAS, China)

Martijn (Berenschot, Netherlands) - moderator

Twan (Synopsys, Netherlands) - chair


We believe this is of pivotal importance

We are surprised the workshop was cancelled/shifted under EPDA

We need to:

Identify building blocks from an application perspective

Identify what parameters are important per building block

Set required specifications on a time-line

To achieve this, we need:

A champion

A process

Commitment from the Application Groups to provide input

Building Blocks





June 2017: WTMF in Den Bosch

Minutes and summary slides

October 2017: AIM / IPSR-I meeting in Albany

Summary slides

June 2017 – May 2018: Interactions with WG members

Excel Spreadsheet with challenges: inputs collected

Concern highlighted: Lack of input / feed-back from the designer community

Unfortunately, only limited contents for EPDA in the WRIP document

Progress EPDA

EPDA is defined as design automation for photonic integrated devices, circuits and systems, manufactured in a monolithic/hybrid/heterogenous fabrication technology

The tools & flows need to support PDK driven as well as custom design

EPDA SCOPE





Tool and Flow Capabilities

PDA, EDA, PDA-PDA, EPDA, ….

At device, circuit and system level

Contents

PDKs, IP libraries

“Infrastructure”

Standardization (of terminology)

EPDA Identified Key Challenge Areas

EPDA Identified Key Challenge AreasEPDA Roadmap information collection

I think in general it would be very nice to have a separate column where it is mentioned how

the EDA industry addresses this at the moment. Lots of issues might actually already have been

solved, and - if not - the EDA tools might give us some inspiration. This is useful background

anyway for all photonics people, show have nevre played with the current EDA tools.

(table initially prepared by Twan Korthorst, based on input from two roadmapsessions: Den Bosch Jun 2017 and Albany Oct 2017)

(May 2018: table updated with input from: Andre Richter, Martijn Heck, Pieter Dumon)

Available Today (y/n) Improvement Area's Required by (year)

Key challenges Area 1: Tool and flow capabilities A lot is already in place I think. Depending on the application area, some further developments are still required to link the component to the circuit and the circuit to the system level.

1.1 Point Solutions that work i

1.2 Integration of PDA & PDA Solutions i standardized data formats for interfacing

1.3 Integration of PDA & EDA Solutions i standardized data formats for interfacing

Technology level simulations

Component level simulations

Passive devices i

- basic linear operation is well covered currently.

- possble improvement: accuracy of simulation tool when insertion losses of passive

components become too low, e.g., the coupler in a 100M Q resonator.

- possible improvement: roughness and roughness correlation lengths should be taken into

account for loss and - especially - backscatter simulations. This requires foundry input through

the PDK.

- possible improvement: nonlinearities, in all varieties, become increasingly importnat, e.g., for

supercontinuum generation. Currently this is time-intensive to simulate.

Functional devices i electro-optics, thermo-optics

Active devices i electro-optics, thermo-optics, quantum dots

Simulation tools are available, at the physical level and the circuit level, addressing various

abstraction levels. The trade-off is clear: in-depth simulations for gain spectra and circuit-level

simulations for (complex) laser structures. With the advance of analog applications (noise, side-

mode suppression, ...) and ultrafast and high-power applications (spectral hole-burning, carrier

heating, carrier field screening, etc.), there will be a drive to implement more physics into the

circuit-level simulators.

Circuit level simulations

Schematic capture i automation, cloud-based solutions

Time-domain modelling i speed vs accuracy, simplify usage Challenge: phase and amplitude noise spectra typically require simulation over long timescales.

Frequency-domain modelling i simplify usage

Including Thermal i

detailed consideration (currently very

limited)

Challenge: What to include here. Device heating can be modeled relatively easily, local circuit

hot spots are harder, and global temperature effects will depend on the package (probably

addressed below).

Including Process (variations) i

simplify usage, automated capture of

performances

Challenge: to get this into a PDK. Sidewall and surface roughness and correlation length, index

variations, linewidth variations, thickness variations, and sidewall angle variations are all

required, eventually.

Layout implementation & verification

(Assisted) routing

Auto-routing

(Assisted) placing

Auto-placing

Circuit Synthesis

currently ves limited, very much needed for

general designs

DRC

LVS

Parasitics: cross-talk, scattering, ..

Challenge: Optical crosstalk and RF crosstalk need to be addressed. This is geometry

dependent, obviously. It is hard to see how this can be done without some kind of 'ray tracing'

like efforts (optical). For analog applications, RF crosstalk will be really limiting. The solution to

alleviate the requirements on the EPDA tools could be to implement various isolation

approaches by default. This can include EM shielding and active (= absorbing) areas between

components.

System level design

The question here is to which extent the wheel needs to be reinvented. A lot can be

learned/borrowed/stolen from our electronics friends…

Thermal

RF

Package

Co-design with electronics

Cost-modelling

Key challenges Area 2: Contents

The key challenge is to ensure processes will be dialed in, will be stable, and will be available

over a certain period of time (5 - 10 years). The cost of developing PDKs and IP Blocks becomes

unfeasible otherwise. In general I would give this ‘contents’ challenge a higher priority than the two others

2.1 Photonic PDK (foundry provided) i

standardized models/parameters,

automated update processes,

data/model validation/verification

2.2 EPDA PDK (foundry provided)

2.3 IP libraries (3rd party provided) i

currently very limited,

need to be based on open (standardized)

interfaces

How will this be done? What is the business model on who pays who and when? How will this

be enforced?

Common standard to be adopted?

yes, needed (could be more then one

standard)

Material properties

The challenge here is typically foundry IP: materials, processes, geometries, etc., will these be

disclosed? What is disclosed in, e.g., a 32-nm CMOS process?

Cross-sectional information

Process flow information

Compact models (frequency domain)

Compact models (time-domain)

Process statistical data (in-line)

Measurement data (off-line)

Design Rules

Shared tech file infrastructure

Shared electronic & photonic PDKs

Key challenges Area 3: Infrastructure

I would like to see 'education and training' on this roadmap. Students at the universities are

educated in EDA tools, but not in PDA tools. We should ask ourselves the question: let's

assume everything goes according to plan in this roadmap. Then - by 2025/2030 - we have

tools that can simulate everything, but who will be the users? How long will it take a PhD

student to get up to speed before he/she can design a PIC? How long for a new employee at a

start-up or multinational to be part of the constructive workforce? Developing a common language (component names, parameters, …) is vital for the progress of the field I think. The rest of the mentioned things are already largely in place. Of course at some research fabs, I’m sure you know as well that they haven’t really heard about data management yet.

How to share data between fabs, sw vendors, designers?

good question - must be automized, made

much simpler and reliable

Governance: versioning, distribution, licensing yes, needed

Interfacing tools: common language, list of components and parameters





As a PIC designer I need in addition to what is available today:

1. Information from the fabrication processes• Including process variations

2. An automated (and dynamic) interface between electronics and photonics design tools

3. Improved Verification Capabilities• Consistent Design rule checking (Need: shared language for DRC rules)• Post layout (circuit) simulation• Layout versus Schematic

4. Interfaces between device and circuit simulation tools• “No cut copy paste”

5. Ability to extract / deal with “parasitics”• Reflections• RF• Scattering / Straylight• Cross-talk• Thermal

Identified Priorities

Testing

June 21st 2018





Testing TWG

• Identify saleable product

• Enable process engineers to push the performance-yield envelope to make more and cheaper products

• Create improved models for the designers to make next generation product

• Testing often used as short-hand for

• Validation

• Verification

• Selection

• Measurement

• CharacterisationChart based on data from a study of Erica R. H. Fuchs in IEEE JLT, vol. 24, No.8, 2006.

Introduction





Test is a challenge!

Test !!! ->

WTMF 2017 & WRIP 2018

• World Technology Mapping Forum

• June 2018 Den Bosh, The Netherlands

• 6 teleconferences

• 8 iterations of Testing Chapter

• 18 pages

• 16 tables

• Text is already being written (75%)

• 12 participants & Team committed to work further





WTMF 2017 vs WTM 2018 (I)

WTMF 2017 vs WTM 2018 (II)





WTMF 2017 vs WTM 2018 (III)

Test TWG: Key challenges< 5 Years 5 - 10 Years > 10 Years

Adopt semiconductor EIC industry test practices ••• •• •

Standardization of test procedures and test structures ••• •• ••

Test data exchangeacross value chain ••• •• •Technology agnostic testing • •• •••

Test automation at wafer, bar, die, module and system – level ••• ••• •

Design for test ••• •• •

Circles and their number in the time ranges/columns represent the intensity of efforts needed to overcome the relevant key challenge. No circle means the challenge has been solved or lost relevance and does not require any efforts





Test TWG: What’s nextWRIP IPSR-I is set as an on-going activity:

The challenges have to be uptaded in future

Increase diversty of contributing parties

Converge with IPSR!

On Technical Working Groups level

Coherent and unified message

Global roadmap for integrated photonics in the future (2019?)

WRIP 2018 -> IPSR-I 2019

TWG participants’ workload

Workload of 10 hrs per annum?

oTeleconferences ~ 3 hrs

o6 x 30min (bi-monthly)

oInput to their TWG chapter ~3 hrs

oProvide raw input in scope of their expertise

oText write-up and revisions ~ 4 hrs

oMove raw data to readable content

oAlign with other chapters of the roadmap

<- Yes it is possible!

(~20hrs/year more likely)





Thank [email protected]

The End

Conclusions

Instead of continuing in separate work groups for InP, SiP and SiN, we propose to continue in two new work groups in which we focus on common platform requirements, but with attention for platform specific requirements

1. Heterogeneous integration on silicon (long term goal for all platforms)- to realize wafer size and uniformity advantages for cost and performance- to scale performance, density and production volume

2. Foundry process(es) for photonics (High Mix / Low volume) (short and medium term goal) - to realize the Silicon tool solutions across the 3 platforms- partitioning of dedicated tools for photonics within a state-of-the-art electronics factory flow





Heterogeneous integrationProcess integration roadmapTechniques→ Hybrid (flip-chip) Integration Heterogeneous integration by adhesive/direct bonding of Direct Growth of InP on Silicon

un-patterned III-V epitaxy (die-to-wafer bonding /transfer printing)

(semi-)processed lasers by transfer printing

Specs (in no order) 2017 2020 2025 2035 2017 2020 2025 2035 2017 2020 2025 2035 2017 2020 2025 2035

Integration process

complexity in view of

available tools and

techniques

Heat Sinking properties

Integration density

Efficiency of usage of III-V

material

Wafer scale integration

Throughput of laser

integration in one

integration step

Pre-testing of lasers before

integration

General Maturity (express

in terms of TRL)

The columnsTechniques (specs for 2017, 2020, 2025, 2030)→

1. Hybrid (flip-chip) Integration

2. Heterogeneous integration by adhesive/direct bonding of 1. un-patterned III-V epitaxy (die-to-wafer bonding /transfer printing)

2. (semi-)processed lasers by transfer printing

3. Direct Growth of InP on Silicon





The rows1. Integration process complexity in view of available tools and

techniques

2. Heat Sinking properties

3. Integration density

4. Efficiency of usage of III-V material

5. Wafer scale integration

6. Throughput of III-V component integration in one integration step

7. Pre-testing of III-V components before integration

8. General Maturity (express in terms of TRL)

Foundry process for photonics (High Mix / Low volume)

Identify common requirements AND platform specific requirements for equipment manufactures (manufacturing, packaging, test)

1. Different for SiP and InP (and SiN)1. SiP access to high performance tools for large wafers and high volumes2. InP needs high-performance tools (uniformity, reproducibility), but for small

wafers (3”, 4”, 6”)

2. However: important things in common, e.g.1. Heterogenous SiP is dependent on III-V epitaxy (on small wafers?)2. SiP volumes are too small for full 30 cm line: partial process line for lower

volume3. Waveguide edge roughness and extreme CD control important for both





New Work groupsGroup 1:

Heterogeneous Integration

- Abdul Rahim

- Lionel Kimerling

- Meint Smit

- Sami Musa

- John Rawsthorne

- Smart Photonics

- Bertrand Szelag

- Makoto Okano

- UCSB

Group 2:

Foundry integration for Photonics

High mix/low volume

- Huub Ambrosius

- Luc Augustin

- Meint Smit

- Mapper

- Lionel Kimerling

Ecosystems & Human Capital workshop

June 21st, 2018





Goals of the ecosystems & HC WGEcosystems

Easily finding partners on a global scale (which organization does what?)

Human capital

Highlighting training priorities

Sharing best practices

Standardization of skills

Scie

nce

and

rese

arch • Company

name

Man

ufa

ctu

rin

g eq

uip

men

t • Company name

Fro

nt-

end

pro

cess

ing • Company

name

Bac

k-en

dp

roce

ssin

g • Company name

Bey

on

d b

ack-

end

des

ign

to

ols

& s

ervi

ces • Company

name

Ap

plic

atio

n b

uild

ing • Producers

and users of applications

Supply groups





END USERS

ORIGINAL EQUIPMENT MANUFACTURERS (OEM)

DEFENSE CONTRACTORS

ELECTRONIC/PHOTONIC MANUFACTURING SERVICES (EMS)

TEST EQUIPMENT MANUFACTURERS

ASSEMBLY EQUIPMENT MANUFACTURERS

SEMICONDUCTOR EQUIPMENT MANUFACTURERS

TRANSEIVER SYSTEM/COMPONENT SUPPLIERS

ROUTER AND SWITCH SUPPLIERS

LASER & LED SUPPLIERS

ELECTRONIC PACKAGING SUPPLIERS

PHOTONIC SYSTEMS

SUBSTRATE MANUFACTURERS

CONNECTOR/CABLE MANUFACTURERS

PRECISION DEVICE SUPPLIERS

MATERIAL SUPPLIERS

Sub divisions

POLYMER WAVEGUIDE AND COMPONENT SUPPLIERS

SEMICONDUCTOR FOUNDRIES

SEMICONDUCTOR MANUFACTURERS

SEMICONDUCTOR/PHOTONIC MANUFACTURERS

FABLESS SEMICONDUCTOR/PHOTONIC MANUFACTURERS

HETEROGENEOUS INTEGRATION, InP MANUFACTURER

DESIGN TOOLS

R&D CONSORTIA

UNIVERSITIES/RESEARCH INSTITUTES

COMMUNITY COLLEGES

FEDERAL AGENCIES

TRADE ASSOCIATIONS

PROFESSIONAL SOCIETIES

CONSULTANTS/PUBLISHERS

VENTURE CAPITAL/INVESTMENT BANKERS

Working out the structure with groups & sub-groups (Bob & Peter)

Divide WTMF companies in those sub-groups (Peter & ...?)

Ask two-ish more participants for the working group (Bob, Peter)

Set action points ecosystems






Sharing best practices


Human capital template




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