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Supplementary Data

Hybrid graphene/silicon Schottky photodiode with intrinsic gating

effect

Antonio Di Bartolomeo1,2,*, Giuseppe Luongo1, Filippo Giubileo2, Nicola Funicello1, Gang Niu3, Thomas

Schroeder4,5, Marco Lisker4, and Grzegorz Lupina4

1Physics Department “E. R. Caianiaello”, Università di Salerno, via Giovanni Paolo II, Fisciano, 84084, Italy.

2CNR-SPIN Salerno, via Giovanni Paolo II, Fisciano, 84084, Italy

3Electronic Materials Research Laboratory, Key Laboratory of the Ministry of Education & International

Center for Dielectric Research, Xi'an Jiaotong University, Xi'an 710049, China.

4IHP Microelectronics, Im Technologiepark 25, 15236 Frankfurt (Oder), Germany

5Brandenburg University of Technology. Institute of Physics, Konrad Zuse Str. 1, 03046 Cottbus, Germany

* Corresponding author. E-mail: adibartolomeo@unisa.it

Keywords: Graphene, Schottky diode, MOS capacitor, photodetector, responsivity, heterojunction.

PACS: 72.80.Vp, 73.30.+y, 78.67.Wj

1. Diode parameter extraction

The diode equation

I = I0 [exp (qV

nkT) − 1] (S1)

for V >> nkT can be written as

I = I0exp (qV

nkT) (S2)

Which can be used to evaluate I0 and n.

The linear fitting, on the range 0.3 V < V < 1 V, of the ln I vs V plot at T = 494 K results in n = 4.05 and

I0 = 1.21 × 10−12A (Figure S1 (a)).

Equation (S1) fails in reproducing the forward current at low bias and the current at reverse bias, as shown in

Figure S1 (b) and (c).

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Figure S1. (a) Fitting of the semi log I vs. V plot to extract diode parameters from the slope and intercept of

the forward characteristic. (b) Linear and (c) semi-log plot of the I-V characteristic of the Gr/Si device, in dark,

at room temperature and at 50 mbar pressure. The black empty squares correspond to measured data, while

solid blue line represents the fit of diode equation (S1) with ideality factor n = 4.05 and reverse saturation

current I0 = 1.21 × 10−12A (forward current extrapolated to zero bias).

2. Cheung’s method to evaluate 𝐑𝐬, 𝐧 and 𝐛𝟎 at T=200 K

The anomalously high reverse current is likely due to an additional component, which can be diffusion of holes

from the graphene gated region. This means that minority carriers accumulated at the Gr/SiO2/Si capacitor and

constituting an inversion layer in the n-Si migrate to the junction area and contribute to the leakage current. If

so, the discrepancy of the reverse saturation current with respect to the theoretical value should be suppressed

by temperature due to reduced generation of minority carriers. For this reason we analyze data at T = 200 K

and show that equation:

I = I0 [exp (q(V−RsI)

nkT) − 1], (S3)

provides a satisfactory fit, contrarily to what happens at T = 300 K .

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Figure S2. (a) I-V curve at 200 K. Blue line is the fit with Equation (S1) while red line is the fit with Equation

(7) of the main paper, when Rs and n are obtained with Cheung’s method [S1]. (b) dV dlnI vs I⁄ (c) and

H(I) vs. V plots to extract diode parameters according to Cheung’s method [S1].

Fitting of Equation (S1) in the forward region (blue solid line in Figure S2 (a)) gives

n =q

kT

dV

dlnI= 5.01

The zero-bias saturation current, extrapolated from the forward current, is I0 = 7.6 × 10−13A.

Let us now use Cheung’s method, based on the following two equations, which originate the plots of Figure

S2 (b) and (c):

dV

dlnI= RsI + n

kT

q (S4)

H(I) ≡ V − n (kT

q) ln (

I

AA∗T2) = RsI + nb0

(S5)

Fitting of Equation (S4) gives n = 5.37 and Rs = 49.7 MΩ (Figure S2 (b)). Fitting of Equation (S5) gives

Rs = 48.4 MΩ and b0 = 0.60 eV (using n = 5.37) (Figure S2 (c)).

3. Modified Norde’s method to evaluate 𝐑𝐬, 𝐧 and 𝐛𝟎 at T=300 K

In the ideal case of n = 1, Norde defined the function [S2]:

F(V) =V

2−

kT

qln (

I(V)

AA∗T2) (S6)

If Vmin is the bias at the minimum of F(V), then the barrier height is given by the following

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b0 = F(Vmin) +Vmin

2−

kT

q (S7)

and

Rs =kT

qImin (S8)

where Imin is the current measured at Vmin

Norde’s method has been generalized to 1 < n < 2 by Lien [S3,S4]. Following Lien’s guideline, we can

further generalize Norde’s method to any n.

Let γ be and arbitrary number and let us define

Fγ(V) =V

γ−

kT

qln (

I(V)

AA∗T2), (S9)

the plots of which as a function of V and γ, for 4 ≤ γ ≤ 9 are shown in Figure S3 (a) and (b). It can be easily

shown that

b0 = Fγ(Vmin) + (1

n−

1

γ) Vmin − (

γ

n− 1)

kT

q (S10)

And

Rs =kT

qImin(γ − n) (S11)

or

Imin(γ) =kT

qRs(γ − n) (S12)

Figure S3. Extraction of diode parameters using Norde and Lien method [S2,S3].

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Equation (S12) can be seen as a function of γ, and Rs and n can be obtained as slope and intercepts of a

straight-line fit to it. A plot of Imin vs. γ is is shown in Figure S3 (c).

The values obtained are n = 3.99, Rs = 1.2 MΩ and b0 = 0.9 eV are obtained.

4. C-V characterization

As seen in the main paper the device under test is the parallel of a Gr/Si junction and Gr/SiO2-SiN-SiO2/Si

MOS capacitor.

Figure S4 shows the small-signal capacitance and conductance (the parallel model has been used in the

measurements [S5]) at different illumination intensities at T=300K and T=200K.

Figure S4. C-V (a) and G-V (b) characteristics of device under different illumination levels, at T=300K, P=50

mbar. C-V (c) and G-V (d) characteristics of device under different illumination levels, at T=200K, P = 40

mbar. We performed ac measured at 10 kHz and 30 mV.

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5. X-ray photoelectron spectroscopy

Figure S5. Si 2p (a) and C 1s (b) x-ray photoelectron spectra acquired on graphene (Gr)-covered Si trench

and an uncovered Si trench. Long exposure to ambient conditions causes oxidation of the Si junction areas

underneath Gr where mostly Si sub-oxides are formed (SiOx, x<2). On the uncovered areas Si oxidizes mostly

to SiO2.

References

[S1] Cheung S K, Cheung N W 1986 Extraction of Schottky diode parameters from forward current‐voltage

characteristics Appl. Phys. Lett. 49, 85-87

[S2] Norde H 1979 A modified forward I-V plot for Schottky diodes with high series resistance J. Appl. Phys.

50, 5052-53

[S3] Lien C-D, So F C T, Nicole M-A 1984 An Improved Forward I-V Method for Nonideal Schottky Diodes

with High Series Resistance IEEE Trans. Electr. Dev. 31, 1502-03

[S4] Aubry V, Meyer F 1994 Schottky diodes with high series resistance: Limitations of forward I‐V methods.

J. Appl. Phys. 76, 7973-84

[S5] C-V Testing for Components and Semiconductor Devices – Application guide, 2014 Keithley

Instruments, Inc. A Tektronix Company 3250, 1.21.14, 1-59