SYSTEM LEVEL RELIABILITY TESTING AND FAILURE ANALYSISThijs Kempers – 21-11-2019

OUTLINE

Introduction

General approach

Semiconductor component testing

Board level reliability testing

IPC inspection

HALT testing

System level testing

Typical test flow

Failure Analysis show cases

How can MASER support?

INTRODUCTION

• Customer driven requirements (in most cases)

• Extremely high cost in case of quality issue (field return or production line stop) or in automotive, life critical or medical

• End customers define in a spec the required tests e.g.:

• Volkswagen

• ASML

• NASA/ESA

• Market areas require specific tests

• HALT test by automotive and (aero)space

• UN transportation specification for e.g. Lithium batteries

GENERAL APPROACH

Component Selection

Use qualified components (JEDEC / AEC-Q100)

System lifetime can be calculated using the component semiconductor reliability data (HTOL/TC/BLR TC)

Prevent using broker parts

Board level Reliability test

Interaction of the device and PCB

IPC inspection

General quality check of your bare PCB and assembled PCB

HALT testing

Robustness test of your system

Will show issues which would otherwise be encountered by the end customers

SEMICONDUCTOR COMPONENT TEST• Product qualification

• 3x77 High Temperature Operating Life (HTOL) test @ Tj=125/150⁰C for 1000 hrs

• ESD (HBM/CDM) and Latch-Up test

• Package qualification

• MSL preconditioning prior to TC/HAST/UHST/THB

• 3x25 or 3x77 Temperature Cycling (TC) test

• 3x25 or 3x77 HAST test biased @ 110 ⁰C/85%RH for 264 hrs (or THB)

• 3x25 or 3x77 UHST test unbiased @ 110 ⁰C/85%RH for 264 hrs

• 3x25 or 3x77 HTSL test @+150 ⁰C for 1000 hrs

• 1x45 PTC test -40/+125 ⁰C for 1000 cycles biased 5min on/5 min off

• Mechanical

• Package DROP, shock, vibration and constant acceleration

• Solderability, Wire pull and ball shear test

• Fine- and Gross leak

BOARD LEVEL RELIABILITY TESTING

• Board Level Reliability (Solder joint reliability Daisy chain devices)

• BLR TC test @ -40/+125C for 1000 cycles

• BLR Drop test - 1000 drops

• BLR Bending test - 250K bends

• Results plotted in Weibull plot

IPC-A-610

• IPC-A-600/610 PCB/PCBA inspection

• IPC-A-610, Acceptability of Electronic Assemblies

• IPC-A-600 – Acceptability of Printed Boards

• INSPECTION CLASSIFICATION

• Class 1 – General Electronic Products

• Includes products suitable for applications where the major requirement is function of the completed assembly

• Class 2 – Dedicated Service Electronic Products

• Includes products where continued performance and extended life is required

• Class 3 – High Performance/Harsh Environment Electronic Products

• Includes products where continued performance or performance-on-demand is critical (life support or other critical systems)

ANALYSIS TECHNIQUES

Non destructive

Optical inspection

X-ray inspection

Delamination of packages

Destructive

Cross-sectioning

Optical and SEM inspection

SEM-EDX analysis

IPC-A-610

• Goal

• Used as a design tool, test first design our of the specifications to find the weak spot

• Determination of operating and destruct limits

Operating margin Operating margin

Destruct margin Destruct margin

HALT TESTING

HALT TESTING

HALT test

Combined temperature and vibration test under operation

Goal: validate/improve the robustness of the (first) design

SYSTEM LEVEL TESTING

• Environmental tests (validation)

• Operational test (high and low temp with datasheet min/max)

• Temperature cycling

• Moisture Resitance test

• (Cyclic) Damp heat

• Mechanical tests

• Random and sinusodial vibration tests (under temp)

• Bump and shock tests

• External influences (complete unit)

• Gas corrosion / Salt mist

• Solar radiation

• Dust and Water Ingression tests (IP classification)

TYPICAL TEST FLOW

Use qualified components and released design guidelines

Design and take experience from field into account

Start with HALT test (1 week test)

Redesign (in case applicable)

IPC-A-610 inspection (1-2 weeks)

Environmental and Mechanical tests (3-4 weeks)

Other tests (6-8 weeks)

Ramp-up production

FAILURE ANALYSIS SHOWCASES X-ray inspection of flex print

FAILURE ANALYSIS SHOWCASES Lock-In Thermography (LIT) inspection of a 17” touchscreen. Easy way to inspect a large

area.

FAILURE ANALYSIS SHOWCASES Lock-In Thermography (LIT) inspection of a touchscreen

FAILURE ANALYSIS SHOWCASES Functional system Fail: Unknown location of the fail device

X-ray inspection did not show any

abnormalities

FAILURE ANALYSIS SHOWCASES Functional system Fail: Unknown location of the fail device

LIT inspection showed a clear difference between the failing and reference board

Reference device Failing device

FAILURE ANALYSIS SHOWCASES Functional system Fail: Unknown location of the fail device

X-ray overlay showed the MDM chip to fail

Failing device MDM chip failing

HOW CAN MASER SUPPORT?

Perform semiconductor component qualifications and can cover JESD47/Q100/MIL specifications

Perform system tests according to IEC/MIL

HALT

Environmental

Mechanical

Perform IPC-A-600/610 inspection

Almost 25 years experience in Reliability testing and Physical Analysis

PCB / PCB ASSEMBLY INSPECTION Assembled PCB quality assessment using IPC-A-610 standard

Bare PCB quality assessment using IPC-A-600 standard

Manufacturing quality

Bare board design and manufacturing

Solder-joint

Key analysis techniques Optical

SAM

X-ray

Cross-sectioning

SEM-EDX microscopy

©MASER Engineering 20

RELIABILITY TEST SERVICES Semiconductor Level Reliability

AEC-Q100/Q006

JESD47

Board Level Reliability

BLR Drop

BLR TC

BLR Bending and BLR Vibration

System Level HALT / HASS / ESS programs on system level

Mechanical testing (vibration, bump and shock)

Environmental (humidity/temperature) testing

Enclosure testing

Corrosion (salt mist and mixed gas*)

Enclosure IP (water and dust*)

Solar testing*

©MASER Engineering 21

* Executed under supervision of MASER Engineering at an external laboratory

RMA FLOW Solderball renewal for CSP/BGA

Electrical test (customer ATE)

Non destructive analysis Optical, X-ray, SAM, SEM-EDX, Non destructive package LIT inspection, EOTPR*

Sample preparation Decapsulation using chemical, laser ablation and Microwave Induced Plasma (MIP)

Mechanical cross-sectioning (incl. optical and SEM inspection)

ASAP micropolish, frontside delayering and backside deprocessing

Fault localisation and imaging EMMI/OBIRCH analysis, Lock-In Thermography (LIT) analysis, Atomic Force Microscopy

(AFM)

Failure analysis and imaging

FIB Cross-sectioning, SEM-EDX analysis after delayering/deprocessing, (S)TEM analysis and imaging

Reporting and next step proposal CMIDS and report in pdf with conclusions and next step proposal

©MASER Engineering 22

* Executed under supervision of MASER Engineering at an external laboratory

Questions?

©MASER Engineering 23