TABLE OF CONTENTS

TABLE OF CONTENTS .............................................................. i LIST OF FIGURES ................................................................... iii LIST OF TABLES ................................................................... iii ABBREVIATIONS MNEMONICS ....................................................... iv

SECTION I INTRODUCTION ......................................................... 1-1 1.1 General Description ................................................. 1-1 1.2 Specifications Summary .............................................. 1-1

1.2.1 Performance Specifications ...................................... 1-1 1.2.2 Functional Specifications ....................................... 1-2 1.2.3 Physical Specifications ......................................... 1-2 1.2.4 Reliability Specifications ........................................ 1-3

1.3 Functional Characteristics ............................................. 1-3 1.3.1 Electronics .................................................. 1-3 1.3.2 Drive Mechanism ............................................. 1-3 1.3.3 Positioning Mechanism ......................................... 1-4 1.3.4 Read/Write Heads ............................................ 1-4 1.3.5 Recording Formats ............................................ 1-4

1.4 FunctionalOperations ............................................... 1-4 1. 4.1 Power Sequencing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-4 1.4.2 Drive Selection ............................................... 1-4 1.4.3 Motor On ................................................... 1-4 1.4.4 Track Accessing .............................................. 1-6 1.4.5 Step Out ................................................... 1-6 1.4.6 Step In ..................................................... 1-6 1.4.7 Side Selection (SA860 Only) .................................... 1-7 1.4.8 Read Operation .............................................. 1-8 1.4.9 Write Operation .............................................. 1-9 1.4.10 Sequence of Events .......................................... 1-10

SECTION II ELECTRICALINTERFACE ................................................. 2-1 2.1 Introduction ....................................................... 2-1 2.2 Signal Interface .................................................... 2-1

2.2.1 Input Lines .................................................. 2-1 2.2.2 Input Line Termination ......................................... 2-3 2.2.3 Drive Select 1-4 ............................................. 2-3 2.2.4 Side Select (SA860 Only) ....................................... 2-3 2.2.5 Direction Select .............................................. 2-4 2.2.6 Step ....................................................... 2-4 2.2.7 Write Gate .................................................. 2-4 2.2.8 Write Data .................................................. 2-4 2.2.9 Motor On (Alternate Input) ...................................... 2-4 2.2.10 In Use (Alternate Input) ....................................... 2-4 2.2.11 External Write Current Switch (Alternate Input) ...................... 2-4 2.2.12 Output Lines ............................................... 2-5 2.2.13 Track 00 .................................................. 2-5 2.2.14 Index ..................................................... 2-5 2.2.15 Sector (Hard Sector Only) ..................................... 2-5 2.2.16 Ready .................................................... 2-5 2.2.17 Read Data ...... _ .......................................... 2-6 2.2.18 Sep Data .................................................. 2-6 2.2.19 SepClock ................................................. 2-6 2.2.20 Write Protect ............................................... 2-6 2.2.21 True Ready ................................................ 2-6 2.2.22 Disk Change (Optional Output) ................................. 2-6 2.2.23 Two Sided (Optional Output) ................................... 2-7 2.2.24 Alternate I/O Pins ........................................... 2-7

TABLE OF CONTENTS (CONT.)

2.3 Powerlnterface .................................................... 2-7 2.4 Frame Ground ..................................................... 2-7

SECTION III PHYSICAL INTERFACE .................................................. 3-1 3.1 Introduction ...................................................... · 3-1 3.2 Jl/Pl Connector ................................................... 3-1 3.3 J2/P2 Connector ................................................... 3-2

SECTION IV THEORY OF OPERATIONS ............................................... 4-1 4.1 GeneraIOperations ................................................. 4-1 4.2 Read/Write Operations .............................................. 4-1 4.3 Read/Write Head .................................................. 4-3 4.4 Write Circuit Operation ............................................... 4-4 4.5 Read Circuit Operation ............................................... 4-5 4.6 Drive Motor Control ................................................. 4-6 4.7 Track Accessing .................................................... 4-6

4.7.1 Stepping ................................................... 4-6 4.7.2 Carriage Actuator ............................................. 4-6 4.7.3 Actuator Control Logic ............................ _ ............ 4-7 4.7.4 Track Zero Indicator ........................................... 4-9

SECTION V MAINTENANCE ......................................................... 5-1 5.1 Maintenance Equipment .............................................. 5-1

5.1.1 Alignment Diskette ............................................ 5-1 5. 1 .2 SA809 Exerciser ............................................. 5-1 5.1.3 Special Tools ..................... _ .......................... 5-1

5.2 Diagnostic Techniques ............................................... 5-2 5.2.1 Soft Error Detection and Correction ............................... 5-2 5.2.2 Write Errors ................................................. 5-2 5.2.3 Read Errors ................................................. 5-2 5.2.4 Seek Errors ................................................. 5-2

5.3 Trouble-Shooting ................................................... 5-2 5.4 Adjustments ....................................................... 5-5

5.4.1 Side 1 Downstop Adjustment (SA860 Only) ......................... 5-5 5.4.2 Head Radial Alignment ........................................ 5-5 5.4.3 Read/Write Head(s) Azimuth Check .............................. 5-7 5.4.4 Head Amplitude Check ........................................ 5-8 5.4.5 Track 00 Detector Assembly ..................................... 5-8 5.4.6 Track 00 Carriage limiter ....................................... 5-8 5.4.7 Index Sector Timing ........................................... 5-8 5.4.8 Door Lock .................................................. 5-9· 5.4.9 Ejector/Bail ................................................. 5-10 5.4.10 Stepper Motor .............................................. 5-11

5.5 Removals and Replacements .......................................... 5-12 5.5.1 Faceplate and Door Knob ....................................... 5-12 5.5.2 Drive Motor Assembly ......................................... 5-12 5.5.3 Top Plate Assembly ............................... , .. , , , , . , , , , 5-12 5,5.4 Spindle Hub Assembly ... , ... , . , ... , . , , .. , , , . , .. , , , ............ 5-13 5.5.5 PCB Assembly .. , , ..... , .. , , , , , . , ..... , , , . , ... , .... , , , , .. , , , , 5-14 5,5,6 Door Lock Assembly .... "."", ........ "., .. , ..... ", ... ",. 5-14 5.5,7 Side 1 Arm Assembly (SA860 Only) .. , , , , , . , , . , ... , , , , ..... , .. , . , , 5-14 5.5.8 Head and Carriage Assembly .. , . , , ... , , , ... , . , .......... , , ... , , , 5-14 5,5.9 Clamp Hub Assembly ... , , , . , . , , ..... , ... , ..... , , . , ... , , ... , . , , 5-15 5.5.10 Bail Assembly ....... , ................................... , ... 5-15 5.5.11 Track 00 Detector ....................... , .................... 5-15 5.5,12 Index/Sector LED Assembly ... , ... " ...... , ... " ........... ". 5-15 5.5.13 Index/Sector Detector Assembly ............... "., ... ,.,., ..... 5-16

ii

TABLE OF CONTENTS (CONT.)

5.5. 14 Write Protect Detector ........................................ 5-16 5.5.15 Ejector Assembly ............................................ 5-16 5.5.16 Door Switch ................................................ 5-16

5.6 Recommended Incoming Receiving Inspection ............................. 5-17 5.6.1 Test Equipment .............................................. 5-17 5.6.2 Procedure .................................................. 5-17

SECTION VI SCHEMATIC DIAGRAMS ................................................. 6-1

SECTION VII ILLUSTRATED PARTS CATALOG ......................................... 7-1 7. 1 Description........................................................ 7-1 7.2 Indented Level ..................................................... 7-1 7.3 Quantity Per Level .................................................. 7-1 7.4 Recommended Spare Parts Stocking Guide ............................... 7-27

LIST OF FIGURES

Figure Title Page

1-1 SA810/860 Half-Height Floppy Disk Drive .......................................... 1-0 1-2 SA810/860 Functional Diagram .................................................. 1-5 1-3 Track Access Timing, Standard Seek ............................................... 1-6 1-4 Track Access Timing, Buffered Seek ............................................... 1-7 1-5 Read Initiate Timing ............................................................ 1-7 1-6 Read Signal Timing (FM Encoding) ................................................ 1-8 1-7 FM and MFM Code Comparisons ................................................. 1-9 1-8 Write Initiate Timing ........................................................... 1-9 1-9 SA81O/860 General Control and Data Timing Requirements ............................. 1-10 2-1 SA81O/860 Interface Connections ................................................ 2-2 2-2 Input Line Termination ......................................................... 2-3 2-3 Index Timing ................................................................. 2-5 2-4 Sector Timing ................................................................ 2-5 2-5 DC Power Profile .............................................................. 2-7 3-1 Interface Connectors - Physical Locations ............................................ 3-1 3-2 J1 Connector Dimensions ....................................................... 3-2 3-3 J2/P2 Connector ............................................................. 3-2 4-1 Byte ....................................................................... 4-2 4-2 Basic Read/Write Head ......................................................... 4-2 4-3 Recorded Bit ................................................................. 4-2 4-4 Reading a Bit ................................................................. 4-3 4-5 IF and 2F Recording Flux and Pulse Relationship ...................................... 4-3 4-6 Read/Write Heads ............................................................ 4-4 4-7 Write Circuit Functional Diagram .................................................. 4-5 4-8 Read Circuit Functional Diagram .................................................. 4-6 4-9 Drive Motor Control ........................................................... 4-6 4-10 Actuator Control Logic ......................................................... 4-7 4-11 Track 00 .................................................................... 4-7 4-12 Track 01 .................................................................... 4-8 4-13 Track 02 .................................................................... 4-8

iii

LIST OF FIGURES (CONT.)

4-14 Track 03 . . . . . .. . ............................................... 4-8 4-15 Stepper Timing ............................................... " ............. 4-9 5- 1 Write Protect Inoperative .. _ .............................. _ . . . . . . . . . . . . . . . . . .. 5-3 5-2 Diskette Not Rotating _ . _ ........................................................ 5-4 5-3 Side 1 Downstop Adjustment ..................................................... 5-5 5-4 Head Radial Alignment ......................................................... 5-6 5-5 Motor Plate Mounting Screws .................................................... 5-6 5-6 Azimuth Burst Patterns ......................................................... 5-7 5-7 Track 00 Carriage Limiter Clearance ............................................... 5-9 5-8 Door Lock Solenoid Clearance ................................................... 5-9 5-9 Diskette Stop Clearance ......................................................... 5-10 5-10 Bail Assembly Adjustment ....................................................... 5-11 5-11 Stepper Motor Adjustment ....................................................... 5-11 5-12 Drive Motor Assembly .......................................................... 5-13 6-1 Schematic Diagram. PCB 25227 (4 Sheets) .......................................... 6-3 6-2 Schematic Diagram. PCB 25247 (4 Sheets) .......................................... 6-11 6-3 Schematic Diagram. PCB 25249 (4 Sheets) .......................................... 6-19 6-4 Logic EqUivalent PIN 16271. Location U 13 ......................................... 6-27 6-5 Logic EqUivalent PIN 51420, Location U14 .......... , .............................. 6-29 7-1 SA810/860 Diskette Drive. Exploded View (3 Sheets) .................................. 7-2 7 -2 Top Plate Assembly, Exploded View ............................................... 7-8 7 -3 Actuator Assembly. Exploded View ................................................ 7-10 7-4 PCB PIN 25227 ............ , ................................................. 7-12 7-5 PCB PIN 25247 .............................................................. 7-16 7-6 PCB PIN 25249 .............................................................. 7-20

LIST OF TABLES

Table Title Page

2-1 DC Power Requirements ........................................................ 2-6 3-1 Recommended J 1 Connectors .................................................... 3-2 5-1 Maintenance Equipment ........................................................ 5-1 6-1 Schematic Diagram Applicability .................................................. 6-1 7 -1 Part Number to Figure Reference Cross Reference ..................................... 7-24 7-2 Calculated Failure Rates ........................................................ 7-27 7 -3 Spare Parts Stocking Guide , ..................................................... 7-27

iv

1.1 GENERAL DESCRIPTION

SECTION I INTRODUCTION

The compact SA810 single-sided and SA860 double-sided half-height 8-inch floppy disk drives offer a reliable, low cost, high performance solution for OEM data storage applications which require maximum capacity in the smallest space possible. The SA810/860 drives are less than half the height of the Shugart SA801 and SA851 floppy disk drives, fit in comfortably with a CRT, require no ac voltage, and offer up to 1.6 megabytesof unformatted capacity.

The SA81O/860 offers the follOWing standard features:

a. Half-height sizing: 2.31 in. (59 mm) high by 8.55 in. (217 mm) wide by 12.00 in. (305 mm) deep b. Interface and media compatibility with Shugart SA80l/851 disk drives c. Low heat dissipation d. Fast access time (3 ms track to track) e. QUiet operation f. Low media wear due to low mass head g. Rapid start dc drive motor--Iess than one revolution (eliminates ac requirements) h. Phase-Locked Loop Crystal Referenced Motor Speed Control i. Media compatible with SA801/851 plus IBM 3740 j. Single or double density k. 0.8/1.6M Bytes (unformatted capacity) I. Write protect and programmable door lock for improved data security m. Internal write current switching n. TRUE READY alerts the system that the drive is ready to send or receive data o. Buffered seek p. Single or multiple drive dc Motor On control q. Multiple jumper options r. Shugart's proprietary Bi-Compliant read/write heads with straddle erase elements s. Extended reliability t. Activity light u. Solid die cast chassis v. light weight w. Inline dc and I/O connectors

The SA810/860 provides the best solution to the user looking for a compact, low cost, and reliable 8-inch floppy disk drive. The SA81O/860 is the most versatile disk drive on the market. This drive is backed by an engineering department that is recognized as the largest, most experienced group in the entire floppy industry. The SA810/860 is the ultimate solution for small business systems, intelligent terminals, personal computer systems, and program storage equipment.

1.2 SPECIFICATIONS SUMMARY

1.2.1 Performance Specifications

Capacity Unformatted

Per Disk Per Surface Per Track

SA8IO Single/Double Density

400/800 k bytes 400/800 k bytes 5.2/10.4 k bytes

1-1

SA860 Single/Double Density

0.8/1.6 M bytes 400/800 k bytes 5.2/10.4 k bytes

IBM Format (128 byte sectors)

Per Disk Per Surface Per Track

Transfer Rate Latency (average) Access Time

Track to Track Settle Time One Track Seek & Settle Average (including settle)

Motor Start Time Worst Case Typical

SA810 Single/Double Density

250/500 k bytes 250/500 k bytes 3.3/6.66 k bytes

250/500 k bits/sec 83 ms

3 ms 13 ms 16 ms 89 ms

165 ms 120 ms

1.2.2 Functional Specifications

Rotational Speed Recording Density

(inside track) Flux Density Track Density Tracks Index Encoding Method Media Requirements

Soft Sectored 32 Sector Hard Sectored Alignment Diskette

360± 2 rpm 3268/6536 bpi

6536 fci 48 tpi

77 1

FM/MFM

SA 100/102 SA101/103

SA120

1.2.3 Physical Specifications

Environmental Limits Ambient Temperature: Relative Humidity: Maximum Wet Bulb:

DC Voltage Requirements:

Operating

50° to 115°F (9.9° to 46.1 °C) 20% to 80%

85°F (29.4°C)

Storage

_8° to 122°F (-22.2° to 50°C) 1 % to 95%

no condensation

SA860 Single/Double Density

500/1000 k bytes 250/500 k bytes 3.3/6.66 k bytes

250/500 k bits/sec 83 ms

3 ms 13 ms 16 ms 89 ms

165 ms 120 ms

360± 2 rpm 3408/6816 bpi

6816 fci 48 tpi

154 1

FM/MFM

SA150 SA151 SA122

Shipping

-40° to 144°F (-40° to 62.2°C) 1 % to 95%

no condensation

+24.00 ± 2.4 V de @ 1.0 A typ., 1.7 A max., 100 mV ripple. +5.00 ± 0.25 V dc @ 0.7 A typ., 0.7 A max., 50 mV ripple.

NOTE

If the stepper motor is energized by the controller during the single motor start-up time, the drive will exceed the + 24 V dc current specification of 1.7 A max. Under this condition, the current specification is 2.2 A max.

Mechanical Dimensions Width = 8.55 in. (217 mm) Height = 2.31 in. (59 mm) Depth = 12.00 in. (305 mm) Weight = 7 lbs (3 kg)

1-2

Mounting Top loading Diskette Horizontal Label Up/Down Diskette Vertical Label Left/Right

Power Dissipation: 10 watts (34.2 BTU/hr) Standby 28 watts (94.0 BTU/hr) Typical 50 watts (171 BTU/hr) Maximum

1.2.4 Reliability Specifications

Mean Time Between Failure: 10,000 Power On Hours under typical usage. Preventive Maintenance: Not required. Mean Time to Repair: 30 Minutes Component Life: 5 years Error Rates:

Soft Read Errors: Hard Read Errors: Seek Errors:

1 per 109 bits read 1 per 1012 bits read 1 per 106 seeks

Media Life: Passes per Track: 3.5 X 106

Insertions: 30,000 +

1.3 FUNCTIONAL CHARACTERISTICS

The 810/860 floppy disk drives consist of:

a. Read/Write and Control Electronics b. Drive Mechanism c. Precision Track Positioning Mechanism d. Read/Write Head (s)

1.3.1 Electronics

The electronics are packaged on one PCB which contains:

a. Index Detector Circuits (Sector/Index for Hard Sectored Media) b. Head Position Actuator Driver c. Read/Write Amplifier and Transition Detector d. Write Protect e. Drive Select Circuits f. Spindle Motor Control g. Data/Clock Separation Circuits (FM Only) h. Drive Ready Detector Circuit i. Drive True Ready Detector Circuit j. Side Select Circuit (Used on SA860 Only) k. In Use and Door Lock Circuits I. Internal and External Write Current Switching m. Power on Reset Circuit n. Activity LED

1.3.2 Drive Mechanism

The Head Positioning Actuator moves the read/write head(s) to the desired track on the diskette. The head(s) is loaded onto the diskette when the door knob is closed. If no diskette is inserted when the door knob is closed, the heads will not touch each other.

The dc drive motor under phase locked loop speed control (using an integral tachometer) rotates the spindle at 360 rpm. A contracting collet/spindle assembly provides precision media positioning and clamping to ensure data inter­change. A diskette ejector places the diskette within reach of the operator when the diskette is undamped.

1-3

1.3.3 Positioning Mechanism

The read/write head assembly is accurately positioned through the use of a precision HeliCam V-groove lead screw with a flat nut follower which is attached to the head carriage assembly. Precise track location is accomplished as the lead screw is rotated in discrete increments by a stepping motor.

1.3.4 Read/Write Heads

The proprietary head(s) is a single element ceramic read/write head with straddle erase elements to provide erased areas between data tracks. Thus. normal interchange tolerances between media and drives will not degrade the signal to noise ratio and diskette interchangeability is ensured.

The read/write head(s) is mounted on a carriage which is located on precision carriage ways. The diskette is held in a plane perpendicular to the read/write head(s) by a platen located on the base casting. This precise registration assures perfect compliance with the read/write head(s). The read/write head(s) is in direct contact with the diskette. The head surfaces have been designed to obtain maximum signal transfer to and from the magnetic sur­face of the diskette with minimum head/diskette wear due to the low mass suspension system.

1.3.5 Recording Formats

The format of the data recorded on the diskette is totally a function of the host system. This format can be designed around the user's application to take maximum advantage of the total available bits that can be written on anyone track.

Figure 1-2 provides a functional diagram of the SA81O/860.

1.4 FUNCTIONAL OPERATIONS

1.4.1 Power Sequencing

Applying dc power to the SA810 or SA860 can be done in any sequence; however, during power up, the WRITE GATE line must be held inactive or at a high level. After application of dc power, a 90 ms delay should be introduc­ed before a seek operation or before the control output signals are valid. After powering on, the initial position of the read/write heads with respect to the data tracks on the media is in determinant. In order to assure proper posi­tioning of the read/Write heads after power on and internal write current switching at the proper track, a STEP OUT operation should be performed until the TRACK 00 line becomes active (recalibrate).

1.4.2 Drive Selection

Drive selection occurs when the DRIVE SELECT line in the drive is activated. Only the drive with this line active will respond to input lines or gate output lines. Under normal operation. the DRIVE SELECT line enables the input and output lines, starts the spindle motor, locks the door, and lights the Activity LED on the front of the drive.

1.4.3 Motor On

In order for the host sytem to read or write data, the dc drive motor must be turned on. In the standard configura­tion, this is accomplished by activating the line DRIVE SELECT. A 165 ms delay must be introduced after ac­tivating this line (or the TRUE READY line may be monitored) to allow the motor to come up to speed before reading or writing can be accomplished. All motors in a daisy chain configuration can be turned on with the op­tional MOTOR ON line or the spindle motor may be activated when both MOTOR ON and DRIVE SELECT are present.

In the standard configuration, the host system turns off the motor by deactivating the DRIVE SELECT line. This should be done if the drive has not received a new command within 2.6 seconds (16 revolutions of diskette) after completing the execution of a command. This will ensure maximum motor and media life. Also, the 2.6 second delay function may be performed by the drive by jumpering the optional MOTOR OFF delay.

1-4

READ DATA

SEP DATA (FM) READ WRITE

LOGIC I+- --- PROTECT

SEP CLOCK (FM) ASSM

DRIVE SIDE SELECT SELECT DISKETTE

WRITE DATA ~

WRITE GATE WRITE

WRITE CURRENT (OPT) LOGIC STEPPER

WRITE PROTECT ACTUATOR

1---1 ~

R/WO

R/W1 R/W HEAD

TRACK SIDE ASSM. -40 SELECT POWER

ON DRIVE ) DOOR

RESET ~~ MOTOR J CLOSED

'SIDE SELECT SWITCH

~

STEP

DIRECTION/*SIDE SELECT (OPT.) INDEX/ SECTOR

DRIVE/"SIDE SELECT (OPT.) DETECTOR

MOTOR ON (HEAD LOAD) (OPT.)

IN USE (OPT.) --- t ---TWO SIDED (OPT.) CONTROL

TRACK 00 LOGIC

INDEX IN USE

SECTOR -- LED

READY/TRUE READY (OPT.) TRACK

TRUE READY (OPT.) 00 SENSOR

DISK CHANGE rOPT.)

ALTERNATE I/O (2 lines) DOOR LOCK -..

·SA860 ONLY SOLENOID

FIGURE 1·2. SA810/860 FUNCTIONAL DIAGRAM 39216·02·A

1.4.4 Track Accessing

Seeking the read/write heads from one track to another is accomplished by:

a. Activating DRIVE SELECT line.

b. Selecting desired direction utilizing DIRECTION SELECT line.

c. WRITE GATE being inactive.

d. Pulsing the STEP line.

MUltiple track accessing is accomplished by repeated pulsing of the STEP line until the desired number of steps have been input. Each pulse on the STEP line will cause the read/write heads to move one track either in or out depending on the DIRECTION SELECT line. Head movement is initiated on the leading edge of the STEP pulse. Pulses received at less than a 3 ms period, but greater than 15 p.s, will be stored in a buffer which will then issue step commands to the drive stepper motor at a 3 ms pulse rate. Pulses received at greater than a 3 ms period will step the drive at the same rate they are received. The first step begins upon receipt of the first step pulse.

1.4.5 Step Out

With the DIRECTION SELECT line at a plus logic level (2.5 V to 5.25 V), a pulse on the STEP line will cause the read/write heads to move one track away from the center of the disk. The pulse(s) applied to the STEP line must have the timing characteristics shown in figure 1-3 or figure 1-4.

1.4.6 Step In

With the DIRECTION SELECT line at a minus logic level (0 V to 0.4 V), a pulse on the STEP line will cause the read/write heads to move one track closer to the center of the disk. The pulse(s) applied to the STEP line must have the timing characteristics shown in figure 1-3 or figure 1-4.

DC POWER

DRIVE SELECT

ss DIRECTION SELECT __ ~ ___ -.,

liN ~ -1~----1~-S-M-IN----~~-1

OUT

-1 ~s MIN

STEP

90 ms MIN - 1-16msMIN--....:...----UU ~

1" MIN_~ ~ ~ 3 m, MIN' r- 3m'MIN'

*3 ms is the minimum frequency for a standard seek. Pulses received at less than a 3 ms frequency will go into a buffered seek mode. See figure 1-4.

39216·03

FIGURE 1·3. TRACK ACCESS TIMING, STANDARD SEEK

1-6

DC POWER ss

DRIVE SELECT I "r--- -Ih r----'------...... ' ---S~.a.. _____ ....... '_--_-1

I I I

DIRECTION SELECT ___ -.,;... ___ -. ~c OUT

~ I IN ·r-----,)U .:-------

90 ms MIN --

STEP

-I -1,.s MI~------S~~-1"S MINL-----

---=----LnJ s

1-- 15/.s MIN" --2.9 ms MAX"

11's MIN--I- 151's MIN" I 2.9. ms MAX' •

-• After the last step pulse has been issued the drive may be deselected. The drive ignores any change to the DIRECTION SELECT line when no further step pulses are received. This frees the controller to issue instructions to other drives while the first drive completes the step commands stored in the buffer.

•• Pulses received at less than a 3 ms period will be stored in a buffer which will then issue step com­mands to the drive stepper motor at a 3 ms pulse rate. Pulses received at greater than a 3 ms per­iod will step the drive at the same rate they are received. The first step begins upon receipt of the first step pulse.

39216-31

FIGURE 1·4. TRACK ACCESS TIMING, BUFFERED SEEK

1.4.7 Side Selection (SA860 Only)

Head selection is controlled via the I/O signal line deSignated SIDE SELECT. A plus logic level on the SIDE SELECT line selects the read/write head on the side a surface of the diskette. A minus logic level selects the side 1 read/write head. When SWitching from one side to the other. a 100 p.s delay is required after SIDE SELECT changes state before a read or write operation can be initiated. Figure 1-5 shows the use of SIDE SELECT prior to a read operation.

DC POWER

DRIVE SELECT

STEP

SIDE SELECT (SA860 ONLY)

WRITE GATE

ss

ss

\.90 ms MIN:U

I I I -I r 1001's

I I~~---------------~~---------

ss

I ~t-1 VALIu READ DATA ---~-~I.-----UU Lr~

16ms~ _1_50,.s MIN MIN

-165 ms MIN'-

• Or when TRUE READY comes active. 39216-04

FIGURE 1·5. READ INITIATE TIMING

1-7

1.4.8 Read Operation

Reading data from the SA810/860 drive is accomplished by:

a. Activating DRIVE SELECT line.

b. Selecting head (SA860 only).

c. WRITE GATE being inactive.

The timing relationships required to initiate a read sequence are shown in figure 1-5. These timing specifications are required in order to guarantee that the position of the read/write head has stabilized prior to reading. The timing of READ DATA (FM) is shown in figure 1-6.

READ DATA

SEP DATA

SEP CLOCK

A I

A I

4.00 p.s NOM

~ 1.---200 ± 50 ns I

~l I.-- 200 ± 50 ns

2.00 p.s 2.00 P.s NOM NOM

A B A

A = LEADING EDGE OF BIT MAY BE ± 400 ns FROM ITS NOMINAL POSITION. B = LEADING EDGE OF BIT MAY BE ± 200 ns FROM ITS NOMINAL POSITION.

FIGURE 1·6. READ SIGNAL TIMING (FM ENCODING)

39216·05

The encoding scheme of the recorded data can be FM or MFM. The first of these, FM, provides single-density recording. The superior efficiency of MFM permits the bit cell period to be half that of the FM code, thereby pro­viding double-density recording. Differences among FM and MFM encoding are concerned with the use of clock bits in the write data stream.

FM encoding rules specify a clock bit at the start of every bit cell. MFM encoding rules allow bits to be omitted from some bit cells, when either the preceding bit cell or the current bit cell contains a data bit. See figure 1-7.

In both of these encoding schemes, clock bits are written at the start of their respective bit cells and data bits at the center of their bit cells.

The timing of the read signals, READ DATA, SEPARATED DATA, and SEPARATED CLOCK are shown in figure 1-6 (FM encoding).

In the standard SA81O/860, data separation of FM data is performed by the drive electronics. Data bits are presented to the controller on the SEP DATA line and clock bits are presented on the SEP CLOCK line. In systems using MFM encoding, data separation is performed outside the drive. In such cases, the READ DATA line carries both clock bits and data bits. Separation of MFM encoded read data should be controlled by a phase-locked loop circuit.

For additional information regarding the use of MFM encoding. refer to the SA81O/860 OEM Manual (P /N 39216-2).

1-8

FM

-

MFM

BIT CELLS

o

2F ~

o o o

o D o

FIGURE 1·7. FM AND MFM CODE COMPARISONS

1.4.9 Write Operation

Writing data to the SA810/860 is accomplished by:

a. Activating DRIVE SELECT line.

b. Selecting head.

c. Activating WRITE GATE line.

d. Pulsing WRITE DATA line with data to be written.

e. Head current sWitching.

o

D

39216·06

The timing relationships required to initiate a write data sequence are shown in figure 1-8. These timing specifica­tions are required in order to guarantee that the read/write head position has stabilized prior to writing.

DC POWER

DRIVE SELECT

STEP

--I r-- 90 ms MIN ---l I I r16smsMIN1

--:'-1 ~U 1-9~I~s-l J r100l'S MIN

SIDE SELECT -, I (SA860 ONLY) I I

--1 16 ms MIN· r-I

WRITE GATE -----------... 1L._1;...... _________ ""

--1 WRITE DATA

* Or when TRUE READY comes active

FIGURE 1·8. WRITE INITIATE TIMING

1-9

39216·Q7·A

Write data encoding can be FM or MFM. If MFM is used, the write data should be precompensated to counter the effects of bit shift. The amount and direction of compensation required for any given bit in the data stream depends on the pattern it forms with nearby bits.

For more details regarding data encoding and formatting for SA810/860 drives, refer to the OEM manual (PIN 39216) .

1.4010 Sequence Of Events

The timing diagram shown in figure 1-9 iIIustates the necessary sequence of events with associated timing restric­tions for proper operation.

DC POWER

VALID CONTROL r--90 ms MIN

AND OUTPUT SIGNALS 90 I DRIVE SELECT

SIDE SELECT (SA860 ONLY)

DIRECTION SELECT

STEP

TRUE READY

WRITE GATE

WRITE DATA

VALID READ DATA SIGNAL

ms MIN ~

I I I

1

I

ss S~

0,--' I I

~ I - I S~

S~ S~

~500m5MAX

0r-- -1 I I - __ .... 1 __ ,J,I __ tAo-____ ..L

I- 100/(s 1 MAX

I I--n or--l I 1 I I

·l~rrif/ ~ I --...II-----\S\s----------I ~\(~ ,-., r-- HMIN~ ~I~ ::, !.-, ,(S MIN

90m~ I I n 1/(S\ tnJ~~~~~ ---MIN 1+ ~ I4IT -, NOTE 2 ~16 ms

NOTE 2..l ,~_16 ms-! I- . =l MIN I I II ~6 ms I I}, I !--,_ ~~I'r--~ ---I '~IN - r--16 ms

, I S~ _I MIN 1 ""I .. I-----=----i-- 1 00 " s MIN ---"'_~-

~~ ___ -.J:I ... ========~~N~O~T-=E-21-===:::j~LI-- 4 I(S MIN I

~ r'~~' lru'iJ1J-~--r---50-1-,S-M-IN---~I-.. -N-OT-E-1 =tnf1JU......---------4.Sr-----umru-

NOTE 1: 165 ms minimum delay must be introduced after DRIVE SELECT to allow time for the dc motor to reach 360 rpm or the optional TRUE READY line must be monitored.

NOTE 2: If performing standard seeks, the minimum frequency is 3 ms between steps. If utilizing the drive in the buffered seek mode of operation the frequency shall be 15 ItS to 2.9 ms between pulses.

o After the last step pulse has been issued. the drive may be deselected. The drive ignores any change to the DIRECTION SELECT line when no further step pulses are received. This frees the controller to issue instructions to other drives while the first drive completes the step commands stored in the buffer. 39218-08-A

FIGURE 1·9. SA81 0/860 GENERAL CONTROL AND DATA TIMING REQUIREMENTS

1-10

SECTION II ELECTRICAL INTERFACE

2.1 INTRODUCTION

The interface of the SA81O/860 Diskette Drive can be divided into two categories:

a. Signal Interface b. Power Interface

The following paragraphs provide the electrical definition for each line. See figure 2-1 for all interface connections.

2.2 SIGNAL INTERFACE

The signal interface consists of two categories:

a. Control Lines b. Data Transfer Lines

All lines in the signal interface are digital in nature and either provide signals to the drive (input), or provide signals to the host (output), via interface connector P 1/ J 1.

2.2.1 Input Lines

There are twelve signal input lines. Nine are standard and three are user installable options.

The input signals are of three types, those intended to be multiplexed in a multiple drive system, those not intended to be multiplexed, and those which will perform the multiplexing.

The input signals which are intended to do the multiplexing are:

a. DRIVE SELECT 1 b. DRIVE SELECT 2 c. DRIVE SELECT 3 d. DRIVE SELECT 4

The input signals to be multiplexed are:

a. SIDE SELECT b. DIRECTION SELECT c. STEP d. WRITE GATE e. WRITE DATA

The input signals which are not multiplexed are:

a. MOTOR ON (May be optionally multiplexed.) b. IN USE c. EXTERNAL WRITE CURRENT SWITCH

2-1

HOST

-

DC - ..... JT7? GND -=- FRAME GND

MAX FEET 10 FT FLAT RIBBON OR

20 FT TWISTED PAIR

EXTERNAL WRITE CURRENT SWITCHING·

TRUE READY·

TWO SIDED· +

DISK CHANGE·

SIDE SELECT" +

IN USE·

MOTOR ON" (HEAD LOAD)

INDEX

READY

SECTOR

DRIVE SELECT 1 (SIDE SELECT OPT) +

DRIVE SELECT 2 (SIDE SELECT OPT) +

DRIVE SELECT 3 (SIDE SELECT OPT) +

DRIVE SELECT 4 (SIDE SELECT OPT) +

DIRECTION SELECT (SIDE SELECT OPT) +

STEP

WRITE DATA

WRITE "ITATE

TRACK 00

WRITE PROTECT

READ DATA

SEP DATA

SEP CLOCK

.... +5 V DC

I +5 V RETURN ~

+24 V DC

r + 24 V RETURN

TWISTED PAIR

·JUMPER ENABLED ALTERNATE 110 LINES. +SA860 ONLY

SA810/860

Jl

2 1

8 7

10 9

12 11

14 13

16 15

18

17 20

19 22

21 24

2~

26

25

28 27

30 29

32 31

34 33

36 35

38 37

40 39

42 41

44 4

46 45

48 47

50

49

3 J2 <I

1

2

5

mn

FIGURE 2·1. SA810/860 INTERFACE CONNECTIONS

2-2

-: ..... -

39216-09

The input circuit lines have the following electrical specifications. See figure 2-2 for the recommended circuit.

True = Logical zero = Vin ± 0.0 V to +0.4 V @ lin = 40 mA (max)

False = Logical one = Vin ± 2.4 V to + 5.25 V @ lin = 250 p,A (open)

Input Impedance = 220/330 ohms

MAX 10 FEET RIBBON OR 20 FEET TWISTED

PAIR

+5V

7414

39216·10

FIGURE 2·2. INTERFACE SIGNAL DRIVER/RECEIVER

2.2.2 Input Line Termination

The SA810/860 has been provided with a removable resistor pack for terminating the eight input lines.

In order for the drive to function properly, the last drive on the interface must have these eight lines terminated. Termination of these lines can be accomplished by either of two methods:

a. As shipped from the factory, the resistor pack is installed in location U9. These packs should be removed from all drives except the last one on the interface.

b. External termination may be used provided the terminator is beyond the last drive. Each of the input lines should be terminated by using 220/330 ohm, 1/4 watt resistors pulled up to + 5 V dc as shown in figure 2-2.

The same removable resistor pack is also provided for terminating the optional input lines.

2.2.3 DrIve Select 1-4

DRIVE SELECT, when activated to a logical zero level, enables the multiplexed I/O lines, starts the spindle motor, locks the door, and lights the activity LED. In this mode of operation, only the drive with this line active wUl respond to the input lines and gate the output lines.

Four separate input lines, DRIVE SELECT 1, DRIVE SELECT 2, DRIVE SELECT 3, and DRIVE SELECT 4, are provided so that up to four drives may be multiplexed together in a system and have separate DRIVE SELECT lines. Traces "DSl," "DS2," "DS3," and "DS4" have been provided to select which DRIVE SELECT line wUl ac­tivate the interface signals for a unique drive. As shipped from the factory, a shorting plug is installed on "OS 1." To select another DRIVE SELECT line, this plug should be moved to the appropriate "OS" pin.

2.2.4 Side Select (SA860 Only)

This interface line defines which side of a two-sided diskette is used for reading or writing. An open circuit, or logical one, selects the read/write head on the side 0 surface of the diskette. A short to ground, or logical zero, selects the read/write head on the side 1 surface of the diskette. When switching from one head to the other, a 100 p,s delay is required before any read or write operation can be initiated.

Two optional methods of side selection are available and can be implemented by the user through appropriate jumper connections.

2-3

2.2.5 Direction Select

This interface line is a control signal which defines the direction of motion the read/write heads will take when the STEP line is pulsed. An open circuit, or logical one. defines the direction as "out" and if a pulse is applied to the STEP line, the read/write heads will move away from the center of the disk. Conversely, if this input is shorted to ground, or a logical zero level. the direction of motion is defined as "in" and if a pulse is applied to the STEP line, the read/write heads will move towards the center of the disk. If buffered stepping is used, any changes to the DIRECTION SELECT line will be ignored by the drive during the time step pulse(s) are not input.

A jumper-selectable option is available which allows the DIRECTION SELECT line to be time shared for both the DIRECTION SELECT and SIDE SELECT functions. That is. during head positioning operations. the DIRECTION SELECT line controls direction of head motion. During read or write operations. the DIRECTION SELECT line determines which head is selected.

NOTE

A 16 ms delay must be introduced when changing direction (i.e .. the last step-in pulse to the first step-out pulse or vice versa).

2.2.6 Step

This interface line is a control signal which causes the read/write heads to move with the direction of motion as defined by the DIRECTION SELECT line.

The access motion is initiated on each logical one to logical zero transition or at the leading edge of the signal pulse. For a standard seek. step pulses may be received at a rate of 3 ms minimum time between pulses having a 1 p.s minimum pulse width. Any change in the DIRECTION SELECT line must be made at least 1 p's minimum before the leading edge of the STEP pulse. Refer to figure 1-3 for these timings.

Buffered stepping may be done by issuing pulse(s) to the drive at a rate of 15 p.s minimum to 2.9 ms maximum time between pulses having a 1 p.s minimum pulse width. Pulses are stored in a buffer which will issue step commands to the drive stepper motor at a 3 ms pulse rate. The first step begins upon receipt of the first step pulse. Any change to the DIRECTION SELECT line during the time step pulse(s) are not input will be discounted by the drive. See figure 1-4 for these timings.

2.2.7 Write Gate

The active state of this signal (logical zero) enables WRITE DATA to be written on the diskette. The inactive state (logical one) enables the read data logic (SEPARATED DATA. SEPARATED CLOCK. and READ DATA) and stepper logic. Refer to figure 1-8 for WRITE INITIATE timing information.

2.2.8 Write Data

This interface line provides the data to be written on the diskette. Each transition from a logical one level to a logical zero level will cause the current through the read/write head to be reversed. thereby writing a data bit. This line is enabled by WRITE GATE being active. See figure 1-8 for timing information.

2.2.9 Motor On (Alternate Input)

This customer installable option, when enabled by jumpering trace "MO" or "MMO" and activated to a logical zero level, will activate the dc spindle motor. Jumper trace "MMO" requires MOTOR ON and DRIVE SELECT to be ac­tive to start the dc spindle motor.

2.2.10 In Use (Alternate Input)

This customer installable option will turn on the Activity LED and lock the door.

2.2.11 External Write Cunent Switch (Alternate Input)

This option, enabled by jumpering trace "SE," permits write current switching via the optional WRITE CURRENT SWITCHING interface line (pin 2). When the interface signal is activated to a logical zero level, the lower value of the write current is selected. Selecting this option replaces internal write current switching at track 40.

2-4

2.2.12 Output Lines

There are nine standard output lines from the SA810/860 with two optional output lines and two alternate outputs available. The output signals are driven with an open collector output stage capable of sinking a maximum of 40 rnA at a logical zero level or true state with a maximum voltage of 0.4 V measured at the driver. When the line driver is in a logical one or false state, the driver is off and the collector current is a maximum of 250 p.A. See figure 2-2 for the recommended circuit.

2.2.13 Track 00

The active state of this signal, or a logical zero, indicates when the read/write heads of the drive are positioned at track 00 (the outermost track) and the access circuitry is driving current through phase one of the stepper motor. This signal is at a logical one level, or false state, when the read/write heads of the selected drive are not at track 00.

2.2.14 Index

This interface signal is provided by the drive once each revolution of the diskette (166.67 ms) to indicate the begin­ning of the track. Normally, this signal is a logical one and makes the transition to the logical zero level for a period of 0.2 to 2.4 ms once each revolution. The timing for this signal is shown in figure 2-3.

To correctly detect INDEX at the control unit, INDEX should be false at DRIVE SELECT time; that is, the controller should see the transition from false to true after the drive has been selected. INDEX pulses will only be prOVided when the diskette is up to speed.

U 0.2 to 2.4 ms .=U:= 39216·11

FIGURE 2-3. INDEX TIMING

2.2.15 Sector (Hard Sector Only)

When a hard sectored diskette is inserted and up to speed, this interface signal is prOVided by the drive 32 times each revolution. Normally, this signal is a logical one and makes the transition to a logical zero for a period of 0.4 ms each time a sector hole on the diskette is detected. Figure 2-4 shows the timing of this signal and its relationship to the INDEX pulse.

14 .. 15.20 ± 0.30 ms -1 r- 0.4 ± 0.2 ms

SECTOR U U U SS U U INDEX

I SS

~ U ~~ 2.60 ± 0.15 ms

39216·12

FIGURE 2·4. SECTOR TIMING

2.2.16 Ready

This interface signal indicates that two index holes have been sensed after properly inserting and clamping a diskette. Three holes have to be sensed for two sided diskettes.

If a single sided diskette is installed, READY will be active (logical zero) when SIDE 0 is selected, but false (logical one) when SIDE 1 is selected. Conversely, if a two-sided diskette is installed, READY will be active when either side of the diskette is selected.

2-5

NOTE

READ DATA, SEP DATA, and SEP CLOCK are only present when DRIVE SELECT and TRUE READY are active (low) and WRITE GATE is inactive (high).

2.2.17 Read Data

This interface line provides the "raw data" (clock and data together) as detected by the drive electronics. Normally, this signal is a logical one level and becomes a logical zero level for the active state. See figure 1-6 for the timing and bit shift tolerance within normal media variations.

2.2.18 Sep Data

This interface line furnishes the data bits as separated from the raw data by use of the internal FM data separator. Normally, this signal is a logical one level and becomes a logical zero level for the active state. See figure 1-6 for the timing.

2.2.19 Sep Clock

This interface line furnishes the clock bits as separated from the raw data by use of the internal FM data separator. Normally, this signal is a logical one level and becomes a logical zero level for the active state. See figure 1-6 for the timing.

2.2.20 Write Protect

This interface signal is provided by the drive to give the user an indication when a write protected diskette is install­ed. This signal is a logical zero level when It is protected. Under normal operation, the drive will inhibit writing with a protected diskette installed in addition to notifying the interface.

2.2.21 True Ready

This output (pin 8) signals that the drive is ready to handle data. The line will come true (active low) when the diskette is up to speed, aII seek functions have been completed, and the READY line is active (refer to paragraph 2.2.16). It is recommended that this signal be used in place of motor start and seek complete timers.

2.2.22 Disk Change (Optional Output)

This customer instaIIable option is enabled by jumpering trace "DC." When DRIVE SELECT is activated, it will proVide a true signal (logical zero) onto the interface (pin 12), if while deselected, the drive has gone from a READY to a NOT READY (door open) condition. This line is reset on the true to false transition of DRIVE SELECT if the drive has gone READY. Timing of this line is illustrated in figure 2-5.

TABLE 2·1. DC POWER REQUIREMENTS

P2 PIN DC VOLTAGE TOLERANCE CURRENT MAX RIPPLE (p to p)

1 +24 V DC' =!: 2.4 V DC 1.7 A MAX 100 mV MAX ALLOWABLE 1.0 A TYP

2 + 24 V RETURN"

3 +5V DC :!:0.25 V DC 1.0 A MAX 50 mV MAX ALLOWABLE 0.7 A TYP

4 + 5 V RETURN"

5 FRAME GROUND

'If the stepper motor is energized by the controller during the spindle motor start-up time, the drive will exceed the + 24 V DC current specification of 1.7 A max. Under this condition. the current specification is 2.2 A max.

39216·13

., Returns are tied together at the drive PCB.

2-6

2.2.23 Two Sided (Optional Output)

When the drive is selected and the diskette is spinning. this line will indicate a logical zero level for two sided media. and a logical one for single sided media.

T a install this option on a standard drive. jumper trace "2S."

2.2.24 Alternate I/O Pins

These interface lines (pins 4 and 6) have been prOVided for use with customer install able options. Refer to the SA810/860 OEM Manual (PIN 39216-2) for methods of use.

2.3 POWER INTERFACE

The SA810 and SA860 require only dc power for operation. DC power to the drive is provided via P21 J2 located on the component side of the PCB near the stepper motor. The two dc voltages, their specifications, and their P21 J2 pin designators are outlined in table 2-1. The specifications outlined on current reqUirements are for one drive. For multiple drive systems, the current requirements are a multiple of the maximum current times the number of drives in the system. See figure 2-5 for the dc power requirement profile during various operations

1.6

TYPICAL CURRENT REQUIREMENTS (AMPS) 1.0

0.1

POWER ON

2.4 FRAME GROUND

MOTOR START &

DOOR LOCK

RUNNING SEEKING @ STEPPER 3 ms STEP RATE

(POWER DOWN)

FIGURE 2-5. DC POWER PROFILE

--- 24 VOLTS --- 5VOLTS

WRITING STAND BY

39216·14·A

The drive must be frame grounded to the host system to ensure proper operation. If the frame of the drive is not fastened directly to the frame of the host system with a good ac ground. a wire from the system ac frame ground must be connected to the drive. For this purpose, a faston tab is provided on the drive where a faston connector can be attached or soldered. The tab is AMP PIN 61664-1 and its mating connector is AMP PIN 60972-l.

2·7/2-8 (blank)

3.1 INTRODUCTION

SECTION III PHYSICAL INTERFACE

The electrical interface between the SA810/860 and the host system is via two connectors. The first connector, Jl, provides the signal interface and the second connector, J2. provides the dc power.

This section describes the physical connectors used on the drive and the recommended connectors to be used with them. Refer to figure 3-1 for connector locations.

3.2 Jl/Pl CONNECTOR

Connection to Jl is through a 50 pin PCB edge connector. The dimensions for this connector are shown in figure 3-2. The pins are numbered 1 through 50 with the even numbered pins on the component side of the PCB and the odd numbered pins on the non-component side. Pin 2 is located on the end of the PCB connector closest to the de connector and is labeled 2. A key slot is provided between pins 4 and 6 for optional connector keying.

The recommended connectors for PI are shown in table 3-1.

P2 CONNECTOR AMP PIN 1-480763 SHUGART PIN 17793-0

PINS AMP PIN 350689-1 SHUGART PIN 10151-0

, FRAME CONNECTOR AMP PIN 60972-1

P1 CONNECTOR SCOTCHFLEX

- PIN 3415-0001 or AMP PIN 1-583718-1

39216-15

FIGURE 3-1. INTERFACE CONNECTORS - PHYSICAL LOCATIONS

3-1

TABLE 3·1. RECOMMENDED J1 CONNECTORS

TYPE OF CABLE MANUFACTURER CONNECTOR PIN CONTACT PIN

TWISTED PAIR, #18 AMP 1-583718-1 583616-5 (CRIMP) (CRIMP OR SOLDER) 583854-3 (SOLDER)

TWISTED PAIR, #18 VIKING 3VH25/1 J N-5 NA (SOLDER TERM.)

FLAT CABLE 3M "SCOTCH FLEX" 3415-0001 NA

39216·16

KEY SLOT -11- 0.036 ± 0.004 I I (0091 ± 0010)

-,r----,' ~ ~ ~ r 1 0.450 :t 0.010 II II

0.400 ± 0.010 0 (1.01 ± 0.025) (1.143:t .025)

r" r" ..... r" 50

I I I

~~~~-~~ J ~~ ~0'~~~1~7~M --l ~0~~t(~2~0) 0.050 NOM 0.100 NOM_ l- I

(0.127) (0.254) - ,------ I .... __________ 2.575 ± 0.010 •

(6.541 :t 0.025)

NOTE:

x.xxx ± x.xxx = in. . (x.xxx ± x.xxx) = em

3.3 J2/P2 CONNECTOR

BOARD THICKNESS 0.062 :t 0.007 (0.157 ± 0.017)

50574·19

FIGURE 3·2. J1 CONNECTOR DIMENSIONS

The dc power connector, J2, is mounted on the component side of the PCB and is located near the stepper motor. J2 is a 5 pin AMP Mate-N-Lok connector PIN 1-350945-0. The recommended mating connector (P2) is AMP PIN 1-480763 utilizing AMP pins PIN 350689-1. J2, pin 1, is labeled on the component side of the PCB. Figure 3-3 illustrates the J2 connector.

39216·17

FIGURE 3·3. J2/P2 CONNECTOR

3·2

SECTION IV THEORY OF OPERATIONS

4.1 GENERAL OPERATIONS

The SA810/860 floppy disk drives consist of:

a. Read/Write and Control Electronics b. Drive Mechanism c. Precision Track Positioning Mechanism d. Read/Write Head (s)

The electronics are packaged on one PCB which contains:

a. Index Detector Circuits (Sector/Index for Hard Sectored Media) b. Head Position Actuator Driver c. Read/Write Amplifier and Transition Detector d. Write Protect e. Drive Select Circuits f. Spindle Motor Control g. Data/Clock Separation Circuits (FM Only) h. Drive Ready Detector Circuit i. Drive True Ready Detector Circuit j. Side Select Circuit (Used on SA860 Only) k. In Use and Door Lock Circuits I. Internal and External Write Current SWitching m. Power On Reset Circuit

The Head Positioning Actuator moves the read/write head(s) to the desired track on the diskette. The head(s) is loaded onto the diskette when the door is closed.

The following information describes each of the above functions in detail.

4.2 READ/WRITE OPERATIONS

a. The SA81O/860 uses double frequency non return to zero (NRZI) recording method. b. The read/write head, in general, is a ring with a gap and a coil wound at some point on the

ring. c. During a write operation, a bit is recorded when the flux direction in the ring is reversed by

rapidly reversing the current in the coil. d. During a read operation, a bit is read when the flux direction in the ring is reversed as a result of

a flux reversal on the diskette surface.

SA81O/860 drives use the double-frequency (2F) longitudinal NRZI method of recording. Double frequency is the term given to the recording system that inserts a clock bit at the beginning of each bit cell, thereby doubling the fre­quency of recorded bits. This clock bit, as well as the data bit, is provided by the using system. See figure 4-1.

4-1

BINARY REPRESENTA TlON

HEX REPRESENTATION

C D C D C C C D C C D C

BIT CELL 0 BIT CELL 1 BIT CELL 2 BIT CELL 3 BIT CELL 4 BIT CELL 5 BIT CELL 6 BIT CELL 7

1 1 0 0 1 0 1 0

\~------~--------~/\~--------~------~/ C A

39211·17

FIGURE 4·1. BYTE

The read/write head is a ring with a gap and a coil wound some point on the ring. When current flows through the coil, the flux induced in the ring fringes at the gap. As the diskette recording surface passes by the gap, the fringe flux magnetizes the surface in a longitundinal direction. See figure 4-2.

CURRENT

FRINGE ~r---"'-----FLUX ~

OXIDE RECORDING SURFACE ~.~~

-------------------,.-~-------------~~------------ -- -- -MYLAR'" BASE

FIGURE 4·2. BASIC READ/WRITE HEAD

DISKETIE MOTION

• 39211·18

The drive writes two frequencies: 1F, 125 k Hz and 2F, 250 k Hz. During a write operation, a bit is recorded when the flux direction in the ring is reversed by rapidly reversing the current in the coil. The fringe flux is reversed in the gap and hence the portion of the flux flowing through the oxide recording surface is reversed. If the flux reversal is instantaneous in comparison to the motion of the diskette, it can be seen that the portion of the diskette surface that just passed under the gap is magnetized one direction while the portion under the gap is magnetized in the opposite direction. This flux reversal represents a bit. See figure 4-3.

CURRENT .....--

RECORDED BIT

CURRENT ~

FIGURE 4-3. RECORDED BIT

4-2

DISKETIE MOTION

• 39211·19

During a read operation, a bit is read when the flux direction in the ring is reversed as a result of flux reversal on the diskette surface. The gap first passes over an area that is masnetized in one direction and a constant flux flows through the ring and coil. The coil registers no output voltage at this point. When a recorded bit passes under the gap, the flux flowing through the ring and coil will make a 1800 reversal. This means that the flux reversal in the coil will cause a voltage output pulse. See figure 4-4.

These flux reversals produce an FM waveform which transmits data to and from the diskette. See figure 4-5.

RECORDED BIT DISKETTE MOTION .. 39211-20

FIGURE 4·4. READING A BIT

BINARY .'r----'---~\f~---..Lo---'""'V,------'---~

EQUIVALENT I I I

r---......... --~\

BIT CELL 0 I BIT CELL 1 I I

,C D ,C IC WRITE DATA tl n ~ n

~----~~-----I --------~I~----~ WRITE DRIVER 1 I I I~ ____ --..I I

I I , WRITE I r-----....... , r"1 -----., ,

DRIVER 2 : I--------~, , DISKETIE (:. ~ .... y : ~ II i(~ ... ·" : : ..... )I( : : y:" ..... t ... ~ : )(""1"~o--":"",,, SURFACE I \ I' : I

I FLU~ALh ': : REVER~: ~ ,

~I~~AL ~ ~-""""":L~ ... ....r..._7 .... ~ ~ , : I ,

~~~~ ~ n n nL. __ ~nL __ ~nL __ ~nL._.--..I 39231-30

FIGURE 4·5. 1F AND 2F RECORDING FLUX AND PULSE RELATIONSHIP

4.3 READ/WRITE HEAD

a. The ceramic read/write heads each contain three coils. b. When writing, the head erases the outer edges of the track to ensure there are erased areas bet­

ween adjacent tracks.

4·3

The read/write head contains three coils. Two read/write coils are wound on a single core, center tapped, and one erase coil is wound on a yoke that spans the track being written. The read/write and erase coils are connected as shown in figure 4-6.

I R IWO I R/W 1 (SA860 ONLY) ,.. I

WRITE I

DRIVER 1 ,.... I

I I ~

.... I 5 ERASE I SIDE 0 CT ERASE

DRIVERS I ~

... ~ SIDE 1 CT .... I I ~ I ~

WRITE I DRIVER 2 f"'O I

I I

.... I I 39231.01

FIGURE 4·6. READ/WRITE HEADS

During a write operation, the erase coil is energized. This causes the outer edges of the track to be trim erased to prevent the track being recorded from exceeding the 0.012 inch (0.508 mm) track width. Trim erasing allows for minor deviations in read/write head current so as one track is recorded, it will not splash over to adjacent tracks.

Each bit written will be directed to alternate read/write coils, thus causing a change in the direction of current flow through the read/write head. A change in the flux pattern for each bit results. The current through either of the read/write coils will cause the old data to be erased as new data is recorded.

During a read operation, the direction of flux changes on the diskette surface as it passes under the gap and current is induced into one of the windings of the read/write head. This results in a voltage output pulse. When the next data bit passes under the gap, another flux change takes place in the recording surface. Current is induced in the other coil, producing another voltage output pulse of the opposite polarity.

4.4 WRITE CIRCUIT OPERATION

a. The write data trigger flips with each pulse on the WRITE DATA line. b. The write data trigger alternately drives one or the other of the write drivers. c. Lower write current value is selected by grounding the EXTERNAL WRITE CURRENT SWITCH

or -TRACK 40. d. WRITE GATE allows write current to flow to the write driver circuits if the diskette is not write

protected. e. Write current sensed aIlows erase coil current. £. Heads are selected by raising the appropriate center tap to a logical high state.

WRITE DATA pulses (clock and data bits) are supplied by the using system. The write trigger flips with each pulse. The outputs are fed to alternate write drivers (see figure 4-7).

WRITE GATE and NOT WRITE PROTECT are ANDed together and will cause write current to flow to the write driver circuits. This causes the center tap switch to close and erase current to flow.

The output of one of the write drivers allows write current to flow through one half of the read/write coil. When the write trigger flips, the alternate write driver provides write current to the other half of the read/write coil.

4-4

D WRITE Q DATA

-WRITE DATA C TRIGGER Q

-WRITE GATE ------------,

WRITE DRIVER 1

WRITE DRIVER 2

ERASE DRIVER

I HEAD 0

I RIW 11

I

I I

R/WOl

I SIDE 0 CT

I I I RIW02

I ERASE 0

I ERASE 1

FIGURE 4·7. WRITE CIRCUIT FUNCTIONAL DIAGRAM

4.5 READ CIRCUIT OPERATION

a. Duration of all read operations is under control of the using system.

I HEAD 1

I

39231·02

b. As long as the drive is selected, TRUE READY is active, and WRITE GATE is not active, the read signal is amplified and shaped, and the square wave signals are sent to the interface as read data.

c. The FM data separator divides the read data into clock pulses and data pulses.

When the using system requires data from the diskette drive, the using system must select the head (SA860 only) and disable WRITE GATE. The read signal is then fed to the amplifier section of the read circuit. After amplifica­tion, the reCid signal is fed to a filter where the out-of-band noise is removed. The read signal is then fed to the dif­ferentiator amplifier.

Since a clock pulse occurs at least once every 4 p,s and data bits are present once every 2 p,s (FM encoding only), the frequency of the READ DATA varies. The read signal amplitude decreases as the frequency increases. Note the signals in figure 4-8. The differential amplifier will amplify, differentiate, limit, and digitize the read signals (sine waves).

RIW ~ HEADS

'------'

FILTER

TP2

C CDC J1..JUln...

AID CONVERTER

DATA SEP

o 1

FIGURE 4·8. READ CIRCUIT FUNCTIONAL DIAGRAM

4-5

39018-18

The FM data separator is a single time constant separator, that is, the clock and data pulses must fall within pre­specified time frames or windows.

4.6 DRIVE MOTOR CONTROL

a. Start/ Stop b. Phase Control c. Speed Control

The motor used in the SA81O/860 is a dc brush less direct drive motor. The motor may be turned on and off via DRIVE SELECT or the optional MOTOR ON line located on pin 18 of the interface. When activating the motor, a 165 ms minimum delay must be introduced to allow proper motor speed before reading or writing, or the TRUE READY line must be monitored. The typical time for a valid TRUE READY signal is 120 ms.

Figure 4-9 is a block diagramcof the motor phase and speed control circuitry. The position of the 3 phase motor is detected by three Hall effect sensors which feed this information into the Motor Phase Control. The Motor Phase Control then decodes this information and activates the proper Motor Phase Drivers. The amount of current sup­plied to the motor windings is determined by comparing the output of the integral magnetic tachometer of the motor to a 360 Hz crystal reference. The difference is fed to the Motor Speed Control which adjusts the current flow to the Motor Phase Drivers via the Motor Power Driver, thus locking the phase of the motor to a crystal reference.

360 HZ CRYSTAL REFERENCE - PHASE

DETECTOR

..-

MOTOR PHASE CONTROL

MOTOR SPEED CONTROL

MOTOR PHASE

DRIVERS

MOTOR OFF_

MOTOR POWER DRIVER -

FIGURE 4·9. DRIVE MOTOR CONTROL

4.7 TRACK ACCESSING

a. Carriage Actuator Motor b. Actuator Control Logic c. Reverse Seek d. Forward Seek e. Track 00 Flag

4.7.1 Stepping

HAL F EFFECT DBACK FEE

D.C. MOTOR

TAC HOMETER

39231·03

Seeking the read/write heads from one track to another is accomplished by selecting the desired direction utilizing the DIRECTION SELECT interface line, loading the read/write heads, and pulsing the STEP line. Multiple track accessing is accomplished by repeated pulsing of the STEP line until the desired track has been reached. Each pulse on the STEP line will cause the read/write heads to move one track either in or out depending on the DIRECTION SELECT line.

4.7.2 Carriage Actuator

The Carriage Actuator Motor used on the SA810/860 is a four phase, 15° per step, variable reluctance stepper motoT.

4-6

There are eight stator windings and a rotor with six teeth. The eight stator windings are wired together in groups of two, 1800 apart. Each pair of stator windings is wired to one phase of the stepper control logic. The rotor has six teeth spaced 600 apart. The two windings per phase are those which, when energized, will magnetize the poles causing the rotor to move one-fourth of a gear tooth pitch or one step.

4.7.3 Actuator Control Logic

Figure 4-10 illustrates the logic of the following operations.

+IN/-oUT

.. STEP ....... o-------t ·STEP

ENABLE

D

C

D

C

·POWERON RESET

'~"~l

STEP COUNTER

a FFA

Q

a FFB

a

·TRACK 00

+ 24 V

FIGURE 4·10. ACTUATOR CONTROL LOGIC

.. 24 V

01

02

03

04

·TRACK 00

39231'()4

The step counter (FF A and FF B) is a modified Gray Code counter that counts 0, 1,3, and 2. At power on, the step counter is reset causing the Q outputs to be active. When dc power is applied and the drive is selected, the Q outputs activate the 2 and 3 drivers. With these drivers active, the position zero windings are excited causing the rotor to align as shown in figure 4-11.

39231·05

FIGURE 4·11. TRACK 00 Forward Seek

a. Seek forward five tracks. b. Assuming:

• Present position of the read/write heads to be Track 00. • + IN / -OUT at a minus level. • -STEP ENABLE active. • Five step pulses to be received (from the host system). • Step Counter (dri~ers 2 and 3 active).

4-7

Minus DIRECTION SELECT is inverted and becomes + IN. Since the step counter is reset (low), a high is at one input of Exclusive OR A and a low at Exclusive OR B. + IN is high and inverts both signals present at Exclusive OR's A and B. causing the input to FF B to be high.

When the first step pulse is sent to the control logic . it is ANDed with + STEP ENABLE and clocks FF A off and FF B on. This enables drivers 2 and 4 causing the actuator motor to move 15° in a counter-clockwise direction. In turn, the carriage assembly moves one track towards the center of the diskette. See figure 4-12 (Track 01, Count 1).

39231·06

FIGURE 4-12. TRACK 01

With FF A off and FF B on, a low is presented to Exclusive OR A and B allowing + IN to pass to both FF's. Upon receipt of the next step pulse, both FF's are clocked on, enabling drivers 1 and 4. See figure 4-13 (Track 02, Count 3).

39231·07

FIGURE 4·13. TRACK 02

With both FF's on, a low is at Exclusive OR A and a high at Exclusive OR B which presents + IN to FF A. The next step pulse clocks FF A on and FF B off enabling drivers 1 and 3. See figure 4-14 (Track 03, Count 2).

39231·06 FIGURE 4·14. TRACK 03

This process continues until the host system stops sending step pulses at track 05. At that time, FF A is off and FF B on enabling drivers 2 and 4. See figure 4-12 (Count 1).

4-8

Reverse Seek

a. Seek in a reverse direction five hacks. b. Assuming:

• Present position of read/write heads to be track 05 and DIRECTION SELECT at a positive level (from the host system).

• WRITE GATE inactive. • Five step pulses to be received. • FF A is off and FF B is on; drivers 2 and 4 active.

Plus IN is inverted and becomes OUT. With FF A off and FF B on. lows are presented to Exclusive OR's A and B. With the first step pulse, the FF's are clocked off enabling 2 and 3 drivers. This causes the actuator motor to move 15° in a clockwise direction. moving the carriage one track towards the outside of the diskette. See figure 4-11 (Track 04, Count 0).

With both FF's off, a high is presented to Exclusive OR A and a low to Exclusive OR B. The next step pulse clocks FF A on and FF B off enabling drivers 1 and 3. See figure 4-14 (Track 03, Count 2).

This process continues until the fifth step pulse. With lows at the Exclusive OR's, and FF's clocked off, drivers 2 and 3 are enabled. See figure 4-11 (Track 00, Count 0).

Figure 4-15 shows stepper timing for forward and reverse seeks.

+ DRIVE SELECT ~ + IN/-OUT -.J ~~-------

-STEP ENABLE -,"'---------........ S~ .. S -----------

+STEP---~

S5

TRACK

STEP COUNT

00 01 02 03 04 05 05 04 03 02 01 00

o 320 023

39231·09

FIGURE 4·15. STEPPER TIMING

4.7.4 Track Zero Indicator

Track 00 Pin 42 is provided to the host system to indicate that the read/write heads are at track 00. The track 00 flag on the carriage assembly is adjusted so that the flag covers the photo transistor at track 01. When FF A and B are clocked off, the actuator moves to track 00, the Q outputs and track 00 defect are ANDed together and then ANDed with DRIVE SELECT to send the track 00 indication to the host system (see figure 4-10) .

4·9/4-10 (blank)

5.1 MAINTENANCE EQUIPMENT

5.1.1 Alignment Diskette

SECTION V MAINTENANCE

Two alignment diskettes are available for verifying and adjusting the SA810/860. The SA810 requires written in­formation on one surface only and utilizes the SA120 alignment diskette. The SA860 has two read/write heads and requires written information on both surfaces. The SA122 alignment diskette is used to perform checks on the SA860. The folloWing adjustments to the SA810/860 can be made using the SA120/122:

a. Read/Write head radial alignment using track 38. b. Index photo-detector adjustment using tracks 01 and 76.

CAUTION

Caution should be exercised in using the SA120/122 Alignment Diskette. Tracks 00, 01,36,37,38, 39,40, 75, and 76 should not be written on. Doing so destroys pre­recorded tracks.

5.1.2 SA809 Exerciser

The SA809 Exerciser is built on aft 8-inch by 8-inch PCB. This ExerCiser PCB can be used in a stand alone mode, built into a test station, or used in a tester for field service.

The Exerciser, when used with the SA120/122 Alignment Diskette, is designed to enable the user to perform all adjustments and checks required on the SA810/860 drives.

The Exerciser has no intelligent data handling capabilities but can write both 1F and 2F frequencies and can enable read in the drive to allow checking of read back signals.

5.1.3 Special Tools

The special tools available for performing maintenance on the SA810/860 are listed in table 5-1.

TABLE 5·1. MAINTENANCE EQUIPMENT

DESCRIPTION PART NUMBER

SA120 ALIGNMENT DISKETTE (SA810 ONLY) 50782

SA122 ALIGNMENT DISKETTE (SA860 ONLY) 51189

EXERCISER (SA810/860) 50619

SPINDLE MOTOR CENTERING TOOL 54650

39231·10

5-1

5.2 DIAGNOSTIC TECHNIQUES

Incorrect operating procedures. faulty programming. damaged diskettes. and soft errors created by airborne con­taminants. random electrical noise. and other external causes can produce errors falsely attributed to drive failure or misadjustment.

Unless visual inspection of the drive discloses an obvious misalignment or broken part. try to repeat the fault with the original diskette, then attempt to duplicate the fault on a second diskette.

5.2.1 Soft Error Detection and Correction

Soft errors are usually caused by:

a. Airborne contaminants that pass between the read/write heads and the disk. These contaminants can usually be removed by the cartridge self-cleaning wiper.

b. Random electrical noise that usually lasts for a few microseconds.

c. Small defects in written data and/or track not detected during a write operation may produce soft errors during a read.

d. Improper grounding of power supply, drive and/or host system. Refer to the SA81O/860 OEM manual (P /N 39216) for proper grounding requirements.

e. Improper motor speed.

The follOWing procedures are recommended to recover from soft errors:

a. Reread track 10 times or until data is recovered.

b. If data is not recovered after step (a), access head to adjacent track in same direction previously moved then return to desired track.

c. Repeat step (a).

d. If data is not recovered, error is not recoverable.

5.2.2 Write Errors

If an error occurs during a write operation, it will be detected on the next revolution by doing a read operation, commonly called a write check. To correct the error, another write and write check operation must be performed. If the write operation is not successful after 10 attempts. a read operation should be attempted on another track to determine if the media or the drive is failing. If the error persists, replace the diskette and repeat the above pro­cedure. If the failure still exists, consider the drive defective. If the failure disappears, consider the original diskette defective and discard it.

5.2.3 Read Errors

Most read errors that occur will be soft errors. In these cases, performing the error recovery procedure in paragraph 5.2.1 will recover the data.

5.2.4 Seek Errors

Seek errors may be caused by stepper malfunctions or carriage binds.

To recover from a seek error, recalibrate to track 00 and perform another seek to the original track or perform a read ID to find which track the head is located on and compensate accordingly.

5.3 TROUBLE·SHOOTING

Figures 5-1 and 5-2 outline trouble-shooting procedures for the SA810/860.

5·2

END

INSERT DISKETTE WITH WRITE

PROTECT SLOT UNCOVERED

INSERT DISKETTE WITH WRITE

PROTECT SLOT COVERED

YES

NO REPLACE

WRITE PROTECT ASSEMBLY PARA. 5.5.14

REPLACE NO WRITE PROTECT

ASSEMBLY PARA. 5.5.14

REPLACE DRIVE PCB

FIGURE 5·1. WRITE PROTECT INOPERATIVE

5·3

39231·11

CHECK DC NO POWER SOURCE

CHECK JUMPER OPTIONS AND IF

DRIVE IS SELECTED (AND/OR MOTOR

ON LINE)

YES

REPLACE DRIVE MOTOR

END

NO

NO

END

REPLACE DRIVE PCB

YES

FIGURE 5·2. DISKETTE NOT ROTATING

5-4

39231-12

5.4 ADJUSTMENTS

5.4.1 Side 1 Downstop Adjustment (SA860 Only)

a. Install good media. Ensure door knob is in fully closed position.

b. Clearance of 0.010 ± 0.002 inch (0.254 ± 0.051 mm) should be obtained between side 1 arm and f1exture. To adjust clearance, turn allen screw located on top of side 1 arm. Clockwise turn decreases clearance. Counter-clockwise turn increases clearance. See figure 5-3.

c. Eject and reinsert media several times and reverify required clearance.

d. Verify head alignment (paragraph 5.4.2).

FIGURE 5·3. SIDE 1 DOWNSTOP ADJUSTMENT

5.4.2 Head Radial Alignment

NOTE

SA860 read/write head assembly is aligned at factory and adjustment of head-to­head alignment is not field adjustable. However, downstop adjustment may effect head-to-head alignment. If tolerances below cannot be maintained, downs top adjust­ment should be checked (paragraph 5.4.1).

a. Insert alignment diskette (SA8l0 =: SAl20, SA860 =: SAl22). Alignment diskette should be at room conditions for at least 24 hours prior to alignment checks.

b. Select drive and step head(s) to track 38.

c. Sync oscilloscope external negative on TPl2 (-INDEX). This will display over one revolution.

d. Connect one probe to TPl and other to TP2. Ground probes to PCB. Set inputs to ac, ADD, and invert one channel. Set vertical deflection to 100 mV /division.

e. Amplitude of two lobes must be within 70% of each other. If lobes do not fall within specifica­tion, continue procedure (see figure 5-4).

f. Loosen two mounting screws which hold motor plate to base casting. See figure 5-5.

5·5

EX) EVEN AMPLITUDE (100%) ON TRACK

LEFT 80% OF RIGHT, + 1 m OFF TRACK TOWARD TK 00

LEFT 60% OF RIGHT, + 2 m OFF TRACK TOWARD TK 00

LEFT 40% OF RIGHT, + 3 m OFF TRACK TOWARD TK 00

RIGHT 80% OF LEFT, -1 m OFF TRACK TOWARD 76

RIGHT 60% OF LEFT, -2 m OFF TRACK TOWARD 76

Eft RIGHT 40% OF LEFT, -3 m OFF TRACK TOWARD 76

39025·27

FIGURE 5·4. HEAD RADIAL ALIGNMENT

g. Rotate stepper motor.

h. When lobes are of equal amplitude, tighten motor plate mounting screws (see figure 5-5).

MOUNTING SCREWS

39231-13

FIGURE 5·5. MOTOR PLATE MOUNTING SCREWS

5-6

i. Check adjustment by stepping off track and returning. Check in both directions and readjust as required.

j. Whenever head radial alignment has been adjusted, track 00 detector and limiter adjustment must be checked (paragraphs 5.4.5 and 5.4.6).

5.4.3 Read/Write Head(s) Azimuth Check

The azimuth is not field adjustable. If, after performing this check, the waveform on the oscilloscope is not within ± 18', replace the Head Carriage Assembly (paragraph 5.5.8).

+ 18'

a. Install Alignment Diskette (SA810 = SA120, SA860 = SA122).

b. Select drive and step to track 76.

c. Sync the scope external negative on lP12 (-INDEX). Set time base to 0.5 Msec per division.

d. Connect one probe to TP1 and other to lP2. Invert one channel and ground probes to lPG5 and TPG6. Set inputs to ac, ADD, and 50 MV per division.

e. Compare waveform to figure 5-6. If not within range shown, replace Head Carriage Assembly (paragraph 5.5.8).

0'

-18'

39231·14

FIGURE 5·6. AZIMUTH BURST PATTERNS

5-7

5.4.4 Head Amplitude Check

These checks are only valid when writing and reading back as described below. If the amplitude is below the minimum specified, ensure that the diskette is not worn or otherwise shows evidence of damage on either side before re-writing and re-checking. Ensure that the head load downstop is properly adjusted (SAS60 only).

a. Install good media.

b. Select drive and step to TK 76.

c. Sync oscilloscope on TP12 (-INDEX) for single-sided diskettes, and TP13 for double-sided diskettes.

d. Connect one probe to TP2 and one to TP1 on drive PCB.

e. Ground probes to PCB and invert one input. Set volts per divisions to 50 mV and time base to 20 Msec per division.

f. Write entire track with 2F signals (all l's).

g. Average minimum read back amplitude peak-to-peak should be 130 mV for side 1 (SAS60 only).

h. Repeat procedure for side 1 (SAS60 only).

If the output is below minimum, and different media is tried but the output is still low, it will be necessary to install a new head assembly (paragraph 5.5.S).

5.4.5 Track 00 Detector Assembly

a. Check head radial alignment and adjust if necessary (refer to paragraph 5.4.2) before making follOWing adjustment.

b. Insert diskette.

c. Connect oscilloscope to TP26. Set vertical deflection to 1 V / division and sweep to continuous.

d. Step carriage to track 02. TP26 should go high. Adjust detector assembly towards actuator assembly if not low.

e. Check adjustment by stepping heads between tracks 01 and 02, ensuring TP26 is high at track 02 and low at track 01.

5.4.6 Track 00 Carriage Limiter

a. Step carriage to track 00. Verify carriage is at track 00 by checking J1 pin 42 is active (low).

b. Check limiter clearance is 0.020 ± 0.010 inch (0.50S ± 0.254 mm). See figure 5-7.

c. If clearances are not within tolerance, loosen limiter nut. Rotate limiter screw until proper clearance is obtained.

d. Tighten limiter nut and repeat steps (a) and (b) above.

5.4.7 Index Sector Timing

a. Insert Alignment Diskette (SAS10 = SA120, SAS60 = SA122).

b. Step carriage to track 01.

c. Sync oscilloscope external negative, on TP12 (-INDEX).

d. Set time base to 50 p.sec/ division.

5-8

e. Observe timing between start of sweep and first data pulse. This should be 200 ± 100 p.sec. If timing is not within tolerance, continue procedure.

f. Loosen holding screw in index detector until detector is just able to be moved.

g. Observing timing, adjust detector until timing is 200 ± 100 p'sec for hard sector applications, and 200 ± 200 p.s for soft sectored applications. Ensure detector assembly is against registration sur­face on top plate.

h. Tighten holding screw.

i. Recheck timing.

j. Seek to track 76. Reverify timing.

f 0.020 ± 0.010 in. (0.508 ± 0.254 mm)

39231-15

FIGURE 5·7. TRACK 00 CARRIAGE LIMITER CLEARANCE

5.4.8 Door Lock

a. Rotate door knob counter-clockwise to fully closed position. Observe door lock plunger and door lock shutter. Door lock solenoid should not touch shutter. See figure 5-8.

FIGURE 5·8. DOOR LOCK SOLENOID ADJUSTMENT

5-9

b. Select drive. Door lock plunger should extend so that it fully seats into shutter cavity.

c. If proper clearances are not obtained, continue adjustment procedure.

d. Remove drive PCB.

e. Loosen two mounting screws securing door lock assembly.

f. While fully extending door lock plunger, slide door lock assembly until plunger fully seats into

shutter cavity.

g. Secure mounting screws.

5.4.9 Ejector/Bail

a. Insert diskette.

b. With rear edge of diskette jacket touching diskette ejector, there should be 0.030 ± 0.005 inch (0.762 ± 0.127 mm) gap between rear of diskette jacket and diskette stops on casting. See

figure 5-9.

0.030 ± 0.005 in. (0.762 ± 0.127 mm)

DISKETTE

EJECTOR MOUNTING SCREWS

FIGURE 5·9. DISKETTE STOP CLEARANCE

DISKETTE STOP

39231·17

c. If proper clearances are not obtained, loosen ejector mounting screws and slide assembly until proper clearance is obtained.

d. Tighten ejector mounting screws and recheck clearance.

e. Insert and eject media several times. If diskette fails to eject, continue procedure.

f. Remove media.

g. Loosen bail mounting screws.

5·10

h. Wrth doo' knob In fully _n (clo<:kwlse) position. rotate ban .... mbly so .jecto, ~ides 0 .... baU ann into f_anl o,.ject pos\llon. Slide ban .... mbly until ball arm Is flush with .ject0' notch

(figure 5-10),

i. Tighten bail mounting screws. ZERO CLEARANCE

BAIL MOUNTING -=:----,~ SCREWS

BAIL ASSEMBLY

FIGURE 5.10. BAIL ASSEMBLY ADJUSTMENT

39231·18

5.4.10 Stepper Motor a. Check cI.",ance betw •• n carriag. follow .. and limiter (figu'" 5·11). Pmpe< cloomnc• IS O. 013 ±

0.002 In. (0.330 ± 0.051 mm). If cI .... nce is nol within specification. contlnu, p.-acedUN.

STEPPER CLAMP SCREWS

CARRIAGE FOLLOWER

FIGURE 5.11. STEPPER MOTOR ADJUSTMENT

5-11

39231-19

b. Loosen two stepper clamp screws and stepper adjustment screw. Move stepper motor until car­riage follower just touches limiter. Tighten two stepper clamp screws until snug. Stepper adjust­ment screw remains loose.

c. With screwdriver in slot in adjusting plate, move stepper motor up until clearance between follower and limiter is 0.013 ± 0.002 in. (0.330 ± 0.051 mm). Tighten stepper adjustment screw and stepper clamp screws.

5.5 REMOVALS AND REPLACEMENTS

5.5.1 Faceplate and Door Knob

a. Loosen two allen head set screws on door knob.

b. Remove door knob. Pull door knob forward and away from faceplate.

c. Remove screws retainlng EMI/RFI bottom shield. Remove shield.

d. From PCB side of drive, loosen two screws on back side of faceplate. Pull faceplate forward and away from drive casting.

e. To reinstall, reverse above procedure.

5.5.2 Drive Motor Assembly

a. Remove screws retaining bottom EMI/RFI shield (see figure 5-12). Remove shield.

b. Remove screw retaining rotor.

c. Remove rotor.

d. Disconnect motor power cable at PCB.

e. Remove four screws retaining motor assembly.

f. Lift motor assembly up and away from casting. Moderate force is required as there is an in­terference fit between motor assembly and spindle collar on drive casting.

g. To reinstall:

• Set motor assembly on casting.

• Place spindle motor centering tool (P /N 54650) over motor assembly.

• Secure four motor assembly retaining screws.

• Perform steps (a) through (d) in reverse order.

5.5.3 Top Plate Assembly

a. Remove screws retaining top EMI/RFI shield. Remove shield.

b. Remove front plate.

c. Insert a clean piece of bonded paper between read/Write heads to prevent the heads from touching when the top plate is removed.

d. Remove screws on outside edges of top plate assembly. Remove top plate by lifting up and away from casting, lifting at front side of top plate. Ensure bail assembly is past side 1 arm lift tab before lifting top plate clear.

e. To reinstall, reverse procedure.

5·12

I •

. . .-f . . .

tt~l~e .. . e ....

I J!

FIGURE 5·12. DRIVE MOTOR ASSEMBLY

5.5.4 Spindle Hub AS!H!mbly

a. Remove top plate assembly (paragraph 5.5.3).

b. Remove screws retaining bottom EMI/RFI shield. Remove shield.

c. Remove screw retaining drive motor rotor.

d. Withdraw spindle hub from opposite side of casting.

e. To reinstall, reverse procedure.

5·13

L

39231-20

5.5.5 PCB Assembly

a. Remove screws retaining bottom EMl/RFI shield. Remove shield.

b. Disconnect all PCB connector plugs.

c. Remove screws retaining PCB.

d. Lift PCB up and away from casting being careful to feed through connector without damaging cables.

e. To reinstall, reverse procedure.

5.5.6 Door Lock Assembly

a. Remove screws retaining bottom EMl/RFl shield. Remove shield.

b. Remove PCB (paragraph 5.5.5).

c. Remove screws retaining door lock. Remove door lock.

d. To reinstall, reverse procedure.

e. Perform door lock adjustment (paragraph 5.4.7).

5.5.7 Side 1 Arm Assembly (SA860 Only)

a. Remove screws retaining top and bottom EMl/RFl shields. Remove shields.

b. Disconnect side 1 head connector (J7) from PCB.

c. Remove tie wrap on carriage side of drive.

d. Remove side 1 cable from rubber grommet cable retainer.

e. Insert a clean piece of bond paper between read/write heads.

f. Remove screw securing downstop arm ..

g. Remove downstop arm.

h. Remove side 1 arm.

i. To reinstall, reverse procedure.

CAUTION

After installing head cable, ensure there is enough slack to allow full motion without causing binds.

j. Check SA860 downstop adjustment (paragraph 5.4.1).

k. Check head alignment (paragraph 5.4.2).

5.5.8 Head and Carriage Assembly

a. Remove screws retaining top and bottom EMl/RFI shields. Remove shields.

b. Disconnect head connector(s) from drive PCB.

c. Remove tie wrap on carriage side of drive.

d. Remove head cable(s) from rubber grommet cable retainer.

5·14

e. Remove stepper motor connector from drive PCB.

f. Remove two screws retaining stepper motor.

g. Remove stepper motor.

h. Loosen screws at each end of guide rod.

i. Withdraw carriage assembly.

j. Slide gUide rod out from carriage assembly.

k. To reinstall, reverse procedure.

CAUTION

After installing head cable (s), ensure there is enough slack to allow full motion without causing binds.

I. Check SA860 downstop adjustment (paragraph 5.4.1).

m. Check head alignment (paragraph 5.4.2).

5.5.9 Clamp Hub Assembly

a. Remove top plate.

b. Ensure door knob is in closed (clamped) position.

c. lift clamp hub away from top plate then away from bail shaft.

d. To reinstall, reverse procedure.

5.5.10 Bail Assembly

a. Remove top plate.

b. Loosen screws on bail arm.

c. Slide bail assembly off shaft.

d. To reinstall, reverse procedure.

e. Perform ejector/bail adjustment (paragraph 5.4.8).

5.5.11 Track 00 Detector

a. Remove screws retaining top and bottom EMI/RFI shields. Remove shields.

b. Remove connector (J5) from drive PCB.

c. Remove bracket holding track 00 cable.

d. Remove detector mounting screw to free detector.

e. To reinstall, reverse procedure.

f. Check track 00 adjustment (paragraph 5.4.5).

5.5.12 Index/Sector LED Assembly

a. Remove screws retaining top and bottom EMI/RFI shields. Remove shields.

b. Remove connector from appropriate header (J8B).

5·15

c. Remove top plate.

d. Remove detector mounting screw to free LED assembly.

e. To reinstall. reverse procedure.

5.5.13 Index/Sector Detector Assembly

a. Remove screws retaining top and bottom EMI/RFI shields. Remove shields.

b. Remove connector from appropriate header (J3D) on PCB.

c. Remove tie wrap holding detector cable.

d. Remove bracket holding detector cable.

e. Remove top plate.

f. Remove index detector mounting screw.

g. To reinstall, reverse procedure.

h. Check index timing adjustment (paragraph 5.4.7).

5.5.14 Write Protect Detector

a. Remove screws retaining top and bottom EMI/RFI shields. Remove shields.

b. Remove connector from appropriate connector (J3A).

c. Remove tie wrap holding cable.

d. Remove screw holding detector bracket and remove assembly.

e. To reinstall, reverse procedure.

f. Register Write Protect Assembly against rib in casting. Secure detector mounting screw.

5.5.15 Ejector Assembly

a. Remove screws retaining top EMI/RFI shield. Remove shield.

b. Remove ejector mounting screws to free ejector.

c. To reinstall, reverse procedure.

d. Perform Ejector/Bail adjustment (paragraph 5.4.8).

5.5.16 Door Switch

a. Remove screws retaining top and bottom EMI/RFI shields. Remove shields.

b. Remove connector from appropriate header on PCB.

c. Remove tie wrap holding door switch cable.

d. Remove bracket holding door switch cable.

e. Remove top plate.

f. Remove door switch mounting screws.

5-16

g. To reinstall, reverse procedure.

h. Rotate door knob. Single click should be heard from door switch.

5.6 RECOMMENDED INCOMING RECEIVING INSPECTION

All Shugart drives are 100% adjusted and tested before leaving the factory. It is only necessary to inspect for ship­ping damage on receipt of drives.

5.6.1 Test Equipment

Inspection should be simple and test equipment kept to a minimum. Shugart recommends the following equip­ment:

a. SA81O/860 Service Manual. b. SA809 Exerciser. c. Exerciser Instruction Manual. d. Power supply for Exerciser (+ 5 V, + 24 V). e. Oscilloscope. £. Alignment Diskette (SA120 for SA81O, SA122 for SA860).

5.6.2 Procedure

a. Unpack drive.

b. Make visual inspection for physical damage.

c. Ensure all power is off. Attach Exerciser cables to appropriate drive connectors.

d. Power up.

e. Insert work diskette.

f. Set track addresses of 00 and 76 into Exerciser. Select drive and seek automatically for 5 minutes. After 5 minutes, move address 76 to 00. Seeking should stop and track 00 indicator should be on.

g. Using nominal force, attempt to rotate door knob while drive is seeking. Knob should not rotate.

NOTE

Excessive force can defeat the door lock function.

h. With SA81O/860 Service Manual, SA120/122 Alignment Diskette, and Exerciser Instruction Manual as guides, perform the following checks:

• Azimuth Check (paragraph 5.4.3). • Index Sector Adjustment (paragraph 5.4.7). Soft sectored applications do not require this

check. If soft sectored check is desired, timing specification is 200 ± 200 msec. • Head Radial Alignment (paragraph 5.4.2).

i. Remove SA120/122 alignment diskette. Insert work diskette.

j. Seek to track 76 and write 2F on both sides. Minimum read back signal from each head should be 130 mV.

k. Connect scope to TP I and verify index timing is 166.7 ± 1 ms.

1. Power off.

m. Remove connectors and repack drive.

This procedure verifies that the critical functions of the drive are working properly, i.e., the file will read and write, the drive will access, the disk is rotating at the proper speed, and critical adjustments are within specifications.

5-17/5-18 (blank)

SECTION VI SCHEMATIC DIAGRAMS

The following schematic diagrams are furnished as an aid to malfunction analysis. Table 6-1 shows the applicability of each diagram.

TABLE 6·1. SCHEMATIC DIAGRAM APPLICABILITY

FIGURE TITLE APPLICABILITY

6-1 SCHEMATIC DIAGRAM (4 SHEETS) 25227

6-2 SCHEMATIC DIAGRAM (4 SHEETS) 25247

6-3 SCHEMATIC DIAGRAM (4 SHEETS) 25249

6-4 LOGIC EQUIVALENT PIN 16271, LOCATION U13 25227,25247, AND 25249

6-5 LOGIC EQUIVALENT PIN 51420. LOCATION U14 25227, 25247

39231-23

6-1/6-2 (blank)

D

c

B

A

8 7 6

, , > RI C3 C2 Rtf •

4.1K r-- I 150 0.1 0.1

SHIELD (2) ,.>-~ I • .-R2----i~I---1---1-..... CI

5 4

f~~ l"Cq LI .14.1

lOO)..lh -:- 35V 2D%

3 RZe.

i CRlSo 2-

'2.70

1"-I,?24ZB ¥ IW

'C'IZV,S%

+24V

CI9 0.1_

2 1

0252"2(;,-1 IoJOTE5: UNLE55 OTHERWISE L.:;;.:::...:::..:;;..:;;.::::.....:..~

SPECIFIED-I. ALL CAPACITORS ARE IN MICROFARADS

SOV, +80-20% 2.ALL DIODES ARE IN4148.

_____ ....., J(' -:- '5-22K R23 ':" <\7 <\7 R/w ¢ I I~R/WOI' ... " 4 CRI l , ' 2 K - CRII -' CRI2 -=- RI3 4~'0~~~ R'l~

390

c.x> C4 IOO~F 0.1 SOV.r;.%

L!i*8~ t,c< Cf' u I SQZ2; ~OPf ~-;:f II C/3

3. ALL RESISTORS ARE IN OHMS.1!4W. 'j%j D 1% RESISTORS ARE 1/8'11.

I ~ II ... ' 3 l CR2 N:, R5 I 3 SIDE ¢ CT I r- ~ 4.S7K J.~~~ ~2 17

~ ... 2 CR3 L I 1'7" T5m,.,-,_.2 16

R/Wrj2 I d~" lCR4 N I, 4 1 l.!:II6QJ I I ~ I 1~1l ~~L=R~IO---4~~I~--+-------------~

~'~~T ¢ f--~ - - 1~ 3 CR~ /\ : -::- ~ we> 18

SOV % ! Rl"O.I \.:z. 0./ R2,/ - 2.4 K

IOO,uh C~ R'Z4 R'2.~ ~f CZO ZK 2.K 10K. -=- RlO 91PF

R 17 loO~ s "10 '200 '-

C.7 RJZ ID.I 10K RIB L-

CI8 0.1

RI5 IK

4.-0--0- INDICATES CU1-TRACEOPTION. 5. --0 [}-- INDICATES 9l0I?TJN6 PLU6 OPT I ON 6. ~ INDICATES SHORTING PLUG

( FACTORY INSTALLED). 7. DISTRIBUTE 0.1 CAPACITORS ON +5V

AND +24V BUS LINES. 8.NPN TRANSISTORS ARE PART OF CAj083. 9. PNP TRANSISTORS ARE PART OF TPQ3906.

10.INDUCTORS ARE :!:. 10%.

~ lrP/_ " I IREAI> C.HAN"-IE.,LI

SIDEI CT ~ : 14 ~ : ~PIFFI~B .TPI6

i ~ I ... " 5 CRT L I cia 7 FF'N DATA 10 1 ;:~:EI: I~~IDII: J7 ~ r------------------------r----------i R2~24V ISOPfi?oJoY;~: u2OUTr-:--6---+~~rfIA

I 6 c:.R~ '" I I, 220 ~ R~~ ell 52 16<:'78-0 ,---------:::::--------=---:---------,

L .J ' VI I I 3W}%" > 9.53K 8 052 GND 5 SHIELD \--- - -- .'-- I IR"-"'D/WRITE.~II I ' 1181'1:1% l50pl' 12 . r---,

. r- to 1"'\ -I CIS +?v 50Y +,- DIFF COMP I '*' '--- -:- MA."T~I)( I I 0i~' p r-R I - PIG 1,...

- - - - - - - - - - - - - =-.J ...-l RIO R9 OW 0::=. I -INsi~\ 6 1"'12 5% DIFF COMP -:::- 13 10 300 300 ON, 5.1'l5% 0., R27 113 vce

G\..IO 3W 3w REc:.E.i, J -= : 2.151( I II

{-WRITE DATA----------------.:S:..qWRtlATA ERc1J 1'3 I I~~

(<;\4T3) -WRITE GATE 4 WRcSA.TECT(D~f-- t24V L ~0-l.a'4------' ,§d'S ~ -+ SIDE. ¢ /-<3 '51DE.¢ ERI II +Z4-V - - - - - - -, :rd~

+lzSR Cl" \ ~ : t CI4 R4'2- ~~~K I L------tr----';7"]=-'-=-R--'q"t o~~ -::- Uo 16'(.10-1 CRI4 ~q(D i~l% t?V • 4.1K 1% R'~ll 10K.

! .1 "I IS OA.I\. "R?l ~-----II---~----------'IO 7S() WRITE ERA':£ r7 I 7.501( VRI:F' '188 , ..... I C~3 T .-l.- 12 ~ us 1"/" I -::_~

DR.IVeR. ~ \-lEAD 'SELEC.T -=- ~I L-"""~,,....-. ... ....z""iIRCFl -!-~~Vl~"~ 1- 1?D I~ U5 (.. US AI-+'J"l~~--. \ I 10% Rlwl ~; ZO"lo 14 R40 7 TPQ390(' "S

I'Z " 7 ':" ':" ~~ -:- "Z. .32 K _ R4 ~ +r;.y R7

2.4K. Ra lOOK

-:_ 1% RI9 10."!K \ I "to '-_

1~.'iK. ,1%

3"301 14,;K Rl3 RI4 R.~~

U'lln2201 i ~I r< ~ I ., l.J

-V'l!<'ITE. CuR~ENT "W11m -X-=-"" I'! 8 >4.~~K ~h.4 \<.. RI2- I'Y. 3 1%

t-----__._--.A,/V'V--- + 2'1 V Rca .1 C36 '2.41<. = 0.1 IK

U4 ~Ir.. C A 308 3 HJ.!!!....-------I~------___Av'V'v---4

SE ~ -=- r 138)11 1.31K zt? U5 SHT 2)- TRf>..O( 40 I L 1'3-

1Of. S~ 1L--4 _________________________________ ~I ________ __.

---------------------------------------~---I ------~~~I---+----.--------- ~4V

JC37 1c39 YTPIO Tt~ T·OI

-----\;2:f-!2"--1~-+=! b2~O:..!;%2__<~---__'_~ 24 VR

REFERENCE DESIGUATIQNS LAST USED /\JOT USED

I I I I I ,

\

8 -:-

MP52222A QI R~4-

,~

-=-U4 R~c;. R.~

b IK IK /'

1'3

R44 ZK

t?v

R4'7 2K

J4 U4

RII ,RbO \"2.. I :

J. TP4

1

TYPE POSITION S9c UI

1<..278·0 U2 1<0270-1 CA308~ U4

uS 7474 U<',20,22

7438 U7,B,IO,19 220/330 U~ UL~20105a U II 7404 UI2

162'71-1 VI'! '5/4cO-o UI4

74LSOO UI!>. 24 7414 UI~

-PeR (SHT '2,:!>,4)

Q II ~ ~IP TP 2 •

L _________________ ~ __ ~ ____ _

. CHASSIS GND

3112(12179)

8 4 3 6 5 2

14 8

14

U5€D ON ASM

01\ e5c27- 2.

1

GND

12. 7 4 7

c

B

A

FIGURE 6·1. SCHEMATIC DIAGRAM, PCB 25227 (SHEET 1 OF 4)

6-3/6-4 (blank)

D

-

c

B

-

A

8 1 7 I 6 1 5 4 1 3 1 2 I 1

+5'1

- ---,1 0 2.52.2.<0-1 +2.4'1 il r-- - -.- - -:,ACTIVITY LIGHT. DOOA LOe""

i 2. 6 r:-DOO~ ~OC:K -;

*CRI? I A : :''30LE.NOID DP.IVEP. , ~:'1 ~~~~~~~-~~-~JV~-·5V : 10 UI9 1 I~A. CR23

(S14T3) -CL~P SPIN .--------------------------------,

I U2S tl p . ..!L-B ......... -----~B>I_-_, I R4S 470J\. _I'N4003 'I : r---+--...;..cc---,~-\g L- DOOR LOC.K : , 1 38 sso·".a. =-+SV I rv.~----------~-~~~L;K~12L-----------+-~-----~'-~1121l~ .--=- I/DD ,3.) ,,\I 0.4

I I

I _ __ -I TP8 I~ I TP27 ~46 UI2 L- __ -:1.2 _________ . __________ ~8 ___ , _ZNZU,~ ___ _

@ ~~ JU' I' ~DC}-4_·"/K_~..!.12"'i_"'D +1o'O'1DR 1"1""'-------"""111 ')c,!..:IO~+__'r';ZrU ...... '):~,L__1=================================I-=-===-=-=...J======== -ROYO(J, (S13) ,3~ ~ ,. - tl O~::.I~~t1L-______ ~~=-_~==~~~~~~3 __ t-______________________________ 1?-U0' _____________ ~~ _____________________________ ;~OO:~~ OrF ~H~4) "WO~~~. ~D'''--.....J r ,il »:>'-'11----, -+5'1 ... 'K,!4" u8 T~Y''''. ,,",V R

-STEP -"'-":~JHI---"""---""'--/'...:2f ... ~,' ~ '~TEP -".1" 11 Lllq Reg '-' 1 (SI-IT 3) - DRIVE SELECT ----..11-..... -------4--/---_t--..::4'(1- D", +RDV '.) ~ 38 -;. R R.EADY

D

{ -MO'TOR OM I MOTOR ON 'U'1~g-.:======~I=-=::.o.=· U=:2.7=================t: 1==?i=8===t==+~=~:js~~'p:c:.-+--I_---I.J""1L1-'r'l.J---,,2.~~7~~-,y 6~ ___ +-+ ______ ........ ___ t_--...;:3:q _"UIU 101 U1 p>'--+-----tU I Jt-~~/~,,~,-

(~~~ I~ --~~~----------~---~~~D~~ UI4 W~~:~----~=~~U;18~=:~==============~,~··~·~-~-~·~=~=~R:5~~==-~:-~:-1~~.l~[-~~:~=,~-~-~+~5~V~5~~--~-~:~~i~~~l~~~~-----l~ r 1-~=." __ +_5_V+----"I.'tI.l5""". +lI\DYr- r ,;;--- !a . 1).53 J zJ J : IJIC. Vll~--'V'bV'!I\r.o.-, 1~4V 470.1\. ::c Cil3': 9OQ' ~!l. :: M010R J : La ,}- UII r-- ~ +ujDfl ..-o~o~ +~;/q~'l.T +T~TI tAl .2.5: "Q 10 3 ~~)Cl.B ..... 2"--____ --, POC}-O--+t ..... --HQ2 ZNU.22:1~~2 3141 2:~r, I: ~ ~ :

IOO ... ~t ..L - I ...L :" ~ .--__ ..:;;14~+ 'HDE" -= .--_",,3:;'+~TEP 1-12 -4 .,~ 8 !.L<:?"~>-,7--+-----. -= -= I iJ: '

Y2 ~ 741. .. 321.L ;-_......:.17~. 'O!C.TOII ~ _____ +-_..:2::.;7 +ouTeN : v ~ ~ "'--:~~~~~~~~~::~~~~~~~~~~~~~~~~~~~~~~~_~~~~~~::~: 2: : 5""14,0 L...!l 15 I.. ~.nDY IN 5 t.I~ 2;' 1'3~12 11' .,... I

,...... - " r-"- ~~~ I I~ 4 ... 1/>3' I C L..... __ .....J ~ -DC. t'14~~1-..z.& ... ::...... __ --++ ____ +_1~ .... !>~1 UI3 I

~ " M4 2.~' 3~4 14 ~~IW~+-~-4-+-~--__ -4~ _______________________ ~5~4.~~~'~ _______ .....J I I ~ -- V..T ,:len_ ,-:;'13 ~ ,IT ~ IS \9 2.l~:C~2\ : I

.. ltV-OUT : 1414 ~P""GIJ. C;i t;. q. /~~043 I r- - - - - - - - - -' '- - - - - - - - - - - - _I -= U~N 20105'3 Co 15'TEP MOTOR DRIVER: -, \5 2 V·A. . CI "~~./SKroR~ l~~--------~~~~~~------------~~~~-~~--~+INDd ~~ I~-- --------------------- -- - -.

+rnD~~/5EtT~,D~I~~~~'7~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1~~~~;3~.~o, ) 14 _ POll (&\O\T4 -POR

4

-TRACI'-<10

r-----------------+1f------:-;-;;::;:-------------------- ·WIIITE PRO'TE.CT (SHT3) I I~ Ul0 4PA~~ I Aa ..

vv 131 I ...... ,,, -WRITE PROTEC.T

(~HT~{~~:::~::;----------------------~r_ti~----t_----------------------~_rtt-----------40~::~ 04 ...... ---";LJ "" -TWO 7 I 3 2S I() ~

51DtD "I UI;a ..... __ ..o;21-L:..V7~'../»"'----D Or--....::..::..)~(f--- -TINO SIDED , ....

- 5TtP ENoto8L£ -----------------------~~rr+_----~--------------------------rti_----------~3~4~-STE~ -TRACK as ..rcL3. 18 -TK~

"WRITE p~]...W-3 35 +WPI"

, -----------------------~~rr+_----~----------_r----~--+_----~~----------~30~+I\O C~T I, + REIooD DATA

(~T3) +READENABLE 1':1 CliVI

(flHT:5) - OIRECTION ----------------, VI cb .-----------------------+5Vi TP26. ~~TP25 5M~T

5 I TR1<.d DE'T R.S7 ISOll.

+TRKOI LED ~---..

~~ 20 tF<Y'2

.. DC·" ... ,~°1_---+_----------__jr_-_t_t_--..:4:r;~ ,- DC 12, :-.L E "Y r -.dU7.F ... -d Or------=-7"\*- - 0 I~IC.. C.HA NC:o

... TK QS 17 '. _ OUT ~UI~ 3 42 X _ ~C.K is

+~EP L5.7 8 50, _ CLOCK OIUI~'P-'''----------':..:....-:3./ot-- -'XPARATEo (l.eC",

.. 5EP l2.e "" DATA sIUlo'»''-...... ---------'I'''8-_:3'./ot_- - SEPAPoATEO DATA ~~ "" .epc..2'3-+_~-1_-------------------r---_t------~I~~ 2 2A,. "" .. dU8'»-'"'''--..-------''-'-'-:l /.~J,- - SoEC..TOR B

+3/-4 Vss .,HO 18 ~U8 _II 20,-/ _ ,,,,Del'!

EJ_221 7'\38 ~~ I "" J- ~ ,,~

c--=-'L.. __ ~__1I------+-++-------.:;:..--=--_------ - SIDE ZERO (~T~)

l~~~~~~~~~~~~~~~~~!1~~~~~~~~~~~~~~~~~~::::::::::~==========!-~~====:jIO~~~ 8 4~,/ ~ :~~--------='-~/.oE-,,- - READ DATA

+?V - wP LED I V

WP DET I 3¥-l''-------t--.; ...J

INDEX DE.'T ...., ~I. 18 COMMON DI V

INDEX DET I 3~1~,.~1.:.!O'---___ ~'--1 5UPPLY.....J R59

~INOEX LE.O~~'----I""'" 8 1

-INDEJ( LED5 I 8,/,'-,,-~----"1 Q30 r-I--

-t INIE.'K LED I I '\i7s 130 (1 J -:.= ~ v -

ISEN50R ELE('TRONIC.c:.1 L __________________ _

I 11111111101

8 I 7

4

20 UW 14

~----------------------~~C Q~

I'

I 6 I 5 4 I 3

P.U. (SHT 4)

A It MUiT CONfORM TO ENQIHURINQ .,.C. I!~

I

T~~UNLIIS ~NOTED '"LI SCH~MATIC DIAGRAM

2

MLIAIID 'OR AIIIWIL v CHK

_ ..... ~ '" 4 == D I ~ rsC:-/02522'%- 111987 I 1

FIGURE 6·1. SCHEMATIC DIAGRAM, PCB 25227 (SHEET 2 OF 4)

D

c

B

A

8

-MOTOR ON

(SHT 2)

7

- DP'lvE. SE LEeT I -

6

Ra7 3::lon.

5

+5V

~B5 R86 2 20r~ 22.0.l1..

~ r--

~ ~~

RSI! 330.1\.

V 21'1 OS2 - DRIVE. '5ELECT 2 .-....:7"\~::..:;.--------------- ---+~-=-2B-=-.[J~ ~

"~3 -DRIVE SELECT ~ A

4 3 2

RPI

;----l~:-~:v I 4.7K ~.'

-DRIVE SELECT "I Xn -!:IV - 14

r ---- -- --, 220/ ! • U9 330 L

~~I~~~--------------~IO-i- II sa S~

UI8 13 Izi

08

\I

MS~ L 6 - -.11_ ------>« U \ 8

=-- ~c=)r6~--------------------------------08

~m'~ }

- DRIVE (51-1,2.)

5EL1::(T

+ Dl'\IVE SCLI:.(T - SIDE. SELEC.T

- OIRECTION

(- HE .... O LOAD)

- IN USE

'-/ ,,4 '--+-+-+------f~Cl T ..I\R~ +sv 4.~ 4.1K U\2.

~~ Ie "91 MG --~~~---------------4-~-----------O~·-~O---~-----1------------------~ 1 ~ 110 ,....D-;" --~/,~~------------------------~--------------------~~~~--~------+---------------------------------~---------------------------------

UIZ +5V 14

r - --, ~ va... . 220/! i U~ 330 i __ j UI2 UIS

12.

+ 5101: -UI<O (<:,I-lT I) - DIRECTION

} (SHT 2> - ':>IDE "ZERO

- I'" U~E

__ '-~~/4~0~ __________________ ~5-4_8 ____________________________________ ~ ____________ ~1 ~~~ , ..... 131 1 ---. _______________________ - WRITE DATA (51-\T I) -WRITE. GATE

- WRITE DA"TA '-/ 36

- WRITE. PROTEC.T

"7,oOOR OPEN I 3 7

B

DOOR ",WITCI-I I. '\37 8

COMMON Y-V--l I -

.. DOOR OPE.I'I ....J

r- l 5

1 '4.7K

RPI I I . +5V

I I I

I ,4·7K L J4

- CLAMPED ~~I\------_---_----------.----------------~ C l I~:j 14

CL-AM?ED SWJ'TC'4 --I -- ~ C.OMMON ..L

t CLAMPE.D I

-.J

R?\ I

U(O

lJ(o

..., NP

WP

I

2-

UI5 3

00

1r.,..,_'2.

L'j4 U\<'o

I 00

'" UIS 51 6

00 UI2

'-----..2.1 "C:>o'''''------------ - S "TEP ENABLE

- CLAMP SPI'i

.~------------~~-------------------------------------------------------------------- -ooop CLO~EO

(5HT 2)

D

C

B

A (SHT 2) - RDVOUT

" o

8111(11180)

7 6 4 8 5 3

TIT" SCHD/IATIC DIAGRAM OWN .. LIASI'D ''"' ASHMII\. Y CH • ....

. 1=-____ --IE ... j::~_::.:.UT=::......,.....:: ... :::.IX D ~L

2 1

FIGURE 6·1. SCHEMATIC DIAGRAM, PCB 25227 (SHEET 3 OF 4)

6-7/6-8 (blank)

D

c

B

A

8 7 6 5 4 3 2

~5V ~~.---------_.----------------------------------------------------------------------------------------------------------------------------~7~~ALL DEVICE ~IAS

(SHT 2) MOTOR. OFF

720Hi: 1\ C (Silt;!)

$111(1217.1

8

Ct.. I ,I}! 1- tZ4V

,-- -- -- ---- ---, ~_ HALL D~VICE I U24 :- - - - - - - - , , I I -f Reo. TURK

BIAS

-ro...!.~.-l-t .. --·--------~~ -V' '-23

--W" I 1_'_00_2.7 _____ _

I c.a.q.

,002.7

L _______ _

Rbi II<.

r---~Z~O-O~L3------~--------~~~', I

'+

'-T , ~ 3 L _________ ~

+'3V :----------, Rbi!. II<.

U24 12 ;~ "0 p.:.:.11------+---l\-....,~~~

~ 2' __ ~_4------------~ ~~-----;--------~~I' I

I '4 I I

51 : 13

!----------~

+5V

~ ~:' .. -.-- --------------+------=-[.::.;:;/

r- -----·---·-l _~~~~:~;~i-R:~ _____ _

I I

.- .. ~

I

----------------------.--------------------1------ _____ .-________________________ ~_;------+_---------------------------+_-------- TACH I, CSt!

.047 I Rl'ob Rb7 -- -... -:..-=--~---=:;=--+--.........,-.,-+e4V]

+sv

Rb~ J 2.2K.

I I

1501<. c;5---I"f'-c--2b---i'1- e2710K I .I.u~ .I"'F .OtAlF

R73 1I0K 1%

C29 ,~~.3..u R7~

,!o'" 24"~-t--'RY7V1o,~"" . 560.& +.1C31

I" II

7 8

U23

Nee

j.tPCt043C.

I .01 ~fi~ R77

3

6

10

IZ

IR79 IK

R80 11'1

R81 I Z4K Q5

2.N2.907 C51

010 1N2222A

R,82. 3'3OA

R93 S.IK

+ c35 t 4.741F

~~ p,'~ I

R84 8.1.'3 K l"lb

C4VR I TPI4

I I

R74 1.I.5K 1%

C32 ].711F lOOK 1"0 - - .-------~~r-----~+_--~----------------------------..

+24V

R70": I R78 DC MOTOR

POWER DRIVER

R69 1"'1%

10K R.71 c:. QII

101C.

C33 l·I"t,. DC MOTOR ,----------

I I I I

174

(SHTi)

L -= S ~ILICOt.JI){

--- ---- ----- --- ----- ---------- ~~~CC::~J !1M SCHEMATIC DIAGRAM ow qLlMID f'OR AIIII"'Y CHI!

.... 5C

7 6 5 4 3 2 1

D

c

B

A

FIGURE 8·1. SCHEMATIC DIAGRAM, PCB 25227 (SHEET 4 OF 4)

6-916-10 (blank)

D

c

B

A

8 7 6 5 4 3

r ______ ~------------~----------------------------~----~------~~~--------~~R~26~ I 1 +24V

,-_ : s ~6 g~ gf :iK > LI 1 ~~ i\~ 'tf},l~~4Z6 ~i!. fJP C 1.9 ___ ~> >-~ I ~ ~; lOO)J.h -::- ?>5 V ~ I'2V, S% T ...-____ ~o~

SHIELD !2l

2 1

NOTES: UNLESS OTHERWI 02524'-0 SPECIFIED

I. ALL CAPACITORS ARE IN MICROFARADS, SOV) +80-20%

2. ALL DIODES ARE IN4148. J6 I *" I "> R2 ~~i * ~, ~11 ~1 CI r------"',..,..,...--.-~.....J L-_~'I-....... __ z .. O%:":"._--+ ______ +-~LJ1=-To~' t R/w ¢ I rFtRiw07 ,-, 4 CRI.... I 221<. K ""ftRII ""~RI2-,.!tRI3 £~1~ R2~ IOO~F i~ f~ ~I U/~ ... ~~~:;---....., SIDE 0 CT : t : 7" 3 lcR2 ~ i ~~~.l T':.r<; ~ u 3'10 SIJ'~:% 0.' j .'t." T ~-( 'i'~~ ~l

3. ALL RESISTORS ARE IN OHMS, 114W, '3%; D 1% RESISTORS ARE 1/8\'1.

~~ 2 CR3 _ I 5'X. 1"10 ~2 loo,uh c'" R'24 R'2.~ Rll lu C2.0 >- I ,,' > 1 r:::; .2 16 ~2K 2K 101<. r>r

R/W rJ 2 J mgJl I 4 R~11 RlO 91PF RI5 V' IDECI CR4 ""-J I~ S·/D

: HEAD I I IPI I 'ZOO L- IK -Irh I c. 7 R3Z ERASE 0 ~ _ _ _ 1'-- C.RIO~ I 10.1 10K

RjW II I ~ - - ~ 3 CR~ ~ : -:- L.S~ '200 18 I >- I ""7 1 NIl 1 I RE.A!:> C. HAN 1-.1 L '-I f:":l_r-:-:-

SIDE I CT I >- 14 CR~ I0o.I I . 4Jgif 15 VBB : ~ 1""7 ..,..,. 1 5 % i41~:FIN TTPI6 I >- I >~ 5 CR7....... I CIO 7 .... ~FIN DATA 10

RIB L-

4.-o---cr INDICATES CUT-TRACE OPTION. 5. -0 D--INOICI\TES S!/01fT1N6 PLU6 OPTiOH S.~ INDICATES SHORTING PLUG.

( FACTORY INSTALLED). 7. DISTRIBUTE 0.1 CAPACITORS ON +5V

AND +24Y BUS LINES. 8. NPN TRANSISTORS ARE PART OF CA'083. 9. PNP TRANSISTORS ARE PART OF TPQ~906.

10. INDUCTORS ARE j: 10%.

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_ 5T [P ENA8Ll 34 -STEN +D C.H6 llil. 1- DC. ~IU7:~w~--I~=O~2----~~--TRACK 0 ~~~~~f_'a-~-------_r_tti--t---T--------------~------++4---------·~I8~-lK~ +~-LIQ1~t:==:1======~ __ ---------+--11~::::~~·~~l-----~·-~~--~~~ A,":' ~.. OUT I I·UIO.-~

+WRlTf PIlOTeCT~ '" 35 +WP IN + ~.1!.7 '. ~ (5HT I) +RU.D DATA 30 +RD ......... lolUIO. 8

S~t.. I +SfP ~'1!8~---t----t----t__ti==~:E~~J~------~~~ C"'T~) + READ r.NA8LE .A:/OS.JLI--_f-_---1I-+-_---' _IQ CRV'Z. !:::I!L dUIO " (SHT3) -[lIREtTION - _________ -. U6 1-

.~" I ~

r----T-D~~-DE-T--~V--,- -R~,-----+5V~ TPe6. ~~TP~"":, r=-19 FR'f1 2IU8'-~

5 '5 I SOn. .. L» ~ ~ .

-IR~4IO (5HT I)

·WRITE CORon.C.T ( SHT3 44, ~ -WRITe. PROTEC.T

"" 10 )( -TWO SIDE I)

12. )( - OI~K CHANC.,E

42. ,,/ - illACK t/J " 50 '-/ _ &EPARAlEP CLOCK 7"'\:

~ ,,~ - sePARATED DATA

7'""

24" ~ - f)E('TOR

"" 20 ,,/ - INOEl" ~"

.,..... ... "~ +J/q~ V._S~:IND iJL ;:~U8})D .. 1I1 -f-...... ~----!!:!:..*-.. lRK r,d LE.D ~8 U{, 9 745&

5 2,,," 08 & I -TP.~~ L~D -, R58 L-___ I-___ -++_--I-______ ---=~..!:.... _______ -SlOE ZERO ('5MT!I)

,~~e I son. l~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~;;;;;;;;;;~!---~======iI~oJL-----------~",~--+ w p LW ....L.~y:l~.::........JIJ""'"--+~ 1 0

A I ~2... IIluS e 46 >< -p.eAD DATA

- WP LED I V +5V j !8

WP ~T ~I~~~~I~-------+~ -' V '~~~k

INDEl( DET ---, uul2.14 COMMON DI V

INDEX DET I 3,~I5.a'.'-" 1"" __ -1 ....... ~VPPLY...J R59

:-l "- 130n. +INDEX LED gS 81~"",--...;oy"""_-+---4

B ISIiZ;!. -INDEX LEDS 1 V

1n-7& ~c?.n r::~ + INDEX L&D I

ISEN~R ELEc..,."ONlc..s1 t-_..;;L;.;;;.;;..;;;;.;;..;;.,

1111 (111101 • 7

4

2D UCO 7~

3 C Q~

il

6

" _ mu

IIO'fID SCH;MATIC DIA6RAM

CHIC

E_ .... D

5 4 3 2

D

c

B

A

FIGURE 6-3. SCHEMATIC DIAGRAM, PCB 25249 (SHEET 2 OF 4)

6-21/6-22 (blank)

8 7

D

- DP.I'v E. Se: LE.e T I ~U. ,

- DRIVe. SELECT 2 V 2.8 ,

-DRIVE $eLECT 3 v 30

" -DRIVE ~LECT .. ~ 32. ,

- 'SIDE. SELEC.T v 1+ " c - DIRECTION

- MOTOR ON (- !-lEAD LOAD)

- 1111 use

~ 34-

~18 ~~ ,,, ,,,

-WRITE GATE y 40

"" - WRITE DATA ~ :S8

"

(SHT 2) - WRiTe ~TECT

3 7 -DOOR OPEN I 8 1

DOOP. SWITCH _~ COMMON I v ..L I _

B

+ 0001'\ Ope:N 1

A

1112(11180) ..

6 5

r5V .... 5 V

R¥,5 R86 2. .n. 220n.. ~ r--<

r3~ : ~J~.n. •

-= -=-~ ~ ~

052

~) 053

~~ 05'i

+e~ J ~sv - 14 ~ Ula

r -- ... -- --, 13 , , 220/ : :U9 Iii j

330 : 08 L 10" i- If 4- 5l. []S3

~ '!II

... D

.,.sv 14-j,2

,.... " .,

220/ ! i U9 330 l ~:

". , 5 8

r ..,H 1

4

II

r UIZ

~ 0+ UI2 UIS

, 041l. 12-

.d '-.11 I

I ~ .It 00

"'M-UI8 UliQ 4,UIS

I "\3 -;;J '-6

... _NP -;J ~ WP 08

00

3 2

MO

11 U25 NlMO ~

~skt~

I ...R~ +5V ~ 08 4.1K UI2. s UIS

ule .. I"-. ••

04

- NlOTOP. ON

- CAlVE SELECT} (S~T2)

~ DRIVE 5ELEC-J

+ ~IOE 'l.ERo (~I-IT I)

- DIRECTlo", }

- 0;,101:. ZERO (SliT a)

- IN UsE

- WRITE GA"T\O (SI-IT I) (+~E'AD ENABLE)

D

c

B '4-7K RPI

I I +SV

r--;-;-:::;::;:----------------------------------------- IXlOR CJ....~D (~\-\T 2.)

I , I

I 4·7K L J7

4 3 2

A

''''I SCHE'MAT Ie. DIAGRAM

FIGURE 6·3. SCHEMATIC DIAGRAM, PCB 25249 (SHEET 3 OF 4)

6-23/6·24 (blank)

D

c

B

A

8 7 6 5 4 3 2 1

Oa.5~-'

+ 5V .... -----rp---------------------------------------------------------7:....W- ~ALL DE'VIC.E' alAS

:~I I I -- -+2-4-\1 -- -- -- -- ----1-- -- -- -------I I"W-... u. D<\llCE BIAS

., 4 r--::-':'_- --~ I,...-".A~V\~"'?I-~-~~3==::,1-.. ':'~~. ,~~:;. i • f -~~· .. -:-:1:~========~~~~~:+--+1----....:.1.....l,'9~_+,-R-E.-TU-R-ti---__., ,~\3~~lt+-:~db~a~,~-------·~~3~~~a~+--~--~-------~=:t==~'~L-~3~Z/~~ i 5~_~_~_~3 I:,

I fg~ •

• " I I ~~ I. 1 t~:. ~~> :~;: · II 2i-~~ ....... --_t-,-+i...:.4.:....I::~~~~~~~~~~~~+_~I-...::3'_»\9'1__+i-..J "2~~ I 4182 6 :) I ~ .,.-J : I I

I * .~J ~,,~ I I ~ I" 9~"'--t-I~--;::'~o'::"oo:-:-x.----------'G=-t-V - I L -:-:-- - - - - - J I ,i

R~2 +5V 9 U24 J·-=~ .... ---,+".:...I -+-_____ .......... I I lOOK R'=>3 t----.... lo(..,.oo"""·'" e ~l na"l I I

1 9 ~ 3 1 I K _~y25 B I 2. ! Q8 v-1+-+;4~ _____ --+--+,_2~,~~-+-1 --, 9 b I * .~, uZ;~~ .... .!+----6----------_ ...... --..:t"_l1=_il2:::_";I" : ~ is I 1

~~LI--+-~·f~g:-:-oY.,...o-_-_-_-_-_-_-_-_-_~:.te_v_.-___ IDC MOTOR I - IIDC MOTO~-~G.it:i5P{~x) I PHASE CONTROL ________ -.lIPHASE DR\VERS 2.4V~ ___ -+--.J

9 5

D

c

(SHT 2) MOTOR OFF

F.e:.. I ., 8 RIOI

$: 51.l1.

nn9

I v

- jACH (~Hji) 1------C.5-:- -- -- -- -- -- -- ---=t -- ---- ---- -f---+::>AVI .047,~ RID" RlO7 "' ..

~~--J\IIIIt-----~II-------..--J..c-I;-t~ C!~OW. 150K .I<~ J .r~2,,8 I ~~,~_~Q5 I •. fOOl<. /~ '~IP3tt C51

II : .L I r------;\~.'" J t- f': tr 4·7<lIF I U23 > R 100 ',,=,'/ j5V ~~ •

'-1---........ T .---~----+---t_---------=-tl rL-- I ?~~.lI. '0". ..v -.. I J ~C21j ~ R79

I l._.LU-P ,!; 10 IK 010 e4.VR

,'! NEe I ~ lN~222A I T C29 r---------...:..::.t 12 • R.80 ~~ •

.. '" ~ .2..~. AI 1\ 1 TP 14-I ... 7~ ,,-., R7~ ~ fAPCI043C. C34 II'. R82. R94 I I II~ :~: ~::2 ~ .. it~ I ;- 1.. 1,047AJI-=: .!= '2.7Jl. 8.1.'.5K 1%

1174 I .01 J..~6~ - R77 - I

B

,.-1 +l:70~~'t' J_ ~!; .Tl ..: .;~ . .,. i, IDe. MOTOR I fft... i I ~5 10K FI."?I C!t,1=D QI\ ~K lOOK r- PO~ ~~ __ -=- ____ --.II

(SIH Z)<DLOC'I(---l----........!-~-=t 101(. S 1£ ~ DC MOTOR I I

(!) TP9 L ________ "='_ ~_I_~'"1_C~_IX __ _ ,o_~ ~ ____ S_?E._E_D_CO_N_T_RO_L __ J J '" q:;;~~~~~~~~~'_~"q' ••••••••••• A

8112(12/71) • 7 6 5 • 3 2

TIT\I SCHEMATIC DIAGRAM RlLIAtID '011 AIIIMI&,V

CHK

1

FIGURE 8·3. SCHEMATIC DIAGRAM, PCB 25249 (SHEET 4 OF 4)

6-25/6·26 (blank)

D

C

B

8 7 6 5

+ RD. DATA 30

-2T

+FS/-TS

1 L.f=; ~qJ VLu

~

~J ~J r-

~ 26 '\J III

at)--

31 J t:::r-

-TKQjQj

+IN!-OUT

CRY I

CRY2

18

Ef.il411 L; ~ 29

CLOCII 19

1 ~"TOII r.y:r LfT If ir=L> ~L "f--

"r---20 Flf--+OUT EN

-STEP

-STEP EN

27 F2r--

tcr <3r--

~ -33

34

-POR

551

SS~

I. ~ER

@- A 0

[D-iU I +INO~

+INDI

c{>--, -c{) ~

VDD

a- 0

~~~ ~

R

I I I I

1 :0 Q 1f 0-~ -tJ ~

----i> ~

.---DR CL 4

+05 40

4 3 2

1

~ I ~

.....--..

~ ~ ~ 1<

~~ k?f~:~('

~~~ YDD c"W T~

I L I

~~ ~~e-l1n"!:U

~ ~~I~~ ~J ~

D Q DQ

~ YDD

~ La RD D Q

II A if

37

38

25

24

23

§J 17

~

7

8

9

§]

"

1

+SEP CLOCK

+SEP DATA

MI

M2 M3 M4

+TKrj~ OUT

-T40

-TWO SIDE

+INO

+5EC

+0 CHG

+ROV

-00

D

c

B

+WPIN~-------------------------------------------------------------------------------------------------------------------------------~-WPOUT

FIGURE 6·4. LOGIC EQUIVALENT, PIN 16271·X, LOCATION U13

6·27/6·28 (blank)

-STEP

-DRIVE SELECT

+ READY ENABLE

+ INDEX 14

r----------------, ---1 I Q I

16ms

0 0 0

C R C a R

+TRUE READY

+ READY

+UTS

TACH 16~~--1-------~------_+----~~~~

-DOOR CLOSED

+ SECTOR

+INOO

-MOTOR ON

-MOD

-IN USE

1.25 MHZ CLOCK

D Q ~---------------~ 24 + HS/-SS

6 ms

BINARY COUNTER = 16 '--__________ -1 C

H-~o

I I

~_[}-{J __ l::J _______ ~ NOTE: USED ON PCB ASSEMBLIES 25227-X AND 25247-X.

FIGURE 6·5. LOGIC EQUIVALENT PIN 51420, LOCATION U14

6-29/6-30 (blank)

+ MOTOR ON OUT

-DOOR LOCK

720 Hz

39231-21

7.1 DESCRIPTION

SECTION VII ILLUSTRATED PARTS CATALOG

The Illustrated Parts Catalog (lPC) is arranged so that the figure will always precede the parts listing and, when possible, will appear directly above the parts list or on the left hand page immediately preceding it.

The first number in the list will always refer to the figure number. The second number will refer to the reference number of the part within the figure.

Part numbers enclosed in parentheses refer to parts belonging to a Next Higher Assembly (NHA) and are of impor­tance only to those customers with alternate assemblies. Following the descriptions of these parts, the designation NHA PIN gives the part n umber of the assembly to which they pertain. When applicable to the customer's assembly, these alternate parts will be used in lieu of the part listed directly above them. Assume that the quantity per assembly for these alternate parts is the same unless otherwise listed.

When an assembly is referred to within a figure and a further breakdown is shown on another figure, then the referenced figure will be called out.

7 _2 INDENTED LEVEL

The parts list is indented to show the levels of assembly within a figure. The major assembly will always be unindented. All parts or assemblies that attach to the assembly will be indented one space. Parts within these assemblies will be indented two spaces and so on.

7.3 QUANTITY PER ASSEMBLY

The quantity listed is the quantity used on the major assembly. Major assemblies themselves will never have a quantity listed.

7-1

1

~1T I

5

6 (SEE FIG. 7·2)

10

4

FIGURE 7 ·1. SA810/860 DISKE TIE DRIVE • EXPLODED VIEW (SHEET 1 OF 3) 39231-26/1

7·2

FIGURE & REF NUMBER

1-Ref 1 2 3

4 5 6 7 8 9 10 11

SA810/860 DISKETTE DRIVE ASSEMBLY

PART NUMBER

51370 12175 51358 25227 25247 25249 12087 51357 51360 12107 12501 51380 51523 12129

DESCRIPTION

SA81O/860 DISKETTE DRIVE • SCREW, Machined, 4-40 x 0.188 in. • TOP SHIELD • PCB ASSEMBLY (see figure 7 -4 ) • PCB ASSEMBLY (see figure 7-5 ) • PCB ASSEMBLY (see figure 7-6 ) • SCREW, Phillips Pan Head, 6-32 x 0.25 in. • BOTTOM SHIELD • TOP PLATE ASSEMBLY (see figure 7-2 ) • SCREW, Phillips Pan Head, 4-40 x 0.31 in. • EXT. TOOTH LOCK WASHER, #6 • FRONT PLATE ASSEMBLY • KNOB, Painted • SCREW, Set, 4-40 x 0.188 in., Black Oxide Finish

7-3

QTY PER ASM

4 1 1 1 1 6 1 1 4 2 1 1 2

SA810/860 DISKETTE DRIVE ASSEMBLY (CONT.)

FIGURE QTY & REF PART PER NUMBER NUMBER DESCRIPTION ASM

1-12 51499 • INDEX EMITTER ASSEMBL Y 1 13 12523 • WASHER, Flat, #6 3 14 12102 • SCREW, Phillips Pan Head, 6-32 x 0.31 in. 2 15 51369 • DISK EJECT ASSEMBL Y 1 16 12088 • SCREW, Phillips Pan Head, 6-32 x 0.375 in. 3 17 10013 • WASHER, Flat 3 18 51498 • TRK 00 WRITE PROTECT SENSOR ASM. 2 19 15663 • TAB, Faston 1 20 54625 • ADJUSTMENT PLATE 1 21 51501 • STEPPER MOTOR ASSEMBL Y 1 22 51244 • STEPPER MOTOR CLAMP 1 23 51407 • BIAS SPRING BUTTON ASSEMBL Y 2 24 51500 • DOOR LOCK SOLENOID ASSEMBL Y 1 25 54433 • GUIDE ROD 1 26 51246 • GUIDE ROD CLAMP 2 27 51280 • ACTUATOR ASSEMBL Y, 860 1

51333 • ACTUATOR ASSEMBLY, 810 28 51413 • CABLE ROUTING CLAMP 1 29 10023 • NUT 1 30 11934 • SCREW, Hex Socket Head Cap, 4·40 x 0.75 in. 1

7·5

34

FIGURE 7·1. SA810/860 DISKETTE DRIVE, EXPLODED VIEW (SHEET 3 OF 3) 39231·2613

7-6

FIGURE & REF NUMBER

1-31 32 33 34 35 36 37 38 39 40

SA810/860 DISKETTE DRIVE ASSEMBLY (CONT.)

PART NUMBER

51265 51243 10816 51520 51364 51282 51288 12537 10817 12123

DESCRIPTION

• SPINDLE, Machined • RING • BEARING, Flanged • BASE, Machined • MOTOR, Spindle • SPACER, Bearing • SPACER, Spring • SPRING • BEARING • SCREW, Machined, Self-Locking

Pan Head Phillips, 6-32 x 0.25 in.

7-7

QTY PER ASM

1 1 1 1 1 1 1 1 1

1

7-8

TOP PLATE ASSEMBLY

FIGURE QTY & REF PART PER NUMBER NUMBER DESCRIPTION ASM

2-Ref 51360 TOP PLATE ASSEMBL Y 1 1 51262 • TOP PLATE MACHINED ASSEMBL Y 1 2 51341 • SHIM 1 3 51342 • SPRING, Shaft 1 4 51242 • STOP, Door Lock 1 5 12126 • SCREW, Machined. 4-40 x 0.312 in. 1 6 11305 • FASTENER, Ring-Retaining 1 7 12088 • SCREW, 6-32 x 0.375 in. 1 8 12523 • WASHER. Fiat #6 1 9 51497 • INDEX DETECTOR ASSEMBLY 1 10 51363 • CAM SHAFT ASSEMBLY 1 11 12102 • SCREW, Machined. 6-32 x 0.312 in. 1 12 51567 • STOP. Shaft 1 13 51361 • COLLET ASSEMBL Y 1 14 51292 • SPRING, Return 1 15 51249 • SPRING, Leaf 1 16 51343 • SHAFT, Clamp 1 17 12043 • SCREW, Set, 4-40 x 0.125 in. 2 18 51266 • LEVER 1 19 51566 • SPRING, Side Load 1 20 12118 • SCREW. Machined. 2-56 x 0.375 in. 2 21 51596 • DOOR CLOSED SWITCH ASSEMBL Y 1 22 51296 • BAR, Lever 1 23 51509 • BAIL ASSEMBL Y 1 24 12071 • SCREW, Machined. 4-40 X 0.250 in. 2 25 10013 • WASHER, Flat. #6 2 26 12087 • SCREW. Machined, 6-32 x 0.250 in. 2

7-9

39231·28

FIGURE 7·3. ACTUATOR ASSEMBLY, EXPLODED VIEW

7-10

ACTUATOR ASSEMBLY

FIGURE QTY & REF PART PER NUMBER NUMBER DESCRIPTION ASM

3-Ref 51280 SA860 ACTUATOR ASSEMBL Y

51333 SA810 ACTUATOR ASSEMBLY 1 11934 • SCREW, Hex Socket Head Cap, 4-40 x 0.75 in. 1 2 51351 • DOWN STOP ASSEMBL Y 1 3 54646 • 860 ARM ASSEMBL Y, Side 1 1

51359 • 810 ARM ASSEMBLY, Side 1 4 10814 • BEARING BALL 2 5 51353 • CARRIAGE ASSEMBLY 1

7-11

illS :8 ..

c.. C ceO (J)::D _ ~ en 0 I'.) -4 en

00 - .. 0~0~Qoa80008 8~08~ o .. o~o .. omu ooo:>~:

• W N ~ ~ _

-c:::::J- :II -c:::::J-- -c:::::J-C43 C45 ... C44 CJ--B-'-.~ C3::=L::::::1-rC42 -L::{40 l;;

~ ________________________ ~ C37 ~

C38 C°"3- C41

O~C8~-c~ c .. .,

~ 0 N 0 - 0 CR21 -cJl-§- 0 ; > N CR20

.. CR19 R5; -c::J- =B CR14

8::0

t3: ci ='~== ~ n- 'OR33 I- a: ~::

M -O~ (' I U · "0 ~~~ ~ u: 8' 0 ~ ~"";I;;,.Rr'-:j::~:~=--~WL ::: U ! R54 e s- 8 ~ z ~2 ~~: R45 R::

4 ~i ~: ... 0 R65q co 0 0 OR85 "0 m Q 1ii RR3319 C~il nc 1 fi

~ R67 D ~~ ( ~ = = C14 R43 R12 C28 fi ' .... _ .I co '" R40 R44 C25 N I ~ "" ,,0 R42 R27 C=a=C36 C26 , / fi 8" - R41 R26 R66 R70 "'~ 0 0 '" LCR16 R68 ~ - R64 Jll 1 r Cl1

C27 -c='- -c::J- -L.....-.J- R29 C12 ;;0

" fi 0 - .. "b

C34 c39 R76 -r=:J-

-ct}-C35

R73 R7~1 __________________________________________________ -....

(~ o en

R17 R15 R18 R32 R21 C20 R20 C13 C18 R16 C19 C8

CR 15 -c::::::8-CII

R28

R22

1==t R23 :.t=:::=} C30

-c::J- L2

-c::J- C6

-c::J- 11 § C4 C7 R24 R25 C5

o 0-

0'"

~o

C N .... o 0

o " ;: 0 ...

FIGURE 7·4. PCB (PIN 25227)

7-12

CSO R47 R48 R30

R59 CA17

PCB ASSEMBLY 25227

Ref Part Des Number Description Qty

4-Ref 25227 PCB 1 Ref 25247 PCB 1 C-1 15075 CAP., 0.022IJ.F, 50 V, 10% 1 C-2-4,6-8, 12, 13, 15080 CAP., O.lIJ.F, 50 V, +80-20% 29

15,16,18,19,21, 25,26,28,33,36, 40-50

C-5 15109 CAP., 560 pF, 50 V, 5% 1 C-9,31,53 15121 CAP., 4.7 IJ.F, 35 V, 20% 3 C-lO, 11 15096 CAP., 150 pF, 50 V, 5% 2 C-14,27,32,39 15073 CAP., O.OlIJ.F, 50 V, 10% 4 C-17 15069 CAP., O.OOlIJ.F, 50 V, 10% 1 C-20 15123 CAP., 91 pF, 50 V, 5% 1 C-22,23,24 15019 CAP., 0.0027 IJ.F, 200 V, 10% 3 C-29 15124 CAP., 0.033IJ.F, 50 V, 5% 1 C-30 15054 CAP., 100 pF, 50 V, 5% 1 C-34 15100 CAP., 0.047 IJ.F, 25 V, 10% 1 C-35 10088 CAP., 1IJ.F, 35 V, 10% 1 C-37,38,51 15125 CAP., 4.7 IJ.F, 50 V, 20% 3 CR-1-14 10062 DIODE, 1N4148 14 CR-15 15922 DIODE, 1N5242B, Zener, 12 V, 5% 1 CR-16 15902 DIODE, 1N5231B, Zener, 5.1 V, 5% 1 CR-17-21 15900 DIODE, 1N4003 5 CR-23 15936 LED 1 J-2 17788 CONNECTOR, 5 Pos., DC 1 J-3 19177 CONNECTOR, 16 Pos. 1 J-4,5,8 17784 CONNECTOR, 6 Poos. 3 J-6 17790 CONNECTOR, 6 POSt 1 J-7 17782 CONNECTOR, 6 POSt 1 J-9 17787 CONNECTOR, 13 POSt 1 L-1,2,3 10084 INDUCTOR, Shielded, 100 IJ.H 3 Q-1 17619 TRANSISTOR, MPS 2222A 1 Q-2,4,lO 10059 TRANSISTOR, 2N2222A 3 Q-3 17623 TRANSISTOR, Tip 32 1 Q-5 10060 TRANSISTOR, 2N2907 1 Q-6,7,8 12769 TRANSISTOR, SG3635P 3 Q-9 17615 TRANSISTOR, Tip 33 1 Q-11 17629 TRANSISTOR, Siliconix 174 1 R-1,47,57,58 16777 RES, 150 11, 1/4 w, 5% !l R-2,3,78 10131 RES, 22 k, 1/4 w, 5% 3 R-4,42,46,53, 10111 RES, 4.7 k, 1/4 w, 5% 7

64,89,90 R-5 10115 RES, 6.8 k, 1/4 w, 5% 1 R-6,7,16 10110 RES, 2.4 k, 1/4 w, 5% 3 R-8,20,68 16722 RES, 100 k, 1/4 W, 5% 3 R-9,l0 16989 RES, 3000,3 W, 5% 2 R-12 16902 RES, 1.37 k, 1/8 w, 1 % 1

7·13

PCB ASSEl\rIBLY 25227 (CONY.) Ref Part Des Number Description Qty

R-13 16701 RES, 4.99 k, 1/8 w, 1 % 1 R-14 16979 RES, 17.4 k, 1/8 w, 1 % 1 R-15,34,35.38.39, 10108 RES. 1 k, 1/4 w. 5% 11

49,61-63.79.80 R-17.18 16831 RES, 200, 1/4 w, 5% 2 R-19 16914 RES, 13.7 k, 1/8 w. 1% 1 R-21.32,66,70, iOl13 RES, 10 k, 1/4 w, 5% 6

71,94 R-22,23,82 16749 RES, 390 O. 1/4 w, 5% 3 R-24,25.36,44,45 10109 RES, 2 k, 1/4 w, 5% 5 R-26 16915 RES, 9.53 k, 1/8 w, 1 % 1 R-27 16818 RES, 2.15 k, 1/8 w, 1 % 1 R-28 16987 RES, 27q 0, 1 w, 5% 1 R-29 16926 RES, 2200,3 w, 1% 1 R-30,59 16839 RES, 1300, 1/4 w, 5% 2 R-31 16980 RES, 7500, 1/8 w, 1 % 1 R-33 16866 RES, 7.50 k, 1/8 w, 1 % 1 R-37 16755 RES, 7500, V4 w, 5% 1 R-40 17058 RES, 2.32 k, 1/8 w, 1 % 1 R-41 16922 RES, 7.15 k, 1/8 w, 1 % 1 R-43 16928 RES, 10.7 k, 1/8 w, 1 % 1 R-48,51 16824 RES, 4700, 1/4 w, 5% 2 R-50 16984 RES, 5600, 3 w, 5% 1 R-52 16988 RES, 680, 1 w, 5% 1 R-54 16822 RES, 1 M 0,1/4 w, 5% 1 R-55.56 16981 RES, 900, 3 w, 5% 2 R-65 10118 RES, 2.2 k, 1/4 w, 5% 1 R-67 17041 RES, 150 k, V4 w, 5% 1 R-69 16762 RES, 1.00 k, 1/8 w, 1 % 1 R-73 17072 RES, 110 k, 1/8 w, 1 % 1 R-74 16873 RES. 21.5 k, 1/8 w, 1 % 1 R-75 16769 RES, 15 k, 1/4 w, 5% 1 R-76 10107 RES, 5600, 1/4 w, 5% 1 R-77 17003 RES, 100 k, 1/8 w, 1 % 1 R-81 16787 RES, 24 k, 1/4 w, 5% 1 R-83 16768 RES, 5.1 k, 1/4 w, 5% 1 R-84 17061 RES, 8.25 k, 1/8 w, 1 % 1 R-85,86 10103 RES, 2200, 1/4 w, 5% 2 R-87,88 16838 RES, 3300, Ij4 W, 5% 2 R-91-93 16834 RES, 200 k, Ij4 W, 5% 3 R-95 16728 POT., 1000, 3/4 W, 10% 1 R-96 17071 RES, 220, Ij4 w, 5% 1 RP-1 16978 RES, 4.7 k, Sip, 8 Pin 1 U-1 16244 IC, NE592N 1 U-2 16278 IC, Read LSI 1 U-3 16270 IC, Write LSI 1 U-4 12674 IC, CA3083 1 U-5 12640 IC, TPQ3906 1 U-6,20,22 16274 IC,74LS02 1 U-7,8,10,19 16207 IC,7438 4 U-9 16837 RES, 220/330, Terminator, Dip 1 U-11 12772 IC, Sprague-ULN 20658 1

7-14

PCB ASSEMBLY 25227 (CONT.) K@f Part Des Number Description Qty

U·12 16201 IC,7404 1 U-13 16271 IC, Drive Logic 1 U-14 51420 IC, Gate Array 1 U-15,24 16273 IC,74LSOO 3 U-16 16258 IC,7414 1 U-17 12770 IC,74LS321 1 U-18 16233 IC,7408 1 U-21 12610 IC,75462 1 U-23 12771 IC, NEC·UPC 1043C 1 U-25 12656 IC,74LS32 1 U-26 16227 IC, LM339 1 U-27 16274 IC.74LS02 1 W/U-9 15672 SOCKET, 14 Pin 1 W/U-13 15691 SOCKET, 40 Pin 1 W/U-14 17789 SOCKET, 24 Pin 1 Y-1,2 15702 CRYSTAL, 5 MHz 2

7·15

CJ5

R8~ " / g

FIGURE 7·5. PCB (PIN 25247)

7·16

C2 R3 C3 C I R I

CJ6

§ U :;;R22Q: R~ :crB

L 2 -c::::::::::J­-c:::::=r C 6 CI1

C5~

RI7 RIS -RI8

L I -c::::::::::J-

~2~ g~ R25 c5

R21

CI3

CI8 RI6 CI9

C8

RJ2

C20 RlO

CRI5~

C9

R28

~ -c:::::J-

R9'

-c:::::J- C 50

R~8 § R'7

Rlo ( '" RSS ~ /""

CRI7

@! '­..

8lD

39231·31

PCB ASSEMBLY 25247

Ref Part Des Number Description Qty

5-Ref 25227 PCB 1 Ref 25247 PCB 1 C-1 15075 CAP., 0.022JLF, 50 V, 10% 1 C-2-4,6-8,12,13, 15080 CAP., O.lJLF, 50 V, +80-20% 29

15,16,18,19,21, 25,26,28,33,36, 40-50

C-5 15109 CAP., 560 pF, 50 V, 5% 1 C-9,31,53 15121 CAP., 4.7 JLF, 35 V, 20% 3 C-lO,ll 15096 CAP., 150 pF, 50 V, 5% 2 C-14,27,32,39 15073 CAP., O.OlJLF, 50 V, 10% 4 C-17 15069 CAP., O.OOlJLF, 50 V, 10% 1 C-20 15123 CAP., 91 pF, 50 V, 5% 1 C-22,23,24 15019 CAP., 0.0027 JLF, 200 V, 10% 3 C-29 15124 CAP., 0.033 JLF, 50 V, 5% 1 C-30 15054 CAP., 100 pF, 50 V, 5% 1 C-34 15100 CAP., 0.047 JLF, 25 V, 10% 1 C-35 10088 CAP., 1JLF, 35 V, 10% 1 C-37,38,51 15125 CAP., 4.7 JLF, 50 V, 20% 3 C-52 15029 CAP., 0.047 JLF, 50 V, 10% 1 C-54 15128 CAP., 470 pF, 50 V, 5% 1 C-56 15115 CAP., 82 pF, 50 V, 5% 1 CR-1-14 10062 DIODE, 1N4148 14 CR-15 15922 DIODE, 1N5242B, Zener, 12 V, 5% 1 CR-16 15902 DIODE, 1N5231B, Zener, 5.1 V, 5% 1 CR-17-21 15900 DIODE, 1N4003 5 CR-23 15936 LED 1 J-2 17788 CONNECTOR,S Pos., DC 1 J-3 19177 CONNECTOR, 16 Pos. 1 J-4,5,8 17784 CONNECTOR, 6 Pos. 3 J-6 17790 CONNECTOR, 6 Pos. 1 J-7 17782 CONNECTOR, 6 Pos. 1 J-9 17787 CONNECTOR, 13 Pos. 1 L-1,2,3 10084 INDUCTOR, Shielded, 100 JLH 3 Q-1 17619 TRANSISTOR, MPS 2222A 1 Q-2,4,10 10059 TRANSISTOR,2N2222A 3 Q-3 17623 TRANSISTOR, Tip 32 1 Q-5 10060 TRANSISTOR, 2N2907 1 Q-6,7,8 12769 TRANSISTOR, SG3635P 3 Q-9 17615 TRANSISTOR, Tip 33 1 Q-11 17629 TRANSISTOR, Siliconix 174 1 R-l,47,57,58 16777 RES, 1500, 1/4 W, 5% 4 R-2,3,78 10131 RES, 22 k, 1/4 W, 5% 3 R-4,42,46,53, 10111 RES, 4.7 k, 1/4 W, 5% 7

64,89,90 R-5 10115 RES, 6.8 k, 1/4 W, 5% 1 R-6,7,16 10110 RES, 2.4 k, 1/4 w, 5% 3 R-8,20,68 16722 RES, 100 k, 1/4 w, 5% 3 R-9,1O 16989 RES, 300 0, 3 w, 5% 2 R-12 16902 RES, 1.37 k, 118 w, 1 % 1

7·17

PCB ASSEMBLY 25247 (CONT.) Ref Part Des Number Description Qty

R-13 16701 RES, 4.99 k, 1/8 w, 1 % 1 R-14 16979 RES,17.4k,1/8w,l% 1 R-15,34,35,38,39, 10108 RES, 1 k, 1/4 w, 5% 11

49,61-63,79,80 R-17,18 16831 RES, 200, 1/4 w, 5% 2 R-19 16914 RES, 13.7 k, 1/8 w, 1 % 1 R-21,32,66,70, 10113 RES, 10 k, 1/4 w, 5% 6

71,94 R-22,23,82 16749 RES, 3900, 1/4 w, 5% 3 R-24,25,36,44,45 10109 RES, 2 k, 1/4 w, 5% 5 R-26 16915 RES, 9.53 k, 1/8 w, 1 % 1 R-27 16818 RES, 2.15 k, 1/8 w, 1 % 1 R-28 16987 RES, 2700, 1 w, 5% 1 R-29 16926 RES, 2200,3 w, 1% 1 R-30,59 16839 RES, 1300, 1/4 w, 5% 2 R-31 16980 RES, 7500, 118 w, 1 % 1 R-33 16866 RES, 7.50 k, 1/8 w, 1 % 1 R-37 16755 RES, 7500, 1/4 w, 5% 1 R-40 17058 RES, 2.32 k, 1/8 w, 1 % 1 R-41 16922 RES, 7.15 k, 1/8 w, 1 % 1 R-43 16928 RES, 10.7 k, 1/8 w, 1% 1 R-48,51 16824 RES, 4700, 1/4 w, 5% 2 R-50 16984 RES, 5600,3 w, 5% 1 R-52 16988 RES, 680, 1 w, 5% 1 R-54 16822 RES, 1 M 0, 1/4 w, 5% 1 R-55,56 16981 RES, 900, 3 w, 5% 2 R-65 10118 RES, 2.2 k, 1j4 w, 5% 1 R-67 17041 RES, 150 k, 1/4 w, 5% 1 R-69 16762 RES, 1.00 k, 1/8 w, 1 % 1 R-73 17072 RES, 110 k, 1/8 w, 1% 1 R-74 16873 RES, 21.5 k, 1/8 w, 1 % 1 R-75 16769 RES, 15 k, 1j4 w, 5% 1 R-76 10107 RES, 5600, 1/4 w, 5% 1 R-77 17003 RES, 100 k, 1/8 w, 1 % 1 R-81 16787 RES, 24 k, 1/4 w, 5% 1 R-83 16768 RES, 5.1 k, 1/4 w, 5% 1 R-84 17061 RES, 8.25 k, 1/8 w, 1 % 1 R-85,86 10103 RES, 2200,1/4 w, 5% 2 R-87,88 16828 RES, 3300, 1/4 w, 5% 2 R-91-93 16834 RES, 200 k, 1/4 w, 5% 3 R-95 16728 POT., 100 0, 3/4 w, 10% 1 R-96 17071 RES, 220, 1/4 w, 5% 1 RP-1 16978 RES, 4.7 k, Sip, 8 Pin 1 U-l 16244 IC, NE592N 1 U-2 16278 IC, Read LSI 1 U-3 16270 IC, Write LSI 1 U-4 12674 IC, CA3083 1 U-5 12640 IC, TPQ3906 1 U-6,20,22 16274 IC,74LS02 1 U-7,8,10,19 16207 IC,7438 4 U-9 16837 RES, 220/330, Terminator, Dip 1 U-ll 12772 IC, Sprague-ULN 20658 1

7-18

PCB ASSEMBLY 25247 (CONT.) Ref Part Des Number Description Qty

U-12 16201 IC,7404 1 U-13 16271 IC, Drive Logic 1 U-14 51420 IC, Gate Array 1 U-15,24 16273 . IC, 74LSOO 3 U-16 16258 IC,7414 1 U-17 12770 IC,74LS321 1 U-18 16233 IC,7408 1 U-21 12610 IC,75462 1 U-23 12771 IC, NEC-UPC 1043C 1 U-25 12656 IC,74LS32 1 U-26 16227 IC, LM339 1 U-27 16274 IC,74LS02 1 W/U-9 ·15672 SOCKET, 14 Pin 1 W/U-13 15691 SOCKET, 40 Pin 1 W/U-14 17789 SOCKET, 24 Pin 1 Y-l,2 15702 CRYSTAL, 5 MHz 2

7-19

"'o",,,,,,, ~ -~ " 0 0 0 •• ,- • "i'ttltJ ~ Q'" ~ ;;DO-~DOD·gi',Qif.lfu0 ~ . ~'" W "-6 :. .... "'-~ ~~ C40 =. p',-=,;. ~'" '~l: + ,~

;r- ~; ~"II§ On=', o:jlf~ ~,: ,:r r r r'''l~ B::' :a .. " o

U '"" ,., u ~ '"=J-

C47

DO': c: R5 1]- R: :;, ~:~ ~ - I I .. ~ R53 c: '" RI02 :a t' " .... ...l-J.-'-'----'-l CR4

~ ~ x '~~-=+h~~~ R55 D CA9

U EtJ C'9 c<s - A38 1===}.5 R3. C5G • g ',,, '" ~ "

A39 II A31

m Q=R8 ~ C25", II> ~ Cil R" CRI6 ~C" C26 - ...m::F - -0.. 0.. L

C52 ...mD NO" R51 lR29

CI2 ~O R66 C29 -c:=:J-:=JiR~71~~RG=<~--l~===Y~ ____________ ______ RG8 R15 ~ -c:J- C5.

C27 U ~ m oOb '" :i: . ... R78 R32

R77 RZI Cil n9 cw . ,. -o ~,. ~ '" C3t==±f- ~C51 ~ R81, ~ ~ R80 L-±t- " /

C35 R8Z §~" AS. RIOI ""E- ~

II> 0

CI8 RIG CI9 C8

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CRZ

C2 C3 RI R4

§ RZ2 R23 C30

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-c=J- L' §I C< C7 RZ< RZ5 CS

510

::~ J==t 1130 =t=} ( : R59 -r:=::J:

-c==t- ~

FIGURE 7·6. PCB (PIN 25249)

.7-20

CRI7

39216-35

PCB ASSEMBLY 25249

Ref Part Des Number Description Qty

6-Ref 25249 PCB C-l 15075 CAP .. 0.022 p.F. 50 V. 10% 1 C-2.3.4.6.7.8.12. 15080 CAP .. Cer. Axial Lead. 0.1 p.F. 50 V. +80-20% 28

13.15.16,18,19, 21.25.26.28.33. 36,40-49

C-5 15109 CAP., 560 pF, 50 V, 5% 1 C-9.31,53 15121 CAP .. 4.7 p.F. 35 V, 20% 3 C-I0,11 15096 CAP., 150 pF, 50 V, 5% 2 C-14,27.32,39 15073 CAP., 0.01 p.F. 50 V, 10% 4 C-17 15069 CAP .. 0.001 p.F, 50 V. 10% 1 C-20 15123 CAP., 91 pF, 50 V, 5% 1 C-22-24 15071 CAP., 0.0027 p.F. 50 V, 10% 3 C-29 15124 CAP .• 0.033 p.F. 50 V. 5% 1 C-30 15054 CAP., 100 pF, 50 V, 5% 1 C-34,52 15100 CAP., Low Temp. Coeff. 2 C-35 10088 CAP., 1 p.F, 35 V, 10% 1 C-37.38,51 15125 CAP .• 4.7 p.F, 50 V, 20% 3 C-54 15128 CAP., 470 pF, 50 V, 10% 1 C-56 15115 CAP., 82 pF, 50 V, 5% 1 CRl-14 10062 DIODE,IN4148 14 CR-15 15922 DIODE, Zener, 1/2 w, 5% 1 C-16 15902 DIODE, Zener 1 CR-17-21 15900 DIODE, Silicone Rectifier 5 CR-23 15936 DIODE, Red LED 1 J-2 17788 CONNECTOR HEADER ASM, Right Angle 1 J-3 19177 CONNECTOR HEADER, 16 Pos. 1 J-4,J-5,J-8 17784 CONNECTOR HEADER, 6 Pos. 3 J-6 17790 CONNECTOR HEADER, 6 Pos. 1 J-7 17782 CONNECTOR HEADER, 6 Pos. 1 J-9 17787 CONNECTOR HEADER, 13 Pos. 1 L-1,2,3 10084 INDUCTOR, Shielded, 100 p.H 3 Q-1 17619 TRANSISTOR, NPN, Sig, PN2222A 1 Q-2,4,1O 10059 TRANSISTOR, 2N2222A 3 Q-3 17623 TRANSISTOR, PNP, Power, Tip-32 1 Q-5 17624 TRANSISTOR, PNP, Power, Tip-34 1 Q-6,7,8 12769 I.C., 3635 3 Q-ll 17629 P-Channel, JFET, J174 1 R-1,47 ,57 ,58,67 16777 RES, Fixed, 150 n, 1/4 w, 5% 4 R-2,3 10131 RES, Fixed, 22 k, 1/4 w, 5% 2 R-4,42,46,53, 10111 RES, Fixed, 4.7 k, 1/4 w, 5% 7

64,89,90 R-5 16889 RES, Fixed, 4.87 k, 1/8 w, 1 % 1 R-6,7,16 10110 RES, Fixed, 2.4 k, 1/4 w, 5% 3 R-8,20,68, 77.78 16722 RES, Fixed, 100 k, 1/4 w, 5% 5 R-9,1O 16989 RES, Fixed, 300 n, 3 w, 5% 2 R-12 16902 RES, Fixed, 1.37 k, 1/8 w, 1 % 1 R-13 16701 RES, Fixed, 4.99 k, 1/8 w, 1 % 1 R-14 16979 RES, Fixed, 17.4 k, 1/8 w, 1% 1

7-21

PCB ASSEMBLY 25249 (CONT.)

Ref Part Des Number Description Qty

R-15.34.35.38.39. 10108 RES, Fixed, 1 k. 1/4 W, 5% 12 49,61.62.63. 69,79.80

R·17,18 16831 RES, Fixed. 200 n, lj4 w. 5% 2 R·19 16914 RES, Fixed, 13.7 k, 1/8 w, 1 % 1 R-21.32.66, 70, 71, 10113 RES, Fixed, 10 k, 1/4 W, 5% 6

94 R·22,23 16749 RES, Fixed, 390 n, 1/4 w, 5% 2 R·24,25.36,44,45. 10109 RES, Fixed, 2 k, 1/4 w, 5% 6

97 R-26 16915 RES, Fixed, 9.53 k, 1/8 w, 1 % 1 R-27 16818 RES, Fixed, 2.15 k, 1/8 w, 1 % 1 R·28 16987 RES, Fixed, 270 n, 1 w, 5% 1 R-29 16926 RES, Fixed, 220 n, 3 w, 1 % 1 R-30,59 16839 RES, Fixed, 130 n, 1/4 w, 5% 2 R-31 16980 RES, Fixed, 750 n, 1/8 w, 1 % 1 R-33 16866 RES, Fixed, 7.50 k, 1/8 w, 1 % 1 R·37 16755 RES, Fixed, 750 n, 1/4 W, 5% 1 R-40 17058 RES, Fixed, 2.32 k, 1/8 w, 1 % 1 RA1 16922 RES, Fixed, 7.15 k, 1/8 w, 1 % 1 R-43 16928 RES, Fixed, 10.7 k, 1/8 w, 1 % 1 R-48,51 16824 RES, Fixed, 470 n, 1/4 W, 5% 2 R-50,100 16984 RES, Fixed, 560 n, 3 w, 5% 2 R·52 16988 RES, Fixed, 68 n, 1 w, 5% 1 R-55,56,102 17079 RES, Fixed, 130 n, 3 w, 5% 3 R-65 10118 RES, Fixed, 2.2 k, 1/4 w, 5% 1 R-73 17072 RES, Fixed, 110 k, 1/8 w, 1 % 1 R-74 16873 RES, Fixed, 21.5 k, 1/8 w, 1 % 1 R-75 16769 RES, Fixed, 15 k, 1/4 w, 5% 1 R-76 10107 RES, Fixed, 560 n, 1/4 W, 5% 1 R-81 10106 RES, Fixed, 510 n, 1/4 w, 5% 1 R-82 17015 RES, Fixed, 27 n, 1/4 w, 5% 1 R·84 17061 RES, Fixed, 8.25 k, 1/8 w, 1 % 1 R-85,86 10103 RES, Fixed, 220 n, lj4 W, 5% 1 R-87,88 16838 RES, Fixed, 330 n, 1/4 w, 5% 2 R·91,92,93 16834 RES, Fixed, 200 k, 1/4 w, 5% 3 R-95 16728 POT., Cermet, 100 n, 3/4 w, ± 10% 1 R-96 16932 RES, Fixed, 22 n, 1/2 w, 5% 1 R-98 17076 RES, Fixed, 62 k, 1/4 w, 5% 1 R-99 16885 POT., 2 k, 1/2 w, ± 10% 1 R-101 16891 RES, Fixed, 51 n, 1/4 W, 5% 1 RP-1 16978 NETWORK RESISTOR ARRAY, Sip, 4.7 k 1 U-1 16244 IC, Amplifier, NE592N 1 U-2 16278 IC, Read Amplifier 1 U-3 16270 IC, Write Channel 1 U-4 12674 IC, Transistor Array 1 U-5 12640 IC, Transistor (Quad, PNP) 1 U-6,18 16233 IC,7408 1 U-7,8,lO,19 16207 IC, "/438 4 U-9 16837 RES, Pack, 220 n/330 n 1 U·ll 12772 IC,2065 1 U-12 16201 IC,7404 1 U-13 16271 IC, Drive Logic 1 U·14 51420 IC, Drive Logic 1 U-15,24 16273 IC,74LSOO 2

722

PCB ASSEMBLY 25249 (CONT.)

Ref Pari Des Number Description Qty

U-16 16265 Ie, 7414 1 U-17 12770 Ie, 74LS321 1 U-20 16203 Ie, 7474 1 U-21 12610 Ie, Peripheral Driver, 75462 1 U-23 12771 Ie, 1043 1 U-25 12656 Ie, 74LS32 1 U-26 16227 QUAD VOLTAGE COMPARATOR 1 W/U-9 15672 SOCKET, IC (Dip), 14 Pin 1 W/U-13 15691 SOCKET, IC (Dip), 40 Pin 1 W/U-14 17789 SOCKET, IC (Dip), 24 Pin 1

7·23

TABLE 7·1. PART NUMBER TO FIGURE REFERENCE CROSS REFERENCE

Part Figure Part Figure Part Figure Number Reference Number Reference Number Reference

10013 1-17 12087 1-4 15075 4-C1 2-25 2·26 5-C1

10023 1-29 12088 1-16 6-C1 10059 4-02 2·7 15080 4-C2

5-02 12102 1-14 5-C2 6-02 2-11 6-C2

10060 4-05 12107 2-5 15096 4-C10 10062 4-CR1 12118 2·20 5-C10

5-CR1 12123 1-40 6·C10 6-CR1 12126 2-5 15100 4-C34

10084 4-L1 12129 1-11 5-C34 5-L1 12175 1-1 6-C34 6-L1 12501 1-9 15109 4-C5

10088 4-C35 12523 1·13 15115 5-C56 5-C35 2-8 6-C56 6-C35 12537 1-38 15121 4-C9

10103 4-R85 12610 4-U21 5-C9 5-R85 5-U21 6-C9 6-R85 6-U21 15123 4-C20

10106 5-R81 12640 4-U5 5-C20 6-R81 5-U5 6-C20

10107 4-R76 6-U5 15124 4·C22 5-R76 12656 4-U25 5·C22 6-R76 5-U25 6·C22

10108 4-R15 6-U25 15125 4-C37 5-R15 12674 4-U4 5-C37 6·R15 5-U4 6·C37

10109 4-R24 6·U4 15128 5-C54 5-R24 12769 4·06 6-C54 6-R24 5·06 15663 1·19

10110 4-R6 6-06 15672 4-W/U9 5-R6 12770 4-U17 5-W/U9 6-R6 5-U17 6·W/U9

10111 4-R4 6-U17 15691 4·W/U13 5·R4 12771 4-U23 5-W/U13 6-R4 5-U23 6-W/U13

10113 4-R21 6·U23 15702 4·Y1 5-R21 12772 4-U11 15900 4·CR17 6-R21 5-U11 15902 4·CR16

10115 4-R5 6-U11 5·CR16 10118 4-R65 15019 4-C22 6·CR16

5-R65 15029 5-C52 15922 4·CR15 6-R65 15054 4·C30 5-CR15

10131 4·R2 5-C30 6-CR15 5·R2 6·C30 15936 4·CR23 6-R2 15069 4-C17 5-CR23

10814 3-4 5-C17 6·CR23 10816 1·33 6-C17 16201 4-U12 10817 1-39 15071 5·C22 5·U12 11305 2-6 6-C22 6-U12 11934 3-1 15073 4·C14 16203 5-U20 12043 2-17 5-C14 6-U20 12071 2-24 6-C14

39231·29/1

7-24

TABLE 7·1. PART NUMBER TO FIGURE REFERENCE CROSS REFERENCE (CONT.)

Part Figure Part Figure Part Figure Number Reference Number Reference Number Reference

16207 4·U7 16818 4·R27 16978 4·RP1 5·U7 5·R27 5·RP1 6·U7 6-R27 6-RP1

16233 4·U18 16822 4-R54 16979 4-R14 16244 4·U1 16824 4-R48 5-R14

5-U1 5-R48 6-R14 6-U1 16828 5-R87 16980 4-R31

16227 4-U26 6-R48 5-R31 5-U26 16831 4-R17 6-R31 6-U26 5-R17 16981 4-R55

16258 U-16 6-R17 16984 4-R50 16265 5-U16 16834 4-R91 5-R50

6-U16 5-R91 6-R50 16270 4-U3 6-R91 16987 4-R28

5-U3 16837 4-U9 5-R28 6·U3 5-U9 6-R28

16271 4-U13 6-U9 16988 4-R52 5-U13 16838 4-R87 5-R52 6-U13 16839 4-R30 6-R52

16273 4-U15 5-R30 16989 4-R9 5-U15 6-R30 5-R9 6-U15 16866 4-R33 6-R9

16274 4-U27 5-R33 17003 4-R77 5-U6 6-R33 17015 5-R82

16278 4-U2 16873 4-R74 6-R82 5-U2 5-R74 17041 4-R67 6-U2 6-R74 17058 4-R40

16701 4-R13 16885 5-R99 5-R40 5-R13 6-R99 6-R40 6-R13 16889 5-R5 17061 4-R84

16722 4-R8 6-R75 5-R84 5-R8 16891 5-R101 6-R84 6-R8 6-R101 17071 4-R96

16728 4-R95 16902 4-R12 17072 4-R73 5-R95 5-R12 5-R73 6-R95 6-R12 6-R73

16749 4-R22 16914 4-R19 17076 5-R98 5-R22 5-R19 6-R98 6-R22 6-R19 17079 5-R55

16755 4-R37 16915 4-R26 6-R55 5-R37 5-R26 17615 4-09 6·R37 6-R26 17619 4-01

16762 4-R69 16922 4-R41 17623 4-03

16768 4·R83 5-R41 17624 5-05

16769 4·R75 6-R41 6-05 5-R75 16926 4-R29 17629 4-011 6·R75 5-R29 5-011

16777 4·R1 6-R29 6-011 5·R1 16928 4-R43 17782 4-J7 6-R1 5-R43 5-J7

16787 4-R81 6·R43 6-J7 16932 5-R96

6-R96

39231·2912

7-25

TABLE 7·1. PART NUMBER TO FIGURE REFERENCE CROSS REFERENCE (CO NT.)

Part Figure Part Figure Part Figure Number Reference Number Reference Number Reference

17784 4·J4 51413 1·28 5-J4 51420 4·U14 6·J4 5·U14

17787 4·J9 6·U14 5-J9 51497 2·9 6-J9 51498 1·18

17788 4·J2 51499 1·12 5·J2 51500 1·24 6·J2 51501 1·21

17789 4·W/U14 51509 2·23 17790 4·J6 51520 1·34

5·J6 51523 1·10 6·J6 51566 2·19

19177 4·J3 51567 2·12 5·J3 51596 2·21 6-J3 54433 1·25

25227 1·3 54625 1·20 4·Ref 54646 3-3

25247 5-Ref 25249 1·3

6-Ref 51242 2·4 51243 1·32 51244 1·22 51246 1·26 51249 2·15 51262 2·1 51265 1·31 51266 2·18 51280 1·27

3-Ref 51282 1·36 51288 1·37 51292 2·14 51296 2·22 51341 2·2 51342 2·3 51343 2·16 51351 3-2 51353 3·5 51357 1·5 51358 1·2 51359 3-3 51360 1·6

2·Ref 51361 2·13 51363 2·10 51364 1·35

1·41 51369 1·15 51370 1·Ref 51380 1·9 51407 1·23

38231·2913

7·26

7.4 RECOMMENDED SPARE PARTS STOCKING GUIDE

The spare parts stocking guide is broken down into three levels. These levels are: Site or Field Support Engineer (level 1), Branch Office (level 2), and Depot or Headquarters (level 3). The quantities listed assume that the Site is replenished by the Branch immediately and the Branch replenished by the Depot within 30 days.

The inventories that the levels can maintain are:

Site Branch Depot

1 to 20 machines 1 to 100 machines

Depot only parts Branch replenishment

Unlimited Same as Branch ratio

The calculated failure rates for major parts are as shown in table 7-2.

Table 7-3 shows the spare parts required to support the SA81O/860 in the field.

TABLE 7·2. CALCULATED FAILURE RATES

PART NUMBER DESCRIPTION

25247 PCB

51364 DRIVE MOTOR

51353 HEAD CARRIAGE ASSEMBLY

FAILURE RATE FAILURES/UNIT/MONTH

0.023

0.005

0.010

39231·24

TABLE 7·3. SPARE PARTS STOCKING GUIDE

PART QUANTITY PER LEVEL NUMBER DESCRIPTION SITE BRANCH DEPOP

10814 BEARING, Ball 2

10816 BEARING, Flanged 1 1 1

10817 BEARING 1 1 1

12537 SPRING 1

25227 PCB 1 4 4

25247 PCB 1 4 4

25249 PCB 1 4 4

51242 STOP, Door Lock 1 1

51243 RING 1

51244 STEPPER MOTOR CLAMP 1

39231·2511

7·27

TABLE 7·3. SPARE PARTS STOCKING GUIDE (CONT.)

PART QUANTITY PER LEVEL NUMBER DESCRIPTION SITE BRANCH DEPOT·

51246 GUIDE ROD CLAMP 1

51249 SPRING, Leaf 1

51262 TOP PLATE MACHINED ASSEMBLY 1

51265 SPINDLE, Machined 1

51266 LEVER 1

51282 SPACER, Bearing 1

51288 SPACER, Spring 1

51292 SPRING, Return 1

51296 BAR, Lever 1

51341 SHIM 1

51342 SPRING, Shaft 1

51343 SHAFT, Clamp 1

51351 DOWN STOP ASSEMBLY 1

51353 CARRIAGE ASSEMBLY 1 1

54433 GUIDE ROD 1

51357 BOnOM SHIELD 1

51358 TOP SHIELD 1

51359 ARM ASSEMBLY, Side 1 (SA810 Only) 1

51360 TOP PLATE ASSEMBLY 1 1

51361 COLLET ASSEMBLY 2 2

51363 CAM SHAFT ASSEMBLY 1 1

51364 DC DRIVE MOTOR 1 1

51369 DISK EJECT ASSEMBLY 1 1

51380 FRONT PLATE ASSEMBLY 1

51407 BIAS SPRING BUnON ASSEMBLY 1

51413 CLAMP, Cable Routing 1

39231·2512

7·28

TABLE 7·3. SPARE PARTS STOCKING GUIDE (CaNT.)

PART QUANTITY PER LEVEL NUMBER DESCRIPTION SITE BRANCH DEPOT*

51498 TRK 00 WRITE PROTECT SENSOR ASM. 1 1 1

51498 WRITE PROTECT DETECTOR 1 2 2

51499 INDEX EMITTER ASSEMBLY 2 2

51500 DOOR LOCK SOLENOID ASSEMBLY 1 1

51501 STEPPER MOTOR ASSEMBLY 1 1

51509 BAIL ASSEMBLY 1 1

51523 KNOB, Painted 1

51497 DETECTOR INDEX ASSEMBLY 1 2 2

54646 ARM ASSEMBLY, Side 1 (SA860) 1 1

·Depot parts listed are unique to the depot only. Stocking levels to support Branch stocks should be added. 39231-25/3

7-29/7·30 (blank)

SECTION VII CUSTOMER INSTALLABLE OPTIONS

7.1 INTRODUCTION

The SA810/860 can be modified by the user to function differently than the standard method outlined in Sections I and II. These modifications can be implemented by adding or deleting connections and by use of the alternate I/O pins. Some options are capable of peing connected by use of a shorting plug, Shugart PIN 15648 or AMP PIN 53013·2. This section will discuss a few examples of modifications and how to install them. The modifications discussed in the following paragraphs are:

a. External Write Current Switch b. Two-Sided Status Output (SA860 only) c. Disk Change Option d. Side Select Option Using Direction Select (SA860 only) e. Side Select Option Using Drive Select (SAR60 only) f. In Use Alternate Input g. Motor On Without Selecting Drive h. Motor On by Optional Motor On and Drive Select i. Motor Off Delay j. Radial Ready k. Stepper Power Down I. Write Protect Optional Use

Table 7· 1 summarizes these options and the component designators indicating their PCB location in figure 7 -1 and 7·2.

7-1

TABLE 7·1. CUSTOMER CUT/ADD TRACE OPTIONS

TRACE SHIPPED FROM FACTORY DESIGNATOR DESCRIPTION

OPEN SHORT

U9 TERMINATIONS FOR MULTIPLEXED INPUTS PLUGGED

SI INTERNAL WRITE CURRENT SWITCH PLUGGED

SE EXTERNAL WRITE CURRENT SWITCH X

TR TRUE READY OUTPUT PLUGGED

RTR RADIAL TRUE READYt X

2S TWO-SIDED STATUS OUTPUr" X

DC DISK CHANGE OPTION X

S1 SIDE SELECT OPTION USING DIRECTION SELECT'" X

S2 SIDE SELECT INPUT"' ~ PLUGGED

S3 SIDE SELECT OPTION USING DRIVE SELECT"·' X

18,28,38,4 B SIDE SELECT OPTION USING DRIVE SELECT'" X

0 ALTERNATE INPUT-IN USE X

MS MOTOR ON FROM DRIVE SELECT' PLUGGED

MO ALTERNATE INPUT-MOTOR ON" X

MMO ALTERNATE INPUT-MULTIPLEXED MOTOR ON"t X

MD MOTOR OFF DELAY X

A READY OUTPUT X

RR RADIAL READY X

SR STANDARD READYt PLUGGED

MT MODIFIED TRUE READYt (OUTPUTS TRUE READY ON PIN 22) X

DS1 DRIVE SELECT 1 INPUT PLUGGED

052,3.4 DRIVE SELECT 2,3,4 INPUT X

Y DOOR LOCK/ACTIVITY LIGHT ACTIVATED FROM MOTOR ONt PLUGGED

z DOOA LOCKJACTIVtTY UGHT ACTIVATED FROM DRIVE SELECTt X

PO STEPPER POWER DOWN X

WP INHIBIT WAITE WHEN WRITE PROTECTED X

NP ALLOW WRITE WHEN WRITE PROTECTED X

T5 DATA SEPARATION OPTION SELECT·' X

• MOTOR ON is the complement of HEAD LOAD on the SA801 and SA8S1 disk drives. The only difference in the operation of MOTOR ON compared with HEAD LOAD is tnat MOTOR ON requires a 165 ms minimum delay (or TRUE READY must be monitored) before RIW activity is begun. HEAD LOAD on the SAB01 and SAB51 requires 35 ms or 50 ms minimum delay.

"" The SA810/860 offers an optional data separator which properly separates data and clock bits through the soft­sectored IBM standard format and address mark area. Trace "TS" offers the optional separator.

" •• Applies to SAS60 only.

t Available on PCB PIN 25249 only. 39216-19-A

7-2

Cl "57

CR'$

CI .. n

-c=J-~ 110 liS.

§D .~ ~

~I

11111111111111: I fl. FIGURE 7·1. PCB COMPONENT LOCATIONS (PIN 25227 AND 25247)

7-3

.... •

wO 0:0-°0 ~O NO

FIGURE 7·2. PCB COMPONENT LOCATIONS (PIN 25249)

7-4

R28~

CR2

C2 C3 AI R4

§ Rll R23 C30

-c:::=J- LZ

-c=:::J- C6

-c:::=J- LI

~ C4 C7 RZ4 RZ5 C5

ON n ~O-

~ ~O

::~ § R30 ( "

R59 -t3- " / CR!7 ..

39216-35

7.2 EXTERNAL WRITE CURRENT SWITCH

This option permits write current switching via the optional WRITE CURRENT SWITCHING interface line (pin 2). When the interface signal is activated to a logical zero level. the lower value of the write current is selected. Selec­ting this option replaces internal write current switching at track 40.

To enable external write current switching. move th~ shorting plug at trace SI to the SE position. See figure 7-3.

+5V

EXTERNAL WRITE _*2 __ --..

...... STANDARD TRACE

~4 DELETED TRACE

..... ADDED OR JUMPERED TRACE

CURRENT SWITCH

SE TO WRITE .TRACK 40-~..."t-I....--~-;_~r:r--~ CURRENT REF

51 39216-21.

FIGURE 7·3. EXTERNAL WRITE CURRENT OPTION

7.3 TWO-SIDED STATUS (OPTIONAL OUTPUT SA860 ONLY)

When the drive is selected and the diskette is spinning. this line will indicate a logical zero level for two sided media. and a logical one for single sided ml.'dia.

To install this option on il standard drive. jumper trace 2S.

7.4 DISK CHANGE (OPTIONAL OUTPUT)

This customer installable. option IS enabled by jumpering trace DC. When DRIVE SELECT is activated, it will pro­vide a true signal (logical zero) onto the interface (pin 12) if. while deselected. the drive has gone from a READY to a NOT READY (door open) condition This line is reset on the true to false transition of DRIVE SELECT if the drive has gone READY. Timing of this line is illustrated in figure 7·4. The circuitry is illustrated in figure 7-5.

-DRV SE!- ----... 1

__ --4rs ·READY •

-DISK CHG------,J,...' ~SIS ........ ~ INTERNAL ENABLE

I

II

• READY will not return until two index transitions after DRIVE SELECT (MOTOR ON).

FIGURE 7·4. DISK CHANGE TIMING

7-5

39216-22

+ 5V

D Q

c ab----f-' 12 b---__ ........... --M- -DISK CHG

·READY I---<ll>----:---~

-DRVSELI-----~----~~-~

39216·23 FIGURE 7-5. DISK CHANGE CIRCUIT

7.5 SIDE SELECTION USING DIRECTION SELECT (SA860 ONLY)

The SIDE SELECT function can be controlled via the DIRECTION SELECT line. if desired. With this option. the DIRECTION SELECT line controls the direc1ion of head motion during stepping operations and controls side (head) selection c!uring read/write operations. To implement this option. simply move jumper 52 to location S 1. Figure 7~6 illustrates the circuitry.

+ DRIVE SELECT

S2 -SlOE SELECT ----I.~II .. --------{>O---+------L-./

S1

-DIRECTION SELECT ----+-----()I>-------SIDE SELECT

FIGURE 7·6. SIDE SELECTION USING DIRECTION SELECT

7.6 SIDE SELECTION USING DRIVE SELECT (SA860 ONLY)

-SIDE 0 CT

-SIDE 1 CT

39216·24

In systems containing ·no mort! than two SA860 drives per controller, each read/write head can be assigned a separate drive address. In such cases. the four DRIVE SELECT lines can be used to select the four read/write heads. To implement this option. move jumper S2 to 53 and add a jumper to nS (n = 1. 2. 3. or 4). For example. the first drive may have jumpers installed at OS 1 an~ 2B while the second drive has jumpers 01 DS~ and 4B. With this jumper configuration installed. the four DRIVE SELECT lines have the folloWing side selection functions:

a. DRIVE SELECT 1 selects side 0 of first drive.

b. DRIVE SELECT 2 selects side 1 of first driw.

C. DRIVE SELECT 3 selects side 0 of second drive.

d. DRIVE SELECT 4 selects side 1 of second nriw.

Figure 7~ 7 illustrates the circuitry.

7-6

+5V ~DRIVE DS1

~ ______________ ~~ \ SELECTINT

1

·DRIVE SELECT

2

3

4

18

28

38

48

83

DS2

DRIVE 8ELECTINT

-SIDE ~~~-----------f').().--~---------t SELECT S2 '---"

FIGURE 7·7. SIDE SELECTION USING DRIVE SELECT

7.7 IN USE ALTERNATE INPUT

-SIDE 0 CT

·SIDE 1 CT

3921~25

This alternate input (pin 16) when activated to a logical zero level enables the Activity LED and door lock latch if the door is closed. If IN USE is low upon deselection, the door remains locked. If IN USE is high upon deselection. the door unlocks. To install this option. jumper trace D and move the shorting plug at trace Y to the Z position.

7.8 MOTOR ON WITHOUT SELECTING DRIVE

This option is useful in disk to disk copy operations. It allows the user to keep the motor on for all drives. thereby eliminating the motor start time. The motor is started on each drive via an Alternate I/O (pin 18). Each drive may have its own MOTOR ON line (Radial or Simplexed) or they may share the same line (Multiplexed). When the drive is selected. alps delay must be introduced or TRUE READY must be monitored before a read or write operation can be performed. To install this option on a standard drive. move the shorting plug at trace MS to the MO position. See figure 7-8.

7-7

32 ·DRIVE SELECT 4 -*)(----------~T~-Il

30 I ·DRIVE SELECT 3 -*"M ----------7

1-1t---((

·DRIVE SELECT 2 -MM------2-8----+1---11i--+l---ll

.DRIVE SELECT 1 ~____,-----2-6--------i;---+-----!-__ --I

~~ ~1 ~1u; Q 0 Q Q

---~ II II II

+5V

MS

OPTIONAL SIDE SELECT FROM DRIVE SELECT

~-....... ·MOTOR ON

ALTERNATE I I/O PINS

·MOTOR ON

2 Ie

M 4

6 ,. 18

2 .. -------~ ---4'---.... '. • _______ JI

-------'1 ___ 6 ___ J1 .. -------.1

II

18 II II 1\ II

NOTE If the MOTOR ON line is multiplexed. the terminator pack at U9 must be remov· ed from each drive except the last on the line. The current requirement is the + 24 Vall current times the number of drives on the tine that have MOTOR ON active.

FIGURE 7·8. MOTOR ON WITHOUT SELECTING DRIVE CIRCUIT

7.9 MOTOR ON BY OPTIONAL MOTOR ON AND DRIVE SELECT

39216·26

This option would be advantageous to the user who requires one drive to be selected at all times. but does not wish to keep the motor on for all drives. In this configuration. the dc spindle motor is controlled from DRIVE SELECT and the optional MOTOR ON line. The advantage of this option would be that the output control signals could be monitored without spinning the diskette thereby extending the head and media life. When the system requires the drive to perform a read or write. the controller would activate the MOTOR ON line (pin 18) which in turn would activate the spindle motor. After the MOTOR ON line is activated. a 165 ms delay must be introduced or the TRUE READY line must be monitored before a read or write operation can be performed.

To install this option on a standard drive. move the shorting plug at trace MS to the MMO position. Figure 7·9 iI· lustrates the circuitry.

7.10 MOTOR OFF DELAY

This jumper option delays the spindle motor from turning off for 16 revolutions (2.6 seconds) after the DRIVE SELECT or optional MOTOR ON signal goes false (high). This allows the user to be able to read or write within llts after the drive has been reselected. thereby eliminating the motor start time. This option is advantageous for the user who wishes to perform copy routines. but does not wish to use the optional MOTOR ON input signal.

To enable the MOTOR OFF DELAY on the standard drive. jumper trace MD.

7·8

-DRIVE SELECT 4 )( 32

-DRIVE SELECT 3 M 30

·DRIVE SELECT 2 w 28

·DRIVE SELECT 1

OPTIONAL SIDE SELECT FROM DRIVE SELECT

ALTERNATEj 1/0 PINS

·MOTOR ON

26

+5V

2 2 ~*f--""';4---tl·R::::.:: =4-= :::, .. ---JIIMi-----iIII •• ::.:: == =:: =~: _",*""_6~ ___ .. - __ 6 ___ .J I

)f .. -------11 18 II

~~....;.;;;...---18 II II II

2 i l I 1 I I 1 i

V~ Mi 1-CJ) CJ) CJ) (/) o 0 0 0

II II "

NOTE

..... STANDARD TRACE

111'4 DELETED TRACE

.-.. ADDED OR JUMPERED TRACE

MS

MMO .... ____ ·MOTOR ON

MO

If the MOTOR ON line is multiplexed. the terminator pack al U9 must be remov· ed from each drive except the last on the line. The current requirement is the + 24 Volt current times the number 01 drives on the line that have MOTOR ON active.

39216·27

FIGURE 7·9. MOTOR ON BY OPT. MOTOR ON AND DRIVE SELECT CIRCUIT

1.11 RADIAL READY

This option enables the user to monitor the READY line of each drive on the interface. This can be useful in detec· ting when an operator has removed or installed a diskette in any drive. Normally. the READY line from a drive is only available to the interface when it is selected.

To install this option on a standard drive. the following traces should be deleted or added:

a. Cut trace RR.

b. Cut trace R.

c. Add a wire from R to one of the Alternate I/O pins.

NOTE

One of the drives on the interface may use pin 22 as its READY line. therefore steps band c may be eliminated on this drive. All the other drives on the interface must have their own READY line. therefore steps band c must be incorporated.

Figure 7 ~ 10 illustrates the circuitry.

7·9

+5V

+ DRIVE SELECT ?I--___ .., A __ -~---ll""""" R 22 ~--------------~~r~J~. __ ------~H~ -READY

+ READY ~-------~ __ ~

FIGURE 7·10. RADIAL READY CIRCUIT

7.12 STEPPER POWER DOWN

11 II II 11 II II 2 1'- --::II-.-----H-­Ij---....

2 I(

II .. II 4 I,:' -::.-':I,.---'-----'-~

4 M

II

" 6 '':-= = = .......... "'--------"-"*-6

M

39216·28

If the user wishes to step the drive at a step rate of 6 ms or slower. enabling this option will allow the drive to main­tain a low noise emission level.

To install this option on a standard drive. jumper trace PD.

7.13 WRITE PROTECT OPTIONAL USE

As shipped from the factory. the write protect feature will internally inhibit writing when a write protected diskette is installed. With this option installed. a write protected diskette wilrnot inhibit writing. but it will be reported to the in­terface. This option may be useful in identifying special lise diskettes.

To install this option on a drive with t he write protect feature. the following traces should be added or deleted.

a. Cut trace WP.

b. Connect trace NP.

Figure 7·11 illustrates the circliitry.

-WRITE PROTEC"T ~I-------~.----------------il TO INTERFACE

WNpP :::----D~----I - ( TO WRITE CURRENT

~~----------~.-----

39216·29

FIGURE 7·11. WRITE PROTECT CIRCUIT

7-10