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The top documents tagged [iccad04 slide]
The Synthesis of Cyclic Circuits with SAT and Interpolation By John Backes and Marc Riedel ECE University of Minnesota
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Routing Track Duplication with Fine- Grained Power-Gating for FPGA Interconnect Power Reduction Yan Lin, Fei Li and Lei He EE Department, UCLA Partially
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Leakage Efficient Chip-Level Dual-Vdd Assignment with Time Slack Allocation for FPGA Power Reduction Yan Lin and Lei He EE Department, UCLA Partially supported
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TBS: Fast Analysis of Structured Power Grid by Triangularization Based Structure Preserving Model Order Reduction Hao Yu, Yiyu Shi and Lei He Electrical
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