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The top documents tagged [subthreshold leakage]
lec14 DTMOS
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® 1 Exponential Challenges, Exponential Rewards The Future of Moores Law Based on lecture of Shekhar Borkar Intel Fellow Circuit Research, Intel Labs
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Jan M. Rabaey Low Power Design Essentials ©2008 Chapter 3 Power and Energy Basics
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Background for Leakage Current Sept. 18, 2006 March 4, 2008
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IRJET-Evaluation path way of Schmitt Trigger with Leakage Reduction Techniques
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® 1 Exponential Challenges, Exponential Rewards— The Future of Moore’s Law Based on lecture of Shekhar Borkar Intel Fellow Circuit Research, Intel Labs
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FinFETs: From Circuit to Architecture Niraj K. Jha Dept. of Electrical Engineering Princeton University Joint work with: Anish Muttreja, Prateek Mishra,
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