tan-008 - electronicos caldas · tan-008 5 rev. 1.05 after the cid information has been displayed,...

TAN-008

...the analog plus companyTM

Designing Caller IdentificationDelivery Using XR-2211 For U.S.

Rev. 1.051995

EXAR Corporation, 48720 Kato Road, Fremont, CA 94538 (510) 668-7000 FAX (510) 668-7017

1

June 1997-3

INTRODUCTION TO CALLER ID

The Caller ID feature is an on-hook capability thatprovides the user information about the caller beforeactually answering the call. The information displayed isa data message sent from the central office to the CPEusing simplex VDI-1 (Voice Band Digital Interface) duringthe silent interval and after the first 20Hz ringing burst.The data contains the date (month and day), time (hourand minutes), and calling party number information in oneof three forms:

a) 2 to 10 digit extensionb) privacy indication for those calling parties which do not want their number displayedc) out-of-area indication if the calling number can not be recovered for an on-screen display

VDI-1 is specified in terms of three architectural layers(physical, datalink and presentation layers). TheXR-2211 is primarily concerned with the physical layerinterface requirements, which refers to the electrical andprocedural characteristics that the CO uses to physicallyconnect to the CPE. It is concerned solely withtransmitting a stream of bits, without regards to meaningor structure. The data link layer provides the proceduralcharacteristics that allow the CO to transfer completeunits of information to the CPE and the presentation layerdefines the general content and syntax needed totransmit recognizable information.

MESSAGE FORMAT

Caller ID information is sent to the CPE in the silentinterval after the first ringing phase. The central officewaits half a second after the ringing before startingtransmission of the data, and completes the transmissionhalf a second prior to the next ringing signal. FSK data is

sent to the CPE as a single or multiple message format(see Figure 1 & Figure 2 ). All Caller ID messages arepreceded by a 250msec channel seizure sequence(01010101 pattern). This signal is sent at the beginning ofeach message to alert the CPE of the coming information.This is then followed by a 150msec of ones (1200Hz),intended to aid in “conditioning” the receiver for data. Themessage begins with the message type in one bytesequence (see Table 1). After that, a message length ordata word count value of 9 through 18 specifies thenumber of data words that are going to be transmittedfollowing this word. This number does not include thecheck sum word which follows the last data word.

Caller ID information bits are grouped into 8-bitcharacters preceded by a start bit (logical 0) and followedby a stop bit (logical 1) (see Figure 1 ). Data words aresent as ASCII characters without parity. The first eightwords of data contain date (month and day) and local time(hour and minutes) two characters each. Word 11through 20 carries the calling party information. Thecalling party information can be a 2 to 10 digit number oran ASCII alpha character indicating “P” for privacy or “O”for out of area. The last byte is a check sum word which isused by the CPE to insure the integrity of the receiveddata. The check sum word consists of 2’s complement ofthe module 256 sum of all the words transmitted from theCO including the message type, message length anddata words. The CPE then derives the sum and adds thisto the check sum. Any result other than zero indicates thatthe information was not received correctly. (see Table 1)

Multiple data message formats include additionalparameter information. Each parameter is a series ofdata words specifying parameter type, parameter lengthand parameter data as described in Figure 2.

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Rev. 1.05

Word # SignificationBinary Contents 7 6 5 4 3 2 1 0 Description Dec. Value Hex Value

Mod. 256 inHex

1 Msg. Type 0 0 0 0 0 1 0 0 CND1 04 04 04

2 Length 0 0 0 1 0 0 1 0 18 18 12 16

3 Month 0 0 1 1 0 0 0 0 0 48 30 46

4 0 0 1 1 0 1 0 0 4 52 34 7A

5 Day 0 0 1 1 0 0 1 0 2 50 32 AC

6 0 0 1 1 1 0 0 0 8 56 38 E4

7 Hour 0 0 1 1 0 0 0 1 1 49 31 15

8 0 0 1 1 0 0 1 1 3 51 33 48

9 Minutes 0 0 1 1 0 0 1 0 2 50 32 7A

10 0 0 1 1 0 0 0 0 0 48 30 AA

11 Calling Number 0 0 1 1 0 1 0 0 4 52 34 DE

12 0 0 1 1 0 0 0 0 0 48 30 OE

13 0 0 1 1 1 0 0 0 8 56 38 46

14 0 0 1 1 0 1 0 0 4 52 34 7A

15 0 0 1 1 0 0 1 1 3 51 33 AD

16 0 0 1 1 0 1 0 0 4 52 34 E1

17 0 0 1 1 0 1 1 0 6 54 36 17

18 0 0 1 1 0 1 0 0 4 52 34 4B

19 0 0 1 1 0 0 0 0 0 48 30 7B

20 0 0 1 1 0 0 0 0 0 48 30 AB

21 Checksum 0 1 0 1 0 1 0 1 Checksum2 85 55 55

Notes1 CND = Calling Number Delivery 2 Calculated Checksum + Received Checksum = 0 AB + 55 = 0 Mod 256

Table 1. Example of Caller Identification Coding

The demodulation of the FSK signals are done accordingto Bell 202A specifications which are:

Link Type: Simplex

Modulation Scheme: Phase Coherent FrequencyShift Keying

Logical 1 (Mark): 1200+/-12Hz

Logical 0 (Space): 2200+/-22Hz

Transmission rate: 1200 bits per second

Data: Serial, Binary, Asynchronous

Transmission Level: -13,5+/-1dBm into 900Ω

Table 2. Bell 202A Specifications

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Rev. 1.05

2 sec0.5 sec

Ring Signal (20Hz)

575 msec

4 sec

0.5 sec2 sec

Ring Signal (20Hz)

CheckSum Word

1 Byte

Data Words

144 Bits max

Data Word Count

1 Byte

175 msec

MessageType Word

1 Byte

ChannelSeizure Signal

250 msec 150 msec

30 bytesof

1200Hz

All Ones

(01010101)Signal

Month 04 Day 28 Hour 13 Minute 20 Number

DemodulatedData

1200HzCLOCK

Mark STB 0 1 2

10 bits

3 4 5 6 7/P SPB STB 0

STB = Start BitSPB = Stop Bit

Figure 1. Single Data Message Format

(510)668-7000

TAN-008

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Rev. 1.05

4 sec

2 sec

Ring Signal (20Hz)

0.5 sec msec 0.5 sec

Ring Signal (20Hz)

2 sec

CheckData Words

Parameter109 Data Bits

MessageLength ParameterMessageChannel

SeizureAll OnesSignal

250 msec 150 msec

30 bytesof

(01010101)Signal

1200Hz

Type Word

1 Byte 1 Byte

Word

1 Byte 1 Byte

318 msec

1 Byte 1 Byte 144 Bits max

Sum Word

1 Byte

NumberHour 13 Minute 20Day 28Month 04EXAR Rep.

718

Type Word LengthWord

ParameterType Word Length

Word

Parameter

(510)668-7000

Figure 2. Multiple Data Message Format

DESIGN INSTRUCTIONS

The Caller ID demo board design described herein is a“how to” example on building the basic componentsrequired to interface to the telephone line and extract theCO (Central Office) supplied CID (Caller ID) information.The kit includes a set of schematics describing how tointerface to the telephone line and extract the CIDinformation. The kit also includes a small executableprogram that upon receiving the CO provided CIDinformation, converts this information into a form that canbe displayed onto a PC’s CRT. The program when used inconjunction with Bellcore TA-NWT-000030 specificationis a useful reference when designing your own userinterface. The schematics and software discussed hereinwere built, tested and proven to be functional. For BTspecifications, see TAN-009.

EQUIPMENT REQUIRED

The equipment requirement for this user interface is a PC386 or greater, having an RS-232 port. The executable

program provided with the demo board design runs undera DOS environment.

GENERAL OPERATION

The CID information provided by the CO to the CID demoboard is, after being decoded by the demo board, routeddirectly into the PC via the RS-232 port. The PC is used tocontrol whether or not power is applied to the demo board,as well as display the CID information.

While waiting for a CID signal most of the demo board ispowered off. The first event in this sequence to occur is aRing Indication. This initiates the second event which, byway of the software program powers-up most of the demoboard, (this requires that the software program berunning). The demo board is now ready to receive theFSK encoded data sent by the CO. Once the data isdemodulated, the information is then sent from the demoboard via a cable to the PC’s RS-232 port. The programfirst captures and then displays the data on the PC’s CRT.

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Rev. 1.05

After the CID information has been displayed, while stillunder software control, the demo board is then returnedto the powered down state.

POWER SUPPLIES

The demo board design operates on a 6V supply. Thissupply is broken down into 3 separate sub-supplies, also6V supplies. The Ring Indicator circuit is connected to oneof these supplies. This supply is directly connected to 6Vand is always connected.

The balance of the demo board (excluding the RS-232interface, the MAXIM-235) is powered by a switchedsupply. The switched supply is activated by the RingIndication. The MAXIM-235 is powered by the thirdsupply. This scheme allows for easy measurement of thepower consumed by each of the 3 blocks in both thepowered-down and in the active modes. The total currentconsumed at the tip and ring inputs to the demo boardmust be less than 20mA in an off-hook condition, toprevent the CO from sending a dial tone. The on-hookcondition must consume less than 5µA which is 1 ringerequivalent.

INPUT STAGE AND DAA

The first stage (see Figure 4) of the demo board design isthe Input Stage. This stage includes the DAA function andthe Ring Indicator detector. The DAA provides therequired isolation between the demo board andtelephone line while maintaining the ability to extract thedata sent by the CO. The DAA optimally terminates thetelephone line providing the proper Tip and Ringimpedance.

The isolation provided by the DAA is required to preventthe full Ring Indicator voltage (max. 300V peak-to-peakon top of the max. 48V already provided by the CObattery), from damaging the low voltage components ofthe demo board. At the same time, the DAA must rejectany voltage less than the minimum 26V ring voltage as anot valid ring signal. Non-flammable fuse resistors, 10Ωin value, are the first demo board components to comeinto contact with the phone line, providing a fuseprotection in case of over voltage.

In preparing to send CID information, the CO first sends aRing Signal, which puts the demo board on notice that it isabout to receive CID information. The Ring Indicator isused to power up the powered down portions of the demoboard.

The input stage also has a RC high pass filter which doesnot have any appreciable effect on the bandwidth of thefilter stage. The demo board has an AC impedance asseen by the CO of more than 7,000Ω. The only DC inputresistance is created by the leakage of the inputcapacitors, which results in less than 5µA, the 1 ringerequivalent specification. Too small of a DC inputresistance can potentially result in spurious low frequencynoise inadvertently powering up the demo board. Theinput stage acts in part as a DC blocking stage. Note thatdevices on the input stage must be able to withstand amaximum potential of 348V.

FILTER STAGE

The second stage (see Figure 5) of the demo boarddesign is a filtering stage that consists of a band pass filterand an amplifier. The bandpass function is composed of a2nd order Low Pass Active Butterworth filter and a 3rdorder High Pass Active Butterworth filter. This results inan effective -3dB bandpass frequency range of 960 Hz to2850 Hz, (see Figure 8). While an LM-324 was utilizedas the gain element, it should be noted that almost anyamplifier with a reasonably large gain (e.g. >10,000),relatively high input impedance and a moderately highbandwidth (e.g. >100,000 Hz) can be used. The OutputDrive strength should also be large enough to drive thefilter load impedance. The bandpass response and thegain achieved by the filter can be altered by the followingequations. In addition, a gain versus frequency plot of thelow pass filter and of the high pass filter are provided in Figure 8 .

The computer program provided in Reference [2], Figure27 was used to calculate order and component values ofthe Butterworth filters.

Order of the filter is calculated by:

N INT Log10 AMAX10-1

2((10 0.3)-1)Log(Wn) 1

AMAX: Attenuation at the stop band frequency.Wn = F1 / F2 for low pass filter calculation and Wn = FC /F1 for a high pass filter.F1 = Stopband frequency.FC = Cutoff Frequency

Depending on whether the values of N are even or odd, adifferent set of equations will be used. The program will

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6

Rev. 1.05

execute a “For...Next” instruction until all the RC valuesare calculated. Gain at the passband will be unity.

Reference [1], Chapter 8 gives the basic theory aboutactive filters.Reference [3], explains the basics of circuit theory.

The net result can be viewed as a bandpass filter with a 3pole rolloff (60dB/decade) on the low frequency side anda 2 pole rolloff (40dB/decade) on the high frequency side.An additional requirement placed on the first and secondstages is to filter out the 20Hz ring signal and the 60 or 50Hz electric line noise. The demo board design achievesthis by attenuating a 60Hz signal by at least 70dB. Toassure good filter characteristics, 1% resistor and 5%capacitors should be used. If the input stage were to alsobe utilized for its high pass characteristics it too shouldhave similarly controlled resistor and capacitor values.

GAIN STAGE

The third stage (see Figure 5) of the demo board designis a wide band amplifier. The gain is chosen such that withthe worst case signal, 3.0mV rms (-48dBm), the PLL FSKdecoder will still be working and the system will be able toextract the CID information. This stage also utilizes aLM-324 as the gain element. The controlling equations forthe gain stage follow:

Gain RfbRin

Rfb: is the resistor connected from the output to theinverting input of the operational amplifier.

Rin: is the resistor from the signal source to the invertinginput of the amplifier.

PLL, FSK DECODER

The fourth stage (see Figure 6) of the demo board designis the FSK Decoder and Carrier detect stage. This stagetracks the phone line signal that passes through thebandpass filter stage. This stage performs two tasks. Firstit simply detects if a frequency exists in a specific band. Ifso, the Energy Detect signal becomes active. Second itdemodulates the 1200 baud FSK modulation of afrequency in the band from 1200Hz to 2200Hz. Thisdemodulated data constitutes the CID informationmodulated by the CO. Note that Energy Detect must bevalid before any CID information can be considered valid.

This stage utilizes the XR-2211 PLL to perform thisfunction. The XR-2211 center VCO frequency should beadjusted by use of a potentiometer to a geometric meanfrequency of 1625Hz to guarantee a 50% duty cycle at pin7 of the XR-2211.

A note, while it was not done in this demo board design itmay be possible to eliminate the amplifier in the filterstage and utilize the XR-2211 as the principal gain stage.This may require extracting more gain from the filterstages or running the risk of not having enough sensitivityto process low level, -48dBm, signals. Equations for PLLcalculations follow:

C0 1f0 * R0 f0 f1 f2

2

f1, f2: are the mark and space frequencies.

R0: is the frequency control resistor connected at pin 12of XR-2211.

R1 f0 * R0 * 2f2-f1

R1: is the resistor connected from pin 12 to pin 11.

1.25 * C0R1 * C1

ς: is the Damping Factor. R1 in kΩ.

VREF VCC

2 .650

VREF: is the reference voltage at pin 10.

KO 2 * VREF * C0 * R1

K0: VCO Conversion Factor in Radians per second pervolt.

Kd VREF * R110 *

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Rev. 1.05

Kd: Phase Detector Gain in Volts per Radian. R1 in kΩ.

For more information on choosing components for usewith the XR-2211 in a FSK application, contact EXAR andrequest the XR-2211 Application Program andApplication Note.

RS-232 ENCODER

The fifth stage of the demo board consists of aMAXIM-235. The 235 takes the decoded data provided bythe XR-2211 and converts the voltage level provided bythe XR-2211 to a level that is required by the RS-232 portof the PC.

To ensure proper operation, the RS-232 registerscontained within the PC must be available in a timely

manner to be able to begin downloading the CIDinformation stream.

Once the board detects a Ring signal the Carrier Detectsignal becomes active and sends information to the PCthrough the RS-232 interface, then the PC programresponds by turning on the unpowered part of the board,again using the RS-232 interface. Then the system isready to process the information sent by CO.

After receiving the data the program will perform thechecksum test. It will turn off the originally unpoweredsection of the demo board and will show on the screen theCID data or a message if the transmission wasunsuccessful.

Direct Analog Access

CIDUSDAA.SCH

ITIP

PU

RIIN

Input Filter

USINFIL.SCH

ITIP SIGOUT

FSK Decoding

USFSK.SCH

DOUT

EDC

SIGOUT

RS232 Interface

CIDUS232.SCH

DOUT

EDC

RIIN

PURIIN

PU

ITIP

Figure 3. CID for the US Using XR-2211

TAN-008

8

Rev. 1.05

ITIPITIP

C1 0.01µF/400V

VCC

Q22N4403

R182.2K

R21

10K

PUPU

6VBatteryR8

22K

1234

J1

RJ-11

M1

220V

R110/0.5W

R2

10/0.5W

D4

1N4748

TIP R7

8.2K 1 6 5

42

Q1H11AA

C160.47µF

RIINRIIN

C4

0.47µF400V

D3

1N4748

RING

C20.01µF/400V

R468K

+

Figure 4. Direct Analog Access

TAN-008

9

Rev. 1.05

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Third Order High PassPower AmplifierVCC

R5330K

C170.1µF

R104.7K1%

Butterworth

R11226K1%

5

67

U1B

LM324

C7

10nF5%R12232K1%

C5

10nF5%

C6

10nF5%

R912K

1%

3

21

U1A

LM324D2

1N914

D1

1N914

C310nF

R6330K

ITIPR3 68K

D6 1N914

D7 1N914

R15

10K1%

10

98

U1C

LM324

C8

10nF5%

R14

9.31K1%

R13

9.31K1%

Second OrderLow PassButterworth

C94.7nF5%

R17330K

12

1314

U1D

LM324

R16 240K

SIGOUT

Wide BandAmplifier

C181µF

VCC

+

+

-+

-+

Figure 5. Input Filter for U.S. Implementation

TAN-008

10

Rev. 1.05

2

14

13

12

10

8

7

6

5

1

3

4

11

U2

XR-2211

VCC

C19

0.1µF

C20

10µF

R235.1K

(RL)R26

5.1K(RL)

CdRd

R22 470k

C12

6.8µF

R273.3M

C150.1µF

SIGOUT

C1027nF

(C0)5%

EDC

DOUTC11

0.1µF

R1933K

(R1)

1%

R2018K

(RO)

1%

POT1POT 10K

R25

150K(RF) C13

1.8nF

(CF)

R24

1.2M

(RB)

C148.2nF

(C1)

5%

Lock DetectComp

FSK Comp

Internal

Reference

Loop0-Det

Quad0-Det

VCC

Pre Amp

VCO

Figure 6. FSK Decoding U.S. Implementation

TAN-008

11

Rev. 1.05

DOUTDOUT

VCC

12

T1IN 8

T2IN 7

T3IN 15

T4IN 16

T5IN 22

R1OUT 9

R2OUT 6

R3OUT 23

R4OUT 17

R5OUT 14

ENN 20

GND

11

SHDN 21

R5IN 13

R4IN 18

R3IN 24

R2IN 5

R1IN 10

T5OUT19

T4OUT1

T3OUT 2

T2OUT 4

T1OUT 3

U3

MAX235

VEXT

C21

1µF 13

25 12

24 11 23 10 22 9 21

8 20 7

19 6

18

5

17

4 16

3 15

2 14 1

P1

DB25

RI

CDCTS

EDC EDC

RIINRIIN

PUPU

RxD

Figure 7. RS232 Interface

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12

Rev. 1.05

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

0

-20

-40

-60

-80

-100

-120

0 10000 20000 30000 40000 50000 60000 70000 80000 90000 100000

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

0 500 1000 1500 2000 2500 30000

-20

-40

-60

-80

-100

-120

A)

B)

Figure 8. Frequency Response of Input Filter

dB

Frequency

dB

Frequency

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Rev. 1.05

BILL OF MATERIALS

Direct Analog Access

Item Quantity Reference Part Tolerance

1 2 C1,C2 0.01µF 400V

2 1 C4 0.47µF 400V

3 1 C16 0.47µF

4 2 D4,D3 1N4748

5 1 J1 RJ-11

6 1 M1 220V

8 1 Q2 2N4403

9 2 R1,R2 10 0.5W

10 1 R4 68K

11 1 R7 8.2K

12 1 R8 22K

13 1 R18 2.2K

14 1 R21 10K

15 1 6V BATTERY

Input Filter for US Implements


1 1 C3 10nF

2 4 C5,C6,C7,C8

10nF 5%

3 1 C9 4.7nF 5%

4 1 C17 0.1µF

5 1 C18 1µF

6 4 D2,D1,D6,D7

1N914

7 1 R3 68K

8 3 R5,R6,R17 330K

9 1 R9 12K 1%

10 1 R10 4.7K 1%

11 1 R11 226K 1%

12 1 R12 232K 1%

13 2 R13,R14 9.31K 1%

14 1 R15 10K 1%

15 1 R16 240K

16 1 U1 LM324

TAN-008

14

Rev. 1.05

FSK Decoding US Implementation


1 1 C10 27nF 5%

2 3 C11,C15,C19

0.1µF

3 1 C12 6.8nF

4 1 C13 1.8nF

5 1 C14 8.2nF 5%

6 1 C20 10µF

7 1 POT1 POT 10K

8 1 R19 33K 1%

9 1 R20 18K 1%

10 1 R2 470K

11 2 R23,R26 5.1K

12 1 R24 1.2M

13 1 R25 150K

14 1 R27 3.3M

15 1 U2 XR-2211

RS232 Interface

Item Quantity Reference Part

1 1 C21 1µF

2 1 P1 DB25

3 1 U3 MAX235

TAN-008

15

Rev. 1.05

NET LIST OF DEMOBOARD

/N00001 R10(2) U1(6) U1(7) R13(1);/N00002 R10(1) C6(2) C7(1);/N00003 R5(2) C3(2) U1(3) R6(1);/N00004 R3(2) D1(CATHODE) D2(ANODE) C3(1);/N00005 R11(2) C7(2) R17(1) R12(1) U1(5);/N00006 U1(1) U1(2) C5(1);/N00007 C5(2) R9(1) C6(1);/N00008 C8(1) R13(2) R14(1);/N00009 C8(2) U1(9) U1(8) R15(1);/N00010 D7(CATHODE) R15(2) D6(ANODE) R16(1) U1(13);/N00011 R14(2) C9(1) U1(10);/N00012 R17(2) U1(12) C18(1);/N00013 R19(2) R25(1) U2(11) C14(1);/N00014 C15(2) R27(1) U2(2);/N00015 U2(3) C12(1) R22(1);/N00016 U2(14) C10(2);/N00017 C10(1) U2(13);/N00018 R20(1) R19(1) U2(12);/N00019 U2(10) C11(1);/N00020 R20(2) POT1(B);/N00021 U2(8) R25(2) R24(1) C13(1);/RXD-5 U3(3) P1(3);/CD-5 U3(4) P1(8);/RI-5 U3(2) P1(22);

/CTS-5 U3(10) P1(20);/TIP-2 C1(2) R1(2) D4(ANODE);

/N00027 Q2(BASE) R18(1) R21(1);/BAT-2 R18(2) Q2(EMITTER) 6V(+) R8(1);

/N00029 D4(CATHODE) R7(1);/N00030 R7(2) Q1(1);/N00031 J1(2) R1(1);/N000320 J1(3) R2(1);/RING-2 R2(2) C2(1) D3(CATHODE);

/N000340 Q1(2) C4(2);/N00035 D3(ANODE) C4(1);/N000360 C2(2) R4(1);

/ITIP-1 R3(1) C1(1);/PU-1 U3(9) R21(2);

/RIIN-1 U3(15) R8(2) Q1(5) C16(1);/N00040 D7(ANODE) D6(CATHODE) R16(2) U1(14) C15(1);/N00041 R26(2) U2(5) U3(7);/N00042 U2(7) R24(2) R23(2) U3(8);

/VCC U1(4) R11(1) C17(2) R5(1) C19(1) U2(1) C20(1) R23(1) R26(1)Q2(COLLECTOR);

/GND C18(2) C9(2) R12(2) R9(2) R6(2) D2(CATHODE) D1(ANODE) U1(11),C17(1) C14(2) C13(2) POT1(A) POT1(WIPER) U2(4) C11(2) R27(2),R22(2) C12(2) C19(2) C20(2) U3(11) U3(20) U3(5) U3(24), U3(18)U3(13) U3(21) P1(7) U3(16) U3(22) C21(2) R4(2), Q1(4) C16(2) 6V(-);

/VEXT C21(1) U3(12)

TAN-008

16

Rev. 1.05

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Wait For RingSignal

Wake Up CIDCircuitry And

Micro Processor

Start Timer

Power DownMode

“U”Received

TimerOverrun

Load NewTimer Value

ÎÎÎÎÎÎÎÎÎ

AÎÎÎÎÎÎÎÎÎ

B

No

Yes

No

Yes

Begin

Figure 9. Micro Controller Firmware Flow Chart

The following pages are a description in the form of a flow chart, of a typical program that handlesa Caller Identification Delivery Recovery.

TAN-008

17

Rev. 1.05

ÎÎÎÎÎÎÎÎÎÎÎÎ

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

TimerOverrun

ÎÎÎÎÎÎÎÎÎ

AÎÎÎÎÎÎÎÎÎÎÎÎ

B

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ




ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

C

Add 1 To “U” Counter

5 X “U”?

No

Yes

Set New Timer Value

No Yes

No

TimerOverrun

Yes

No

No

Yes

MessageType=

04 HEX

Set New Timer Value

Set Byte Counter

Clear “U”Counter

“U” ?

Wait for Next Character

Figure 10. Flow Chart for Caller ID Processing

TAN-008

18

Rev. 1.05

ÎÎÎÎÎÎÎÎÎÎ

ÎÎÎÎÎÎÎÎÎ

ÎÎÎÎÎÎÎÎÎ

B

No YesTimerOverrun

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

ÎÎÎÎÎÎÎÎÎÎ

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ


C

New ByteReceived

Add To CRC Calculation

-1 To Byte Counter

ByteCount = 0

Calculate CRC

CRC = 0

Display Message

Go ToBegin

Print“Error”

No

No

Yes

Figure 11. Flow Chart for Caller ID Processing (Cont’d)

TAN-008

19

Rev. 1.05

REFERENCES:

[1] Michael G. Ellis. Sr., Electronic Filter Analysis and Synthesis, Artech House, Inc. 1994.

[2] Jack Middlehurst, Practical Filter Design, PrenticeHall, 1993.

[3] Sundaram Seshu and Norman Balabanian, Linear Network Analysis, John Wiley & Sons, Inc., 1959.

[4] Bellcore, Technical Advisory TA-NWT-000030. April 1992.

TAN-008

20

Rev. 1.05

NOTICE

EXAR Corporation reserves the right to make changes to the products contained in this publication in order to im-prove design, performance or reliability. EXAR Corporation assumes no responsibility for the use of any circuits de-scribed herein, conveys no license under any patent or other right, and makes no representation that the circuits arefree of patent infringement. Charts and schedules contained here in are only for illustration purposes and may varydepending upon a user’s specific application. While the information in this publication has been carefully checked;no responsibility, however, is assumed for inaccuracies.

EXAR Corporation does not recommend the use of any of its products in life support applications where the failure ormalfunction of the product can reasonably be expected to cause failure of the life support system or to significantlyaffect its safety or effectiveness. Products are not authorized for use in such applications unless EXAR Corporationreceives, in writing, assurances to its satisfaction that: (a) the risk of injury or damage has been minimized; (b) theuser assumes all such risks; (c) potential liability of EXAR Corporation is adequately protected under the circum-stances.

Copyright 1995 EXAR CorporationDatasheet October 1996Reproduction, in part or whole, without the prior written consent of EXAR Corporation is prohibited.

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...the analog plus companyTM XR-2206-11-12ES

Rev. 1.001996

EXAR Corporation, 48720 Kato Road, Fremont, CA 94538 (510) 668-7000 FAX (510) 668-7017

November 1996-4

XR-2206/2211/2212

Evaluation SystemUser Manual

XR-2206-11-12ES

Rev. 1.00

2

NOTICE

EXAR Corporation reserves the right to make changes to the products contained in this publication in order to im-prove design, performance or reliability. EXAR Corporation assumes no responsibility for the use of any circuits de-scribed herein, conveys no license under any patent or other right, and makes no representation that the circuits arefree of patent infringement. Charts and schedules contained herein are only for illustration purposes and may varydepending upon a user’s specific application. While the information in this publication has been carefully checked;no responsibility, however, is assumed for inaccuracies.

EXAR Corporation does not recommend the use of any of its products in life support applications where the failure ormalfunction of the product can reasonably be expected to cause failure of the life support system or to significantlyaffect its safety or effectiveness. Products are not authorized for use in such applications unless EXAR Corporationreceives, in writing, assurances to its satisfaction that: (a) the risk of injury or damage has been minimized; (b) theuser assumes all such risks; (c) potential liability of EXAR Corporation is adequately protected under the circum-stances.

Copyright 1996 EXAR CorporationUser Manual November 1996Reproduction, in part or whole, without the prior written consent of EXAR Corporation is prohibited.

Table of Contents

Rev. 1.00

3

GENERAL DESCRIPTION 5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

BOARD SCHEMATIC DIAGRAM 5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

COMPONENT CONSIDERATIONS 5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Figure 1. Demo Board Component Layout 6. . . . . . . . . . . . . . . . . . . . . . . Figure 2. XR-2206 Demo Board 7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Figure 3. XR-2211 Demo Board 8. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Figure 4. XR-2212 Demo Board 9. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

XR-2206-11-12ES

Rev. 1.00

4

This Page Intentionally Left Blank

XR-2206-11-12ES...the analog plus companyTM

XR-2206/2211/2212Evaluation System

Rev. 1.00

5

GENERAL DESCRIPTION

This demo board is a blank printed circuit card thatsimplifies design, breadboarding, and test of circuitsusing the XR-2206, XR-2211, or the XR-2212. The 5.0 by4.75 inch board can be used to build practically all of thedatabook application circuits that are given for thesedevices. With the exception of common power feed, eachchip and its associated passive components areindependent circuit blocks on the demo board. Therefore,it can be assembled with any one or more of the chipsaccording to the user’s needs.

BOARD SCHEMATIC DIAGRAM

The schematic diagram contains separate sections forthe XR-2206, XR-2211, and the XR-2212. Circuit designfor a specific application requires using these diagramswhile referring to the appropriate circuits and equationsthat are given for each device in the EXAR databook. Abreadboard section with isolated power and groundbusses is also provided for additional analog or digitalcircuitry that may be required.

The purpose of this schematic is to show the circuitcapabilities for each integrated circuit. Although thecomponent values shown are reasonable and each of the

three devices will function properly with them, they areprovided for illustration only, and are not chosen for anyspecific application. Also, all the parts that are shown maynot be required for a particular circuit since the schematicshows everything that the board can accommodate.

COMPONENT CONSIDERATIONS

The component marking, which is 1:1 scale, givesindividuals who do not have an actual demo board anapproximate idea of component sizes.

Power, input, and output connections are made at padsthat are located close to the associated IC pin orcomponent. Holes for five banana jacks or binding postsare located at the rear of the board. Two of these shouldbe used for power and ground, and the remaining threecan be wired to the I/O pads as needed.

The style of electrical components that the board usesshould be readily available. The potentiometers are theinexpensive vertical-mount PC board type. Resistors are1/4 watt and the bypass capacitors can be 0.1µFmonolithic ceramic type with radial leads spaced 0.1 inch.The electrolytic capacitors are also vertical mount unitswith 0.1 inch lead spacing. The board area provided forthe various timing capacitors should be sufficient for smallmica, polystyrene, or mylar units.

XR-2206-11-12ES

6

Rev. 1.00

Breadboard Area

XR

-2206-11-12 Dem

o Board

SINEOut

AMINP

R9

C5

R1R22

C4

E1C13

R8 R10

R17 R

16 R15

SIGINP

GND

SIGINP

VCOVoltOut

E2VCO QuadOut

C15

C20VCC

C18C2

+

C11C6

VCO IOut

C19R

12R11

R14

R25R

26

R21

C14

C16

C17

R24

R20

R33

R13

C10C

9

XR

–2211

U2

C12

R19R7R6C7

DataOut

SQOutR3

R4

R2

R5+

XR

–2206

U1

XR

–2212

U3

C1+ LockDETOut

R18

C3

Demod OutINPFSK

Figure 1. Demo Board Component Layout

XR-2206-11-12ES

7

Rev. 1.00

1

BJ1VCC

1

BJ2Ground

C13

0.1µF

VCC

1 5

6

7

8

9

11

3

2

13

1415

16

4

10 12

U1

XR-2206

C2

10µF

R8

R9

C4

1AM INP

E1

1FSK INP

C5

0.1µF 1

SINE OUT

1SQ OUT

R1010K

R2222K

C1

1µF

R3

R6

R4

R7

R550K

R1

5.1KVCCR2

5.1KC3

10µF

Date: October 12, 1994

Size: Document Number: Rev:A DB2206.SCH 1.0

Title: Demo Board for 2206-11-12

Fremont, CA 94538

EXAR CORPORATION48720 Kato Road

Sheet 3 of 3

+

+

+

VCOMult. &Sine

Shaper

CurrentSwitches +1

Figure 2. XR-2206 Demo Board

XR-2206-11-12ES

8

Rev. 1.00



Title: Demo Board for 2206-11-12

Fremont, CA 94538

EXAR CORPORATION

VCC

VCC

1

BJ1VCC

1

BJ2Ground

C2

10µFC6

0.1µF

2

14

13 12

10

87

6

5

1

3

4

11

U2

XR-2211

C11

C8

0.1µF1

SIG INP

R17

10K

R16

10K 1

LOCK DETECT

1OUTPUTS

R15

10K

1DATA OUT

R18C7

0.1µFR14

R12

R19

C9

0.1µF

C12

10nF

R11

R13

C10

4.7nF

+

Pre AmpLoop0–Det Lock

DetectComp

VCO

Quad0–Det

FSK CompReference

Internal

48720 Kato Road

Sheet 1 of 3


XR-2206-11-12ES

9

Rev. 1.00

1

BJ1VCC

1

BJ2Ground

VCCC20

0.1µF

2

14

13

12

9

78

15

5

1

10

4 11

3

6

16U3

XR-2212

C2

10µF

E2

C18

0.1µF

1SIG INP

C15

1VCO I OUT

1VCO VOLT OUT

1VCO QUAD OUTPUT

1 DEMOD OUTC19

R26

R20

R24

R21

R23

C17

0.1µF

R26

C14

1nF

C16

4.7nF

+

Op Amp+

-

VCO Quad Out

VCO Current Out

AmpVCO

Pre AmpPhase

Detector

InternalReference



Title:Fremont, CA 94538

EXAR CORPORATION48720 Kato Road

Sheet 2 of 3


Demo Board for 2206-11-12

XR-2206-11-12ES

10

Rev. 1.00

Notes

XR-2206-11-12ES

11

Rev. 1.00

Notes

Rev. 1.001996

...the analog plus companyTM

EXAR Corporation48720 Kato RoadFremont, CA 94538(510) 668-7000, Fax (510) 668-7017Worldwide Web Site: http://www.exar.com

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