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  ARM Cortex A5 and ARM Cortex A7

 

SUBMITTED BY:-

  Name :- Shivam Gupta

  Reg no:-11303231

  Ro no:-!0"

  Se#tion :- $230%

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Declaration

I am here by declare that Term paper and title “ARM Cortex A5 and ARM

Cortex A7  “ Submitted for Microprocessor is entirely my original work and all

the idea and and reference have been duly acknowledge it doen not contain copied

work.

Date : Sign :

  !eg. no : ""#$#%#"

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  &'()*+,-D-M-)T

I take this opportunity to present my votes of thanks to all those guidepost who

really acted as lightening pillars to enlighten our way throughout this term paper 

that has led to successful and satisfactory completion of this study.

+e are really grateful to our /*D for providing us with an opportunity to

undertake this case study in this university and providing us with all the facilities.

+e are highly thankful to Ms. 0indu /anda for her active support1 valuable time

and advice1 wholehearted guidance1 sincere cooperation and painstaking

involvement during the study and in completing the assignment of preparing the

said case study within the time stipulated.

,astly1 +e are thankful to all those1 particularly the various friends 1 who have

 been instrumental in creating proper1 healthy and conductive environment and

including new and fresh innovative ideas for us during the pro2ect1 their help1 it

would have been e3tremely difficult for us to prepare the case study in a time

 bound framework.

 )ame: Shivam upta

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Table of Content Page no

". Declaration %

%. &cknowledgement #

#.Table of content 4

4. Introduction 5

5. /istory 6

6.+hy corte3 &57  89

8.+hy corte3 &8 7 ""

9. ;uture aspect of 'orte3 &5 and &8 """%

. &pplication "#

"$.'onclusion and !eference "4

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I)T!*D<'TI*)

'orte3&5 =rocessor  

The ARM Cortex-A5 processor is thesmallest, lowest cost and lowest power

 ARMv7 application processor.

 As a standalone processor, it is capable ofdeliverin the internet to the widest possiblerane of devices, from smart devices li!ewearables, feat"re phones and low-cost,entr#-level smartphones, to a rane ofpervasive embedded, cons"mer andind"strial devices.

The Cortex-A5 processor is s"pported b# as"ite of optimi$ed %& tareted at mid-ranesol"tions, brinin hihest efficienc# levelsand ease of interation. ARM Mali'-())provides s"pport for *+ vector raphics

thro"h pen' /./ and 0+ raphicsthro"h pen12 34 /./ and *.), while

 ARM &h#sical %& &latforms deliver processoptimi$ed %&, for best-in-classimplementations of the Cortex-A5 processor at ()nm and below.

'orte3&8 =rocessor

The ARM Cortex-A7 processor is the mostpower-efficient m"lti-core processor.TheCortex-A7 powers s"b-/)) entr#-levelsmartphones, as well as a n"mber of hih-end wearable devices. The processor ledthe m"lticore revol"tion for entr#-level andmid-rane mobile smartphones, anddevices based on the 6"ad- and octa-coreconfi"rations are shippin in h"evol"mes. The Cortex-A7 processor isarchitect"rall# alined with the hih-performance Cortex-A/7 and Cortex-A/5

processors, enablin devices based onbi.1%TT13' technolo#.

The Cortex-A7 processor is s"pported b# as"ite of optimi$ed %& tareted at mid-ranesol"tions, brinin hihest efficienc# levelsand ease of interation. All of o"r Mali'mid-rane and hih-end raphicsprocessors can be interated with theCortex-A7, as well as the Mali-5)) videoprocessor and Mali-+&5)) displa#processor. "r pervasive rane of ph#sicaland s#stem %& is also available as standard.

/istory

The ritish comp"ter man"fact"rer Acorn

Comp"ters first developed ARM in the

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/89)s to "se in its personal comp"ters. %ts

first ARM-based prod"cts were coprocessor 

mod"les for the C Micro series of 

comp"ters. After the s"ccessf"l C Micro

comp"ter, Acorn Comp"ters considered

how to move on from the relativel#simple M4 Technolo# :5)* processor to

address b"siness mar!ets li!e the one that

was soon dominated b# the %M &C,

la"nched in /89/. The Acorn Business

Computer  ;AC< plan re6"ired that a

n"mber of second processors be made to

wor! with the C Micro platform, b"t

processors s"ch as the Motorola

:9))) and =ational 4emicond"ctor 

0*)/: were considered "ns"itable, and the

:5)* was not powerf"l eno"h for a

raphics based "ser interface.

 After testin all available processors and

findin them lac!in, Acorn decided it

needed a new architect"re. %nspired b#

white papers on the er!ele# R%4C pro>ect,

 Acorn considered desinin its own

processor. A visit to the ?estern +esin

Center  in &hoenix, where the :5)* was

bein "pdated b# what was effectivel# a

sinle-person compan#, showed Acorn

enineers 4teve @"rber   and 4ophie

?ilson the# did not need massive reso"rces

and state-of-the-art research and

development facilities

?ilson developed the instr"ction set, writin

a sim"lation of the processor in C

asic that ran on a C Micro with a

second :5)* processor. This convinced

 Acorn enineers the# were on the rihttrac!. ?ilson approached Acorns

C3, Bermann Ba"ser , and re6"ested

more reso"rces. nce he had approval, he

assembled a small team to implement

?ilsons model in hardware.

+hy 'orte357The Cortex-A5 processor achieves better 

performance than the ARM//7:D-4

processor, better power and ener#

efficienc# than the ARM8*:3-4, and f"llinstr"ction set and feat"re compatibilit# with

the hiher performance Cortex-A8

processor at one third of the area and

power. %t is the most mat"re, most

confi"rable, smallest, and lowest power 

 ARMv7-A C&E, and provides a hih-val"e

miration path for existin ARM8*:3-4'

and ARM//7:D-4' processor desins.

The Cortex-A5 processor delivers a raneof hih-end feat"res to power and cost-

sensitive applications. These incl"de

m"ltiprocessin capabilit# for scalable and

ener#-efficient performance, optional

@loatin-&oint Enit ;@&E< and =3='

"nits for media and sinal processin, and a

hih-performance memor# s#stem incl"din

confi"rable caches and a Memor#

Manaement Enit ;MME<.

The 'orte3&5

 processor:

The 'orte3&5 is designed for application in

 products which re>uire virtual memory

management for highlevel operating

systems within an e3tremely lowpower

 profile.

(ey target markets incude:

-ntrylevel smartphones

;eature phones

+earable devices

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Mobile payments

Internet of Things ?IoT@

Digital TAs

Smart meters

DAD and audio players

=erformance :

The Cortex-A5 is the smallest and lowest

power applications processor, deliverin rich

f"nctionalit# to hih-performance, power-

sensitive devices. As ARMs most ener#-

efficient ARMv7 applications processor, the

Cortex-A5 ets more wor! done per "nit of 

ener#. This res"lts in loner batter# life and

less heat dissipation in wearable and mobile

devices. The processorFs small ph#sical si$ealso means red"ced man"fact"rin costs,

red"ced s#stem lea!ae and increased low-

cost interation. Compared to the Cortex-A8

processor, the Cortex-A5 achieves more

than 5)G power efficienc# while maintainin

aro"nd 7)-75G of the same performance

level, ma!in it ideal for wearable

technolo#.

;-&T<!-S *; &!M'*!T-B &5

+elivers the pea! performance of 

traditional ARM code while also

providin "p to a 0)G red"ction in

memor# re6"ired to store

instr"ctions.

3ns"res reliable implementation of 

sec"rit# applications ranin from

diital rihts manaement to

electronic pa#ment. road s"pport

from technolo# and ind"str#

partners.

=3= technolo# can accelerate

m"ltimedia and sinal processin

alorithms s"ch as video

encodeHdecode, *+H0+ raphics,amin, a"dio and speech

processin, imae processin,

telephon#, and so"nd s#nthesis. The

optional Cortex-A5 =3= M&3

provides both the performance and

f"nctionalit# of the Cortex-A5

floatin-point "nit pl"s an

implementation of the ARM =3= Advanced 4%M+ instr"ction set for 

f"rther acceleration of media and

sinal processin f"nctions. %t

s"pports a rich set of 4%M+

operations for 9, /:, and 0*-bit

inteer and 0*-bit @loatin-&oint

data t#pes.

+hy 'orte3 &87

The Cortex-A7 processor is a ver# ener#-

efficient applications processor desined to

provide rich performance in entr#-level to

mid-rane smartphones, hih-end

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Cortex-A5<, increasin performance for

lare wor!loads s"ch as web browsin.

%n a *9nm process, the Cortex-A7 can r"n

at /.*-/.:B$, has an area of ).(5mm*

;with @loatin-&oint Enit, =3= and a 0*J

1/ cache< and re6"ires less than /))m? of

total power in t#pical conditions. This lowest

performance profile ma!es it an ideal

standalone processor for a rane of mobile

devices, and means the Cortex-A7 can

"ltimatel# deliver similar performance to the

Cortex-A8 processor at m"ch hiher levels

of power efficienc#.

;-&T<!-S *; &!M

'*!T-B &8

+elivers the pea! performance

of traditional ARM code while

also providin "p to a 0)G

red"ction in memor# re6"ired to

store instr"ctions.

3ns"res reliable implementation

of sec"rit# applications ranin

from diital rihts manaement

to electronic pa#ment. road

s"pport from technolo# and

ind"str# partners.

=3= technolo# can

accelerate m"ltimedia and sinal

processin alorithms s"ch as

video encodeHdecode, *+H0+

raphics, amin, a"dio and

speech processin, imae

processin, telephon#, and

so"nd s#nthesis. The Cortex-A7

M&3 provides an enine that

offers both the performance and

f"nctionalit# of the Cortex-A7Fs

@loatin-&oint Enit ;@&E< and an

implementation of the =3=

 Advanced 4%M+ instr"ction set

for f"rther acceleration of media

and sinal processin f"nctions.

The M&3 extends the Cortex-A7

processors @&E to provide a

6"ad-MAC and additional :(-bit

and /*9-bit reister set

s"pportin a rich set of 4%M+

operations over 9, /: and 0*-bit

inteer and 0*-bit @loatin-&oint

data 6"antities.

Bardware s"pport for @loatin-

&oint operations in half-, sinle-

and do"ble-precision @loatin-

&oint arithmetic. The @loatin-

&oint capabilities of the Cortex-

 A7 processor offer increased

performance for @loatin-&oint

arithmetic "sed in the nexteneration of cons"mer

prod"cts.

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;<T<!- &S=-'T *;

&!M '*!T-B &5 &)D

'*!T-B &8

 ARM has anno"nced Cortex A5 and A7 in

the Cortex A5) series based on ARMv9

architect"re. These ener#-efficient

processors with :(-bit processin

technolo# are also f"ll# compatible with the

extensive ARM 0*-bit ARMv7 ecos#stem.

These processors wo"ld offer better 

performance compared to the existin onesand wo"ld offer new feat"res ranin from

est"re control, a"mented realit#, mobile

amin, web *.) and more. oth these

processors have new power savin feat"res

s"ch as retention modes and more

extensive hierarchical cloc! that wo"ld

a"tomaticall# save power when all or a

partic"lar portion of the processor is idle.

These are based on bi.1%TT13 &rocessin

with hih performance with power efficienc#.

%t wo"ld s"pport "p to /: cores with more in

the f"t"re.

&==,I'&TI*)

 ARM cores are "sed in a n"mber of prod"cts,

partic"larl# &+As and smartphones. 4ome

comp"tin examples are the Microsoft

4"rface, Apples i&ad and A4E4 3ee &ad

Transformer . thers incl"de Apples i&hone

smartphone and i&od portable media

pla#er, Canon &ower4hot A(7) diital

camera, =intendo +4 handheld ame

console and TomTom t"rn-b#-t"rn

naviation s#stem.

Cortex A-5 K-4mall cell basestations ,

dataplane sol"tions , ver# low-cost

webservers .

Cortex A-7K- Macro-basestations , servers ,

B&Cs .

%n *))5, ARM Boldins too! part in the

development of Manchester Eniversit#s

comp"ter, 4pi==a!er , which "sed ARM

cores to sim"late the h"man brain.

 ARM chips are also "sed in Raspberr#

&i, ealeoard, ealeone, &andaoard 

and other sinle-board comp"ters, beca"se

the# are ver# small, inexpensive and

cons"me ver# little power.

'*)',<SI*)

&!M 'orte3 &5

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Bihest performance in mobile power 

envelope

  Complex,o"t-of-order , m"lti-iss"e

pipeline

0x the performance of toda#Fs hih Lend

s"perphones in the same power-b"det.

&!M 'orte3 &8

Most ener#-effiecient applications

processor from ARM

4imple,in-order , 9 stae pipeline

&erformance better than toda#Fs hih-end

smartphoones at (x the power-efficienc#.

  !-;

-!-)'-

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&rocessors-@or-4martphones-And-Tablets

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releasesHnr-altera-arm-a7.htm

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releasesHnr-altera-arm-a5.htm