The Digital Logic Level

Computer Organization Lecture #6

Jahan Zeb

Lecture # 6, DIGITAL LOGIC LEVEL DE-32-CE 2

Gates and Boolean Algebra

The symbols and functional behavior for the five basic gates. Boolean function of n variable is completely described by

table with 2n rows, known as truth table

Lecture # 6, DIGITAL LOGIC LEVEL DE-32-CE 3

Majority Function

(a) Truth table for majority function of three variables.

(a) A circuit for (a).

M=ABC+ABC+ABC

+ABC

Lecture # 6, DIGITAL LOGIC LEVEL DE-32-CE 4

Circuit Equivalence

Construction of (a) NOT, (b) AND, and (c) OR gates using only NAND gates or only NOR gates.

Lecture # 6, DIGITAL LOGIC LEVEL DE-32-CE 5

Circuit Equivalence (Cont…)

To reduce complexity designers try to reduce no. of gates

Circuit computing same function as original with fewer gates is preferred

Boolean algebra can be valuable

Using Distributive law:

AB + AC = A (B+C)

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Boolean Algebra Main Identities

To Circuit designers start with a Boolean function and then apply the laws of Boolean algebra to it

In an attempt to find a simpler but equivalent one

From the final function, circuit can be constructed

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Alternate Symbols for NAND, NOR, AND, OR

De Morgan’s law suggests an alternative notation, (a) an OR gate is equivalent to the NAND gate with inverted inputs

(b) NOR gate can be drawn with an AND gate with inverted inputs By negating both forms we arrive at (c) and (d) respectively

Lecture # 6, DIGITAL LOGIC LEVEL DE-32-CE 8

XOR, Conversion to NAND Gate Only

(a) The truth table for the XOR function

(b-d) Three circuits for computing it

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Circuit Equivalence (Cont…)

Same physical gate can compute different functions, depending on the convention used

(a) Electrical characteristics of a device.

(b) Positive logic,

(c) Negative logic,

AND function

OR function

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Integrated Circuits

An SSI chip containing four gates

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Multiplexers An eight-input

multiplexer circuit

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Multiplexers

(a) An MSI multiplexer.

(b) The same multiplexer wired to compute the majority function.

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Decoders A 3-to-8 decoder

circuit

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Comparators A simple 4-bit

comparator

.

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Programmable Logic Arrays A 12-input, 6-output programmable logic

array

The little squares represent fuses that can be burned out

.

.

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Shifters

A 1-bit left/right shifter

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Half Adder

(a) A truth table for 1-bit addition

(b) A circuit for a half adder

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Full Adder

(a) Truth table for a full adder

(b) Circuit for a full adder

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Arithmetic Logic Units A 1-bit ALU

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Arithmetic Logic Units

Eight 1-bit ALU slices connected to make an 8-bit ALU The enables and invert signals are not shown for simplicity

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Clocks

(a) A clock

(b) The timing diagram for the clock

(c) Generation of an asymmetric clock