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The Performance of Polar Codes for Multi-level Flash Memories Yue Li joint work with Hakim Alhussien, Erich F. Haratsch, and Anxiao (Andrew) Jiang March 10 th , 2014

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Page 1: The Performance of Polar Codes for Multi-level Flash Memories Yue Li joint work with Hakim Alhussien, Erich F. Haratsch, and Anxiao (Andrew) Jiang March

The Performance of Polar Codes for Multi-level Flash

Memories

Yue Lijoint work with

Hakim Alhussien, Erich F. Haratsch, and Anxiao (Andrew) Jiang

March 10th, 2014

Page 2: The Performance of Polar Codes for Multi-level Flash Memories Yue Li joint work with Hakim Alhussien, Erich F. Haratsch, and Anxiao (Andrew) Jiang March

2

NAND Flash Memory

…… … Blocks

4 pages/WL

The circuit board of a SSD

Page 3: The Performance of Polar Codes for Multi-level Flash Memories Yue Li joint work with Hakim Alhussien, Erich F. Haratsch, and Anxiao (Andrew) Jiang March

3

Multi-Level Cells

10

00

0111

2 bits/cell

• Four different kinds of pages:• Lower even• Lower odd• Upper even• Upper odd

Page 4: The Performance of Polar Codes for Multi-level Flash Memories Yue Li joint work with Hakim Alhussien, Erich F. Haratsch, and Anxiao (Andrew) Jiang March

4

Why Polar Codes?• Desire for optimal ECCs.

• Excellent properties

– Capacity-achieving

– Theoretical guarantee of error floor

performance

– Efficient encoding and decoding

algorithms

Page 5: The Performance of Polar Codes for Multi-level Flash Memories Yue Li joint work with Hakim Alhussien, Erich F. Haratsch, and Anxiao (Andrew) Jiang March

5confidential

Encoding

Erdal Arıkan, “Channel Polarization: A Method for Constructing Capacity-Achieving Codes for Symmetric Binary-Input Memoryless Channels," IEEE Transactions on Information Theory, 2009.

Frozen bits

Information Bits

Frozen Channels

Input User BitsPolar Codeword

Noisy Codeword

Flash channels

G

Page 6: The Performance of Polar Codes for Multi-level Flash Memories Yue Li joint work with Hakim Alhussien, Erich F. Haratsch, and Anxiao (Andrew) Jiang March

6confidential

Successive Cancellation Decoding

Frozen Channels

Estimated user bits

Noisy Codeword

Erdal Arıkan, “Channel Polarization: A Method for Constructing Capacity-Achieving Codes for Symmetric Binary-Input Memoryless Channels," IEEE Transactions on Information Theory, 2009.

Page 7: The Performance of Polar Codes for Multi-level Flash Memories Yue Li joint work with Hakim Alhussien, Erich F. Haratsch, and Anxiao (Andrew) Jiang March

7confidential

Frozen Channels

Estimated user bits

Noisy Codeword

Successive Cancellation Decoding

Erdal Arıkan, “Channel Polarization: A Method for Constructing Capacity-Achieving Codes for Symmetric Binary-Input Memoryless Channels," IEEE Transactions on Information Theory, 2009.

Page 8: The Performance of Polar Codes for Multi-level Flash Memories Yue Li joint work with Hakim Alhussien, Erich F. Haratsch, and Anxiao (Andrew) Jiang March

8confidential

Frozen Channels

Successive Cancellation Decoding

Estimated user bits

Noisy Codeword

Erdal Arıkan, “Channel Polarization: A Method for Constructing Capacity-Achieving Codes for Symmetric Binary-Input Memoryless Channels," IEEE Transactions on Information Theory, 2009.

Page 9: The Performance of Polar Codes for Multi-level Flash Memories Yue Li joint work with Hakim Alhussien, Erich F. Haratsch, and Anxiao (Andrew) Jiang March

Is polar code suitable for

flash memories?

1

• Make polar code work in flash memory

2• Performance evaluations

3• Adaptive decoding

Page 10: The Performance of Polar Codes for Multi-level Flash Memories Yue Li joint work with Hakim Alhussien, Erich F. Haratsch, and Anxiao (Andrew) Jiang March

Code Length Adaptation

• Polar codes have length N =

2m

• The code lengths in flash

memory need to be flexible.

10

Page 11: The Performance of Polar Codes for Multi-level Flash Memories Yue Li joint work with Hakim Alhussien, Erich F. Haratsch, and Anxiao (Andrew) Jiang March

Shortening

M C Noisy C

K – K’ N – K’ N – K’K’

11

K – K’ K’

Est. M

Page 12: The Performance of Polar Codes for Multi-level Flash Memories Yue Li joint work with Hakim Alhussien, Erich F. Haratsch, and Anxiao (Andrew) Jiang March

(N, K, K’)-Shortened Polar Code

1 0 0 … 01 0 … 0

… 0 …1 0

1

ç

ç

(x1, x2, …, xN-k’+1, …, xN)=(u1, u2, …, uN-k’+1, …, uN) G

(u1, u2, …, uN-k’+1, …, uN) K’

K’

(x1, x2, …, 0, …, 0)=(u1, u2, …, 0, …, 0) G

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Page 13: The Performance of Polar Codes for Multi-level Flash Memories Yue Li joint work with Hakim Alhussien, Erich F. Haratsch, and Anxiao (Andrew) Jiang March

Evaluation with Random Data

(0, 1, 1, 0, …, 1)(1, 0, 1, 0, …, 1)…(1, 0, 1, 0, …, 1)

Pseudo-random Data

Cycling / Retention

(0, 0, 1, 1, …, 1)(1, 0, 0, 0, …, 1)…(0, 0, 1, 1, …, 1)

Not generated by polar encoder

13

Page 14: The Performance of Polar Codes for Multi-level Flash Memories Yue Li joint work with Hakim Alhussien, Erich F. Haratsch, and Anxiao (Andrew) Jiang March

Treating Random Data as Codewords

(u1, u2, …, uN) = (x1, x2, …, xN) G-1 Invertib

leInput

OutputChannel parameters

Construct codes

Frozen Bits14

Page 15: The Performance of Polar Codes for Multi-level Flash Memories Yue Li joint work with Hakim Alhussien, Erich F. Haratsch, and Anxiao (Andrew) Jiang March

Hard and Soft Sensing

Cell Voltage

11 01 00 10

LLR = log___________________

P( V | bit = 1 ) P( V | bit = 0 )

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Reference threshold voltages

Page 16: The Performance of Polar Codes for Multi-level Flash Memories Yue Li joint work with Hakim Alhussien, Erich F. Haratsch, and Anxiao (Andrew) Jiang March

2

•Performance Evaluation

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Page 17: The Performance of Polar Codes for Multi-level Flash Memories Yue Li joint work with Hakim Alhussien, Erich F. Haratsch, and Anxiao (Andrew) Jiang March

Experimental Setup• Construct one polar code for each kind of page.

• List successive cancellation decoding [Tal and Vardy 2011]

– List size = 32 with CRC

• Block length

– 7943 bits shortened from 8192 bits

• Code rates

– 0.93, 0.94, 0.95

• Flash data

– obtained by characterizing 2X-nm MLC flash chips

– 6-month retention17

Page 18: The Performance of Polar Codes for Multi-level Flash Memories Yue Li joint work with Hakim Alhussien, Erich F. Haratsch, and Anxiao (Andrew) Jiang March

Hard and Soft Decoding

Hard Decoding Soft Decoding 18

Page 19: The Performance of Polar Codes for Multi-level Flash Memories Yue Li joint work with Hakim Alhussien, Erich F. Haratsch, and Anxiao (Andrew) Jiang March

Different Block Lengths

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Page 20: The Performance of Polar Codes for Multi-level Flash Memories Yue Li joint work with Hakim Alhussien, Erich F. Haratsch, and Anxiao (Andrew) Jiang March

Asymmetric and Symmetric Errors

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Page 21: The Performance of Polar Codes for Multi-level Flash Memories Yue Li joint work with Hakim Alhussien, Erich F. Haratsch, and Anxiao (Andrew) Jiang March

3

•Adaptive Decoding

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Page 22: The Performance of Polar Codes for Multi-level Flash Memories Yue Li joint work with Hakim Alhussien, Erich F. Haratsch, and Anxiao (Andrew) Jiang March

Code Rate Switching

BER

PEC0R1

pec1 R2

pec2 R2

pec3

Correction Capability

Is repetitive code construction needed at rate-switching PECs?

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Page 23: The Performance of Polar Codes for Multi-level Flash Memories Yue Li joint work with Hakim Alhussien, Erich F. Haratsch, and Anxiao (Andrew) Jiang March

Why Code Reconstruction is Not Needed?

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Page 24: The Performance of Polar Codes for Multi-level Flash Memories Yue Li joint work with Hakim Alhussien, Erich F. Haratsch, and Anxiao (Andrew) Jiang March

With and Without Code Reconstruction

24Upper odd page Average

Page 25: The Performance of Polar Codes for Multi-level Flash Memories Yue Li joint work with Hakim Alhussien, Erich F. Haratsch, and Anxiao (Andrew) Jiang March

Summary

• On the flash data

– Polar codes are comparable to LDPC codes using hard

and soft sensing

– Larger block lengths do not improve decoding

performance a lot

– More symmetric, better decoding performance

– Repetitive code construction is not necessary for

adaptive decoding

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Page 26: The Performance of Polar Codes for Multi-level Flash Memories Yue Li joint work with Hakim Alhussien, Erich F. Haratsch, and Anxiao (Andrew) Jiang March

Future Directions

• Error floor performance

• Comparing with LDPC decoder with

the same hardware latency

• Efficient hardware implementations

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Thank You