the structure computer architecture – the elementary educational computer

The structure

COMPUTER ARCHITECTURE – The elementary educational computer

The structure

- Von Neumann model

- 5 units

- memory unit

- arithmetic and logic unit

- control unit

- input unit

- output unit


Mode of operation

- The instruction

- “fetch” phase

- “execute” phase

- FETCHMAR(PC)READPC(PC)+1IR(MBR)CONTROL BLOCK(IR)OPCODE

DECODINGGO TO EXECUTE PHASE


Mode of operation


Instructions

- ADD with two addresses

- ADD with one address

- MOVE

- JUMP

- STORE

- LOAD

- INPUT

- OUTPUT


ADD – with two addresses

Format

|ADD|AD1|AD2|

In symbolic notationMAR(IR)AD1

READAR1(MBR)MAR(IR)AD2

READAR2(MBR)ADDACC(AR1)+(AR2)FRNew valuesGO TO FETCH PHASE


The diagram


ADD – with one address

Format

|ADD|AD1|

In symbolic notationMAR(AD1)READAR1(MBR)ADDACC(ACC)+(AR1)FRNew valuesGO TO FETCH PHASE


The diagram


MOVE

Format

|MOVE|AD1|AD2|


READMAR(IR)AD2

READWRITEGO TO FETCH PHASE


The diagram


JUMP

Format

|JZ|AD1|

In symbolic notationZF=0 GO TO FETCH

PHASEZF=1 PC(IR)AD1

GO TO FETCH PHASE


The diagram


STORE

Format

|STORE|AD1|


MBR(ACC)WRITEGO TO FETCH

PHASE


The diagram


LOAD

Format

|LOAD|AD1|


READACC(MBR)FRNew valuesGO TO FETCH

PHASE


The diagram


INPUT / OUTPUT

Format

|INPUT| INPUT DEVICE ADDRESS|

|OUTPUT| OUTPUT DEVICE ADDRESS|

In symbolic notationINPUT DEVICE(IR)INPUT DEVICE ADDRESS

ACC(INPUT DEVICE)GO TO FETCH ADDRESS

OUTPUT DEVICE(IR)OUTPUT DEVICE

ADDRESS

(OUTPUT DEVICE)ACCGO TO FETCH ADDRESS


the structure computer architecture – the elementary educational computer

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