ECEN 2350 Digital Logic Fall 201811-12-18 P. Mathys

Thunderbird Tail Light Project

The goal of this project is to design and implement (on the DE10 board) a finite state machine(FSM) that controls the tail lights of a 1965 Ford Thunderbird, shown in the picture below.

There are three lights on each side that light up in sequence to indicate the turn direction.Labeling the lights from left to right as Lc, Lb, La, Ra, Rb, Rc, a left turn is indicated byturning on La first, then La and Lb, followed by all three, La, Lb, Lc, turned on, and thenturning all three L lamps off. This cycle repeats for as long as the left turn switch is on.The left turn sequence is illustrated graphically in the figure below.

Left Turn

Lc Lb La Ra Rb Rc

Idle

L1

L2

L3

Similarly, the right turn sequence of idle → Ra → Ra, Rb → Ra, Rb, Rc, → idle → . . . isshown graphically in the next figure.

Right Turn

Lc Lb La Ra Rb Rc

Idle

R1

R2

R3

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In addition, there is also an emergency flasher or “hazard” mode in which all six lights flashon and off simultaneously as indicated graphically in the following figure.

Hazard

Lc Lb La Ra Rb Rc

Idle

LR3

Your Tasks:

Task 1. The FSM for the Thunderbird tail lights has three inputs, “left turn”, “rightturn”, and “hazard”, and it has six outputs, lamps La, Lb, Lc, and Ra, Rb, Rc. Designa state diagram and a state table for a FSM that controls the tail lights in the prescribedfashion. The “hazard” setting has to override all other settings. If both the left and rightturn switches are on the FSM should default to the hazard setting. Minimize the number ofstates used.

Task 2. Implement the FSM you designed in task 2 in SystemVerilog. Compile it in QuartusPrime and run it on the DE10 board. Use switches SW2, SW1, SW0 for “hazard”, “leftturn”, and “right turn”, respectively. Use LEDR9, LEDR8, LEDR7 for Lc, Lb, La, andLEDR2, LEDR1, LEDR0 for Ra, Rb, Rc. Use KEY0 for the (manual) clock of the FSM.Test that the FSM makes the correct state transitions for all possible inputs.

Task 3. To make the tail lights flash automatically (rather than using KEY0 manually), acontinuous clock signal is needed. The DE10 board has a 50 MHz clock (with two outputs,P11 and N14). Write a SystemVerilog module that divides this clock down to a frequencysuitable for the Thunderbird tail lights. Generate a 50% duty cycle clock and test your clockmodule on the DE10 board, e.g., by letting an LED turn on and off.

Task 4. Combine the FSM from task 2 with the clock from task 3 for the complete Thun-derbird tail light control module. Call this (top-level) module Thunderbird. Test the func-tioning of all possible modes (left turn, right turn, hazard and any combination of the threeswitches). Adjust the clock frequency as necessary to get the timing of the signals right.

Deliverables. You need to write and turn in a short report that consists of a separateparagraph for each task and the Verilog code you wrote for the final Thunderbird modulein task 4 (including the code for all submodules). The paragraphs have to address thequestions asked (if any) for a given task and any insights, difficulties, and successes thatyou encountered. You also need to assess to which degree your completion of each task wassuccessful. Submit your report, all sv files and the final sof file Thunderbird.sof of yourproject and submit them to Canavas.

Variations for Coolness Points.

c©2012–2018, P. Mathys. Last revised: 11-12-18, PM.

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