ISSN 1292-862

TIMA Lab. Research Reports

TIMA Laboratory, 46 avenue Félix Viallet, 38000 Grenoble France

Design Rules for Non-Manhattan Shapes

Z. JUNEIDI1, K. TORKI1, R.HAMZA2

1 TIMA Lab., 46, Avenue Félix Viallet, 38031 GRENOBLE Cedex, France2 MEMSCAP S.A., 50 Allée des Dauphins, ZAC du Pont Rivet, 38330 Saint Ismier, France

ABSTRACT

An approach to MEMS Computer Aided Design tools has been to make use of Integrated Circuits CAD suites with specificenhancements for MEMS designs. Extending the IC Design Rule Checkers to non-manhattan shapes is one of these neededenhancements. If anecdotically used in IC designs, non-manhattan shapes are intensively used in today state of the artMEMS products. High performance gyroscopes and yaw rate sensors made in surface micromachining processes featurespiral springs and torsional combdrives made of toroïdal fingers.Applying classical DRCs to these layouts generate thousands of false errors. The errors are false because they do not affectthe manufacturability of the device. But because of their number, they prevent the designers from detecting real errors intheir layout. Most false errors are generated by rounding floating point vertices' coordinates, translating different data types(some tools use primitives) and snapping points to a grid.This paper presents a new methodology to eliminate false errors generated by the DRC of non-manhattan shapes. Thismethodology includes adding a tolerance factor to Microsystem design rules with respect to the geometric properties of non-manhattan shapes and the manufacturing grid parameters, closely control the vertices coordinates when automaticallygenerating the non manhattan shapes and control the snapping on the grid. This methodology has been implemented inMEMSCAP Microsystem engineering kits and has been validated for three foundries design rules: BOSCH, SensoNor, andAMS.

Keywords: Design Rules Checking, Non manhattan Shapes, MEMS, Design Rules Tolerance.

1. INTRODUCTION

The current state of the industry in Design Rules Checking for Microsystems has been reached in an evolutionary manner.The design rules we use today in the domain of Microsystem are different from those in the domain of Microelectronics.Comparing to Microelectronic Design methodology, the Microsystem Design methodology is undergoing drastic changes,through the intensive use of non manhattan shapes in MEMS design, as well as the functional rules in MEMS checking.This paper attempts to examine the role of DRC and verification in light of the changing state of MEMS design anddiscusses the implementation of some of the results of our researches currently under development at TIMA.There are basically three driving forces behind the work in this area. The first is to develop a methodology to manage thecomplexity of MEMS design, the second is to reduce the number of both false and unchecked errors, and the third isexamine the potential role of MEMS layout verification as a driving force in the development of the principles of structuredMEMS design and further in steering the directions of MEMS design tools being developed nowadays.

2. WHY MEMS DESIGN RULES

As the Integrated circuits processes, MEMS processes are limited in their ability to fabricate devices. From the inability toresolve small lines and spaces, to the inability to control chemical processes which are vital to release suspended structuresin MEMS devices, theses limitations define the accuracy to which we can adjust our MEMS devices and the feature sizeswhich the MEMS process can reliably produce.The MEMS designers must be able to design MEMS devices within the process limitations if a working and high yieldingchip is desired. Means are required to inform MEMS designer of those limitations. Design rules must also communicate theprocess limitations to those responsible for developing layout verification and layout design tools. MEMS design rules mustbecome increasingly more specific to reflect the changes in expertise of the people using the rules.

3. SOME DIFFICULT PROBLEMS IN MICROSYSTEMS DRC

One of the most important problems in MEMS DRC today is the reduction of false and unchecked errors. Most MEMSdesign rules checkers suffer from a problem which can be illustrated through Figure 1.

FIGURE 1. Design Rules Errors

Region 3 in this figure presents the successful identification of real layout errors by the design rules checker. Region 1represents real layout errors which are not identified by the DRC. Region 2 represents the false errors; those places wherethe DRC has said there were errors when there were not. We think that the elimination of false and unchecked errors to beof high priority. Experience has shown that the ratio of false to real errors can reach 100 to 1 or higher in the case of aMEMS design with non-manhattan shapes checked with classical rules. One direct result of this is lack of trust in the DRC.MEMS designers may spend a large amount of time doing manual checks or worse, classify large number of errors as falsewithout thoroughly checking them. One common solution is to remove those checks that are prone to generating falseerrors. This is not acceptable since it leaves part of the device unchecked.The problem of eliminating unchecked errors is equally difficult and important. The manual checks required on a MEMSdevice chip which has been checked by an 80% effective DRC are as onerous as those required to manually check a verysmaller chip with no DRC. The following section discusses some of the most common and difficult problems encounteredand some of the reasons of their occurrence.

1. Topological

The first class of problems is what we call topological. Almost all MEMS DRC and design rules are based on mask levels.In a MEMS design, it is possible to make different kinds of devices on the same mask layer. These devices may varybetween suspended structures for mechanical or thermal MEMS devices and the necessary electronic devices around theMEMS structures. Sometimes the rule is different depending on which kind of device being checked.Figure 2 shows a typical Opening Area used to release suspended structures in AMS technology. From AMS MEMS DRCpoint of view, there is no violation to the MEMS design rules since the superposition of the three layers (VIA, CONT,PASSIVATION) is necessary to produce an Opening in the substrate. But to the conventional AMS electronic DRC, anOpening Area is a violation to the rule which impose the VIA features to be covered by MET1 and MET2. Another ruleimposing the CONT features to be covered with MET1 is also violated.

FIGURE 2. An Opening Area

31 2REAL FLAGGED

VIA

CONTACT

PASSIVATION

We can find the same device dependent rules in SensoNor technology, an ordinary Microelectronic design rule imposes anabsolute separation between the holes in Oxide for contact holes (COHOL mask) and the N+ region features (NOSURmask), while a superposition of the two masks is necessary to get rid of thin oxide.In Bosch PSB technology, the DRC problems are much more difficult. Here we can find what we called functional rules. Afunctional rule is defined by the nature of the structure at which the rule must be applied. This is illustrated in the Figure 3

EP 2

EP 1

EP 3

FIGURE 3. Functional Rules

In this figure, we are demonstrating three design rules used in Bosch PSB technology, the first rule (EP 1) is a classic rulewhich determine the minimum width of the features of Epi Poly (EP mask). The second rule (EP 2) fixes another minimumwidth for the features of the same mask which are called “Free Structures from Both Sides”. A similar rule (EP 3) defines athird minimum width for what is called “Free Structures from One side”. To apply each of these rules with its appropriateminimum width to the related structures, the Design Rules Checker must be able to distinguish between the “Free Structuresfrom both sides”, the “Free Structures One side”, and the ordinary EP features, which is almost impossible.

2. Geometrical

The next class of difficulties falls into classification of geometries. Most IC design tools (and thus MEMS design tools) are“polygon based”. That is, they operate on elementary polygons which are formed by a closed loops of segments. Thesepolygons can be classed into three categories:

I- Manhattan Polygons: Most of IC CAD tools support this type of polygon. Those are the rectangular polygonswith 0 or 90 degrees. Almost everything in VLSI design domain has been done with this kind of polygons. TheFigure 4 shows some instances of manhattan polygons.

FIGURE 4. Manhattan Polygons

II- Non Manhattan Polygons: Those are the polygons with angles which vary between 0 and 90 degrees. They arefairly common in VLSI CAD Tools. They are much largely supported in MEMS CAD Tools. Examples of thistype of polygons are shown in the figure 5

FIGURE 5. Non Manhattan Polygons

III- Conic shapes: These are intensively used in today state of the art MEMS products. High performance gyroscopesand yaw rate sensors made in surface micromachining processes feature spiral springs and torsional combdrivesmade of toroïdal fingers. Figure 6 shows a variety of these shapes:

FIGURE 6. Conic Shapes

In reality, there is no IC CAD tool (and consequently no MEMS CAD tool), which supports the conic shapes. Throughsampling procedures, layout editors approximate them into polygons with a high number of vertices and segments. Designrules checkers use an internal grid to recognize these polygon either by rounding the floating-point coordinates of thevertices, or by snapping points to a grid. The result of approximating a spiral into polygon is shown in Figure 7.

Circle Donut Ellipse Pie Wedge

Spiral Torus