tl05x, tl05xa, tl05xy enhanced-jfet low … tl05xa, tl05xy enhanced-jfet low-offset operational...

TL05x, TL05xA, TL05xYENHANCED-JFET LOW-OFFSET

OPERATIONAL AMPLIFIERS

SLOS178 – FEBRUARY 1997

1POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

Direct Upgrades to TL07x and TL08x BiFETOperational Amplifiers

Faster Slew Rate (20 V/ µs Typ) WithoutIncreased Power Consumption

On-Chip Offset Voltage Trimming forImproved DC Performance and PrecisionGrades Are Available (1.5 mV, TL051A)

Available in TSSOP for Small Form-FactorDesigns

description

The TL05x series of JFET-input operational amplifiers offers improved dc and ac characteristics over the TL07xand TL08x families of BiFET operational amplifiers. On-chip zener trimming of offset voltage yields precisiongrades as low as 1.5 mV (TL051A) for greater accuracy in dc-coupled applications. Texas Instruments improvedBiFET process and optimized designs also yield improved bandwidth and slew rate without increased powerconsumption. The TL05x devices are pin-compatible with the TL07x and TL08x and can be used to upgradeexisting circuits or for optimal performance in new designs.

BiFET operational amplifiers offer the inherently higher input impedance of the JFET-input transistors, withoutsacrificing the output drive associated with bipolar amplifiers. This makes them better suited for interfacing withhigh-impedance sensors or very low-level ac signals. They also feature inherently better ac response thanbipolar or CMOS devices having comparable power consumption.

The TL05x family was designed to offer higher precision and better ac response than the TL08x with the lownoise floor of the TL07x. Designers requiring significantly faster ac response or ensured lower noise shouldconsider the Excalibur TLE208x and TLE207x families of BiFET operational amplifiers.

AVAILABLE OPTIONS

PACKAGED DEVICESCHIP

TAVIOmaxAT 25°C

SMALLOUTLINE†

(D)

CHIPCARRIER

(FK)

CERAMICDIP(J)

CERAMICDIP(JG)

PLASTICDIP(N)

PLASTICDIP(P)

CHIPFORM‡

(Y)

800 µV TL051ACDTL052ACD — — — — TL051ACP

TL052ACPTL051Y

0°C to 70°C 1.5 mVTL051CDTL052CDTL054ACD

— — — TL054ACNTL051CPTL052CP

TL051YTL052YTL054Y

4 mV TL054CD — — — TL054CN —

800 µV TL051AIDTL052AID — — — — TL051AIP

TL052AIP

–40°C to 85°C 1.5 mVTL051IDTL052IDTL054AID

— — — TL054AINTL051IPTL052IP

—

4 mV TL054ID — — TL054IN —

800 µV TL051AMDTL052AMD

TL051AMFKTL052AMFK

— TL051AMJGTL052AMJG — TL051AMP

TL052AMP

–55°C to 125°C1.5 mV

TL051MDTL052MDTL054AMD

TL051MFKTL052MFKTL054AMFK

TL054AMJ TL051MJGTL052MJG TL054AMN

TL051MPTL052MP

—

4 mV TL054MD TL054MFK TL054MJ — TL054MN —† The D packages are available taped and reeled. Add R suffix to device type (e.g., TL054CDR).‡ Chip forms are tested at 25°C.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications ofTexas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

Copyright 1997, Texas Instruments IncorporatedPRODUCTION DATA information is current as of publication date.Products conform to specifications per the terms of Texas Instrumentsstandard warranty. Production processing does not necessarily includetesting of all parameters.

TL05x, TL05xA, TL05xYENHANCED-JFET LOW-OFFSETOPERATIONAL AMPLIFIERS


2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

description (continued)

Because BiFET operational amplifiers are designed for use with dual power supplies, care must be taken toobserve common-mode input voltage limits and output swing when operating from a single supply. DC biasingof the input signal is required and loads should be terminated to a virtual-ground node at midsupply. TexasInstruments TLE2426 integrated virtual ground generator is useful when operating BiFET amplifiers from singlesupplies.

The TL05x are fully specified at ±15 V and ±5 V. For operation in low-voltage and/or single-supply systems,Texas Instruments LinCMOS families of operational amplifiers (TLC-prefix) are recommended. When movingfrom BiFET to CMOS amplifiers, particular attention should be paid to the slew rate and bandwidthrequirements, and also the output loading.

3 2 1 20 19

9 10 11 12 13

4

5

6

7

8

18

17

16

15

14

4IN+NCVCC–NC3IN+

1IN+NC

VCC+NC

2IN+

1IN

–1O

UT

NC

3OU

T3I

N –

4IN

–

2IN

–

NC

4OU

T

2OU

T

1

2

3

4

5

6

7

14

13

12

11

10

9

8

1OUT1IN–1IN+

VCC+2IN+2IN–

2OUT

4OUT4IN–4IN+VCC–3IN+3IN–3OUT

1

2

3

4

8

7

6

5

OFFSET N1IN–

IN+VCC–

NCVCC+OUTOFFSET N2

3 2 1 20 19

9 10 11 12 13

4

5

6

7

8

18

17

16

15

14

NCVCC+NCOUTNC

NCIN–NCIN+NC

TL051FK PACKAGE(TOP VIEW)

NC

OF

FS

ET

N1

NC

OF

FS

ET

N2

NC

NC

NC

NC

NC – No internal connection

CC

–V

NC

1

2

3

4

8

7

6

5

1OUT1IN–1IN+

VCC –

VCC+2OUT2IN–2IN+

3 2 1 20 19

9 10 11 12 13

4

5

6

7

8

18

17

16

15

14

NC2OUTNC2IN –NC

NC1IN –

NC1IN+

NC


NC

1OU

TN

C2I

N +

NC

NC

NC

NC

CC

+V

CC

–V

TL054D, J, OR N PACKAGE

(TOP VIEW)


TL051D, JG, OR P PACKAGE

(TOP VIEW)

TL052D, JG, OR P PACKAGE

(TOP VIEW)





symbol (each amplifier)

+

–IN–

IN+OUT

equivalent schematic (each amplifier)

R9

OFFSET N2OFFSET N1

IN–

IN+

Q2

Q3Q7

VCC+

Q14

Q6

R4

Q8

Q10

R7

Q11

R6

C1

Q9Q5

Q4

R5

R1

Q1

JF1 JF2

Q13

Q16

R8

JF3Q15

Q17

OUT

VCC–

R2 R3

Q12

R10 D2

D1

See Note A

NOTE A: OFFSET N1 and OFFSET N2 are only available on the TL051x.

ACTUAL DEVICE COMPONENT COUNT †

COMPONENT TL051 TL052 TL054

Transistors 20 34 62

Resistors 10 19 37

Diodes 2 3 5

Capacitors 1 2 4

† These figures include all four amplifiers and all ESD, bias, and trim circuitry.




TL051Y chip information

This chip, when properly assembled, displays characteristics similar to the TL051. Thermal compression orultrasonic bonding may be used on the doped-aluminum bonding pads. Chips may be mounted with conductiveepoxy or a gold-silicon preform.

BONDING PAD ASSIGNMENTS

CHIP THICKNESS: 15 MILS TYPICAL

BONDING PADS: 4 × 4 MILS MINIMUM

TJmax = 150°C

TOLERANCES ARE ±10%.

ALL DIMENSIONS ARE IN MILS.

PIN (4) IS INTERNALLY CONNECTEDTO BACKSIDE OF CHIP.

+

–OUT

IN+

IN–

VCC+(7)

(3)

(2)(6)

(1) (4)

(5)VCC–OFFSET N1

OFFSET N2

63

43

(1)

(2) (3)

(4)

(5)

(6)(7)





TL052Y chip information

This chip, when properly assembled, displays characteristics similar to the TL052. Thermal compression orultrasonic bonding may be used on the doped-aluminum bonding pads. Chips may be mounted with conductiveepoxy or a gold-silicon preform.




TJmax = 150°C



PIN (4) IS INTERNALLY CONNECTEDTO BACKSIDE OF CHIP.

+

–1OUT

1IN+

1IN–

VCC+(8)

(6)

(3)

(2)

(5)

(1)

–

+(7) 2IN+

2IN–2OUT

(4)

VCC–

(1) (2)(3)

(4)

(5)(6)(7)

(8)

66

72




TL054 chip information

This chip, when properly assembled, displays characteristics similar to the TL054C. Thermal compression orultrasonic bonding may be used on the doped-aluminum bonding pads. These chips may be mounted withconductive epoxy or a gold-silicon preform.


+

–1OUT

1IN+

1IN–

VCC+(4)

(6)

(3)

(2)

(5)

(1)

–

+(7) 2IN+

2IN–2OUT

(11)VCC–

+

–3OUT

3IN+

3IN–

(13)

(10)

(9)

(12)

(8)

–

+(14)4OUT

4IN+

4IN–

(6) (7) (8) (9)

71

122



TJmax = 150°C



PIN (11) IS INTERNALLY CONNECTEDTO BACKSIDE OF THE CHIP.

(1)

(2)

(3)

(4)

(5)

(6)

(7) (8)

(9)

(10)

(11)

(12)

(13)

(14)





absolute maximum ratings over operating free-air temperature range (unless otherwise noted) †

Supply voltage, VCC+ (see Note 1) 18 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Supply voltage, VCC– (see Note 1) –18 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Differential input voltage (see Note 2) ±30 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Input voltage range, VI (any input, see Notes 1 and 3) ±15 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Input current, II (each input) ±1 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Output current, IO (each output) ±80 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Total current into VCC+ 160 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Total current out of VCC– 160 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Duration of short-circuit current at (or below) 25°C (see Note 4) unlimited. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous total power dissipation See Dissipation Rating Table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Operating free-air temperature range, TA: C suffix 0°C to 70°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

I suffix –40°C to 85°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . M suffix –55°C to 125°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Storage temperature range –65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Case temperature for 60 seconds: FK package 260°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Lead temperature 1,6 mm (1/16inch) from case for 10 seconds: D, N, or P package 260°C. . . . . . . . . . . . . . Lead temperature 1,6 mm (1/16inch) from case for 60 seconds: J or JG package 300°C. . . . . . . . . . . . . . . .

† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, andfunctional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is notimplied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTES: 1. All voltage values, except differential voltages, are with respect to the midpoint between VCC+ and VCC–.2. Differential voltages are at IN+ with respect to IN–.3. The magnitude of the input voltage must never exceed the magnitude of the supply voltage or 15 V, whichever is less.4. The output may be shorted to either supply. Temperature and/or supply voltages must be limited to ensure that the maximum

dissipation rating is not exceeded.

DISSIPATION RATING TABLE

PACKAGETA ≤ 25°C

POWER RATINGDERATING FACTORABOVE TA = 25°C

TA = 70°CPOWER RATING



D–8 725 mW 5.8 mW/°C 464 mW 377 mW 145 mW

D–14 950 mW 7.6 mW/°C 608 mW 494 mW 190 mW

FK 1375 mW 11.0 mW/°C 880 mW 715 mW 275 mW

J 1375 mW 11.0 mW/°C 880 mW 715 mW 275 mW

JG 1050 mW 8.4 mW/°C 672 mW 546 mW 210 mW

N 1575 mW 12.6 mW/°C 1008 mW 819 mW 315 mW

P 1000 mW 8.0 mW/°C 640 mW 520 mW 200 mW

recommended operating conditionsC SUFFIX I SUFFIX M SUFFIX

UNITMIN MAX MIN MAX MIN MAX

UNIT

Supply voltage, VCC± ±5 ±15 ±5 ±15 ±5 ±15 V

Common mode input voltage VVCC± = ±5 V –1 4 –1 4 –1 4

VCommon-mode input voltage, VIC VCC± = ±15 V –11 11 –11 11 –11 11V

Operating free-air temperature, TA 0 70 –40 85 –55 125 °C




TL051C and TL051AC electrical characteristics at specified free-air temperature

†TL051C, TL051AC

PARAMETER TEST CONDITIONS TA† VCC ± = ± 5 V VCC ± = ± 15 V UNIT

MIN TYP MAX MIN TYP MAX

TL051C25°C 0.75 3.5 0.59 1.5

VIO Input offset voltage

TL051CFull range 4.5 2.5

mVVIO Input offset voltage

TL051AC25°C 0.55 2.8 0.35 0.8

mV

VO = 0

TL051ACFull range 3.8 1.8

αVIOTemperature coefficient

VO = 0,VIC = 0,RS = 50 Ω

TL051C25°C to70°C 8 8

µV/ °CαVIO of input offset voltage‡RS = 50 Ω

TL051AC25°C to70°C 8 8 25

µV/ °C

Input offset voltage long-term drift§

25°C 0.04 0.04 µV/mo

IIO Input offset currentVO = 0, VIC = 0, 25°C 4 100 5 100 pA

IIO Input offset current O ICSee Figure 5 70°C 0.02 1 0.025 1 nA

IIB Input bias currentVO = 0, VIC = 0, 25°C 20 200 30 200 pA

IIB Input bias current O ICSee Figure 5 70°C 0.15 4 0.2 4 nA

VICRCommon-mode input

25°C–1to4

–2.3to

5.6

–11to11

–12.3to

15.6VVICR voltage range

Full range–1to4

–11to11

V

RL = 10 kΩ25°C 3 4.2 13 13.9

VOMMaximum positive peak

RL = 10 kΩFull range 3 13

VVOM + output voltage swingRL = 2 kΩ

25°C 2.5 3.8 11.5 12.7V

RL = 2 kΩFull range 2.5 11.5

RL = 10 kΩ25°C –2.5 –3.5 –12 –13.2

VOMMaximum negative peak

RL = 10 kΩFull range –2.5 –12

VVOM –g

output voltage swingRL = 2 kΩ

25°C –2.3 –3.2 –11 –12V


Large signal differential25°C 25 59 50 105

AVDLarge-signal differentialvoltage amplification¶ RL = 2 kΩ 0°C 30 65 60 129 V/mVvoltage am lification¶

70°C 20 46 30 85

ri Input resistance 25°C 1012 1012 Ωci Input capacitance 25°C 10 12 pF

Common mode V V min25°C 65 85 75 93

CMRRCommon-moderejection ratio

VIC = VICRmin,VO = 0 RS = 50 Ω 0°C 65 84 75 92 dB

rejection ratio VO = 0, RS = 50 Ω70°C 65 84 75 91

Supply voltage rejection25°C 75 99 75 99

kSVRSupply-voltage rejectionratio (∆VCC± /∆VIO)

VO = 0, RS = 50 Ω 0°C 75 98 75 98 dBratio (∆VCC± /∆VIO)

70°C 75 97 75 97

25°C 2.6 3.2 2.7 3.2

ICC Supply current VO = 0, No load 0°C 2.7 3.2 2.8 3.2 mACC y O70°C 2.6 3.2 2.7 3.2

† Full range is 0°C to 70°C.‡ This parameter is tested on a sample basis for the TL051A. For other test requirements, please contact the factory. This statement has no bearing

on testing or nontesting of other parameters.§ Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to

TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.¶ For VCC± = ±5 V, VO = ±2.3 V, or for VCC± = ±15 V, VO = ±10 V.





TL051C and TL051AC operating characteristics at specified free-air temperature

†TL051C, TL051AC

PARAMETER TEST CONDITIONS TA† VCC± = ±5 V VCC± = ±15 V UNIT


Positi e sle rate25°C 16 13 20

SR+ Positive slew rateat unity gain‡

RL = 2 kΩ, CL = 100 pF,

Fullrange

16.4 11 22.6

V/µs

Negati e sle rate

L , L ,See Figure 1 25°C 15 13 18

V/µs

SR– Negative slew rateat unity gain‡ Full

range16 11 19.3

25°C 55 56

tr Rise time 0°C 54 55

70°C 63 63ns

VI(PP) = ±10 mV,R 2 kΩ

25°C 55 57ns

tf Fall timeRL = 2 kΩ,CL = 100 pF

0°C 54 56CL = 100 F,See Figures 1 and 2 70°C 62 64g

25°C 24% 19%

Overshoot factor 0°C 24% 19%

70°C 24% 19%

VEquivalent input noise f = 10 Hz 25°C 75 75

nV/√HzVnq

voltage§ RS = 20 Ω, f = 1 kHz 25°C 18 18 30nV/√Hz

VN(PP)Peak-to-peak equivalent input noise voltage

See Figure 3 f = 10 Hz to10 kHz

25°C 4 4 µV

InEquivalent inputnoise current

f = 1 kHz 25°C 0.01 0.01 pA/√Hz

THD Total harmonic distortion¶ RS = 1 kΩ,f = 1 kHz

RL = 2 kΩ,25°C 0.003% 0.003%

V 10 V R 2 kΩ25°C 3 3.1

B1 Unity-gain bandwidthVI = 10 mV, RL = 2 kΩ,CL = 25 pF See Figure 4

0°C 3.2 3.3 MHzCL = 25 F, See Figure 4

70°C 2.7 2.8

Ph i t it V 10 V R 2 kΩ25°C 59° 62°

φmPhase margin at unitygain

VI = 10 mV, RL = 2 kΩ,CL = 25 pF See Figure 4

0°C 58° 62°gain CL = 25 F, See Figure 4

70°C 59° 62°† Full range is 0°C to 70°C.‡ For VCC± = ±5 V, VI(PP) = ±1 V; for VCC± = ±15 V, VI(PP) = ±5 V.§ This parameter is tested on a sample basis for the TL051A. For other test requirements, please contact the factory. This statement has no bearing

on testing or nontesting of other parameters.¶ For VCC± = ±5 V, VOrms = 1 V; for VCC± = ±15 V, VOrms = 6 V.




TL051I and TL051AI electrical characteristics at specified free-air temperature

†

TL051I, TL051AI

PARAMETER TEST CONDITIONS TA† VCC± = ±5 V VCC± = ±15 V UNITAMIN TYP MAX MIN TYP MAX

TL051I25°C 0.75 3.5 0.59 1.5


TL051IFull range 5.3 3.3


TL051AI25°C 0.55 2.8 0.35 0.8

mV

VO = 0

TL051AIFull range 4.6 2.6

αVIOTemperature coefficient of

VO = 0,VIC = 0,RS = 50 Ω

TL051I25°C to85°C 7 8

µV/ °CαVIO input offset voltage‡RS = 50 Ω

TL051AI25°C to85°C 8 8 25

µV/ °C


25°C 0.04 0.04 µV/mo






25°C–1to4

–2.3to

5.6

–11to11

–12.3to


Full range–1to4

–11to11

V

RL = 10 kΩ25°C 3 4.2 13 13.9




25°C 2.5 3.8 11.5 12.7V


RL = 10 kΩ25°C –2.5 –3.5 –12 –13.2



VVOM –g


25°C –2.3 –3.2 –11 –12V



AVDLarge-signal differentialvoltage amplification¶ RL = 2 kΩ –40°C 30 74 60 145 V/mVvoltage am lification¶

85°C 20 43 30 76


Common modeVIC = VICRmin, 25°C 65 85 75 93


VIC VICRmin,VO = 0, –40°C 65 83 75 90 dB

rejection ratioRS = 50 Ω 85°C 65 84 75 93

Supply voltage rejection V 025°C 75 99 75 99


VO = 0,RS = 50 Ω

–40°C 75 98 75 98 dBratio (∆VCC± /∆VIO) RS = 50 Ω

85°C 75 99 75 99

25°C 2.6 3.2 2.7 3.2

ICC Supply current VO = 0, No load –40°C 2.4 3.2 2.6 3.2 mA

85°C 2.5 3.2 2.6 3.2† Full range is –40°C to 85°C‡ This parameter is tested on a sample basis for the TL051A. For other test requirements, please contact the factory. This statement has no bearing

on testing or nontesting of other parameters.§ Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to

TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.¶ For VCC± = ±5 V, VO = ±2.3 V, or for VCC± = ±15 V, VO = ±10 V.





TL051I and TL051AI operating characteristics at specified free-air temperature

†TL051I, TL051AI



Positi e sle rate25°C 16 13 20

SR+ Positive slew rateat unity gain‡

RL = 2 kΩ, CL = 100 pF,

Fullrange

11

V/µs

Negati e sle rate

L , L ,See Figure 1 25°C 15 13 18

V/µs

SR– Negative slew rateat unity gain‡ Full

range11

25°C 55 56

tr Rise time –40°C 52 53

85°C 64 65ns


25°C 55 57ns

tf Fall time

( )RL = 2 kΩ,CL = 100 pF

–40°C 51 53CL = 100 F,See Figures 1 and 2 85°C 64 65g

25°C 24% 19%

Overshoot factor –40°C 24% 19%

85°C 24% 19%

V Equivalent input noise f = 10 Hz 25°C 75 75nV/√HzVn

qvoltage§ RS = 20 Ω, f = 1 kHz 25°C 18 18 30

nV/√Hz



25°C 4 4 µV


f = 1 kHz 25°C 0.01 0.01 pA/√Hz


RL = 2 kΩ,25°C 0.003% 0.003%

V 10 V R 2 kΩ25°C 3 3.1


–40°C 3.5 3.6 MHzCL = 25 F, See Figure 4

85°C 2.6 2.7

Ph i t it V 10 V R 2 kΩ25°C 59° 62°


VI = 10 mV, RL = 2 kΩ,CL = 25 pF See Figure 4

–40°C 58° 61°gain CL = 25 F, See Figure 4

85°C 59° 62°† Full range is –40°C to 85°C.‡ For VCC± = ±5 V, VI(PP) = ±1 V; for VCC± = ±15 V, VI(PP) = ±5 V.§ This parameter is tested on a sample basis for the TL051A. For other test requirements, please contact the factory. This statement has no bearing

on testing or nontesting of other parameters.¶ For VCC± = ±5 V, VOrms = 1 V; for VCC± = ±15 V, VOrms = 6 V.




TL051M and TL051AM electrical characteristics at specified free-air temperature

†

TL051M, TL051AM

PARAMETER TEST CONDITIONS TA† VCC ± = ± 5 V VCC ± = ± 15 V UNITAMIN TYP MAX MIN TYP MAX

TL051M25C 0.75 3.5 0.59 1.5


TL051MFull range 6.5 4.5


TL051AM25°C 0.55 2.8 0.35 0.8

mV

VO = 0

TL051AMFull range 5.8 3.8


VO = 0,VIC = 0,RS = 50 Ω

TL051M25°C to125°C 8 8

µV/°CαVIO input offset voltageRS = 50 Ω

TL051AM25°C to125°C 8 8

µV/°C

Input offset voltage long-term drift‡

25°C 0.04 0.04 µV/mo


IIO Input offset current O ICSee Figure 5 125°C 1 20 2 20 nA


IIB Input bias current O ICSee Figure 5 125°C 10 50 20 50 nA


25°C–1to4

–2.3to

5.6

–11to11

–12.3to


Full range–1to4

–11to11

V

RL = 10 kΩ25°C 3 4.2 13 13.9



VVOM+ output voltage swingRL = 2 kΩ

25°C 2.5 3.8 11.5 12.7V


RL = 10 kΩ25°C –2.5 –3.5 –12 –13.2



VVOM–g


25°C –2.3 –3.2 –11 –12V



AVDLarge-signal differentialvoltage amplification§ RL = 2 kΩ –55°C 30 76 60 149 V/mVvoltage am lification§

125°C 10 32 15 49








VO = 0, RS = 50 Ω –55°C 75 98 75 98 dBratio (∆VCC± /∆VIO)

125°C 75 100 75 100

25°C 2.6 3.2 2.7 3.2

ICC Supply current VO = 0, No load –55°C 2.3 3.2 2.4 3.2 mACC y O125°C 2.4 3.2 2.5 3.2

† Full range is –55°C to 125°C.‡ Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to

TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.§ For VCC± = ± 5 V, VO = ± 2.3 V, or for VCC± = ±15 V, VO = ±10 V.





TL051M and TL051AM operating characteristics at specified free-air temperature

TL051M, TL051AM

PARAMETER TEST CONDITIONS TA VCC± = ±5 V VCC± = ±15 V UNITAMIN TYP MAX MIN TYP MAX

SR+ Positive slew rate 25°C 16 13 20SR+at unity gain†

RL = 2 kΩ, CL = 100 pF,25°C 16 13 20

V/µs

SR Negative slew rate

L , L ,See Figure 1

25°C 15 13

V/µs

SR– gat unity gain† 25°C 15 13

25°C 55 56


125°C 68 68ns


25°C 55 57ns

tf Fall time

( )RL = 2 kΩ,CL = 100 pF


25°C 24% 19%


125°C 25% 19%


qvoltage‡ RS = 20 Ω, f = 1 kHz 25°C 18 19

nV/√Hz

VN(PP)Peak-to-peak equivalentinput noise voltage


25°C 4 4 µV

InEquivalent input noisecurrent

f = 1 kHz 25°C 0.01 0.01 pA/√Hz

THD Total harmonic distortion§ RS = 1 kΩ,f = 1 kHz

RL = 2kΩ,25°C 0.003% 0.003%

V 10 V R 2 kΩ25°C 3 3.1

B1 Unity-gain bandwidthVI = 10 mV,CL = 25 pF

RL = 2 kΩ,See Figure 4


125°C 2.3 2.4

Ph i t it V 10 V R 2 kΩ25°C 59° 62°


VI = 10 mV,CL = 25 pF



125°C 59° 62°† For VCC± = ±5 V, VI(PP) = ±1 V; for VCC± = ±15 V, VI(PP) = ±5 V.‡ This parameter is tested on a sample basis for the TL051A. For other test requirements, please contact the factory. This statement has no bearing

on testing or nontesting of other parameters.§ For VCC± = ±5 V, VOrms = 1 V; for VCC± = ±15 V, VOrms = 6 V.




TL051Y electrical characteristics, T A = 25°CTL051Y

PARAMETER TEST CONDITIONS VCC ± = ± 5 V VCC ± = ± 15 V UNIT


VIO Input offset voltageVO = 0, VIC = 0,

0 75 0 59 mVVIO Input offset voltage O ,RS = 50 Ω

IC ,0.75 0.59 mV

IIO Input offset currentVO = 0, VIC = 0,

4 5 pAIIO Input offset current O , IC ,See Figure 5

4 5 pA

IIB Input bias currentVO = 0, VIC = 0,

20 30 pAIIB Input bias current O , IC ,See Figure 5

20 30 pA

VICR Common-mode input voltage range–2.3

to5.6

–12.3to

15.6V

VOMMaximum positive peak output voltage RL = 10 kΩ 4.2 13.9

VVOM+g

swing RL = 2 kΩ 3.8 12.7V

VOMMaximum negative peak output voltage RL = 10 kΩ –3.5 –13.2

VVOM –g g

swing RL = 2 kΩ –3.2 –12V

AVDLarge-signal differential voltageamplification† RL = 2 kΩ 59 105 V/mV

ri Input resistance 1012 1012 Ω

ci Input capacitance 10 12 pF

CMRR Common-mode rejection ratioVIC = VICRmin,VO = 0, RS = 50 Ω 85 93 dB

kSVRSupply-voltage rejection ratio(∆VCC± /∆VIO)

VO = 0, RS = 50 Ω 99 99 dB

ICC Supply current VO = 0, No load 2.6 2.7 mA

† For VCC± = ±5 V, VO = ±2.3 V, or for VCC± = ± 15 V, VO = ±10 V.





TL051Y operating characteristics, T A = 25°CTL051Y

PARAMETER TEST CONDITIONS VCC± = ±5 V VCC± = ±15 V UNIT


SR+ Positive slew rate at unity gain† RL = 2 kΩ, CL = 100 pF, 16 20V/µs

SR– Negative slew rate at unity gain†L , L ,

See Figure 1 15 18V/µs

tr Rise time VI(PP) = ±10 mV,R 2 kΩ

55 56ns

tf Fall time

( )RL = 2 kΩ,CL = 100 pF,

55 57ns

Overshoot factorCL = 100 F,See Figures 1 and 2 24% 19%

V Eq i alent inp t noise oltage‡f = 10 Hz 75 75

nV/√HzVn Equivalent input noise voltage‡RS = 20 Ω, f = 1 kHz 18 18

nV/√Hz

VN(PP)Peak-to-peak equivalent inputnoise voltage


4 4 µV

In Equivalent input noise current f = 1 kHz 0.01 0.01 pA/√Hz

THD Total harmonic distortion§ RS = 1 kΩ, RL = 2 kΩ,f = 1 kHz

0.003% 0.003%

B1 Unity-gain bandwidthVI = 10 mV, RL = 2 kΩ,CL = 25 pF, See Figure 4

3 3.1 MHz

φm Phase margin at unity gainVI = 10 mV, RL = 2 kΩ,CL = 25 pF, See Figure 4

59° 62°

† For VCC± = ±5 V, VI(PP) = ±1 V; for VCC± = ±15 V, VI(PP) = ±5 V.‡ This parameter is tested on a sample basis for the TL051A. For other test requirements, please contact the factory. This statement has no bearing

on testing or nontesting of other parameters.§ For VCC± = ±5 V, VOrms = 1 V; for VCC± = ±15 V, VOrms = 6 V.





TL052C, TL052AC


TL052C25°C 0.73 3.5 0.65 1.5




V 0 TL052AC25°C 0.51 2.8 0.4 0.8

mV

VO = 0,VIC = 0

TL052ACFull range 3.8 1.8

VIC = 0,RS = 50 Ω TL052C

25°C to8 8


RS 50 Ω TL052C70°C 8 8

µV/°CαVIO of input offset voltage‡TL052AC

25°C to8 6 25

µV/°CTL052AC

70°C 8 6 25


VO = 0,RS = 50 Ω VIC = 0, 25°C 0.04 0.04 µV/mo

IIO Input offset currentVO = 0,

VIC = 025°C 4 100 5 100 pA

IIO Input offset current O ,See Figure 5

VIC = 0,70°C 0.02 1 0.025 1 nA

IIB Input bias currentVO = 0,

VIC = 025°C 20 200 30 200 pA

IIB Input bias current O ,See Figure 5

VIC = 0,70°C 0.15 4 0.2 4 nA


25°C–1to4

–2.3to

5.6

–11to11

–12.3to


Full range–1to4

–11to11

V

RL = 10 kΩ25°C 3 4.2 13 13.9




25°C 2.5 3.8 11.5 12.7V


RL = 10 kΩ25°C –2.5 –3.5 –12 –13.2



VVOM–g


25°C –2.3 –3.2 –11 –12V


L i l diff ti l25°C 25 59 50 105

AVDLarge-signal differentialvoltage amplification¶ RL = 2 kΩ 0°C 30 65 60 129 V/mVvoltage am lification¶

70°C 20 46 30 85

ri Input resistance 25°C 1012 1012 Ω

ci Input capacitance 25°C 10 12 pF



VIC = VICRmin,VO = 0, RS = 50 Ω 0°C 65 84 75 92 dBrejection ratio VO = 0,

70°C 65 84 75 91† Full range is 0°C to 70°C.‡ This parameter is tested on a sample basis. For other test requirements, please contact the factory. This statement has no bearing on testing

or nontesting of other parameters.§ Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to

TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.¶ For VCC± = ±5 V, VO = ±2.3 V; at VCC± = ±15 V, VO = ±10 V.





TL052C and TL052AC electrical characteristics at specified free-air temperature (continued)

TL052C, TL052AC


S l lt j ti25°C 75 99 75 99

kSVRSupply-voltage rejectionratio (∆VCC ± /∆VIO)

VO = 0, RS = 50 Ω 0°C 75 98 75 98 dBratio (∆VCC ± /∆VIO)

70°C 75 97 75 97

S l t25°C 4.6 5.6 4.8 5.6

ICCSupply current(two amplifiers)

VO = 0, No load 0°C 4.7 6.4 4.8 6.4 mA(two am lifiers)

70°C 4.4 6.4 4.6 6.4

VO1/VO2 Crosstalk attenuation AVD = 100 25°C 120 120 dB


TL052C, TL052AC

PARAMETER TEST CONDITIONS TA† VCC± = ± 5 V VCC± = ± 15 V UNITAMIN TYP MAX MIN TYP MAX

SR + Slew rate at unity gain25°C 17.8 9 20.7

SR + Slew rate at unity gainRL = 2 kΩ, CL = 100 pF, Full range 8

V/µs

SR Negative slew rate See Figure 1 25°C 15.4 9 17.8V/µs

SR – gat unity gain‡ Full range 8

25°C 55 56


70°C 63 63ns


25°C 55 57ns

tf Fall time

( )RL = 2 kΩ,CL = 100 pF

0°C 54 56CL = 100 F,See Figures 1 and 2 70°C 62 64g

25°C 24% 19%


70°C 24% 19%



nV/√Hz

VN(PP)Peak-to-peak equivalent input noise current

See Figure 3 f = 10 Hz t10 kHz

25°C 4 4 µV

InEquivalent input noise current

f = 1 kHz 25°C 0.01 0.01 pA/√Hz


RL = 2 kΩ,25°C 0.003% 0.003%

V 10 V R 2 kΩ25°C 3 3



0°C 3.2 3.2 MHzCL = 25 F, See Figure 4

70°C 2.6 2.7

Phase margin at unity V 10 mV R 2 kΩ25°C 60° 63°


VI = 10 mV,CL = 25 pF,

RL = 2 kΩ,See Figure 4 0°C 59° 63°gain CL = 25 F, See Figure 4

70°C 60° 63°† Full range is 0°C to 70°C.‡ For VCC± = ±5 V, VI(PP) = ±1 V; for VCC± = ±15 V, VI(PP) = ±5 V.§ This parameter is tested on a sample basis. For other test requirements, please contact the factory. This statement has no bearing on testing

or nontesting of other parameters.¶ For VCC± = ±5 V, VO(RMS) = 1 V; for VCC± = ±15 V, VO(RMS) = 6 V.





TL052I, TL052AI


TL052I25°C 0.73 3.5 0.65 1.5




V 0 TL052AI25°C 0.51 2.8 0.4 0.8

mV

VO = 0,VIC = 0,

TL052AIFull range 4.6 2.6

αVIO Temperat re coefficient‡

VIC = 0,RS = 50 Ω

TL052I25°C to85°C 7 6

µV/°CαVIO Temperature coefficient‡

TL052AI25°C to85°C 6 6 25

µV/°C


VO = 0,RS = 50 Ω VIC = 0, 25°C 0.04 0.04 µV/mo


IIO Input offset current O ,See Figure 5

IC ,

85°C 0.06 10 0.07 10 nA


IIB Input bias current O ,See Figure 5

IC ,

85°C 0.6 20 0.7 20 nA


25°C–1to4

–2.3to

5.6

–11to11

–12.3to


Full range–1to4

–11to11

V

RL = 10 kΩ25°C 3 4.2 13 13.9




25°C 2.5 3.8 11.5 12.7V


RL = 10 kΩ25°C –2.5 –3.5 –12 –13.2



VVOM–g


25°C –2.3 –3.2 –11 –12V


L i l diff ti l25°C 25 59 50 105

AVDLarge-signal differentialvoltage amplification¶ RL = 2 kΩ –40°C 30 74 60 145 V/mVvoltage am lification¶

85°C 20 43 30 76





VIC = VICRmin,VO = 0, RS = 50 Ω –40°C 65 83 75 90 dBrejection ratio VO = 0,

85°C 65 84 75 93

† Full range is –40°C to 85°C.‡ This parameter is tested on a sample basis. For other test requirements, please contact the factory. This statement has no bearing on testing

or nontesting of other parameters§ Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to

TA = 25 °C using the Arrhenius equation and assuming an activation energy of 0.96 eV.¶ At VCC± = ± 5 V, VO = ± 2.3 V; at VCC± = ±15 V, VO = ±10 V.





TL052I and TL052AI electrical characteristics at specified free-air temperature (continued)

TL052I, TL052AI


S l lt j ti25°C 75 99 75 99



85°C 75 99 75 99

S l t25°C 4.6 5.6 4.8 5.6


VO = 0, No load –40°C 4.5 6.4 4.7 6.4 mA(two am lifiers)

85°C 4.4 6.4 4.6 6.4



TL052I, TL052AI


SR + Sle rate at nit gain‡25°C 17.8 9 20.7

SR + Slew rate at unity gain‡RL = 2 kΩ, CL = 100 pF, Full range 8

V/µs

SR Negative slew rate at

L , L ,See Figure 1 25°C 15.4 9 17.8

V/µs

SR – gunity gain‡ Full range 8

25°C 55 56


85°C 64 65ns

VI(PP) = ±10 mV, 25°C 55 57ns

tf Fall timeVI(PP) = ±10 mV,RL = 2 kΩ, CL = 100 pF, –40°C 51 53See Figures 1 and 2 85°C 64 65

25°C 24% 19%


85°C 24% 19%

VEquivalent input noise f = 10 Hz 25°C 71 71

Vnq

voltage§ RS = 20 Ω, f = 1 kHz 25°C 19 19 30

VN(PP)Peak-to-peak equivalent input noise current

See Figure 3f =

10 Hz to10 kHz

25°C 4 4 µV

InEquivalent input noisecurrent

f = 1 kHz 25°C 0.01 0.01 pA/√Hz


RL = 2 kΩ,25°C 0.003% 0.003%

V 10 V R 2 kΩ25°C 3 3




85°C 2.5 2.6

Phase margin at unity V 10 mV R 2 kΩ25°C 60° 63°


VI = 10 mV,CL = 25 pF,

RL = 2 kΩ,See Figure 4 –40°C 58° 61°gain CL = 25 F, See Figure 4

85°C 60° 63°† Full range is –40°C to 85°C.‡ For VCC± = ±5 V, VI(PP) = ±1 V; for VCC± = ±15 V, VI(PP) = ±5 V.§ This parameter is tested on a sample basis. For other test requirements, please contact the factory. This statement has no bearing on testing






TL052M, TL052AM


TL052M25°C 0.73 3.5 0.65 1.5


TL052MFull range 6.5 4.5


V 0 TL052AM25°C 0.51 2.8 0.4 0.8

mV

VO = 0,VIC = 0

TL052AMFull range 5.8 3.8

VIC = 0,RS = 50 Ω TL052M

25°C to10 9


RS 50 Ω TL052M 125°C 10 9µV/°CαVIO of input offset voltage

TL052AM25°C to125°C 9 8

µV/°C


VO = 0,RS = 50 Ω

VIC = 0,25°C 0.04 0.04 µV/mo


IIO Input offset current OSee Figure 5

IC125°C 1 20 2 20 nA


IIB Input bias current OSee Figure 5 125°C 10 50 20 50 nA


25°C–1to4

–2.3to

5.6

–11to11

–12.3to


Full range–1to4

–11to11

V

RL = 10 kΩ25°C 3 4.2 13 13.9




25°C 2.5 3.8 11.5 12.7V


RL = 10 kΩ25°C –2.5 –3.5 –12 –13.2



VVOM–g


25°C –2.3 –3.2 –11 –12V




125°C 10 32 15 49










125°C 75 100 75 100

Supply current25°C 4.6 5.6 4.8 5.6


VO = 0, No load –55°C 4.4 6.4 4.5 6.4 mA(two am lifiers)

125°C 4.2 6.4 4.4 6.4


† Full range is – 55°C to 125°C.‡ Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to

TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.§ For VCC± = ± 5 V, VO = ± 2.3 V; at VCC± = ±15 V, VO = ±10 V.






TL052M, TL052AM


SR + Positive slew rate 25°C 17.8 9 20.7SR +

at unity gain‡ RL = 2 kΩ,CL 100 pF

Full range 8V/µs

SR Negative slew rateCL = 100 pF,See Figure 1 25°C 15.4 9 17.8

V/µs

SR – gat unity gain‡

See Figure 1Full range 8

25°C 55 56


125°C 68 68ns

VI(PP) = ± 10 mV,R 2 kΩ

25°C 55 57ns

tf Fall time

( )RL = 2 kΩ,CL = 100 pF


25°C 24% 19%


125°C 25% 19%


qvoltage§

RS = 20 Ω f = 1 kHz 25°C 19 19nV/√Hz

VN(PP)

Peak-to-peak equivalent input noisecurrent

RS = 20 Ω,See Figure 3 f = 10 Hz

to10 kHz

25°C 4 4 µV


f = 1 kHz 25°C 0.01 0.01 pA/√Hz

THDTotal harmonic distortion¶

RS = 1 kΩ,f = 1 kHz

RL = 2 kΩ,25°C 0.003% 0.003%

V 10 V R 2 kΩ25°C 3 3




125°C 2.3 2.4

Ph i t it V 10 V R 2 kΩ25°C 60° 63°


VI = 10 mV,CL = 25 pF



125°C 60° 63°† Full range is – 55°C to 125°C.‡ For VCC± = ±5 V, VI(PP) = ±1 V; for VCC± = ±15 V, VI(PP) = ±5 V.§ This parameter is tested on a sample basis. For other test requirements, please contact the factory. This statement has no bearing on testing






PARAMETER TEST CONDITIONS VCC± = ± 5 V VCC± = ± 15 V UNIT


VIO Input offset voltageVO = 0

0.73 0.65 mV

Input offset voltage long-termdrift

VO = 0,RS = 50 Ω VIC = 0,

0.04 0.04 µV/mo

IIO Input offset currentVO = 0,See Figure 5

VIC = 0,4 5 pA

IIB Input bias currentVO = 0,See Figure 5

VIC = 0,20 30 pA

VICRCommon-mode input voltagerange

–2.3to

5.6

–12.3to

15.6V

VOMMaximum positive peak RL = 10 kΩ 4.2 13.9

VOM+ output voltage swing RL = 2 kΩ 3.8 12.7V

VOMMaximum negative peak output RL = 10 kΩ –3.5 –13.2

V

VOM–g

voltage swing RL = 2 kΩ –3.2 –12

AVDLarge-signal differentialvoltage amplification† RL = 2 kΩ 59 105 V/mV



CMRR Common-mode rejection ratioVIC = VICRmin,VO = 0,

RS = 50 Ω85 93 dB

kSVRSupply-voltage rejection ratio(∆VCC± /∆VIO)

VO = 0, RS = 50 Ω 99 99 dB

ICC Supply current (two amplifiers) VO = 0, No load 4.6 4.8 mA

VO1/VO2 Crosstalk attenuation AVD = 100 120 120 dB

† For VCC± = ±5 V, VO = ±2.3 V; at VCC± = ±15 V, VO = ±10 V.








SR + Positive slew rate at unity gain† RL = 2 kΩ, CL = 100 pF,

17.8 20.7

V/µs

SR – Negative slew rate atunity gain†

L , L ,See Figure 1

15.4 17.8

V/µs

tr Rise time VI(PP) = ±10 mV, 55 56ns

tf Fall timeVI(PP) = ±10 mV,RL = 2 kΩ, CL = 100 pF, 55 57

ns

Overshoot factor See Figures 1 and 2 24% 19%

V Equivalent input noise f = 10 Hz 71 71V/√HVn

qvoltage‡ RS = 20 Ω, f = 1 kHz 19 19

nV/√Hz

VN(PP)Peak-to-peak equivalent inputnoise current

See Figure 3f = 10 Hz to 10 kHz 4 4 µV


f = 1 kHz 0.01 0.01 pA/√Hz


RL = 2 kΩ,0.003% 0.003%

B1 Unity-gain bandwidthVI = 10 mV,CL = 25 pF,


3 3 MHz

φm Phase margin at unity gainVI = 10 mV,CL = 25 pF,


60° 63°

† This parameter is tested on a sample basis. For other test requirements, please contact the factory. This statement has no bearing on testingor nontesting of other parameters.

‡ For VCC± = ±5 V, VI(PP) = ±1 V; for VCC± = ±15 V, VI(PP) = ±5 V.§ For VCC± = ±5 V, VO(RMS) = 1 V; for VCC± = ±15 V, VO(RMS) = 6 V.





†TL054C, TL054AC

PARAMETER TEST CONDITIONS TA† VCC ± = ± 5 V VCC ± = ± 15 V UNIT


TL054C25°C 0.64 5.5 0.56 4




TL054AC25°C 0.57 3.5 0.5 1.5

mV

VO = 0TL054AC

Full range 5.7 3.7


VO = 0,VIC = 0,RS = 50 Ω

TL054C25°C to70°C 25 23

µV/ °CαVIO of input offset voltageRS 50 Ω

TL054AC25°C to70°C 24 23

µV/ °C


25°C 0.04 0.04 µV/mo






25°C–1to4

–2.3to

5.6

–11to11

–12.3to


Full range–1to4

–11to11

V

RL = 10 kΩ25°C 3 4.2 13 13.9




25°C 2.5 3.8 11.5 12.7V


RL = 10 kΩ25°C –2.5 –3.5 –12 –13.2



VVOM –g


25°C –2.3 –3.2 –11 –12V



AVDLarge-signal differentialvoltage amplification§ RL = 2 kΩ 0°C 30 88 60 173 V/mVvoltage am lification§

70°C 20 57 30 85




VIC = VICRmin,VO = 0 RS = 50 Ω

0°C 65 84 75 92 dBrejection ratio VO = 0, RS = 50 Ω

70°C 65 84 75 93

Supply voltage rejection V ±5 V to ±15 V25°C 75 99 75 99


VCC± = ±5 V to ±15 V,VO = 0 RS = 50 Ω

0°C 75 99 75 99 dBratio (∆VCC± /∆VIO) VO = 0, RS = 50 Ω

70°C 75 99 75 99

Supply current25°C 8.1 11.2 8.4 11.2

ICCSupply current(four amplifiers)

VO = 0, No load 0°C 8.2 12.8 8.5 12.8 mA(four am lifiers)

70°C 7.9 11.2 8.2 11.2


† Full range is 0°C to 70°C.‡ Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to

TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.§ For VCC± = ±5 V, VO = ±2.3 V, at VCC± = ±15 V, VO = ±10 V.B






†TL054C, TL054C



SR+Positive slew rate 25°C 15.4 10 17.8

SR+ at unity gain 0°C 15.7 8 17.9

RL = 2 kΩ, CL = 100 pF, 70°C 14.4 8 17.5V/µs


L LSee Figure 1 and Note 7 25°C 13.9 10 15.9

V/µs

SR– gunity gain‡ 0°C 14.3 8 16.1

70°C 13.3 8 15.5

25°C 55 56


70°C 63 63nsVI(PP) = ±10 mV,

RL 2 kΩ25°C 55 57

ns


0°C 54 56CL = 100 F,See Figures 1 and 2 70°C 62 64See Figures 1 and 2

25°C 24% 19%


70°C 24% 19%



nV/√Hz



25°C 4 4 µV


f = 1 kHz 25°C 0.01 0.01 pA/√Hz

THD Total harmonicdistortion¶

RS = 1 kΩ,f = 1 kHz

RL = 2 kΩ,25°C 0.003% 0.003%

V 10 mV R 2 kΩ25°C 2.7 2.7


0°C 3 3 MHzCL = 25 F, See Figure 4

70°C 2.4 2.4

Phase margin at VI = 10 mV RL = 2 kΩ25°C 61° 64°

φmPhase margin atunity gain

VI = 10 mV, RL = 2 kΩ,CL = 25 pF, See Figure 4 0°C 60° 64°unity gain CL = 25 F, See Figure 4

70°C 61° 63°† Full range is 0°C to 70°C.‡ For VCC± = ±5 V, VI(PP) = ±1 V; for VCC± = ±15 V, VI(PP) = ±5 V.§ This parameter is tested on a sample basis. For other test requirements, please contact the factory. This statement has no bearing on testing

or nontesting of other parameters.¶ For VCC± = ±5 V, Vo(rms) = 1 V; for VCC± = ±15 V, Vo(rms) = 6 V.





†TL054I, TL054AI


TL054I25°C 0.64 5.5 0.56 4



mVVIO In ut offset voltage

TL054AI25°C 0.57 3.5 0.5 1.5

mV

VO = 0TL054AI

Full range 6.8 4.8


VO = 0,VIC = 0,RS = 50 Ω

TL054I25°C to85°C 25 24

µV/ °CαVIO input offset voltageRS 50 Ω

TL054AI25°C to85°C 25 23

µV/ °C


25°C 0.04 0.04 µV/mo






25°C–1to4

–2.3to

5.6

–11to11

–12.3to


Full range–1to4

–11to11

V

RL = 10 kΩ25°C 3 4.2 13 13.9




25°C 2.5 3.8 11.5 12.7V


RL = 10 kΩ25°C –2.5 –3.5 –12 –13.2



VVOM –g


25°C –2.3 –3.2 –11 –12V




85°C 20 50 30 70




VIC = VICRmin,VO = 0 RS = 50 Ω

–40°C 65 83 75 92 dBrejection ratio VO = 0, RS = 50 Ω

85°C 65 84 75 93

Supply voltage rejection V ±5 V to ±15 V25°C 75 99 75 99


VCC± = ±5 V to ±15 V,VO = 0 RS = 50 Ω

–40°C 75 98 75 99 dBratio (∆VCC± /∆VIO) VO = 0, RS = 50 Ω

85°C 75 99 75 99

Supply current25°C 8.1 11.2 8.4 11.2


VO = 0, No load –40°C 7.9 12.8 8.2 12.8 mA(four am lifiers)

85°C 7.6 11.2 7.9 11.2



TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.§ For VCC± = ±5 V, VO = ±2.3 V, at VCC± = ±15 V, VO = ±10 V.






†TL054I, TL054AI



SR+ at unity gain –40°C 16.4 8 18

RL = 2 kΩ, CL = 100 pF, 85°C 14 8 17.3V/µs


L LSee Figure 1 25°C 13.9 10 15.9

V/µs

SR– gunity gain‡ –40°C 14.7 8 16.1

85°C 13 8 15.3

25°C 55 56


85°C 64 65ns

VI(PP) = ±10 mV, RL = 2 kΩ, 25°C 55 57ns

tf Fall timeVI(PP) ±10 mV, RL 2 kΩ,CL = 100 pF, –40°C 51 53See Figures 1 and 2 85°C 64 65 25°C 24% 19%


85°C 24% 19%



nV/√Hz



25°C 4 4 µV


f = 1 kHz 25°C 0.01 0.01 pA/√Hz


RL = 2 kΩ,25°C 0.003% 0.003%

V 10 mV R 2 kΩ25°C 2.7 2.7



85°C 2.3 2.4



VI = 10 mV, RL = 2 kΩ,CL = 25 pF, See Figure 4 –40°C 59° 62°unity gain CL = 25 F, See Figure 4


or nontesting of other parameters.¶ For VCC± = ±5 V, Vo(rms) = 1 V; for VCC± = ±15 V, Vo(rms) = 6 V.





†TL054M, TL054AM


TL054M25°C 0.64 5.5 0.56 4


TL054MFull range 10.5 9


TL054AM25°C 0.57 3.5 0.5 1.5

mV

VO = 0TL054AM

Full range 8.5 6.5


VO = 0,VIC = 0,RS = 50 Ω

TL054M25°C to85°C 21 20

µV/°CαVIO input offset voltageRS 50 Ω

TL054AM25°C to85°C 21 20

µV/°C


25°C 0.04 0.04 µV/mo


IIO Input offset current O ICSee Figure 5 125°C 1 20 2 20 nA


IIB Input bias current O ICSee Figure 5 125°C 10 50 20 50 nA


25°C–1to4

–2.3to

5.6

–11to11

–12.3to


Full range–1to4

–11to11

V

RL = 10 kΩ25°C 3 4.2 13 13.9




25°C 2.5 3.8 11.5 12.7V


RL = 10 kΩ25°C –2.5 –3.5 –12 –13.2



VVOM –g


25°C –2.3 –3.2 –11 –12V




125°C 10 35 15 35




IC ICR ,VO = 0, –55°C 65 83 75 92 dB

rejection ratio RS = 50 Ω 125°C 65 84 75 93

Supply voltage rejectionVCC± = ±5 V to ±15 V, 25°C 75 99 75 99


CC± ,VO = 0, –40°C 75 98 75 98 dB

ratio (∆VCC± /∆VIO) RS = 50 Ω 85°C 75 100 75 100

Supply current25°C 8.1 11.2 8.4 11.2


VO = 0, No load –55°C 7.8 12.8 8.1 12.8 mA(four am lifiers)

125°C 7.1 11.2 7.5 11.2



TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.§ For VCC± = ±5 V, VO = ±2.3 V, at VCC± = ±15 V, VO = ±10 V.






†TL054M, TL054AM



SR+ at unity gain –55°C 16.7 18.3

N ti l t tRL = 2 kΩ, CL = 100 pF, 125°C 12.9 16.7

V/µs

SRNegative slew rate at unity gain‡

L LSee Figure 1 25°C 13.9 10 15.9

V/µs

SR– unity gain‡–55°C 14.7 16.3

125°C 12.2 14.5

25°C 55 56


125°C 68 68nsVI(PP) = ±10 mV,

RL 2 kΩ25°C 55 57

ns


–55°C 51 52CL = 100 F,See Figures 1 and 2 125°C 68 69See Figures 1 and 2

25°C 24% 19%


125°C 25% 19%



nV/√Hz



25°C 4 4 µV


f = 1 kHz 25°C 0.01 0.01 pA/√Hz


RL = 2 kΩ,25°C 0.003% 0.003%

V 10 mV R 2 kΩ25°C 2.7 2.7



125°C 2.1 2.1



VI = 10 mV, RL = 2 kΩ,CL = 25 pF, See Figure 4 –55°C 58° 62°unity gain CL = 25 F, See Figure 4


or nontesting of other parameters.¶ For VCC± = ±5 V, Vorms = 1 V; for VCC± = ±15 V, Vorms = 6 V.





PARAMETER TEST CONDITIONS VCC ± = ± 5 V VCC ± = ± 15 V UNIT


VIO Input offset voltageVO = 0,RS = 50 Ω

VIC = 0,0.64 0.56 mV

IIO Input offset currentVO = 0, VIC = 0,See Figure 5

4 5 pA

IIB Input bias currentVO = 0, VIC = 0,See Figure 5

20 30 pA

VICR Common-mode input voltage range–2.3

to5.6

–12.3to

15.6V

VOMMaximum positive peak RL = 10 kΩ 4.2 13.9

VVOM + output voltage swing RL = 2 kΩ 3.8 12.7V

VOMMaximum negative peak RL = 10 kΩ –3.5 –13.2

VVOM –g

output voltage swing RL = 2 kΩ –3.2 –12V

AVDLarge-signal differentialvoltage amplification† RL = 2 kΩ, 72 133 V/mV




VIC = VICRmin,VO = 0, RS = 50 Ω 84 92 dB


VCC± = ±5 V to ±15 V,VO = 0, RS = 50 Ω 99 99 dB


VO = 0, No load 8.1 8.4 mA

VO1/VO2 Crosstalk attenuation AVD = 100 120 120 dB

† For VCC± = ±5 V, VO = ±2.3 V, at VCC± = ±15 V, VO = ±10 V.








SR+ Positive slew rate at unitygain† RL = 2 kΩ, CL = 100 pF,

15.4 17.8V/µs

SR–Negative slew rate at unitygain

L LSee Figure 1

13.9 15.9

V/µs

tr Rise time VI(PP) = ±10 mV,R 2 k

55 56ns

tf Fall time

( )RL = 2 kΩ,CL = 100 pF

55 57ns

Overshoot factorCL = 100 F,See Figures 1 and 2 24% 19%

V Equivalent input noise f = 10 Hz 75 75nV/√HzVn

qvoltage‡ RS = 20 Ω, f = 1 kHz 21 21

nV/√Hz


See Figure 3f = 10 Hz to 10 kHz 4 4 µV


f = 1 kHz 0.01 0.01 pA/√Hz


RL = 2 kΩ,0.003% 0.003%

B1 Unity-gain bandwidthVI = 10 mV, RL = 2 kΩ,CL = 25 pF, See Figure 4

2.7 2.7 MHz


VI = 10 mV, RL = 2 kΩ,CL = 25 pF, See Figure 4

61° 64°

† For VCC± = ±5 V, VI(PP) = ±1 V; for VCC± = ±15 V, VI(PP) = ±5 V.‡ This parameter is tested on a sample basis. For other test requirements, please contact the factory. This statement has no bearing on testing

or nontesting of other parameters.§ For VCC± = ±5 V, Vo(rms) = 1 V; for VCC± = ±15 V, Vo(rms) = 6 V.




PARAMETER MEASUREMENT INFORMATION

+

–

VCC+

VCC–

VIVO

RL

NOTE A: CL includes fixture capacitance.

CL(see Note A)

and Overshoot Test Circuit. Slew Rate, Rise/Fall Time,Figure 1

Overshoot

10%

90%

tr

Waveform. Rise Time and OvershootFigure 2

VCC–

VCC+

+

–

VO

RSRS

2 k Ω

. Noise-Voltage Test CircuitFigure 3Figure 4

VO

VCC–

VCC+

+

–

RLCL(see Note A)

VI

10 k Ω

100 Ω


Phase-Margin Test Circuit. Unity-Gain Bandwidth and

typical values

Typical values as presented in this data sheetrepresent the median (50% point) of deviceparametric performance.

input bias and offset current

At the picoamp-bias-current level typical of theTL05x and TL05xA, accurate measurement of thebias current becomes difficult. Not only does thismeasurement require a picoammeter, but testsocket leakages can easily exceed the actualdevice bias currents. To accurately measure these small currents,Texas Instruments uses a two-step process. The socket leakage is measured using picoammeters with biasvoltages applied but with no device in the socket. The device is then inserted in the socket, and a second testthat measures both the socket leakage and the device input bias current is performed. The two measurementsare then subtracted algebraically to determine the bias current of the device.

noiseBecause of the increasing emphasis on low noise levels in many of today’s applications, the input noise voltagedensity is sample tested at f = 1 kHz. Texas Instruments also has additional noise testing capability to meetspecific application requirements. Please contact the factory for details.

Figure 5. Input-Bias and Offset-Current Test Circuit

+–

VCC+

VCC–

Ground Shield

pA pA





TYPICAL CHARACTERISTICS

Table of GraphsFIGURE

VIO Input offset voltage Distribution 6 – 11

αVIO Temperature coefficient of input offset voltage Distribution 12, 13, 14

IIB Input bias currentvs Common-mode input voltagevs Free-air temperature

1516

IIO Input offset current vs Free-air temperature 16

VIC Common-mode input voltage range limitsvs Supply voltagevs Free-air temperature

1718

VO Output voltage vs Differential input voltage 19, 20

VOM Maximum peak output voltagevs Supply voltagevs Output currentvs Free-air temperature

2125, 2627, 28

VO(PP) Maximum peak-to-peak output voltage vs Frequency 22, 23, 24

AVD Large-signal differential voltage amplificationvs Load resistancevs Frequencyvs Free-air temperature

2930

31, 32, 33

CMRR Common-mode rejection ratiovs Frequencyvs Free-air temperature

34, 3536

zo Output impedance vs Frequency 37

kSVR Supply-voltage rejection ratio vs Free-air temperature 38

IOS Short-circuit output currentvs Supply voltagevs Timevs Free-air temperature

394041

ICC Supply currentvs Supply voltagevs Free-air temperature

42, 43, 4445, 46, 47

SR Slew ratevs Load resistancevs Free-air temperature

48 – 5354 –59

Overshoot factor vs Load capacitance 60

Vn Equivalent input noise voltage vs Frequency 61, 62

THD Total harmonic distortion vs Frequency 63

B1 Unity-gain bandwidthvs Supply voltagevs Free-air temperature

64, 65, 6667, 68, 69

φm Phase marginvs Supply voltagevs Load capacitancevs Free-air temperature

70, 71, 7273, 74, 7576, 77, 78

Phase shift vs Frequency 30

Voltage-follower small-signal pulse response vs Time 79

Voltage-follower large-signal pulse response vs Time 80





Figure 6

DISTRIBUTION OF TL051INPUT OFFSET VOLTAGE

8

–1.50

Per

cent

age

of U

nits

– %

VIO – Input Offset Voltage – mV

4

12

16

–0.9 –0.3 0 0.3 0.9 1.5

433 Units Tested From 1 Wafer LotVCC± = ±15 VTA = 25°CP Package

–1.1 –0.6 0.6 1.1

Figure 7

DISTRIBUTION OF TL051AINPUT OFFSET VOLTAGE

20

16

12

8

4

9006003000–300–600

VIO – Input Offset Voltage – µV

Per

cent

age

of U

nits

– %

0–900

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

393 Units Tested From 1 Wafer LotVCC± = ±15 VTA = 25°CP Package

Figure 8

–1.50

Per

cen

tage

of A

mp

lifie

rs –

%


–0.9 –0.3 0 0.3 0.9 1.5

3

6

9

12

15


476 Amplifiers Tested From 1 Wafer LotVCC± = ±15 VTA = 25°CP Package

–1.2 –0.6 0.6 1.2

Figure 9

0–900 –600 –300 0 300 600 900

5

10

15

20

VIO – Input Offset Voltage – µV

Per

cent

age

of A

mpl

ifier

s –

%

TA = 25°C


403 Amplifiers Tested From 1 Wafer LotVCC± = ±15 V

P Package






Figure 10


15

–40

Per

cent

age

of A

mpl

ifier

s –

%


5

25

30

–2 0 1 3–3 –1 2 4

VCC± = ±15 VTA = 25°CN Package

20

10

1140 Amplifiers Tested From 3 Wafer Lots

Figure 11


15

12

9

6

3

1.81.20.60–0.6–1.2


Per

cent

age

of A

mpl

ifier

s –

%0–1.8

1048 Amplifiers Tested From 3 Wafer LotsVCC± = ±15 VTA = 25°CN Package

Figure 12


TEMPERATURE COEFFICIENT

–250

Per

cent

age

of U

nits

– %

αVIO – Temperature Coefficient – µV/ °C

4

8

12

16

20

–20 –15 –10 –5 0 5 10 15 20 25

ÎÎÎÎÎÎÎÎÎÎ120 Units Tested From 2 Wafer LotsVCC± = ±15 VTA = 25°C to 125°CP Package

0

Per

cent

age

of A

mpl

ifier

s –

%

αVIO – Temperature Coefficient – µV/°C

20

30

5

10

15

20100–10–20–30



ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

172 Amplifiers Tested From 2 Wafer LotsVCC± = ±15 VTA = 25°C to 125°CP Package

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Outlier: One Unit at –34.6 µV/°C

Figure 13





Figure 14



–600

αVIO – Temperature Coefficient – µV/ °C

30

40

50

–40 –20 0 20 40 60

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

324 Amplifiers Tested From 3 Wafer LotsVCC± = ±15 VTA = 25°C to 125°CN Package

20

10

Per

cent

age

of A

mpl

ifier

s –

%

Figure 15

–15–10

– In

put B

ias

Cur

rent

– n

A

VIC – Common-Mode Input Voltage – V

–5

0

5

10

–10 –5 0 5 10 15

TA = 25°CVCC± = ±15 V

INPUT BIAS CURRENT vs

COMMON-MODE INPUT VOLTAGE

I IB

Figure 16

INPUT BIAS CURRENT AND INPUT OFFSET CURRENT†

vsFREE-AIR TEMPERATURE

IIO

IIB

TA – Free-Air Temperature – °C

– In

put B

ias

and

Offs

et C

urre

nts

– nA

0.00125

0.01

0.1

1

10

100

45 65 85 105 125

VCC± = ±15 VVO = 0VIC = 0

I IBan

d

I IO

Figure 17

0–16

– C

omm

on-M

ode

Inpu

t Vol

tage

– V

| VCC± | – Supply Voltage – V

–12

–8

–4

0

4

8

12

16

2 4 6 8 10 12 14 16

TA = 25°C

COMMON-MODEINPUT VOLTAGE RANGE LIMITS

vsSUPPLY VOLTAGE

VIC

ÎÎÎÎÎNegative Limit

ÎÎÎÎÎPositive Limit

† Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.






Figure 18

–75–20


–15

–10

–5

0

5

10

15

20

–50 –25 0 25 50 75 100 125

COMMON-MODEINPUT VOLTAGE RANGE LIMITS †


– C

omm

on-M

ode

Inpu

t Vol

tage

– V

VIC

ÎÎÎÎÎÎÎÎÎÎ

VCC± = ±15 V


Positive Limit


Negative Limit

Figure 19

– 200– 5

– O

utpu

t Vol

tage

– V

– 4

– 3

– 2

– 1

0

1

2

3

4

5

– 100 0 100 200

ÎÎÎÎÎÎTA = 25°C

OUTPUT VOLTAGEvs

DIFFERENTIAL INPUT VOLTAGE

VID – Differential Input Voltage – µV

VO

ÎÎÎÎÎÎÎÎRL = 600 ΩÎÎÎÎÎÎRL = 1 kΩ

ÎÎÎÎRL = 10 kΩÎÎÎÎÎÎÎÎ

RL = 2 kΩ

ÎÎÎÎVCC± = ±5 V

Figure 20

– 400– 15

VID – Differential Input Voltage – µV

– 10

– 5

0

5

10

15

– 200 0 200 400

OUTPUT VOLTAGEvs

DIFFERENTIAL INPUT VOLTAGE

– O

utpu

t Vol

tage

– V

VO

ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ

ÎÎÎÎRL = 600 ΩÎÎÎÎÎÎÎÎ

RL = 1 kΩÎÎÎÎRL = 2 kΩ

ÎÎÎÎRL = 10 kΩ


VCC± = ±15 V

ÎÎÎÎTA = 25°C

Figure 21

0

–8

– M

axim

um P

eak

Out

put V

olta

ge –

V


–4

0

4

8

12

16

2 4 6 8 10 12 14 16

TA = 25°C VOM+

RL = 10 kΩ

RL = 2 kΩ

VOM–

RL = 2 kΩ

RL = 10 kΩ

MAXIMUM PEAK OUTPUT VOLTAGEvs

SUPPLY VOLTAGE

–12

–16

VO

M






Figure 22

010 k

f – Frequency – Hz

5

10

15

20

25

30

100 k 1 M 10 M

– M

axim

um P

eak-

to-P

eak

Out

put V

olta

ge –

V RL = 2 kΩ

TA = 125°C

VCC± = ±5 V

TA = –55°C

VCC± = ±15 V

MAXIMUM PEAK-TO-PEAK OUTPUT VOLTAGE †

vsFREQUENCY

VO

(PP

)

Figure 23

– M

axim

um P

eak-

to-P

eak

Out

put V

olta

ge –

V

010 k


5

10

15

20

25

30

100 k 1 M 10 M

MAXIMUM PEAK-TO-PEAK OUTPUT VOLTAGEvs

FREQUENCY

VO

(PP

)

ÁÁÁÁÁÁÁÁÁÁÁÁ

TA = 25°CRL = 2 kΩ

ÁÁÁÁÁÁÁÁÁÁ

VCC± = ±5 V

ÁÁÁÁÁÁÁÁÁÁVCC± = ±15 V

Figure 24

20

25

30

15

10

5

010 k 100 k


1 M 10 M

MAXIMUM PEAK-TO-PEAK OUTPUT VOLTAGEvs

FREQUENCY

– M

axim

um P

eak-

to-P

eak

Out

put V

olta

ge –

VV

O(P

P)

ÁÁÁÁÁÁÁÁÁÁÁÁ

RL = 10 kΩTA = 25°C

ÁÁÁÁÁÁÁÁÁÁVCC± = ±15 V

ÁÁÁÁÁVCC± = ±5 V

Figure 25

00

– M

axim

um P

eak

Out

put V

olta

ge –

V

| IO | – Output Current – mA

1

2

3

4

5

4 12 16 208


OUTPUT CURRENT

|VO

M|


ÁÁÁÁÁÁ

VOM–

ÁÁÁÁÁÁ

VOM+

VCC± = ±5 VRL = 10 kΩTA = 25°C

2 6 10 14 18







Figure 26

00

2

4

6

8

10

12

14

16

10 20 30 40 50| IO | – Output Current – mA


OUTPUT CURRENT

– M

axim

um P

eak

Out

put V

olta

ge –

V|V

OM

|


VCC± = ±15 VRL = 10 kΩTA = 25°C

ÁÁÁÁÁÁ

VOM–

ÁÁÁÁÁÁ

VOM+

5 15 25 35 50

Figure 27

–75–5


–4

–3

–2

–1

0

1

2

3

4

5

–50 –25 0 25 50 75 100 125

RL = 2 kΩ

RL = 10 kΩ

RL = 10 kΩ

RL = 2 kΩ

VOM+

VCC± = ±5 V

MAXIMUM PEAK OUTPUT VOLTAGE †


– M

axim

um P

eak

Out

put V

olta

ge –

VV

OM

ÁÁÁÁÁÁ

VOM–

Figure 28

–75–16

–50 –25 0 25 50 75 100 125

–12

–8

–4

0

4

8

12

16


RL = 10 kΩ

RL = 10 kΩ

RL = 2 kΩ

RL = 2 kΩ

VCC± = ±15 V

MAXIMUM PEAK OUTPUT VOLTAGE †


– M

axim

um P

eak

Out

put V

olta

ge –

VV

OM

ÁÁÁÁÁÁÁÁ

VOM+

ÁÁÁÁÁÁ

VOM–

Figure 29

– D

iffer

entia

l Vol

tage

Am

plifi

catio

n –

V/m

V

0.40

RL – Load Resistance – k Ω

50

100

150

200

250

1 4 10 40 100

VO = ±1 VTA = 25°C

VCC± = ±15 V

LARGE-SIGNAL DIFFERENTIAL VOLTAGEAMPLIFICATION

vsLOAD RESISTANCE

VCC± = ±5 V

AV

D






10f – Frequency – Hz

10 M100 1 k 10 k 100 k 1 M0.1

1

101

104

102

103

VCC± = ±15 VRL = 2 kΩCL = 25 pFTA = 25°C

AVD

Phase Shift

0°

30°

60°

90°

120°

150°

180°

LARGE-SIGNAL DIFFERENTIAL VOLTAGEAMPLIFICATION AND PHASE SHIFT

vsFREQUENCY

106

105–

Diff

eren

tial V

olta

ge A

mpl

ifica

tion

– V

/mV

AV

D

mφ

– P

hase

Shi

ft

Figure 30

–7510


125

1000

–50 –25 0 25 50 75 100

40

100

400

RL = 2 kΩ

RL = 10 kΩ

VCC± = ±5 VVO = ±2.3 V

– D

iffer

entia

l Vol

tage

Am

plifi

catio

n –

V/m

VA

VD

Figure 31

TL051 AND TL052LARGE-SIGNAL DIFFERENTIAL

VOLTAGE AMPLIFICATION †


Figure 32

–7510


125

1000

–50 –25 0 25 50 75 100

40

100

400

RL = 2 kΩ

RL = 10 kΩ

VCC± = ±5 VVO = ±2.3 V

– D

iffer

entia

l Vol

tage

Am

plifi

catio

n –

V/m

VA

VD

TL054LARGE-SIGNAL DIFFERENTIAL

VOLTAGE AMPLIFICATION †








Figure 33

–7510

125

1000

–50 –25 0 25 50 75 100

40

100

400 RL = 10 kΩ

RL = 2 kΩ


LARGE-SIGNAL DIFFERENTIAL VOLTAGEAMPLIFICATION †


ÁÁÁÁÁÁÁÁÁÁ

VCC± = ±15 VVO = 10 V

– D

iffer

entia

l Vol

tage

Am

plifi

catio

n –

V/m

VA

VD

Figure 34

100

CM

RR

– C

omm

on-M

ode

Rej

ectio

n R

atio

– d

B


10 M

100

100 1 k 10 k 100 k 1 M

10

20

30

40

50

60

70

80

90VCC± = ±5 VTA = 25°C

COMMON-MODE REJECTION RATIOvs

FREQUENCY

Figure 35

90

80

70

60

50

40

30

20

10

100

01 M100 k10 k1 k100 10 M


10

VCC± = ±15 VTA = 25°C

COMMON-MODE REJECTION RATIOvs

FREQUENCY

CM

RR

– C

omm

on-M

ode

Rej

ectio

n R

atio

– d

B

Figure 36

–7570


125

100

75

80

85

90

95

–50 –25 0 25 50 75 100

VIC = VICRMin

VCC± = ±5 V

VCC± = ±15 V

COMMON-MODE REJECTION RATIO†


CM

RR

– C

omm

on-M

ode

Rej

ectio

n R

atio

– d

B






Figure 37

1 k0.1

– O

utpu

t Im

peda

nce

–

1 M

100

10 k 100 k

1

10


AVD = 100

AVD = 10

AVD = 1

VCC± = ±15 VTA = 25°Cro (open loop) ≈ 250 Ω

OUTPUT IMPEDANCEvs

FREQUENCY

zo

Ω

0.4

4

40

Figure 38

–7590

kSV

R –

Sup

ply-

Vol

tage

Rej

ectio

n R

atio

– d

B

TA – Free-Air Temperature – °C125–50 –25 0 25 50 75 100

94

98

VCC± = ±5 V to ±15 V

SUPPLY-VOLTAGE REJECTION RATIO †


110

106

102

ÁÁÁÁÁÁ

kS

VR

Figure 39

0

IOS

– S

hort

-Circ

uit O

utpu

t Cur

rent

– m

A


16

60

2 4 6 8 10 12 14

0

20

40

VO = 0TA = 25°C

VID = 100 mV

VID = –100 mV

SHORT-CIRCUIT OUTPUT CURRENTvs

SUPPLY VOLTAGE

–20

–40

–60

ÁÁÁÁ

I OS

Figure 40

0

t – Time – s

40

20

–20

–40

60

–60

5040302010 600

TA = 25°CVCC± = ±15 V

VID = 100 mV

VID = –100 mV

SHORT-CIRCUIT OUTPUT CURRENTvs

TIME

IOS

– S

hort

-Circ

uit O

utpu

t Cur

rent

– m

A

ÁÁÁÁÁÁ

I OS







Figure 41

VO = 0

0


40

20

–20

–40

60

–601007550250–25–50 125–75

VCC± = ±15 V

VCC± = ±5 V

VCC± = ±5 V

VCC± = ±15 V

SHORT-CIRCUIT OUTPUT CURRENT†


IOS

– S

hort

-Circ

uit O

utpu

t Cur

rent

– m

A

ÁÁÁÁ

I OS

ÎÎÎÎÎÎÎÎÎÎÎÎ

VID = 100 m V

ÎÎÎÎÎÎVID = –100 m V

Figure 42

00

|VCC± | – Supply Voltage – V

16

3

2 4 6 8 10 12 14

0.5

1

1.5

2

2.5

TA = 25°C

TA = –55°C

TA = 125°C

VO = 0No Load

ICC

– S

uppl

y C

urre

nt –

mA

ÁÁÁÁÁÁ

I CC

TL051SUPPLY CURRENT†

vsSUPPLY VOLTAGE

00

5

2 4 6 8 10 12 14

1

2

3

4TA = 25°CTA = –55°C

TA = 125°C

VO = 0No Load

16

ICC

– S

uppl

y C

urre

nt –

mA

ÁÁÁÁÁÁ

I CC


Figure 43


vsSUPPLY VOLTAGE

Figure 44

00

|VCC± | – Supply Voltage – V

16

10

2 4 6 8 10 12 14

2

4

6

8

TA = 25°CÎÎÎÎÎÎÎÎÎÎÎÎ

TA = –55°C

TA = 125°C

VO = 0No Load

ICC

– S

uppl

y C

urre

nt –

mA

ÁÁÁÁ

I CC


vsSUPPLY VOLTAGE






Figure 45

–750

125

3

–50 –25 0 25 50 75 100

0.5

1

1.5

2

2.5


VCC± = ±5 V

VCC± = ±15 V

VO = 0No Load

ICC

– S

uppl

y C

urre

nt –

mA

ÁÁÁÁ

I CC



Figure 46

–750

125

5

–50 –25 0 25 50 75 100

1

2

3

4VCC± = ±15 V

VCC± = ±5 V

ICC

– S

uppl

y C

urre

nt –

mA

ÁÁÁÁÁÁ

I CC


VO = 0No Load



Figure 47

–750

125

10

–50 –25 0 25 50 75 100

2

4

6

8


ICC

– S

uppl

y C

urre

nt –

mA

ÁÁÁÁÁÁ

I CC


VCC± = ±5 V


VCC± = ±15 V

VO = 0No Load



Figure 48

25

20

15

10

SR

– S

lew

Rat

e –

V/

5

0100401041


0.4

SR +

SR –

CL = 100 pFTA = 25°CSee Figure 1

VCC± = ±5 V

µs

TL051SLEW RATE

vsLOAD RESISTANCE







10410.40


25

5

10

15

20

SR–

SR+

40 100


VCC± = ±5 VSR

– S

lew

Rat

e –

V/µ

s

Figure 49

TL052SLEW RATE

vsLOAD RESISTANCE

Figure 50

25

20

15

10

SR

– S

lew

Rat

e –

V/

5

0100401041


0.4

ÎÎÎSR +

SR –


VCC± = ±5 V

µs

TL054SLEW RATE

vsLOAD RESISTANCE

Figure 51

25

00.4


5

10

15

20

30

1 4 10 40 100

SR +

SR –

SR

– S

lew

Rat

e –

V/

µs


VCC± = ±15 V

TL051SLEW RATE

vsLOAD RESISTANCE

1 4 10 40 1000.4RL – Load Resistance – k Ω

SR+

SR–


VCC± = ±15 VSR

– S

lew

Rat

e –

V/µ

s

0

25

5

10

15

20

Figure 52

TL052SLEW RATE

vsLOAD RESISTANCE





Figure 53

20

00.4


5

10

15

25

1 4 10 40 100

SR +

SR –

SR

– S

lew

Rat

e –

V/

µs


VCC± = ±5 V

TL054SLEW RATE

vsLOAD RESISTANCE

Figure 54

–750

TA – Free-Air Temperature – °C125

30

–50 –25 0 25 50 75 100

5

10

15

20

25

VCC± = ±5 VRL = 2 kΩ

SR +

SR –

SR

– S

lew

Rat

e –

V/

µs

TL051SLEW RATE†


Figure 55

SR+

SR–

–750


5

10

15

20

25

VCC± = ±5 VRL = 2 kΩCL = 100 pFSee Figure 1

SR

– S

lew

Rat

e –

V/

µs

TL052SLEW RATE†


Figure 56

SR+

SR–

–750


5

10

15

20


SR

– S

lew

Rat

e –

V/

µs

TL054SLEW RATE†








Figure 57

–750


30

–50 –25 0 25 50 75 100

5

10

15

20

25


SR –

SR +

SR

– S

lew

Rat

e –

V/µ

s

TL051SLEW RATE†


SR–

SR+

–750


5

10

15

20

25


SR

– S

lew

Rat

e –

V/

µs

Figure 58

TL052SLEW RATE†


Figure 59

SR–

SR+

–750


5

10

15

20


SR

– S

lew

Rat

e –

V/

µs

TL054SLEW RATE†


Figure 60


See Figure 1ÎÎÎÎÎTA = 25°CÎÎÎÎÎRL = 2 kΩ

ÎÎÎÎÎÎÎÎÎÎÎÎ

VI(PP) = ±10 mV

00

Ove

rsho

ot F

acto

r –

%

CL – Load Capacitance – pF

300

50

50 100 150 200 250

10

20

30

40

OVERSHOOT FACTORvs

LOAD CAPACITANCE

ÎÎÎÎÎVCC± = ±15 V







Figure 61f – Frequency – Hz

10

Vn

– E

quiv

alen

t Inp

ut N

oise

Vol

tage

–

10

20

30

40

50

70

100

100 1 k 10 k 100 k

VCC± = ±15 VRS = 20 ΩTA = 25°CSee Figure 3

nV/

Hz

TL051EQUIVALENT INPUT NOISE VOLTAGE

vsFREQUENCY


10

Vn

– E

quiv

alen

t Inp

ut N

oise

Vol

tage

–

10

20

30

40

50

70

100

100 1 k 10 k 100 k

nV/

Hz ÁÁÁÁÁ

ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ

VCC± = ±15 VRS = 20 ΩTA = 25°CSee Figure 3

Figure 62

TL052 AND TL054EQUIVALENT INPUT NOISE VOLTAGE

vsFREQUENCY

VO(RMS) = 6 V

0.001100


TH

D –

Tot

al H

arm

onic

Dis

tort

ion

– %

0.01

0.1

1

1 k 10 k 100 k

VCC± = ±15 VAVD = 1

TA = 25°C

TOTAL HARMONIC DISTORTIONvs

FREQUENCY

0.004

0.04

0.4

Figure 63 Figure 64

02.7

– U

nit

y-G

ain

Ban

dw

idth

– M

Hz


16

3.2

2 4 6 8 10 12 14

2.8

2.9

3

3.1

VI = 10 mVRL = 2 kΩCL = 25 pFTA = 25°CSee Figure 4

B1

TL051UNITY-GAIN BANDWIDTH

vsSUPPLY VOLTAGE






Figure 65

ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ

VI = 10 mVRL = 2 kΩCL = 25 pF

See Figure 4TA = 25°C

2.7

– U

nit

y-G

ain

Ban

dw

idth

– M

Hz


16

3.2

4 6 8 10 12 14

2.8

2.9

3

3.1

B1


vsSUPPLY VOLTAGE

Figure 66

ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ2.4

– U

nit

y-G

ain

Ban

dw

idth

– M

Hz


16

2.9

0 2 6 8 10 14

2.5

2.6

2.7

2.8

B1

ÎÎÎÎÎÎÎÎVI = 10 mVÎÎÎÎÎÎÎÎÎÎRL = 2 kΩ

ÎÎÎÎÎÎCL = 25 pF

ÎÎÎÎÎÎÎÎÎÎÎÎSee Figure 4

ÎÎÎÎÎÎÎÎÎÎTA = 25°C

4 12


vsSUPPLY VOLTAGE

Figure 67

–750


4

–50 –25 0 25 50 75 100

1

2

3

See Figure 4

VI = 10 mVRL = 2 kΩCL = 25 pF

VCC± = ±15 V

VCC± = ±5 V

– U

nity

-Gai

n B

andw

idth

– M

Hz

B1

TL051UNITY-GAIN BANDWIDTH †


Figure 68

See Figure 4

VCC± = ±5 V to ±15 V

RL = 2 kΩCL = 25 pFTA = 25°C

VI = 10 mV

–750


4

–50 –25 0 25 50 75 100

1

2

3

– U

nity

-Gai

n B

andw

idth

– M

Hz

B1








Figure 69

See Figure 4

VCC± = ±5 V to ±15 V

RL = 2 kΩCL = 25 pFTA = 25°C

VI = 10 mV

–750


4

–50 –25 0 25 50 75 100

1

2

3

– U

nity

-Gai

n B

andw

idth

– M

Hz

B1



Figure 70

055°

m

16

65°

2 4 6 8 10 12 14

57°

59°

61°

63°

|VCC± | –Supply Voltage – V

See Figure 4TA = 25°CCL = 25 pFRL = 2 kΩVI = 10 mVφ

– P

hase

Mar

gin

TL051PHASE MARGIN

vsSUPPLY VOLTAGE

Figure 71

55°

m

16

65°

4 6 8 10 12 14

57°

59°

61°

63°


φ–

Pha

se M

argi

n

See Figure 4TA = 25°CCL = 25 pFRL = 2 kΩVI = 10 mV

TL052PHASE MARGIN

vsSUPPLY VOLTAGE

Figure 72

55°

m

16

65°

0 4 8 10 12 14

57°

59°

61°

63°


φ–

Pha

se M

argi

n

62


See Figure 4TA = 25°CCL = 25 pFRL = 2 kΩVI = 10 mV

TL054PHASE MARGIN

vsSUPPLY VOLTAGE







Figure 73

040°

CL – Load Capacitance – pF100

70°

10 20 30 40 50 60 70 80 90

45°

50°

55°

60°

65°

VI = 10 mVRL = 2 kΩTA = 25°CSee Figure 4

VCC± = ±15 VSee Note A

VCC± = ±5 V

mφ

– P

hase

Mar

gin

TL051PHASE MARGIN†

vsLOAD CAPACITANCE

Figure 74

0CL – Load Capacitance – pF

70°

10 20 30 40 50 60 70 80 9045°

50°

55°

60°

65°


ÎÎÎÎÎVCC± = ±15 V

See Note A


VCC± = ±5 V

mφ

– P

hase

Mar

gin


vsLOAD CAPACITANCE

0CL – Load Capacitance – pF

100

70°

10 20 30 40 50 60 70 80 9045°

50°

55°

60°

65°



VCC± = ±15 VSee Note A


mφ

– P

hase

Mar

gin


vsLOAD CAPACITANCE

Figure 75

† Values of phase margin below a load capacitance of 25 pF were estimated.





Figure 76

–7555°


65°

–50 –25 0 25 50 75 100

57°

59°

61°

63°VCC± = ±15 V

VCC± = ±5 V


CL = 25 pF

VI = 10 mVRL = 2 kΩ

See Figure 4

mφ

– P

hase

Mar

gin



Figure 77

–7555°


65°

–50 –25 0 25 50 75 100

57°

59°

61°

63°VCC± = ±15 V

VCC± = ±5 V

ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ

CL = 25 pF


See Figure 4

mφ

– P

hase

Mar

gin



–7555°


65°

–50 –25 0 25 50 75 100

57°

59°

61°

63°VCC± = ±15 V

VCC± = ±5 V

ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ

CL = 25 pF


See Figure 4

mφ

– P

hase

Mar

gin



Figure 78







–16

– O

utpu

t Vol

tage

– m

V

t – Time – µs

1.2

16

0 0.2 0.4 0.6 0.8 1.0

–12

–8

–4

0

4

8

12

VOLTAGE-FOLLOWERSMALL-SIGNAL

PULSE RESPONSE

VO


VCC± = ±15 VRL = 2 kΩCL = 100 pFTA = 25°CSee Figure 1

Figure 79

–8

t – Time – µs

6

8

0 1 2 3 4 5

–6

–4

–2

0

2

4

6

VOLTAGE-FOLLOWERLARGE-SIGNAL

PULSE RESPONSE

– O

utpu

t Vol

tage

– V

VO

ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ

VCC± = ±15 VRL = 2 kΩCL = 100 pFTA = 25°CSee Figure 1

Figure 80




APPLICATION INFORMATION

output characteristics

All operating characteristics (except bandwidth and phase margin) are specified with 100-pF load capacitance.The TL05x and TL05xA drive higher capacitive loads; however, as the load capacitance increases, the resultingresponse pole occurs at lower frequencies, thereby causing ringing, peaking, or even oscillation. The value ofthe load capacitance at which oscillation occurs varies with production lots. If an application appears to besensitive to oscillation due to load capacitance, adding a small resistance in series with the load should alleviatethe problem. Capacitive loads of 1000 pF and larger may be driven if enough resistance is added in series withthe output (see Figure 81 and Figure 82).

(a) CL = 100 pF, R = 0 (b) CL = 300 pF, R = 0 (c) CL = 350 pF, R = 0

(d) CL = 1000 pF, R = 0 (e) CL 1000 pF, R = 50 Ω (f) CL = 1000 pF, R = 2 kΩ

Figure 81. Effect of Capacitive Loads

+

–

5 V

– 5 V

15 V

– 15 V

CL(see Note A)

2 kΩ

VOR


Figure 82. Test Circuit for Output Characteristics






input characteristics

The TL05x and TL05xA are specified with a minimum and a maximum input voltage that, if exceeded at eitherinput, could cause the device to malfunction.

Because of the extremely high input impedance and resulting low bias current requirements, the TL05x andTL05xA are well suited for low-level signal processing; however, leakage currents on printed-circuit boards andsockets can easily exceed bias current requirements and cause degradation in system performance. It is goodpractice to include guard rings around inputs (see Figure 83). These guards should be driven from alow-impedance source at the same voltage level as the common-mode input.

Unused amplifiers should be connected as grounded unity-gain followers to avoid possible oscillation.

+

–

+

–

+

–

VO

VO VO

VI

VI

(a) NONINVERTING AMPLIFIER (b) INVERTING AMPLIFIER (c) UNITY-GAIN AMPLIFIER

VI

Figure 83. Use of Guard Rings

noise performance

The noise specifications in operational amplifier circuits are greatly dependent on the current in the first-stagedifferential amplifier. The low input bias current requirements of the TL05x and TL05xA result in a very lowcurrent noise. This feature makes the devices especially favorable over bipolar devices when using values ofcircuit impedance greater than 50 kΩ.





phase meter

The phase meter in Figure 84 produces an output voltage of 10 mV per degree of phase delay between the twoinput signals VA and VB. The reference signal VA must be the same frequency as VB. The TLC3702 comparators(U1) convert these two input sine waves into ±5-V square waves. Then R1 and R4 provide level shifting priorto the SN74HC109 dual J-K flip flops.

Flip-flop U2B is connected as a toggle flip-flop and generates a square wave at half the frequency of VB.Flip-flop U2A also produces a square wave at half the input frequency. The pulse duration of U2A varies fromzero to half the period, where zero corresponds to zero phase delay between VA and VB and half the periodcorresponds to VB lagging VA by 360 degrees.

The output pulse from U2A causes the TLC4066 (U3) switch to charge the TL05x (U4) integrator capacitors C1and C2. As the phase delay approaches 360 degrees, the output of U4A approximates a square wave and U2Ahas an output of almost 2.5 V. U4B acts as a noninverting amplifier with a gain of 1.44 in order to scale the0- to 2.5-V integrator output to a 0- to 3.6-V output range.

R8 and R10 provide output gain and zero-level calibration. This circuit operates over a 100-Hz to 10-kHzfrequency range.

+

–+

–

+ 5 V

R2100 kΩ

R1

100 kΩU1A

VAS

1JC1

U2A

1KR

NC

U2B

2K

R3

VBU1B

R6

10 kΩ

R7

10 kΩ

+ 5 V

S2J

C1

R

NC100 kΩ

R4100 kΩ

U3

R5 C110 kΩ 0.016 µF

C20.016 µF

U4AU4B VO

R9

20 kΩ

R8

Gain50 kΩ

+ 5 V

R1010 kΩZero

– 5 V

NOTE A: U1 = TLC3702; VCC± = ±5 VU2 = SN74HC109U3 = TLC4066U4, U5 = TL05x; VCC± = ±5 V

Figure 84. Phase Meter






precision constant-current source over temperature

A precision current source (see Figure 85) benefits from the high input impedance and stability of TexasInstruments enhanced-JFET process. A low-current shunt regulator maintains 2.5 V between the inverting inputand the output of the TL05x. The negative feedback then forces 2.5 V across the current setting resistor R;therefore, the current to the load is simply 2.5 V divided by R.

Possible choices for the shunt regulator include the LT1004, LT1009, and LM385. If the regulator’s cathodeconnects to the operational amplifier output, this circuit sources load current. Similarly, if the cathode connectsto the inverting input, the circuit sinks current from the load. To minimize output current change with temperature,R should be a metal film resistor with a low temperature coefficient. Also, this circuit must be operated withsplit-voltage supplies.

+

–

+

–

150 pF

U2

+ 15 V

U1

– 15 V

R

100 kΩ

IO

LoadV = 0 to 10 V

(a) SOURCE CURRENT LOAD (b) SINK CURRENT LOAD

V = 0 to –10 VLoad

II

R

– 15 V

U1

+ 15 V

150 pF

U2

100 kΩ

NOTE B: U1 = 1/2 TL05x U2 = LM385, LT1004, or LT1009 voltage reference

I = 2.5 VR

, R = Low temperature coefficient metal film resistor

Figure 85. Precision Constant-Current Source





instrumentation amplifier with adjustable gain/null

The instrumentation amplifier in Figure 86 benefits greatly from the high input impedance and stable input offsetvoltage of the TL05xA. Amplifiers U1A, U1B, and U2A form the actual instrumentation amplifier, while U2Bprovides offset null. Potentiometer R1 provides gain adjust. With R1 = 2 kΩ, the circuit gain equals 100, whilewith R1 = 200 kΩ, the circuit gain equals two. The following equation shows the instrumentation amplifier gainas a function of R1:

AV 1 R2 R3R1

Readjusting the offset null is necessary whenever the circuit gain is changed. If U2B is needed for anotherapplication, R7 can be terminated at ground. The low input offset voltage of the TL05xA minimizes the dc errorof the circuit. For best matching, all resistors should be one percent tolerance. The matching between R4, R5,R6, and R7 controls the CMRR of this application.

The following equation shows the output voltages when the input voltage equals zero. This dc error can benulled by adjusting the offset null potentiometer; however, any change in offset voltage over time or temperaturealso creates an error. To calculate the error from changes in offset, consider the three offset components in theequation as delta offsets rather than initial offsets. The improved stability of Texas Instruments enhanced JFETsminimizes the error resulting from change in input offset voltage with time. Assuming VI equals zero, VO canbe shown as a function of the offset voltage:

–VIO1R3R1 R7

R5 R7 1 R6

R4 R6

R41 R2

R1 VIO3

1 R6R4

VO VIO21 R3R1 R7

R5 R7 1 R6

R4 R2

R1R6R4

NOTE A: U1 and U2 = TL05xA; VCC± = ± 15 V.

100 kΩ

U2A

+

–

+

–

+

–

+

–

VI–U1A

R4

10 kΩ

R6

10 kΩ

200 kΩ

R2

10 MΩ

100 kΩ

10 turn

AV = 2 to 1002 kΩ R1

U1B

VI+

R5 R7U2B

0.1 µF

Offset Null

VCC–

82 kΩ

82 kΩ

VCC+R3

VO

10 kΩ 10 kΩ

10 MΩ

1 kΩ

Figure 86. Instrumentation Amplifier






high input impedance log amplifier

The low input offset voltage and high input impedance of the TL05xA creates a precision log amplifier (seeFigure 87). IC1 is a 2.5-V, low-current precision, shunt regulator. Transistors Q1 and Q2 must be a closelymatched NPN pair. For best performance over temperature, R4 should be a metal film resistor with a lowtemperature coefficient.

In this circuit, U1A serves as a high-impedance unity-gain buffer. Amplifier U1B converts the input voltage toa current through R1 and Q1. Amplifier U1C, IC1, and R4 form a 1-µA temperature-stable current source thatsets the base-emitter voltage of Q2. U1D amplifies the difference between the base-emitter voltage of Q1 andQ2 (see Figure 88). The output voltage is given by the following equation:

VO –1 R6R5 kT

q

InVI

R1 1 10–6

where k 1.38 10–23, q 1.602 10–19,and T is in degrees kelvin.

_+

U1A_+

_+U1B

_+U1C U1D

VI

R1

10 kΩ

Q1 Q2

2N2484

R215 V 10 kΩ

2.5 MΩ

R4

150 pF

C1

IC1270 kΩ

R3

–15V

R510 kΩ

R6

10 kΩ

VO(see equation above)

NOTE A: U1A through U1D = TL05xA. IC1 = LM385, LT1004, or LT1009 voltage reference.

Figure 87. Log Amplifier

0 1 2 3 4 5 6

– D

iffer

entia

l Vol

tage

Am

plifi

catio

n –

dB


7 8 9 10–0.4

–0.35

–0.3

–0.25

–0.2

–0.15

–0.1

ÁÁÁÁÁÁ

AV

D

Figure 88. Output Voltage vs Input Voltage for Log Amplifier





analog thermometer

By combining a current source that does not vary over temperature with an instrumentation amplifier, a preciseanalog thermometer can be built (see Figure 89). Amplifier U1A and IC1 establish a constant current throughthe temperature-sensing diode D1. For this section of the circuit to operate correctly, the TL05x must use splitsupplies and R3 must be a metal-film resistor with a low temperature coefficient.

The temperature-sensitive voltage from the diode is compared to a temperature-stable voltage reference setby IC2. R4 should be adjusted to provide the correct output voltage when the diode is at a known temperature.Although this potentiometer resistance varies with temperature, the divider ratio of the potentiometer remainsconstant.

Amplifiers U1B, U2A, and U2B form the instrumentation amplifier that converts the difference between the diodeand reference voltage to a voltage proportional to the temperature. With switch S1 closed, the amplifier gainequals 5 and the output voltage is proportional to temperature in degrees Celsius. With S1 open, the amplifiergain is 9 and the output is proportional to temperature in degrees Fahrenheit. Every time that S1 is changed,R4 must be recalibrated. By setting S1 correctly, the output voltage equals 10 mV per degree (C or F).

+

–

+

–

+

–

IC1

C1

150 pFR1

100 kΩ U1A

R3 10 kΩ(see Note B)

D1(see Note A) +15 V

R2 100 kΩ

IC2R450 kΩ

U1B

R6

10 kΩ

R55 kΩ

R75 kΩ

S1(see Note C)

R8

10 kΩ

U2AR10

10 kΩR11

R9 R12

10 kΩ 10 kΩ

+15 V+

–

–15 V

10 kΩ

VO(see Note D)

U2B

NOTES: A. Temperature-sensing diode ≈ (–2 mV/°C)B. Metal-film resistor (low temperature coefficient)C. Switch open for °F and closed for °CD. VO α temperature; 10 mV/°C or 10 mV/°FE. U1, U2 = TL05x. IC1, IC2 = LM385, LT1004, or LT1009 voltage reference

Figure 89. Analog Thermometer






voltage-ratio-to-dB converter

The application in Figure 90 measures the amplitude ratio of two signals and then converts the ratio to decibels(see Figure 91). The output voltage provides a resolution of 100 mV/dB. The two inputs can be either dc orsinusoidal ac signals. When using ac signals, both signals should be the same frequency or output glitches willoccur. For measuring two input signals of different frequencies, extra filtering should be added after therectifiers.

The circuit contains three low-offset TL05xA devices. Two of these devices provide the rectification andlogarithmic conversion of the inputs. The third TL05xA forms an instrumentation amplifier. The stage performingthe logarithmic conversion also requires two well-matched npn transistors.

The input signal first passes through a high impedance unity-gain buffer U1A (U2A). Then U1B (U2B) rectifiesthe input signal at a gain of 0.5, and U1C (U2C) provides a noninverting gain of 2 so that the system gain is stillone. U1D (U2D), R6 (R13), and Q1 (Q2) perform the logarithmic conversion of the rectified input signal. Theinstrumentation amplifier formed by U3A, U3B, U3D scales the difference of the two logarithmic voltages by again of 33.6. As a result, the output voltage equals 100 mV/dB. The 1-kΩ potentiometer on the input of U3Ccalibrates the zero dB reference level. The following equations are used to derive the relationship between theinput voltage ratio expressed in decibels and the output voltage.

X dB 20 logVAVB 20

In VA – VB

In (10)

X dB 8.686 In VA – In VB

VBE(Q1) kTq In VA

R IS VBE(Q2)

kTq In VB

R IS

VBE VBE(Q1) –VBE(Q2) kTq In VA

– In VB

X dB 8.686kTq

VBE(Q1) –VBE(Q2) 336 VBE(Q1) –VBE(Q2)

at 25°C

where

k 1.38 10–23, q 1.602 10–19, and T is in kelvins.

This would give a resolution of 1 V/dB. Therefore, the gain of the instrumentation amplifier is set at 33.6 to obtain100 mV/dB.





_+

_+

_+

_+

_+

_+

_+

_+

_+_

+_+

_+

U1A

U3A

U3B

U3C

U3D

U1BU1C

U1D

U2AU2B

U2CU2D

VA

VB

VO

R1

20 kΩ

R8

20 kΩ

R2

10 kΩ

R9

10 kΩ

D1

D2

R330 kΩ

R1030 kΩ

R410 kΩ

R5

10 kΩ

R6

10 kΩR7

10 kΩ

2N2484 Q1

Q2

R16

16.3 kΩ

R18

10 kΩ

R20

10 kΩ

R1110 kΩ

R12

10 kΩ

R13

10 kΩ

2N2484

R14

10 kΩ

R76

16.3 kΩR19

10 kΩR2110 kΩ

C1

15 V

–15 V

82 kΩ

1 kΩ

82 kΩ

NOTE A: U1A through U3D = TL05xA, VCC± = ±15 V. D1 and D2 = 1N914.

Figure 90. Voltage-Ratio-to-dB Converter

0 1 2 3 4 5 6

– O

utpu

t Vol

tage

– V

7 8 9 10–2

–1

0

1

2

Ratio – VA /VB

VO

Figure 91. Output Voltage vs the Ratio of the Input Voltages for Voltage-to-dB Converter






macromodel information

Macromodel information provided was derived using Microsim Parts , the model generation software usedwith Microsim PSpice . The Boyle macromodel (see Note 5) and subcircuit Figure 92 are generated using theTL05x typical electrical and operating characteristics at TA = 25°C. Using this information, output simulationsof the following key parameters can be generated to a tolerance of 20% (in most cases):

Maximum positive output voltage swing Maximum negative output voltage swing Slew rate Quiescent power dissipation Input bias current Open-loop voltage amplification

Unity-gain frequency Common-mode rejection ratio Phase margin DC output resistance AC output resistance Short-circuit output current limit

NOTE 5: G. R. Boyle, B. M. Cohn, D. O. Pederson, and J. E. Solomon, “Macromodeling of Intergrated Circuit Operational Amplifiers”, IEEEJournal of Solid-State Circuits, SC-9, 353 (1974).

OUT

+

–

+

–

+

–

+

–

+–

+

–

+

– +

–

+–

.SUBCKT TL05x 1 2 3 4 5C1 11 12 3.988E–12C2 6 7 15.00E–12DC 5 53 DXDE 54 5 DXDLP 90 91 DXDLN 92 90 DXDP 4 3 DXEGND 99 0 POLY (2) (3,0) (4,0) 0 .5 .5FB 7 99 POLY (5) VB VC VE VLP+ VLN 0 2.875E6 –3E6 3E6 3E6 –3E6GA 6 0 11 12 292.2E–6GCM 0 6 10 99 6.542E–9ISS 3 10 DC 300.0E–6HLIM 90 0 VLIM 1KJ1 11 2 10 JXJ2 12 1 10 JXR2 6 9 100.0E3

RD1 4 11 3.422E3RD2 4 12 3.422E3R01 8 5 125R02 7 99 125RP 3 4 11.11E3RSS 10 99 666.7E6VB 9 0 DC 0VC 3 53 DC 3VE 54 4 DC 3.7VLIM 7 8 DC 0VLP 91 0 DC 28VLN 0 92 DC 28.MODEL DX D (IS=800.0E–18).MODEL JX PJF (IS=15.00E–12 BETA=185.2E–6+ VTO=–.1).ENDS

VCC+

RP

IN –2

IN+3

VCC–

VAD

RD1

11

J1 J2

10

RSS ISS

3

12

RD2

60

VE

54DE

DP

VC

DC

4

C1

53

R2

6

9

EGND

VB

FB

C2

GCM GA VLIM

8

5

RO1

RO2

HLIM

90

DLP

91

DLN

92

VLNVLP

99

7

Figure 92. Boyle Macromodel and Subcircuit

PSpice and Parts are trademarks of MicroSim Corporation.

Macromodels, simulation models, or other models provided by TI,directly or indirectly, are not warranted by TI as fully representing allof the specification and operating characteristics of thesemiconductor product to which the model relates.

IMPORTANT NOTICE

Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinueany product or service without notice, and advise customers to obtain the latest version of relevant informationto verify, before placing orders, that information being relied on is current and complete. All products are soldsubject to the terms and conditions of sale supplied at the time of order acknowledgement, including thosepertaining to warranty, patent infringement, and limitation of liability.

TI warrants performance of its semiconductor products to the specifications applicable at the time of sale inaccordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extentTI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarilyperformed, except those mandated by government requirements.

CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OFDEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICALAPPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, ORWARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHERCRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TOBE FULLY AT THE CUSTOMER’S RISK.

In order to minimize risks associated with the customer’s applications, adequate design and operatingsafeguards must be provided by the customer to minimize inherent or procedural hazards.

TI assumes no liability for applications assistance or customer product design. TI does not warrant or representthat any license, either express or implied, is granted under any patent right, copyright, mask work right, or otherintellectual property right of TI covering or relating to any combination, machine, or process in which suchsemiconductor products or services might be or are used. TI’s publication of information regarding any thirdparty’s products or services does not constitute TI’s approval, warranty or endorsement thereof.

Copyright 1999, Texas Instruments Incorporated

tl05x, tl05xa, tl05xy enhanced-jfet low … tl05xa, tl05xy enhanced-jfet low-offset operational...

Documents