tma448 truetouch® multi-touch all-points touchscreen ... · tma448 is a capacitive touchscreen...

Datasheet

TMA448 TrueTouch® Multi-touch All-points Touchscreen Controller

Parade Technologies, Inc.http://www.paradetech.com

Document Number: 001-89993 Rev. 0Revised 20150911

© Parade Technologies, Inc., 2015. All rights reserved.

NoticeAll information provided in this document on “AS IS” basis without any guarantee orwarranty. Information in this document is provided in relation to Parade products andis subject to change without notice. No intellectual rights or licenses are implied.

Trademarks and registered trademarks are the property of their respective owners.

CONFIDENTIAL - RELEASED ONLY UNDER NON-DISCLOSURE AGREEMENT (NDA)Do Not Distribute Without Permission

TEL: 408-329-5540 FAX: 408-329-5541 Email: [email protected] of 30

Features

■ Multi-touch capacitive touchscreen controller❐ 32-bit ARM® Cortex® CPU❐ Register configurable❐ Noise-suppression technologies for battery charger

and display• Effective 28V TX drive for higher signal-to-noise

ratio (SNR)• ChargerArmor™ for charger noise immunity• External display synchronization

❐ Water rejection and wet-finger tracking using DualSense™❐ Multi-touch glove with automatic mode switching

• 10 fingers with thin glove (≤1mm thickness)• 2 fingers with thick glove (≤5mm thickness)

❐ Fingernail tracking❐ Large-object rejection❐ Automatic baseline tracking to environmental changes❐ Low-power look-for-touch mode❐ Field upgrades via bootloader❐ Android™ and Windows® 8 driver support❐ Parade Technologies™ TrueTouch® Manufacturing Test

Kit (MTK)❐ Touchscreen sensor self-test and Panel ID reporting

■ System performance (configuration dependent)❐ Screen sizes up to 8.3-in. diagonal

• 5mm sensor pitch, 16:9 aspect ratio❐ Screen sizes up to 5.3-in. diagonal

• 3.2mm sensor pitch, 16:9 aspect ratio❐ Up to 58 sense I/O

• 777 intersections (21 × 37)❐ Reports up to 10 fingers❐ Small finger support down to 4mm

❐ Large finger support up to 30mm❐ Refresh rate up to 230Hz❐ TX frequency up to 500kHz❐ Fast first-touch response (≤13ms)❐ Best-in-class charger noise immunity

• Immunity up to 20V peak-to-peak (VPP)• Immunity to AT&T® Zero charger

■ Power (configuration dependent)❐ 1.71 to 5.5V digital and I/O supply❐ 2.65 to 5.5V analog supply❐ 8.5mW average power❐ 15μW typical deep-sleep power

■ Sensor and system design (configuration dependent)❐ Supports a variety of touchscreen sensors and stackups

• Manhattan, Diamond, Single-Layer Independent Multi-touch (SLIM®), and Totem-pole patterns

• Sensor-on-Lens (SOL)• Touch-integrated display modules (on-cell, in-cell)• Plastic (PET) and glass-sensor substrates• LCD, AMOLED, and IPS displays• Metal mesh

❐ Single-layer flexible printed circuit (FPC) routing enabled by flexible TX/RX configurations

■ Communication interface❐ I2C slave at all standard bit rates

• 100kbps, 400kbps, 1Mbps, and 3.4Mbps❐ SPI slave bit rates up to 8Mbps

■ Package options❐ 56-pin 6 × 6 × 0.6mm QFN (0.35mm lead pitch)❐ 70-ball 5.5 × 5.5 × 0.6mm BGA (0.5mm ball pitch)

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http://www.paradetech.com

mailto: [email protected]




Contents

Features.............................................................................. 1Touchscreen System Overview ....................................... 3TrueTouch TMA448 Overview ..........................................3TrueTouch Features Overview ......................................... 5

ChargerArmor............................................................... 5Water Rejection............................................................ 5Wet-Finger Tracking.....................................................5Glove ............................................................................ 5Automatic Mode Switching ........................................... 5Grip Suppression.......................................................... 5Large-Finger Tracking .................................................. 5Large-Object Detection and Rejection .........................5Look-for-Touch ............................................................. 5

Touchscreen System Specifications ...............................6System Performance Specifications............................. 6

System Design Options .................................................... 7Operating System Driver Support and Register Map ...7CapSense Button/FPC Support ................................... 7Sensors ........................................................................ 7

Example Application Schematic ...................................... 9Power Supply Information .............................................. 10

Voltage Coefficient ..................................................... 10Power States Summary...................................................11Pin Information ................................................................ 12Electrical Specifications ................................................. 16

Absolute Maximum Ratings........................................ 16Operating Temperature .............................................. 16Flash Specifications ................................................... 16Chip-Level DC Specifications..................................... 17I/O Port 0 (P0[0:1]) DC Specifications........................ 17I/O Port 1 (P1[0:3]) and XRES DC Specifications ...... 18SWD Interface AC Specifications............................... 18Chip-Level AC Specifications ..................................... 19I2C Specifications....................................................... 20SPI Specifications ...................................................... 21

Packaging Information.................................................... 22Thermal Impedances and Moisture Sensitivity........... 23Solder Reflow Specifications...................................... 23

Ordering Information....................................................... 24Ordering Code Definitions .......................................... 24

Appendix .......................................................................... 25Evaluation Kit (EVK)................................................... 25Reference Documents................................................ 25

Document Conventions .................................................. 27Units of Measure ........................................................ 27Port Nomenclature ..................................................... 27Acronyms and Abbreviations...................................... 28Glossary ..................................................................... 29

Document History Page.................................................. 30





Touchscreen System Overview

Figure 1. TMA448 Typical System Diagram

TrueTouch TMA448 Overview

A capacitive touchscreen detects changes in capacitance todetermine the location of one or more fingers on the surface ofthe touchscreen. A typical touchscreen system consists of acapacitive touchscreen sensor, an FPC bonded to the sensor,and the touchscreen controller mounted on the FPC. The FPCconnects the touchscreen controller to the host processor, via aconnector, on the host printed circuit board (PCB). Users caninteract with the displayed user interface through fingermovements and gestures on the surface of the touchscreen.

TMA448 is a capacitive touchscreen controller with the sensingand processing technology to resolve the locations of up to10 fingers on the touchscreen, and report their positions. Thetouchscreen controller converts an array of sensor capacitancesinto an array of digital values, which are processed bytouch-detection and position-resolution algorithms in thecontroller. These algorithms determine the location and signalmagnitude of each finger on the touchscreen.

Parade provides:

■ Application firmware

■ Android and Windows Phone 8 host drivers

■ Design guidance for the sensor and FPC

■ Touchscreen sensor MTK

TrueTouchDevice

0.1 µF

HostProcessorInterrupt/Wake

VSS

VDDDVDDA

TX Sense Pins

RX Sense Pins

VCCTX

0.1 µF

I2C/SPI

2.65–5.5 V

VCCD

1.8 V

1 µF

1.2 Ω

VSS

1 µF

CTXBULK

Touchscreen Sensor





The TMA448 block diagram is shown in Figure 2. This devicecontains a high-performance ARM 32-bit CPU with an integratedhardware multiply unit. This CPU controls all sensing andprocessing of measured capacitance results to allow trackingand reporting of touches. The controller is optimized for lowpower and fast response time, with built-in support for manufac-turing test. The touchscreen controller communicates with a hostthrough an I2C slave interface at up to 3.4 Mbps or an SPI slaveinterface at up to 8 Mbps.

TMA448 collects the touchscreen sensor information using thetouch sub-system. This touch sub-system consists of a 10-V TXpump, TX drivers, RX channels, and a programmable TX/RX

multiplexer. This multiplexer electrically connects the analogfront end of each RX channel and TX driver to the appropriaterow and column electrodes of the touchscreen sensor.

The controller TX/RX multiplexer allows flexibility of chipplacement on the FPC. All pins connecting to the touchscreensensor are programmable as either TX or RX. See the ParadeTrueTouch® Touchscreen Controller Module Design BestPractices (001-50467) specification for recommendedconfigurations. Parade reference documents are available underNDA through your local Parade sales representative. You canalso direct your requests to [email protected].

Figure 2. TMA448 Functional Block Diagram

10 V TX Pump

ARM Cortex 48-MHz CPU

SRAM

CommunicationI2C/SPI

Hos

t Com

mun

icat

ion

Inte

rface

Flash

Pro

gram

mab

leTX

/ R

X M

ultip

lexe

r

Up

to 5

8 TX

/RX

Pin

s (p

acka

ge d

epen

dent

)

Digital Sequencer

RX Channel 0

RX Channel 20

RX Channel 19

RX Channel 1

Channel Engine

ADC

ADC

ADC

ADC

DSP






TrueTouch Features Overview

ChargerArmor

ChargerArmor enables touchscreens in handsets, cameras,GPS systems, and other mobile systems to function whileconnected to noisy chargers. Low-cost, third-party, andafter-market battery chargers can generate high amplitudecommon-mode noise that directly couples into the touchscreensensor during a touch. This noise degrades touch performance,causing inaccurate and phantom touches. Many mobile phonevendors worked together to create the EN62684 and EN301489standards, which set limits for the noise spectrum and magnitudefor battery chargers. With ChargerArmor, the TMA448 goesbeyond these standards to operate with a broader range ofchargers.

Water Rejection

Water droplets can cause false touches to be reported. However,TMA448 continues to operate in the presence of water dropletsor condensation. TMA448 enables water rejection usingDualSense, Parade’s patented self- and mutual-capacitancesensing ability.

Wet-Finger Tracking

In a touchscreen system, moisture on fingers can cause falsetouches to be reported and make it difficult to track fingers acrossthe screen. TMA448 can detect and track fingers that are wetand enable more robust functionality of the touchscreen. Thisincludes sweaty fingers touching the screen or fingers movingacross a mist-covered screen.

Glove

TMA448 detects and tracks gloved fingers. Glove support allowsnavigating the touchscreen without having to remove gloves orwithout the use of expensive conductive gloves. Tracking ofgloved fingers is supported by automatic mode switching, whichautomatically transitions between tracking gloved fingers andother touch-tracking modes. Ten-finger glove-touch is supportedfor thin gloves (≤ 1-mm thickness) and two-finger operation issupported for thick gloves (≤ 5-mm thickness).

Automatic Mode Switching

TMA448 supports automatic mode switching, which detects andtracks a new touch object type without requiring manualselection of the touch type from the user. Automatic modeswitching allows an uninterrupted user experience whenswitching between a finger, gloved finger, fingernail, orwet finger.

Grip Suppression

TMA448 enables grip suppression for a natural user experience.While using a touchscreen device, the user can grip the devicesuch that the gripping fingers touch the screen. This may causea loss in touchscreen performance due to the detection ofunintended fingers. Grip suppression is the ability to filter outunintended touches at the edge of the touchscreen while stillsupporting normal touchscreen functionality in the remainder ofthe touchscreen. TMA448 interprets the quality and size oftouches at the edge of a screen, tracks them as they move, andensures that they do not trigger false touches while keeping thetouchscreen surface responsive to touch and finger tracking.The grip suppression areas are register configurable.

Large-Finger Tracking

A well-designed touchscreen system must correctly report alarge finger or thumb as only a single touch. If this is notsupported, a large finger can incorrectly be reported as two ormore touches, hampering the user experience. When an object,such as a thumb, is pressed against the touchscreen sensor,TMA448 ensures that only one touch is reported at the center ofthe object.

Large-Object Detection and Rejection

It is important to be able to detect the presence of a large objecton the touchscreen sensor. Two common examples are touchinga palm on the screen when typing and pressing a side of a faceon the screen when talking on a phone. The presence of a largeobject, such as a fist, palm, or side of a face, can be determinedby TMA448 from the touchscreen data. This presence may eitherbe rejected or reported to the host.

Look-for-TouchLook-for-touch is a low-power and fast-wakeup mode, in whichthe touchscreen sensor is measured for an increase in selfcapacitance. An increase in self capacitance indicates that atouch is present. Because it is only necessary to detect a finger’spresence, and not location, the sensing can be done at a muchlower SNR, requiring less time and power. Look-for-touchsensing is used to implement multiple functions, includingwake-on-touch and fast first-touch response.





Touchscreen System Specifications

This section specifies the touchscreen system performance delivered by TMA448. For definitions, justification of parameters, and testmethodologies, refer to the Parade specification TrueTouch® Touchscreen Controller User Interface Performance Definitions(001-49389)[1].

System Performance Specifications

The System Performance Specifications in Table 1[2] and Table 2[3] are valid under these conditions: –40 °C ≤ TA ≤ 85 °C,1.71 V ≤ VDDD ≤ 5.5 V, 1.71 V ≤ VCCD ≤ 1.95 V, 2.65 V ≤ VDDA ≤ 5.5 V, unless otherwise noted. Typical values are specified at TA =25 °C, VDDD = VCCD = 1.8 V, core low-dropout regulator (LDO) disabled, and VDDA = 3.3 V (VCCTX bulk storage capacitor present),unless otherwise noted. Data was taken on a 5.3-inch diagonal Totem-pole patterned sensor (3.2-mm sensor pitch).

Contact your local Parade sales representative for information on the system performance conditions to guarantee the specificationsin Table 1. The performance conditions and specifications are valid only for sensors approved by Parade for use with TMA448 andproduced by qualified Parade partners. Contact [email protected] to discuss any deviations.

Table 1. Typical System Performance Specifications (Configuration Dependent)

Category Conditions Core Units

Accuracy 4 < finger diameter ≤ 12 mm 0.4 mm

Glove (1–5 mm thickness) 1 mm

Linearity 4–6 mm diameter finger 0.2 mm

6 < finger diameter ≤ 9 mm 0.15 mm

9 < finger diameter ≤ 12 mm 0.25 mm

Glove (1–5 mm thickness) 1 mm

Table 2. System Performance Specifications (Configuration Dependent)

Category Description Conditions Min Typ Max Units

Jitter Delta in reported X,Y position, for non-moving finger

4–12 mm diameter finger – 0.15 0.25 mm

Refresh rate Finger refresh rate 1 finger on panel 60 90 230[4] Hz

Noise handling

Charger noise immunity 1 kHz to 500 kHz at 10-kHz steps, 50% duty cycle, no false touches, no false lift-offs, 9-mm finger, 50 mm/s, min 60-Hz refresh rate

20 – – VPP

Response Time

Active state response time First finger down, min look-for-touch refresh interval, 120-Hz refresh rate

– – 13 ms

Active Look-for-touch response time – – 35 ms

Wake from Deep Sleep response time Time from host wake of device to first touch report – – 100 ms

Power In Active state 1 finger, 60-Hz refresh rate – 34 – mW

In Active Look-for-touch state 35-ms refresh interval – 10 – mW

Average sensing power[5] TrueTouch device in Active state for 25% of touch activity and in Deep Sleep state for 75% of touch activity

– 8.5 – mW

In Deep Sleep state – 15 – μW

Notes1. Parade reference documents are available under NDA through your local Parade sales representative. You can also direct your requests to [email protected]. Average value of the sample data measured. Accuracy is measured at points across the entire panel at 1.1 mm intervals. Linearity is measured on lines drawn across

the panel (vertically, horizontally, and diagonally) separated by 1.1 mm.3. Typical, as represented by the average values from the Parade specification, TrueTouch® Touchscreen Controller User Interface Performance Definitions (001-49389).4. Obtainable with tuning optimized for refresh rate.5. See “Power States Summary” on page 11 for power state transition details and refresh interval configuration for each state. Average sensing power is calculated using

this equation: 0.25 × 34 mW + 0.75 × .015 mW = 8.5 mW.







System Design Options

Operating System Driver Support and Register Map

Parade provides drivers for Android and Windows Phone 8.These Parade drivers easily integrate into any product based onthese operating systems. TMA448 has a standard host interfacecalled Packet Interface Protocol (PIP), which allows devicedrivers to be repurposed for any of the devices in the TMA448family. For details of PIP, see the Parade specification TMA448Technical Reference Manual (TRM) - 001-89995[6].

CapSense Button/FPC Support

TMA448 supports a maximum of four physical CapSensebuttons. These buttons may be sensed with either mutual- orself-capacitance, or a mix of both (hybrid) to enable waterrejection.

Detailed FPC development guidelines, including EMI shielding,are available in the Parade specification TrueTouch®

Touchscreen Controller Module Design Best Practices(001-50467)[6].

Sensors

Parade supports the following sensor patterns:

■ Single-Solid Diamond (SSD)

■ Dual-Solid Diamond (DSD)

■ Manhattan-3 (MH3)

■ SLIM

■ Totem Pole

Figure 3 through Figure 7 show examples of SSD, DSD,MH3, SLIM, and Totem-pole sensor patterns and unit cells,respectively.

Figure 3. Single-Solid Diamond Pattern and Unit Cell

Figure 4. Dual-Solid Diamond Unit Cell

Figure 5. Manhattan-3 Pattern and Unit Cell

Screen

Unit Cell

Column

Row

Unit Cell

Screen

Row

Column

Unit Cell

Screen

Column

Row

Note6. Parade reference documents are available under NDA through your local Parade sales representative. You can also direct your requests to [email protected].






SLIM is a low-cost, single-layer sensor that supports 10-fingerMulti-touch for displays of up to 5.3-inch diagonal. This patternhas the benefits of borderless displays and an ultra-thin touch-screen stackup.

Figure 6. SLIM Pattern Unit Cell

Totem Pole is a new single-layer sensor pattern (with one bridgefor each unit cell), which offers signal disparity comparable toDSD while improving the ability to manufacture.

Figure 7. Totem Pole Pattern Unit Cell

Parade continuously develops additional patterns and materialsto increase performance and decrease system cost.

The specific sensor pattern varies based on the mechanical,electrical, optical, and cost constraints; all of these factors mustbe considered for an optimal solution. Here are some examples:

■ Overlays/lens thickness <1 mm should not use SSD due tolarge signal disparity (SD).

■ DCVCOM LCDs, with strong image-related noise, require an air gap, a shield layer, or a self-shielding pattern such as MH3.

To learn more about how to successfully design sensors using stackups and materials, see the Parade specification TrueTouch® Touchscreen Controller Module Design Best Practices (001-50467)[7].

ScreenUnit Cell

TX

RX


With dummies Without dummies






Example Application Schematic

Figure 8. TMA448-56LQI44XX Example Schematic (VDDD = 1.8 V, VDDA = 2.65 to 5.5 V)

Component RecommendationsVDDD: Input 1.8 V, 0.1-µF high-frequency bypass capacitor[8]

VCCD: Input 1.8 V, 1-µF low-frequency bypass capacitor[8]

VDDA: Input 2.65 to 5.5 V, 0.1-µF high-frequency, 1-µF low-frequency bypass capacitors[8]. A 1.2-ohm, 5% tolerance resistor is required between VDDA and the VDDA bypass capacitors to ensure safe operation under transient power conditions.VCCTX: Output 10 V, 0.1-µF high-frequency capacitor[8]

The minimum dielectric temperature rating for bypass capacitors is X5R[8].

■ In the FPC and PCB layouts, place the capacitors close to the package pins. Route the interrupt, SCL, and SDA lines perpen-dicular to the sensor traces or isolate them from the sensor traces with ground.

■ Connect the exposed pad (EP) of the TMA448-56LQI44 device to ground.

■ This schematic is for a 16-column (X) by 28-row (Y) panel, which supports a 4.3-inch diagonal with a 16:9 aspect ratio

display using electrodes with a 3.4-mm pitch (XY pin assign-ments chosen for a center-connected device mounted at the bottom of the panel). See the TMA448 Technical Reference Manual (TRM) – 001-89995[9], for pin assignment consider-ations and slot-mapping information.

■ The X and Y indium tin oxide (ITO) electrode numbers are defined by the screen orientation, as shown in the left half of Figure 8. X refers to the column electrodes and Y refers to the row electrodes. The numbers begin with zero at the upper left. Touch coordinates are also reported beginning at the upper left corner.

■ Sense pin assignments can be changed to optimize the layout. This gives FPC routing flexibility. Any XY pin can be defined as either a TX or RX sense pin to optimize performance and simplify routing of different sensors.

■ COMM_INT is required for the host connection.

■ External reset (XRES) is optional for the host connection but strongly recommended.

■ Unused RX or TX pins should be left unconnected.

X

Y

(0,0)

0.1 F

123456789

VDDAVDDDCOMM_INTSWDIOSWDCLKXRESI2C SDAI2C SCLGND

Host Connection

VCCTX

0.1 F

1 F

1 F1.2 Ω0.1 F

TMA448-56LQI44XX

123456

X0

Y16

Y15

Y14

Y25

X1

363534333231

Y11Y10Y9Y8Y7

7

Y22

30

Y6

Y12

8

Y21 9

Y20

29

Y5Y4

10

Y19 11

Y1812

Y17

Y3Y2

VCCTX

Y24Y23

Y26Y27

X2

Y0Y1

Notes8. See “Power Supply Information” on page 10 for detailed information regarding voltage coefficient requirements for external capacitors.9. Parade reference documents are available under NDA through your local Parade sales representative. You can also direct your requests to [email protected].






Power Supply Information

TMA448 contains up to four power pins: VDDA, VDDD, VCCD,and VCCTX. VDDA supplies power to the chip’s analog circuitryand TX charge pump. VDDD supplies power to the digital I/Osand core regulator. VCCD supplies power to the CPU core, andmay be configured as an input or output, depending on whetheror not a 1.71–1.95 V VDDD supply is used. VCCTX suppliespower to the TX drivers. For operation with the on-die chargepump, the VCCTX pin must be configured with a 0.1-µF bulkstorage capacitor[10] to maximize current delivered by thecharge pump, or may accept an external HV supply of up to 10 V.Externally supplied voltage to VCCTX must always be greaterthan or equal to VDDA. A 1.2-ohm, 5% tolerance resistor isrequired on VDDA to ensure safe operation under transientpower conditions.

Voltage Coefficient

The actual capacitance of external capacitors may be reducedwith higher bias voltage. Check the capacitor datasheet for thevoltage coefficient. External capacitors require an X5R dielectriccharacteristic or better. It is recommended to use anX7R dielectric characteristic or better for high-frequency0.1-µF capacitors. Capacitors used for power supply decouplingor filtering are operated under a continuous DC-bias. Manycapacitors (used with DC power across them) provide less thantheir target capacitance, and their capacitance is not constantacross their working voltage range. When selecting capacitorsfor use with this device, verify that the selected componentsprovide the required capacitance under the specific operatingconditions of temperature and voltage used in your design. Whilethe temperature ratings of a capacitor are normally found as partof its catalog part number (e.g., X7R, C0G, or Y5V), the matchingvoltage coefficient may only be available on the componentdatasheet or direct from the manufacturer. Use of componentsthat do not provide the required capacitance under the actualoperating conditions may cause the device to perform to lessthan datasheet specifications.

The available power configurations are shown in Figure 9, Figure10, Figure 11, and Figure 12.

Figure 9. Lowest Power Consumption

Figure 10. COM Interface > 1.8 V

Figure 11. Single Supply[10]

Figure 12. High Voltage External Supply

Note10. 1.8-V communication is possible by using the TTL mode for the digital inputs P0/P1 when VDDD and VDDA are supplied with 2.7 V. See the TMA448 Technical

Reference Manual (TRM) – 001-89995, for details on setting TTL mode. Parade reference documents are available under NDA through your local Parade sales representative. You can also direct your requests to [email protected].

TrueTouch Device

1.71–1.95 V

2.65–5.5 V

GND

1 µF 0.1 µF

1 µF 0.1 µF

1.2 Ω

VDDD

VCCD

VDDA

VSS

0.1 µF

VCCTX

TrueTouch Device

1.8–5.5 V

2.65–5.5 V

GND

0.1 µF 1 µF

1.2 Ω

VDDD

VCCD

VDDA

VSS

0.1 µF

VCCTX

1 µF 0.1 µF

TrueTouch Device

2.65–5.5 V

GND

1 µF

1.2 Ω

VDDD

VCCD

VDDA

VSS

0.1 µF

0.1 µF

VCCTX

1 µF 0.1 µF

TrueTouch Device

1.71–1.95 V

2.65–5.5 V

GND

1.2 Ω

VDDD

VCCD

VDDA

VSS

VCCTX10 V

1 µF 0.1 µF

1 µF 0.1 µF

1 µF 0.1 µF






Power States Summary

The TMA448 controller has four power states, illustrated inFigure 13:

■ Active, where the touchscreen is actively scanned to determinethe presence of a touch and identify the touch coordinates

■ Active Look-for-touch, where the device performs a fastself-capacitive scan to determine if a touch exists

■ Low Power, where the touchscreen is scanned for touchpresence at a much slower rate

■ Deep Sleep, where the touchscreen is not scanned andTMA448 is in a low-power state with no processing

The TMA448 controller automatically manages transitionsbetween three power states (Active, Active Look-for-touch, andLow Power). The host can force transition in and out of the fourthpower state (Deep Sleep). PIP allows the user to control powermanagement and Deep Sleep; see the Parade specification,TMA448 Technical Reference Manual (TRM) – 001-89995[11].

The Active state emphasizes low refresh time for accurate fingertracking, the Active Look-for-touch state allows fast first-touchresponse, and the Low Power state enables low powerconsumption during periods of no touch activity. In all threestates, the TMA448 controller periodically scans the panel todetermine the presence of a touch. If a touch is present, thecontroller either enters or remains in the Active state where it

identifies the touch coordinates. These tasks occur at differentrates in the three states and the detection of touches affectstransitions between the states. Transition from Active to ActiveLook-for-touch occurs when no touch is detected.

By requesting Low Power be disabled over PIP, the host canforce the TMA448 controller to stay out of the Low Power stateat all times for the fastest response to the first touch on the panel.

The following parameters configure the power states:

■ Refresh Interval (register ACT_INTRVL) defines the minimumtime between the start of subsequent touchscreen scans in theActive state.

■ Active Look-for-touch interval (register ACT_LFT_INTRVL)defines the minimum refresh time in the Active Look-for-touchstate.

■ Active Mode Timeout (register TCH_TMOUT) defines theperiod of time in which no touch is detected during the ActiveLook-for-touch state before transitioning to the LowPower state.

■ Low Power Interval (register LP_INTRVL) defines the time inthe Low Power state between touchscreen scans.

■ Deep Sleep is entered via a command from the host to movethe device into the Deep Sleep state. Automatic entry into theLow Power state is enabled by setting theLOW_POWER_ENABLE parameter.

Figure 13. TMA448 Power States and Transitions

Active

Active Look-for-

Touch

Deep SleepLow Power

Launch TrueTouch Application







Pin InformationTMA448 is available in both a 56-pin QFN and 70-ball BGA package. This section lists pin names, descriptions, and mapping to the physical package. Input and output pins may have more than one possible configuration. Guidance for each configuration option is provided below:

VCCTX: Externally supplied voltage to VCCTX must always be greater than or equal to VDDA.

XY: XY pins may be configured as either transmit (TX) drive or receive (RX) sense, allowing each design to be optimized based on the sensor pattern and layout. See Parade specification, TrueTouch® Touchscreen Controller Module Design Best Practices (001-50467), for guidelines[12]. To configure the device for lowest power, leave unused XY pins unconnected. TX and RX pins are tied to VSS internally during the Deep Sleep power state.

P0/P1: Unused Port 0 and Port 1 digital pins should be left unconnected.

I2C: During Deep Sleep, outputs are high-Z and inputs are internally biased for low power.

External Reset (XRES): If the external reset pin is unused, leave it unconnected. An internal resistor biases the pin high.

SWDIO/SWDCLK: Serial Wire Debug (SWD is the recom-mended programming mode for all designs.

Do Not Use (DNU): DNU pins must be left unconnected to ensure proper device operation.

Panel ID: The Panel ID pin allows TMA448 to automatically detect what panel it is connected to, in case multiple panels vendors are used. Panel ID is available on P1[1] when configured for SPI communication or on P1[2] when configured for I2C communication. Unused Panel ID pins should be left unconnected. An unused Panel ID pin is configured as a high-Z output. Panel ID pins are sensed after device reset (or power-up). See Parade specification, TMA448 Technical Reference Manual (TRM) – 001-89995[11], for configuration details.

External Sync (EXTSYNC): This pin is used to synchronize the start of a panel scan to an external signal. To use this function, see the Parade specification, TMA448 Touchscreen Controller Best Practices (001-89995)[11], for information.


Table 3. 56-pin QFN (TMA448-56LQI44XX)

Pin No. NameType

Description Pin MapDigital Analog

1–17 XY16–XY00 – I/O TX drive or RX sense pin

18 P0[0] I/O – I2C SCL / SPI SCLK

19 P0[1] I/O – I2C SDA / SPI MOSI

20 XRES I – External active low reset

21 P1[0] I/O – COMM_INT / SWDCLK / EXTSYNC

22 P1[1] I/O – SWDIO / Panel ID

23 P1[2] I/O – SPI MISO / EXTSYNC / Panel ID

24 P1[3] I/O – COMM_INT / SPI SS

25 VDDD PWR Digital power supply input

26 VCCD PWR Digital core power supply input/output

27 VSS PWR Ground

28 VDDA PWR Analog RX and TX pump power supply input

29 VCCTX PWR High voltage TX external supply or bulk CTXBULK connection (optional)

30–56 XY43–XY17 – I/O TX drive or RX sense pin

EP – – Exposed pad. Connect to ground.

QFN 56(Top View)

1

2

3

4

5

6

XY14

XY

02

XY

01

XY

00

XY11

XY15

36

35

34

33

32

31

XY32

XY33

XY34

XY35

XY36

1817161514

13

P1[

1]

P1[

0]

P0[

1]

P0[

0]

XR

ES

48 47 46 45 44 43

XY

29

XY

28

XY

27

XY

26

XY

25

7

XY08

P1[

2]

19

P1[

3]

30

XY37

42

XY

24

XY31

XY

308

XY07

9

XY06

20

VC

CD

21

VD

DD

29

XY38

XY39

41X

Y23

40

XY

22

10

XY05

11

XY04

12

XY0322

VS

S

23 24

XY40

XY41

VCCTX

39

XY

2 1

38

XY

20

37

XY

19

25 26 27 28

VD

DA

4950515253545556

XY10

XY09

XY12

XY13

XY16

XY

18

XY

17

XY43

XY42






Table 4. 70-ball BGA (TMA448-70BUI48XX)[13]

Note13. See “Pin Information” on page 12 for details on pin configuration.

Pin No. Name

TypeDescription Pin

No. NameType

DescriptionDigital Analog Digital Analog

B5 XY22 – I/O TX drive or RX sense pin H10 XY47 – I/O TX drive or RX sense pin

A4 XY21 – I/O TX drive or RX sense pin G9 XY46 – I/O TX drive or RX sense pin

B4 XY20 – I/O TX drive or RX sense pin G10 XY45 – I/O TX drive or RX sense pin

A3 XY19 – I/O TX drive or RX sense pin F9 XY44 – I/O TX drive or RX sense pin

B3 XY18 – I/O TX drive or RX sense pin F10 XY43 – I/O TX drive or RX sense pin

A2 XY17 – I/O TX drive or RX sense pin F8 XY42 – I/O TX drive or RX sense pin

C3 XY16 – I/O TX drive or RX sense pin E7 XY41 – I/O TX drive or RX sense pin

A1 XY15 – I/O TX drive or RX sense pin D8 XY40 – I/O TX drive or RX sense pin

B2 XY14 – I/O TX drive or RX sense pin D10 XY39 – I/O TX drive or RX sense pin

C2 XY13 – I/O TX drive or RX sense pin D9 XY38 – I/O TX drive or RX sense pin

C1 XY12 – I/O TX drive or RX sense pin C10 XY37 – I/O TX drive or RX sense pin

D2 XY11 – I/O TX drive or RX sense pin C9 XY36 – I/O TX drive or RX sense pin

D1 XY10 – I/O TX drive or RX sense pin B10 XY35 – I/O TX drive or RX sense pin

E2 XY09 – I/O TX drive or RX sense pin A10 XY34 – I/O TX drive or RX sense pin

E1 XY08 – I/O TX drive or RX sense pin B9 XY33 – I/O TX drive or RX sense pin

E3 XY07 – I/O TX drive or RX sense pin A9 XY32 – I/O TX drive or RX sense pin

F4 XY06 – I/O TX drive or RX sense pin B8 XY31 – I/O TX drive or RX sense pin

G4 XY05 – I/O TX drive or RX sense pin A8 XY30 – I/O TX drive or RX sense pin

G3 XY04 – I/O TX drive or RX sense pin B7 XY29 – I/O TX drive or RX sense pin

G1 XY03 – I/O TX drive or RX sense pin A7 XY28 – I/O TX drive or RX sense pin

G2 XY02 – I/O TX drive or RX sense pin C7 XY27 – I/O TX drive or RX sense pin

H1 XY01 – I/O TX drive or RX sense pin D6 XY26 – I/O TX drive or RX sense pin

H2 XY00 – I/O TX drive or RX sense pin D5 XY25 – I/O TX drive or RX sense pin

J3 P0[0] I/O – I2C SCL / SPI SCLK C5 XY24 – I/O TX drive or RX sense pin

K4 P0[1] I/O – I2C SDA / SPI MOSI A5 XY23 – I/O TX drive or RX sense pin

K3 XRES I – External active low reset Pin Map

J4 P1[0] I/O – COMM_INT / SWDCLK / EXTSYNC

H4 P1[1] I/O – SWDIO / Panel ID

H5 P1[2] I/O – SPI MISO / EXTSYNC / Panel ID

H6 P1[3] I/O – COMM_INT / SPI SS

J6 VDDD PWR Digital power supply input

K6 VCCD PWR Digital core power supply input/output

K7 VSS PWR Ground

J8 VDDA PWR Analog RX and TX pump power supply input

K8 VCCTX PWR High voltage TX external supply or bulk CTXBULK connection (optional)

J1 DNU – – Do not use

K1 DNU – – Do not use



H3 DNU – – Do not use






Top View

XY15

XY17

XY19

XY21

XY23

XY28

XY30

XY32

XY34

XY14

XY18

XY20

XY22

XY29

XY31

XY33

XY35

XY12

XY13

XY16

XY24

XY27

XY36

XY37

XY10

XY11

XY25

XY26

XY40

XY38

XY39

XY08

XY09

XY07

XY41

XY06

XY42

XY44

XY43

XY03

XY02

XY04

XY05

XY46

XY45

XY01

XY00

P1[2] P1[3] XY47

VDDD

VDDA

XRESVCCD

VSS VCCTX

A

B

C

D

E

F

G

H

J

K

1 2 3 4 5 6 7 8 9 10

DNUDNU

DNU DNU

DNUP1[1]DNU

P1[0]P0[0]DNU

DNU

DNU

DNU P0[1]







Pin No. Name

TypeDescription Pin

No. NameType


D5 XY28 – I/O TX drive or RX sense pin D6 XY29 – I/O TX drive or RX sense pin


A5 XY26 – I/O TX drive or RX sense pin A7 XY31 – I/O TX drive or RX sense pin

B5 XY25 – I/O TX drive or RX sense pin B7 XY32 – I/O TX drive or RX sense pin






C3 XY19 – I/O TX drive or RX sense pin B10 XY38 – I/O TX drive or RX sense pin

A1 XY18 – I/O TX drive or RX sense pin C9 XY39 – I/O TX drive or RX sense pin

B2 XY17 – I/O TX drive or RX sense pin C10 XY40 – I/O TX drive or RX sense pin



D2 XY14 – I/O TX drive or RX sense pin D8 XY43 – I/O TX drive or RX sense pin

D1 XY13 – I/O TX drive or RX sense pin E7 XY44 – I/O TX drive or RX sense pin

E2 XY12 – I/O TX drive or RX sense pin F8 XY45 – I/O TX drive or RX sense pin



F4 XY09 – I/O TX drive or RX sense pin G10 XY48 – I/O TX drive or RX sense pin

G4 XY08 – I/O TX drive or RX sense pin G9 XY49 – I/O TX drive or RX sense pin

G3 XY07 – I/O TX drive or RX sense pin H10 XY50 – I/O TX drive or RX sense pin

G1 XY06 – I/O TX drive or RX sense pin H9 XY51 – I/O TX drive or RX sense pin

G2 XY05 – I/O TX drive or RX sense pin J10 XY52 – I/O TX drive or RX sense pin

H1 XY04 – I/O TX drive or RX sense pin J9 XY53 – I/O TX drive or RX sense pin

H2 XY03 – I/O TX drive or RX sense pin Pin MapJ1 XY02 – I/O TX drive or RX sense pin

K1 XY01 – I/O TX drive or RX sense pin

J2 XY00 – I/O TX drive or RX sense pin

J3 P0[0] I/O – I2C SCL / SPI SCLK

K4 P0[1] I/O – I2C SDA / SPI MOSI

K3 XRES I – External active low reset






K7 VSS PWR Ground


K8 VCCTX Output High voltage TX bulk CTXBULK connection






Top View

XY18

XY20

XY22

XY24

XY26

XY31

XY33

XY35

XY37

XY17

XY21

XY23

XY25

XY32

XY34

XY36

XY38

XY15

XY16

XY19

XY27

XY30

XY39

XY40

XY13

XY14

XY28

XY29

XY43

XY41

XY42

XY11

XY12

XY10

XY44

XY09

XY45

XY47

XY46

XY06

XY05

XY07

XY08

XY49

XY48

XY04

XY03

P1[2] P1[3] XY51

XY50

VDDD

VDDA

XY53

XY52

XRESVCCD

VSS VCCTX

A

B

C

D

E

F

G

H

J

K

1 2 3 4 5 6 7 8 9 10

DNU DNU

P1[1]DNU

P1[0]P0[0]XY00

DNU

XY02

XY01

P0[1]







Pin No. Name

TypeDescription Pin

No. NameType


B3 XY23 – I/O TX drive or RX sense pin A7 XY33 – I/O TX drive or RX sense pin

A3 XY24 – I/O TX drive or RX sense pin B7 XY34 – I/O TX drive or RX sense pin





C5 XY29 – I/O TX drive or RX sense pin A10 XY39 – I/O TX drive or RX sense pin

D5 XY30 – I/O TX drive or RX sense pin B10 XY40 – I/O TX drive or RX sense pin

D6 XY31 – I/O TX drive or RX sense pin C9 XY41 – I/O TX drive or RX sense pin





B2 XY19 – I/O TX drive or RX sense pin E7 XY46 – I/O TX drive or RX sense pin

C2 XY18 – I/O TX drive or RX sense pin F8 XY47 – I/O TX drive or RX sense pin

C1 XY17 – I/O TX drive or RX sense pin F10 XY48 – I/O TX drive or RX sense pin

D2 XY16 – I/O TX drive or RX sense pin F9 XY49 – I/O TX drive or RX sense pin

D1 XY15 – I/O TX drive or RX sense pin G10 XY50 – I/O TX drive or RX sense pin

E2 XY14 – I/O TX drive or RX sense pin G9 XY51 – I/O TX drive or RX sense pin

E1 XY13 – I/O TX drive or RX sense pin H10 XY52 – I/O TX drive or RX sense pin

E3 XY12 – I/O TX drive or RX sense pin H9 XY53 – I/O TX drive or RX sense pin

F4 XY11 – I/O TX drive or RX sense pin J10 XY54 – I/O TX drive or RX sense pin

G4 XY10 – I/O TX drive or RX sense pin J9 XY55 – I/O TX drive or RX sense pin

G3 XY9 – I/O TX drive or RX sense pin K10 XY56 – I/O TX drive or RX sense pin

G1 XY8 – I/O TX drive or RX sense pin K9 XY57 – I/O TX drive or RX sense pin

G2 XY7 – I/O TX drive or RX sense pin Pin MapH1 XY6 – I/O TX drive or RX sense pin

H2 XY5 – I/O TX drive or RX sense pin





H3 XY0 – I/O TX drive or RX sense pin

J3 P0[0] I/O – I2C SCL / SPI SCLK

K4 P0[1] I/O – I2C SDA / SPI MOSI

K3 XRES I – External active low reset








K8 VCCTX PWR High voltage TX external supply or bulk CTXBULK connection (optional)

K7 VSS PWR Ground

XY20

XY22

XY24

XY26

XY28

XY33

XY35

XY37

XY39

XY19

XY23

XY25

XY27

XY34

XY36

XY38

XY40

XY17

XY 18

XY 21

XY 29

XY 32

XY 41

XY 42

XY 15

XY 16

XY 30

XY 31

XY 45

XY 43

XY 44

XY 13

XY 14

XY 12

XY 46

XY 11

XY 47

XY 49

XY 48

XY8 XY7 XY9XY 10

XY 51

XY 50

XY6 XY5 XY0P

1[1]P

1[2]P

1[3]XY 53

XY 52

XY4 XY2P

0[0]P

1[0]VDDD

VDDA

XY 55

XY 54

XY3 XY1XRES

P 0[1]

VCCD

VSS

VCCTX

XY 57

XY 56

A

B

C

D

E

F

G

H

J

K

1 2 3 4 5 6 7 8 9 10





Electrical Specifications

This section lists the TMA448 DC and AC electrical specifications.

Absolute Maximum Ratings

Operating Temperature

Flash Specifications

The specifications in Table 9 are valid under these conditions: –40 °C ≤ TA ≤ 85 °C, 1.71 V ≤ VDDD ≤ 5.5 V, 1.71 V ≤ VCCD ≤ 1.95 V, and 2.65 V ≤ VDDA ≤ 5.5 V. Typical values are specified at TA = 25 °C, VDDD = VCCD = 1.8 V, core LDO disabled, and VDDA = 3.3 V.

Table 7. Absolute Maximum Ratings

Symbol Description Conditions Min Typ Max Units

TSTG Storage temperature –55 25 100[16] °C

VDDD Digital supply voltage VSS – 0.5 – 6 V

VDDA Analog supply voltage VSS – 0.5 – 6 V

VDDR[17] Digital (VDDD) and analog (VDDA)

supply ripple voltageAmplitude of AC riding on DC (VPP) – – 0.1 V

VDDRF[17] Digital (VDDD) and analog (VDDA)

supply ripple frequencyFrequency-spectrum of AC riding on DC

– – 20 MHz

VCCD Core supply voltage VSS – 0.5 – 2.3 V

VCCTX Analog HV TX supply voltage VSS – 0.5 – 11 V

VCCTXR Analog HV TX (VCCTX) supply ripple voltage

External regulator ripple, TX pump bypassed

– – 5 mV

VXY Sense pin voltage 2.65 V ≤ VTX ≤ 10 V VSS – 0.5 – VTX + 0.5 V

VSIO Port 0 pin voltage Output enabled VSS – 0.5 – 6.0 V

Output disabled VSS – 0.5 – 7.0 V

VGPIO Port 1 pin voltage VSS – 0.5 – VDDD + 0.5 V

IDDD Current per VDDD pin Continuous – – 100 mA

IDDA Current per VDDA pin Continuous – – 100 mA

IIO Current into I/O pin –25 – 50 mA

ESDCDM Electrostatic discharge voltage Charge device model 1500 – – V

ESDHBM Electrostatic discharge voltage Human Body Model 5000 – – V

Table 8. Operating Temperature


TA Ambient temperature –40 – 85 °C

Table 9. Flash Specifications


FlashENPB Flash write endurance Erase/write cycles per block 10000 – – cycles

FlashDR Flash data retention Following maximum Flash write cycles (FlashENPB), TA ≤ 55 °C

20[16] – – years

Following maximum Flash write cycles (FlashENPB), TA ≤ 85 °C[18]

10[16] – – years

Notes16. Storing programmed devices at or above the ambient temperature specified by FlashDR may reduce flash data retention time. 17. Analog supply ripple specifications are valid for the supply presented to the external filter resistor, not at the device VDDA pin.18. Assumes TJ ≤ 90°C.





Chip-Level DC Specifications

The specifications in Table 10 are valid under these conditions: –40 °C ≤ TA ≤ 85 °C, 1.71 V ≤ VDDD ≤ 5.5 V, 1.71 V ≤ VCCD ≤ 1.95 V,and 2.65 V ≤ VDDA ≤ 5.5 V. Typical values are specified at TA = 25 °C, VDDD = VCCD = 1.8 V, core LDO disabled, and VDDA = 3.3 V.

I/O Port 0 (P0[0:1]) DC Specifications


Table 10. Chip-Level DC Specifications


VDDD Digital supply voltage Core LDO enabled (VCCD output) 1.8 – 5.5 V

Core LDO disabled (VCCD input) 1.71[19] – 1.95[19] V

VCCD Digital core supply voltage Core LDO enabled (VCCD output) – 1.8 – V

Core LDO disabled (VCCD input) 1.71[19] – 1.95[19] V

VDDA Analog supply voltage 2.65[19] – 5.5 V

VCCTX Analog HV supply voltage 5.5 – 10.5 V

IDDD_ACT VDDD active current – 10 50 mA

IDDA_ACT VDDA active current TX pump enabled – 16.6 19 mA

IDDSD VDDD deep sleep current – 1 – µA

IDDSA VDDA deep sleep current – 1 – µA

IDDD_P VDDD flash programming and flash verify current

– 5 25 mA

Table 11. I/O Port 0 (P0[0:1]) DC Specifications


VIH Input high voltage TTL[20] configuration, 2.65 V ≤ VDDD ≤ 3.6 V 0.25 × VDDD + 0.585

– – V

CMOS configuration, 1.8V ≤ VDDD ≤ 5.5V 0.7 × VDDD – –

VIL Input low voltage TTL[20] configuration, 2.65 V ≤ VDDD ≤ 3.6 V – – 0.24 × VDDD + 0.275

V

CMOS configuration, 1.8V ≤ VDDD ≤ 5.5V – – 0.3 × VDDD

VOH High output voltage Reference to VDDD, IOH = 4 mA, VDDD = 3.3 V VDDD – 0.4 – – V

VOL Low output voltage VDDD = 3.3 V, IOL = 25 mA – – 0.8 V

VDDD = 1.8 V, IOL = 4 mA – – 0.4

VH Input hysteresis TA = –40 °C to 85 °C 0.05 × VDDD – – V

IIL[21] Input leakage current

(absolute value)TA = 25 °C, VDDD = 3.0 V – – 14 nA

TA = 25 °C, VDDD = 0.0 V – – 10 µA

CIN Input pin capacitance Package and pin dependent TA = 25 °C

– – 7 pF

COUT Output pin capacitance Package and pin dependent TA = 25 °C

– – 7

RINT Internal pull-up/pull-down resistance

Pin configured for internal pull-up or pull-down 3.5 5.6 8.5 kΩ

Notes19. These Min and Max limits are absolute limits, inclusive of noise. For proper operation, VDDA or VDDD with combined noise cannot go below or above the specified

Min or Max limits.20. 1.8-V communication is possible by using TTL mode for the digital inputs P0/P1, when VDDD and VDDA are supplied with 2.7 V. See the TMA448 Technical Reference

Manual (TRM) – 001-89995, for details on setting TTL mode. Parade reference documents are available under NDA through your local Parade sales representative. You can also direct your requests to [email protected].

21. Gang tested with all I/Os to 1 µA.






I/O Port 1 (P1[0:3]) and XRES DC Specifications


SWD Interface AC Specifications

The specifications in Table 13 are valid under these conditions: –40 °C ≤ TA ≤ 85 °C, 1.71 V ≤ VDDD ≤ 5.5 V, 1.71 V ≤ VCCD ≤ 1.95 V,2.65 V ≤ VDDA ≤ 5.5 V. Typical values are specified at TA = 25 °C, VDDD = VCCD = 1.8 V, core LDO disabled, and VDDA = 3.3 V.

Table 12. I/O Port 1 (P1[0:3]) and XRES DC Specifications


VIH Input high voltage TTL[23, 25] configuration, 2.65 V ≤ VDDD ≤ 3.6 V 0.25 × VDDD + 0.585

– – V

CMOS configuration, 1.8V ≤ VDDD ≤ 5.5V 0.7 × VDDD – –

VIL Input low voltage TTL[23, 25] configuration, 2.65 V ≤ VDDD ≤ 3.6 V – – 0.24 × VDDD + 0.275

V

CMOS configuration, 1.8V ≤ VDDD ≤ 5.5V – – 0.3 × VDDD

VOH High output voltage IOH = 4 mA, VDDD = 3.3 V VDDD – 0.6 – – V

IOH = 1 mA, VDDD = 1.8 V VDDD – 0.5 – –

VOL Low output voltage IOL = 8 mA, VDDD = 3.3 V – – 0.6 V

IOL = 4 mA, VDDD = 1.8 V – – 0.6

VH Input hysteresis voltage TA = –40 °C to 85 °C 0.05 × VDDD – – V

IIL[24] Input leakage (absolute value) – 1 2 nA

CIN Input pin capacitance Package and pin dependent TA = 25 °C

– – 7 pF

COUT Output pin capacitance Package and pin dependent TA = 25 °C

– – 7 pF

RINT[22] Internal pull-up/pull-down

resistancePin configured for internal pull-up or pull-down 3.5 5.6 8.5 kΩ

Table 13. SWD Interface AC Specifications


fSWDCK SWDCLK frequency 3.3 V ≤ VDDD ≤ 5 V – – 14 MHz

1.71 V ≤ VDDD < 3.3 V – – 8 MHz

TSWDI_setup SWDIO input setup before SWDCK high T = 1 / fSWDCK T / 4 – – ns

TSWDI_hold SWDIO input hold after SWDCK high T = 1 / fSWDCK T / 4 – – ns

TSWDO_valid SWDCK high to SWDIO output valid T = 1 / fSWDCK – – T / 2 ns

TSWDO_hold SWDIO output hold after SWDCK high T = 1 / fSWDCK 1 – – ns

Notes22. XRES is input only and is always configured with an internal pull-up enabled.

23. 1.8-V communication is possible by using TTL mode for the digital inputs P0/P1, when VDDD and VDDA are supplied with 2.7 V. See the TMA448 Technical Reference Manual (TRM) – 001-89995, for details on setting TTL mode. Parade reference documents are available under NDA through your local Parade sales representative. You can also direct your requests to [email protected].

24. Gang tested with all I/Os to 1 µA.

25. TTL configuration cannot be applied to XRES pin.






Chip-Level AC Specifications


Figure 14. COMM_INT Timing Diagram

Table 14. Chip-Level AC Specifications


TXRST External reset pulse width After VDDD is valid 10 – – µs

TREADY Time from de-assertion of XRES to COMM_INT

– – 12 ms

XRES

COMM_INT

TREADY





I2C Specifications

The specifications in Table 15 are valid under these conditions: –40 °C ≤ TA ≤ 85 °C, 1.71 V ≤ VDDD ≤ 5.5 V, 1.71 V ≤ VCCD ≤ 1.95 V,and 2.65 V ≤ VDDA ≤ 5.5 V. Typical values are specified at TA = 25 °C, VDDD = VCCD = 1.8 V, core LDO disabled, and VDDA = 3.3 V.TMA448 does not require a clock-stretch capable host, but is fully compatible with systems that perform clock-stretching.

To ensure proper I2C functionality in extreme bus conditions, refer to Parade’s application note Using TMA4/5XX I2C in Systems WithSlow Clock Edges (001-81514)[26].

Note: During communication with the host, the TMA448 can corrupt the first bit of an I2C transfer if the master improperly terminated bit 0 of the previous transfer. The most common type of improper termination occurs when the master is reset or powered down in mid-transfer while the TMA448 is powered and not in reset. To prevent corruption, ensure the TMA448 and master are connected to the same board-level reset signal or power rail. If this is not possible, after the improper termination force a reset or a power cycle to TMA448 to re-initialize it.

Figure 15. I2C Bus Timing Diagram for Fast/Standard Mode

S D A

S C L

S SPS r

7 0 %3 0 %

7 0 %3 0 %

7 0 %3 0 %

T S U S T A I2 C

T H D S T A I2 C

T H D D A T I2 C

T H IG H I2 C

T S U D A T I2 C

T L O W I2 C

T H D S T A I2 C

T S U S T O I2 C

T S P I2 C

1 / fS C L

T B U F I2 C

L e g e n dS : I2 C S ta r t C o n d it io nS r: I2 C R e p e a t S ta r t C o n d it io nP : I2 C S to p C o n d it io n

7 0 %3 0 %

Notes26. Extreme bus conditions are considered to be a combination of the following conditions: High-capacitive bus load, slow SCL fall time, and fast SDA rise/fall time.

Parade reference documents are available under NDA through your local Parade sales representative. You can also direct your requests to [email protected]. Full compliance with the V4.0 I2C specification requires hysteresis for high-speed (3.4 Mbps) signaling to be 10% for all operating voltages.

Table 15. AC Specifications of the I2C SDA and SCL Pins

Symbol DescriptionStandard

ModeFastMode

Fast ModePlus

High-Speed Mode Units

Min Max Min Max Min Max Min Max

fSCLI2C SCL clock frequency 0 100 0 400 0 1000 0 3400 kHz

THDSTAI2C Hold time (repeated) start condition. After this period, the first clock pulse is generated.

4 – 0.6 – 0.26 – 0.16 – µs

TLOWI2C LOW period of SCL clock 4.7 – 1.3 – 0.5 – 0.16 – µs

THIGHI2C HIGH period of SCL clock 4 – 0.6 – 0.26 – 0.06 – µs

TSUSTAI2C Setup time for repeated start condition 4.7 – 0.6 – 0.26 – 0.16 – µs

THDDATI2C Data hold time 0 – 0 – 0 – 0 – µs

TSUDATI2C Data setup time 250 – 100 – 50 – 10 – ns

TSUSTOI2C Setup time for stop condition 4 – 0.60 – 0.26 – 0.16 – µs

VHH Input hysteresis high voltage, VDDD > 2 V 0.05 × VDDD

– 0.05 × VDDD

– 0.05 × VDDD

– 0.05 × VDDD

[27]– V

VHL Input hysteresis low voltage, VDDD ≤ 2 V 0.1 × VDDD

– 0.1 × VDDD

– 0.1 × VDDD

– 0.1 × VDDD

– V

TBUFI2C Bus free time between a stop and start condition 4.7 – 1.3 – 0.5 – – – µs

TSPI2C Pulse width of spikes that are suppressed by input filter

– – 0 50 0 50 0 10 ns

CBUS Capacitance load for SDA or SCL – 400 – 400 – 550 – 100 pF






SPI Specifications

The specifications in Table 16 are valid under these conditions: –40 °C ≤ TA ≤ 85 °C, 1.71 V ≤ VDDD ≤ 5.5 V, 1.71 V ≤ VCCD ≤ 1.95 V,2.65 V ≤ VDDA ≤ 5.5 V, and CLOAD = 25 pF[28]. Typical values are specified at TA = 25 °C, VDDD = VCCD = 1.8 V, core LDO disabled,and VDDA = 3.3 V.

Figure 16. SPI Timing Diagram

SS

SCLK (CPOL = 0)

(INPUT)

MOSI

MISO

TSS_SCLK

TSETUP

THOLD

THIGH TLOW

TDELAY

1/fSCLK

TSCLK_SS

70%30%

70%30%

70%30%

70%30%

70%30%

70%30%

70%30%

70%30%

70%30%

70%30%

70%30%

Notes28. Used only during test to simulate bus capacitance loading. SPI pins should not be connected to capacitors in end products.

Table 16. AC Characteristics of the SPI Pins

Parameter Description Conditions Min Typ Max Units

fSCLK SCLK clock frequency – – 8 MHz

SDRSPI Sustained data rate for SPI transaction – – 8 Mbps

TIDLESPI Time between consecutive SPI transactions (duration between SS deassertion and the following SS assertion)

125 – – ns

TLOW SCLK low time 50 – – ns

THIGH SCLK high time 50 – – ns

TSETUP MOSI setup to SCLK 30 – – ns

THOLD MOSI hold from SCLK 30 – – ns

TDELAY MISO delay (hold) high voltage VDDD ≥ 3 V 0 – 45 ns

MISO delay (hold) low voltage VDDD < 3 V 0 – 65 ns

TSS_SCLK Time from SS low to first SCLK 125 – – ns

TSCLK_SS Time from last SCLK to SS asserted 125 – – ns





Packaging Information

This section shows the TMA448 device packaging specifications.

Figure 17. 56-pin QFN

Important Note

For information on the thermal conditions, PCB layout, SMT guidelines, and preferred dimensions for mounting QFN packages, see the Parade application note, Design Guidelines for Parade Quad Flat No Extended Lead (QFN) Packaged Devices (001-72845)[29].

001-80808 **




http://www.cypress.com/?rID=57189




Figure 18. 70-ball BGA

Important Note

For information on the thermal conditions, PCB layout, SMT guidelines, and preferred dimensions for mounting BGA packages, see the Parade application note, Design Guidelines for Parade Ball Grid Array (BGA) Packaged Devices (001-79938)[30].

Thermal Impedances and Moisture Sensitivity

Solder Reflow Specifications

Table 18 lists the maximum solder reflow peak temperature. Thermal ramp rate during preheat should be 3 °C/s or lower.

Table 17. Thermal Impedances and Moisture Sensitivity Levels per Package

Package Typical θJA Moisture Sensitivity Level

56-pin QFN 39.4 °C/W 3

70-ball BGA 49.1 °C/W 3

Table 18. Solder Reflow Specifications

Package Maximum Peak Temperature Time at Maximum Temperature

All packages 260 °C 30 seconds

001-83861 *A




http://www.cypress.com/?rID=68959




Ordering InformationTable 19 lists the TMA448 TrueTouch Multi-touch all-points touchscreen controller ordering information. For information on other TrueTouch families, visit http://www.paradetech.com/products/products-overview/.

Ordering Code Definitions

Table 19. Device Ordering Information[31]

Segmentation Part Number ExtFeatures

# of Sense I/O Typ Screen Size (in.) ChargerArmor Configurable

TX Slew Rate

Base Part(Mutual Capacitance Only)

TMA448-56LQI 44AA(T) 44 6.0 ✔ ✔

TMA448-70BUI 58AA(T) 58 7.9 ✔ ✔

Water Rejection(DualSense)

TMA448-56LQI 44AB(T) 44 6.0 ✔

TMA448-70BUI 48AB(T) 48 6.5 ✔

TMA448-70BUI 54AB(T) 54 7.2 ✔

TMA448-70BUI 58AB(T) 58 7.9 ✔

TMA448-56LQI 44AW(T) 44 6.0 ✔ ✔

TMA448-70BUI 48AW(T) 48 6.5 ✔ ✔

TMA448-70BUI 54AW(T) 54 7.2 ✔ ✔

TMA448-70BUI 58AW(T) 58 7.9 ✔ ✔

Glove andWater Rejection(DualSense)

TMA448-56LQI 44AE(T) 44 6.0 ✔ ✔

TMA448-70BUI 54AE(T) 54 7.2 ✔ ✔

TMA448-70BUI 58AE(T) 58 7.9 ✔ ✔

Custom / Kits TMA448-56LQI 44ZX(T) 44 6.0 ✔ ✔

TMA448-70BUI 58ZX(T) 58 7.9 ✔ ✔

Package (##XX):56LQ = 56-pin QFN70BU = 70-ball BGA

Part Number: 448

Family Code: TMA = Multi-touch All-points Controller

TMA 448 ####XX

AA = 35V ChargerArmor + Mutual OnlyAB/AW = 35V ChargerArmor + DualSenseAE = 35V ChargerArmor + DualSense + GloveZX = Custom Development

Extension (XX):

- XX

Temperature Range: I = Industrial

I

Number of Sense I/O (##): 44, 48, 54, or 58

(T)

T: Tape and Reel

Notes31. All devices listed have the following base features: 10V TX, CapSense Buttons, Large-Object Detection and Rejection, and Grip Suppression.

http://www.paradetech.com/products/products-overview/

http://www.paradetech.com/products/products-overview/





Appendix

Evaluation Kit (EVK)

Parade supports customer evaluation and host software development with its evaluation kit (EVK). Using the EVK, you can quickly becomefamiliar with the host protocols and TMA448’s behavior in all of its modes. The TrueTouch Host Emulator (TTHE) PC tool acts likea host and can be used to tune and configure touchscreen scanning parameters. This allows early prototype development before the finalsystem host is available.

The EVK includes:

■ Parade evaluation board with TMA448 connected to a 5.3-inchdiagonal ITO touchscreen sensor

■ USB drive with documentation, TTHE, and configuration files

■ USB cable

For more information about the EVK supporting the TMA448controller, contact your local Parade sales representative. Youcan also direct your requests to [email protected].

Reference Documents

Parade has created a collection of documents to support the design of TrueTouch touchscreen controllers. The following list willguide you in identifying the proper document for your task.

■ PCB/FPC Schematic and Layout Design

■ ITO Panel Design

■ Driver Development

■ Manufacturing (MFG)

■ System Performance Evaluation

Parade’s TrueTouch technology is Parade confidential information and is protected through a Non-Disclosure Agreement (NDA).These documents are not publicly available on the Parade website. Contact your local Parade office to request any of these docu-ments pursuant to the aforementioned NDA. You can also direct your requests to [email protected]. For a complete list ofproduct documentation, see the TMA448 Technical Reference Manual (TRM) – 001-89995.

Note32. Extreme bus conditions are considered to be a combination of the following conditions: High-capacitive bus load, slow SCL fall time, and fast SDA rise/fall time.

Table 20. Reference Specifications

Document Number

Document Title DescriptionPCB FPC

ITO Panel

Driver MFG System

Product Specifications

001-90514 TrueTouch® TMA448 Product Family Release Notes

Contains software requirements and known issues.

✔ ✔ ✔

001-89995 TMA448 TrueTouch® Technical Reference Manual

Contains detailed information on communica-tion protocol, modes and registers, power states, and instructions on getting started with supporting tools.

✔ ✔ ✔

001-89996TMA568 Touchscreen Controller Tuning Best Practices

Contains tuning guidance during system development

✔ ✔ ✔ ✔

001-85948Touchscreen Manufacturing Test with TMA448/545/568

Contains information on how to create a man-ufacturing test suite.

✔

Solution Specifications

001-49389TrueTouch® Touchscreen Controller Performance Parameters

Contains Parade touchscreen performance parameter definitions, justification for parame-ters, and parameter test methodologies.

✔ ✔

001-50467TrueTouch® Touchscreen Controller Module Design Best Practices

A system-level design guide for building a capacitive touchscreen module, covering top-ics such as touchscreen traces, shielding, mechanical design, FPC/PCB design, and LCD considerations.

✔ ✔







001-72845

Design Guidelines for Parade Quad Flat No Extended Lead (QFN) Packaged Devices - AN72845

Describes the design guidelines to be fol-lowed for using QFN packages from Parade.

✔

001-79938Design Guidelines for Parade Ball Grid Array (BGA) Packaged Devices - AN79938

Describes the design guidelines to be fol-lowed for using BGA packages from Parade.

✔

001-81514 Using TMA4/5XX I2C in Systems With Slow Clock Edges

Discusses how to ensure proper I2C function-

ality in extreme bus conditions[32].✔

001-83948 TrueTouch® Host Emulator GuideDescribes the TrueTouch® Host Emulator Software

✔

001-63571 TK3295-MTK TrueTouch® Manufacturing Test Kit User Guide

Describes the TK3295-MTK Manufacturing Test Kit

✔

001-81891 TrueTouch® Driver for Android (TTDA) User Guide

Contains information on the Android TrueTouch driver

✔

001-85104 TrueTouch® Driver for WinPhone8 (TTDW) User Guide

Contains information on the Windows Phone 8 TrueTouch driver

✔

External Specifications - These specifications are not created by Parade or owned by Parade, but directions on how to acquire or access them can be provided upon request by contacting [email protected].

UM10204 I2C-bus specification and user manual from NXP ✔ ✔

EN301489Electromagnetic Compatibility and Radio Spectrum Matters (ERM); electromagnetic compatibility (EMC) standard for radio equipment and services Part-1: Common technical requirements

✔ ✔

EN62684 Interoperability specifications of common external power supply (EPS) for use with data-enabled mobile telephones

✔ ✔

Table 20. Reference Specifications (continued)

Document Number

Document Title DescriptionPCB FPC

ITO Panel

Driver MFG System






Document Conventions

Units of Measure Port Nomenclature

Px[y] describes a particular bit “y” available within an I/O port “x.”For example, P4[2] reads “port 4, bit 2.”

Px[y:z] describes a particular range of bits “y to z” within an I/Oport named “Px.” For example, P4[0:5] refers to bits 0 through 5within an I/O port named P4.

Table 21. Units of Measure

Symbol Unit of Measure

°C degrees Celsius

µA microampere

µF microfarad

µs microsecond

µW microwatt

Ω ohm

Hz hertz

kΩ kilo-ohm

kbps kilobits per second

kHz kilohertz

mA milliampere

mm millimeter

ms millisecond

mV millivolt

mW milliwatt

MΩ megaohm

Mbps megabits per second

MHz megahertz

nA nanoampere

ns nanosecond

pF picofarad

s second





Acronyms and Abbreviations

Table 22. Acronyms Used in this Document

Acronym Description Acronym Description

BGA ball grid array PIP packet interface protocol

CPU central processing unit PSoC® programmable system-on-chip

DSD dual-solid diamond pattern (Figure 4) QFN quad flat no-lead

EMI electromagnetic interference RF radio frequency

EP exposed pad SCL serial I2C clock

ESD electrostatic discharge SCLK serial SPI clock

EVK evaluation kit SD signal disparity

FPC flexible printed circuit SDA serial I2C data

GPS global positioning system SLIM® single layer independent Multi-touch (Figure 6)

I2C inter-integrated circuit SMT surface mount technology

I/O input/output SOL sensor-on-lens

ITO indium tin oxide SNR signal-to-noise ratio

LCD liquid crystal display SPI serial peripheral interface

LDO low dropout regulator SS slave select

MH3 Manhattan-3 pattern (Figure 5) SSD single-solid diamond (Figure 3)

MISO master input, slave output SWD serial wire debug

MOSI master output, slave input SWDCLK serial wire debug clock

MTK manufacturing test kit SWDIO serial wire debug input/output

NUI natural user interface TRM technical reference manual

PCB printed circuit board TTHE TrueTouch® host emulator

PET polyethylene terephthalate VPP peak-to-peak voltage





Glossary

accuracy The maximum position error across the touchscreen, measured in millimeters, along a straight line between the actual finger position and the reported finger position. Accuracy is measured across the core and full panel. See Parade’s TrueTouch® Touchscreen Controller Performance Parameters (001-49389)[33] specification for more information.

All-points Parade brand name for TrueTouch devices capable of tracking the motion of multiple fingers.

AMOLED/OLED Type of display using Active Matrix (AM) Organic Light Emitting Diodes (OLED).

conversion The process of measuring the capacitance of an electrode connected to a pin (self capacitance) or the capacitance between a pair of electrodes connected to different pins (mutual capacitance). The result is a number that can be processed by the channel engine and CPU.

core That portion of the touchscreen, responsive to touch, less a perimeter area whose width is the larger of 3.5 mm or radius of the finger.

core LDO Low Drop Out Regulator that sources power to the digital core when enabled. Input to the LDO is VDDD. Output of the LDO is connected to the digital supply pin VCCD. When the core LDO is disabled, power must be externally applied to the digital core supply pin VCCD.

cover lens The top layer in the touchscreen stackup that provides mechanical stability and protection for the touchscreen sensor.

DCVCOM Type of Liquid Crystal Display where the common electrode (VCOM) is driven by DC voltage.

DualSenseTM Parade’s patented self plus mutual capacitance sensing.

linearity The deviation of the position data from a best-fit straight line across the touchscreen, measured in millimeters. Linearity is measured across the core and full panel. See Parade’s TrueTouch® Touchscreen Controller Performance Parameters (001-49389)[33] specification for more information.

mutual capacitance

The capacitance between two touchscreen electrodes.

refresh rate The frequency at which consecutive frames of touchscreen data are made available in a data buffer while a finger is present on the touchscreen. See Parade’s TrueTouch® Touchscreen Controller Performance Parameters (001-49389)[33] specifi-cation for more information.

RX Receive. A touchscreen electrode or touchscreen controller sense pin, mapped or switched to a charge sensing circuit within the controller (known as a receive channel).

scan The conversion of all sensor capacitances to digital values.

self capacitance The capacitance between a touchscreen electrode and ground.

sense pin A pin that can be multiplexed to RX or TX.

signal-to-noise ratio (SNR)

The ratio between a capacitive finger signal and system noise.

signal disparity (SD)

The ratio of maximum measured signal when the touchscreen is grounded and maximum measured signal when the touch-screen is isolated from ground.

stackup Layers of materials, in defined assembly order, that make up a touchscreen sensor.

TX Transmit. A touchscreen electrode or touchscreen controller sense pin, mapped or switched to a charge forcing circuit within the controller. This charge forcing circuit drives a periodic waveform onto one or more touchscreen electrodes, which are coupled through mutual capacitance to adjacent receive electrodes.







Document History Page

Document Title: TMA448 TrueTouch® Multi-touch All-points Touchscreen Controller DatasheetDocument Number: 001-89993

Revision ECN Orig. of Change

Submission Date Description of Change

0 – – 09/11/2015 Initial release Parade datasheet.
