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Technical NoteUsing Micron’s TWRPI SPI NOR Module With Freescale’s Tower Platform

IntroductionThis technical note provides instructions for using Micron's tower plug-in (TWRPI)-compatible SPI NOR module with Freescale's Tower platform to evaluate the effective-ness of SPI NOR Flash when used in conjunction with Freescale's microcontroller units(MCUs).

TWRPI connectors enable rapid prototyping of memory devices, sensors, radios, andother peripherals connected to Freescale's MCUs. Micron's TWRPI SPI NOR module isdesigned specifically to Freescale's TWRPI standard, and the TWRPI SPI NOR will workwith any board supporting the TWRPI connector. The TWRPI SPI NOR has been valida-ted on the TWR-K60D100M Tower Module. All source code examples included in thistechnical note can be ported to any compatible tower processor or accessory, allowingfor easy evaluation of serial NOR Flash memory in new designs (embedded designs, inparticular).

Note that while the Micron SPI NOR Flash supports quad (4-bit) read mode and some ofFreescale's newer processors support quad mode operations, the TWRPI standard onlysupports single-bit serial operation.

Figure 1: TWRPI SPI NOR Module – Top View

TN-12-32: TWRPI SPI NOR Module With Freescale PlatformIntroduction

PDF: 09005aef859c3b70tn1232_twrpi_spi_nor_module_freescale_tower.pdf - Rev. A 4/14 EN 1 Micron Technology, Inc. reserves the right to change products or specifications without notice.

© 2014 Micron Technology, Inc. All rights reserved.

Products and specifications discussed herein are for evaluation and reference purposes only and are subject to change byMicron without notice. Products are only warranted by Micron to meet Micron's production data sheet specifications. All

information discussed herein is provided on an "as is" basis, without warranties of any kind.

Serial Peripheral InterfaceThe four pins of the SPI interface (S#, C, D, and Q) enable full access to the SPI NORFlash memory. READ, PROGRAM, and ERASE operations can easily be completed usingthe SPI interface. The SPI instructions are initiated from the microcontroller driven onthe D (DQ0) pin, and any data returned from the NOR Flash device is given on the Q(DQ1) pin. S# is the chip select pin, and the C pin is used as a clock to synchronize thecommunication between the controller and the Flash device.

Figure 2: SPI Interface

SPImaster

SPINOR FlashX1 mode

TWRPI–NOR

SSC

MOSIMISO

S#CDQ

Figure 3: SPI Modes

C

C

DQ0

DQ1

CPHA

0

1

CPOL

0

1

MSB

MSB

TN-12-32: TWRPI SPI NOR Module With Freescale PlatformSerial Peripheral Interface



SPI Operations

Table 1 shows a simplified list of supported SPI NOR Flash operations. See the full Mi-cron SPI NOR data sheet for more information about SPI operations.

Table 1: SPI Operations

Command Code Data Bytes

READ Operations

READ ID 9E/9Fh 1 to 20

READ 03h 1 to ∞FAST READ 0Bh 1 to ∞WRITE Operations

WRITE ENABLE 06h 0

WRITE DISABLE 04h 0

REGISTER Operations

READ STATUS REGISTER 05h 1 to ∞WRITE STATUS REGISTER 01h 1

PROGRAM Operations

PAGE PROGRAM 02h 1 to 256

ERASE Operations

SECTOR ERASE D8h 0

Figure 4: READ ID Command

UIDDeviceidentification

Manufactureridentification

High-ZDQ1

MSB MSB

DOUT DOUT DOUT DOUT

LSBLSB

7 8 15 16 32310

C

MSB

DQ0

LSB

Command

MSB

DOUT DOUT

LSB

Don’t Care

Figure 5: READ Command

Don’t Care

MSB

DQ[0]

LSB

Command

A[MAX]

A[MIN]

7 8 Cx0

C

Extended

High-ZDQ1

MSB

DOUT DOUT DOUT DOUT DOUT

LSBDOUT DOUT DOUT DOUT

Note: 1. CX = 7 + (A[MAX] + 1)

TN-12-32: TWRPI SPI NOR Module With Freescale PlatformSerial Peripheral Interface



Module Features1. Micron's 64Mb 3V SPI NOR (N25Q064A13ESF40) device is mounted on the board.2. VCC for the Flash device is connected to pin 2 of the TWRPI connector, which has a

3.3V supply.3. The PCB footprint allows for one of three different packages (SOIC8, SOIC16 or 24

ball PBGA) to be soldered at one time, enabling users to prototype the desiredpackage and densities of the end product.

4. The TWRPI SPI NOR module supports up to the maximum Flash memory fre-quency, typically 108Mhz; however, the speed may be limited by the microcontrol-ler speed.

Optional Features

The TWRPI SPI NOR module includes optional features for evaluation of HOLD#, RE-SET#, and WP. These features are enabled by cutting the trace and soldering the jumperto connect the general purpose inputs/outputs (GPIOs) of the controller. By default,These pins are hard-wired through PCB traces to VCC to enable straightforward use ofthe SPI NOR device.

Figure 6: TWRPI SPI NOR Module Schematic

TWRPI connector

J1

J3 J4 J5

1

3

5

7

9

11

13

15

17

19

2

4

6

8

10

12

14

16

18

20

5V VCC

GND

VSSa

VSSa

ADC ANA1

VSSa

VSSa

GND

ADC ID0

GND

C110nF 10V

C2100nF

C3100nF

3V3

3V3

R1100K

R2100K

3V3

JMPR RESET#

JMPR HOLD#

JMPR W#

3V3 3V3

13 13 1

2 2 23

3V3 VCC

3V3 VCCa

VSSa

ADC ANA0

VSSa

ADC ANA2

VSSa

GND

ADC ID1

RESET

TWRPI left J21

3

5

7

9

11

13

15

17

19

2

4

6

8

10

12

14

16

18

20

GND

I2Cscl

GND

GND

SPImiso

SPIss

GND

GPIO0irq

GPIO2

GPIO4

3V3

GND

I2Csda

GND

GND

SPImosi

SPIclk

GND

GPIO1irq

GPIO3

GPIO5

TWRPI right

U11

2

3

4

8

7

6

5

S#

DQ1

W#/DQ2

VSS

3V3

3V3

3V3

VCC

HOLD#/DQ3

C

DQ0

SOIC8

U21

2

3

4

5

6

7

8

16

15

14

13

12

11

10

9

HOLD#/DQ3

VCC

RESET#

DNU

DNU

DNU

S#

DQ1

C

DQ0

DNU

DNU

DNU

DNU

VSS

W#/DQ2

SOIC16

U3

A2

A3

A4

A5

B1

B2

B3

B4

B5

E4

E3

E2

E1

D5

D4

D3

D2

D1

NC

NC

RESET#

NC

NC

C

VSS

VCC

NC

NC

NC

NC

NC

NC

NC

HOLD#/DQ3

DQ0

DQ1

NC

C1

C2

C3

C4

C5

NC

S# NC

W#/

DQ

2

NC

E5BGA5E

SOIC 8\16 common socket

Figure 7: TWRPI SPI NOR Module PCB Top View

Cuttable trace for optional jumpers

TN-12-32: TWRPI SPI NOR Module With Freescale PlatformModule Features



Evaluating an SPI NOR DeviceTo evaluate the effectiveness of an SPI NOR device using Micron's TWRPI SPI NORmodule and Freescale's Tower platform (or other suitable TWRPI-compatible board),follow these steps:

1. Set up the hardware (see the Setting Up the Hardware (page 5) section for in-structions).

2. Download the software (see the Setting Up the Software (page 7) section for in-structions.

3. Run the demonstration program (see the Running the Demonstration Program(page 12) section for instructions).

Setting Up the Hardware

For this evaluation, Micron's TWRPI SPI NOR module is installed on Freescale's Towerplatform, which includes Freescale's TWR-K60D100M Tower module and Tower Serialmodule.Note: Other TWRPI-compatible boards may be used, but they have not been validated.

Figure 8: Freescale Tower Platform

TN-12-32: TWRPI SPI NOR Module With Freescale PlatformEvaluating an SPI NOR Device



Figure 9: Freescale TWR-K60D100M Tower Module

Figure 10: Freescale Tower With Serial Module




Set up the hardware for the evaluation as follows:1. Set up Freescale's Tower platform or the appropriate TWRPI-compatible board.

See Freescale's TWR‐K60D100M Tower Module User Manual for instructions.Note: The Tower Serial module's RS232 connection is set up with: 115200 baudrate, 8 data bit, 1 stop bit, no parity, and no flow control. The Tower Serial Modulefigure above shows proper connection of the RS232 cable.

2. Install Micron's TWRPI SPI NOR module on Freescale's TWR-K60D100M TowerModule as shown in the figure below.

Figure 11: TWRPI Module Installed on TWR-K60D100M Tower Module

Notes: 1. To avoid confusion, the TWRPI SPI NOR module is designed so that there is one way toinsert it into the connectors on a TWRPI-compatible board.

2. Freescale's TWR-K60D100M module J9 socket (using four pins) is configured as SPI2 chipselect 1; J8 pin 2 is the power source pin for the Flash memory. The software must ad-dress the correct port accordingly.

3. The USB connection on the Freescale TWR-K60D100M Tower module serves as the boardflashing port, debug port, and input power source.

Setting Up the Software

Micron's 64Mb N25Q SPI NOR low-level driver (LLD) provides application program-ming interfaces (APIs) to use as an example. These API functions enable designers to in-itialize, erase, program, and read from Micron's N25Q device. See the API Functions(page 9) section for more information.

Both the LLD and TWRPI SPI NOR module have been tested on Freescale's TWR-K60D100M Tower platform. The LLD and all code provided in this document are exam-ples only and must be modified for the evaluation of your specific design.

Set up the software for the evaluation as follows:1. Download and install Freescale Codewarrior V10.5 or later.2. From the Freescale CodeWarrior IDE, create a project by selecting one of the pro-

vided Freescale MCU K60 Kinetis sample projects.




http://cache.freescale.com/files/32bit/doc/ref_manual/twrk60d100mum.pdf

http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=CW-MCU10&fsrch=1&sr=1&pageNum=1

3. Add these LLD software package files to the project: n25qNorLib.c, dspi_test.c,dspi_common.h, and dspi_nor_n25q.h. To create the files, cut and paste the ex-ample code in the following sections:

a. See Appendix A (page 14) for n25qNorLib.c example code.Note: The n25qNorLib.a library file should be included in the linker miscella-neous option.

b. See Appendix B (page 28) for dspi_test.c example code.c. See Appendix C (page 46) for dspi_common.h example code.d. See Appendix D (page 48) for dspi_nor_n25q.h example code.

4. Compile and execute the image by using the features/options of the Freescale Co-deWarrior IDE. The Codewarrior's debugger should enable the image to be down-loaded so that debugging and/or testing can begin.




API Functions

The LLD API functions available for Micron's TWRPI SPI NOR module are as follows:

1. unsigned int norFlash_readID(void)

/**************************** Read NOR flash ID for 4 bytes* Return 4 bytes ID***************************/unsigned int norFlash_readID(void){ // read ID dspi_config(MEM_RDID,&dspi); return dspi.rxdata;}

2. int norFlash_subSectorErase(unsigned int subSectorAddr)

/****************************************************Erase sub-sector at the sub-sector-address(3-byte address)*subSectorAddr -- > 3-byte address of the subsector.*Return 0 --> Pass*Return 1 --> Fail***************************************************/int norFlash_subSectorErase(unsigned int subSectorAddr){ int i; dspi_config(VERIFY_WREN,&dspi); while ((dspi.rxdata & 0x03) != 0x02) { i = 0x100; while(i--); dspi_config(MEM_WREN,&dspi); dspi_config(VERIFY_WREN,&dspi); } // Sub-sector erase dspi.addr = subSectorAddr; //3-byte addressing for sub-sector dspi_config(SUB_SECTOR_ERASE,&dspi); i = 0x100; while(i--); //Wait for erase to over dspi_config(WAIT_WR_OVER,&dspi); dspi_config(FLAG_STATUS,&dspi); if (dspi.rxdata & M25_STATUS_FLAG_ERASE_BIT) return M_FAIL; else return M_PASS;}

3. int norFlash_SectorErase(unsigned int SectorAddr)




/****************************************************Erase sector at the sector address(3-byte address)*SectorAddr -- > 3-byte address*Return 0 --> Pass*Return 1 --> Fail***************************************************/int norFlash_SectorErase(unsigned int SectorAddr){ dspi_config(MEM_WREN,&dspi); // sector erase dspi.addr = SectorAddr; //3-byte addressing for sub-sec-tor dspi_config(SECTOR_ERASE,&dspi); //Wait for erase to over dspi_config(WAIT_WR_OVER,&dspi); dspi_config(FLAG_STATUS,&dspi); if (dspi.rxdata & M25_STATUS_FLAG_ERASE_BIT) return M_FAIL; else return M_PASS;}

4. int norFlash_BulkErase(void)

/****************************************************Erase the entire chip*Return 0 --> Pass*Return 1 --> Fail***************************************************/int norFlash_BulkErase(void){ dspi_config(MEM_WREN,&dspi); // Bulk erase dspi_config(BULK_ERASE,&dspi); //Wait for erase to over dspi_config(WAIT_WR_OVER,&dspi); dspi_config(FLAG_STATUS,&dspi); if (dspi.rxdata & M25_STATUS_FLAG_ERASE_BIT) return M_FAIL; else return M_PASS;}

5. int norFlash_programPage(int cnt, int addr, unsigned char *buf)




/****************************************************program 1 to 256 bytes to the Nor chip.*cnt -- > number of bytes to program to the chip.*addr -- > 3-byte address *@buf -- > the buffer holding the data to program to the chip.*Return 0 --> Pass*Return 1 --> Fail***************************************************/int norFlash_programPage(int cnt, int addr, unsigned char *buf){ if (cnt > M25_FLASH_PAGE_SIZE) return M_FAIL; if ((buf == 0) || (cnt == 0)) return M_FAIL; if (((addr & M25_FLASH_PAGE_SIZE_MASK) + cnt) > M25_FLASH_PAGE_SIZE) return M_FAIL; //writing to Nor flash //write enable first dspi_config(MEM_WREN,&dspi); dspi.addr = addr; dspi.bufPtr = buf; dspi.bufByteCount = cnt; //write to flash dspi_config(WRITE_TX_DATA,&dspi); //Wait for write to over dspi_config(WAIT_WR_OVER,&dspi); dspi_config(FLAG_STATUS,&dspi); if (dspi.rxdata & M25_STATUS_FLAG_PROGRAM_BIT) return M_FAIL; else return M_PASS;}

6. int norFlash_read(int cnt, int addr, unsigned char *buf)




/****************************************************read 1 to many bytes from the Nor chip.*cnt -- > number of bytes read from to the chip.*addr -- > 3-byte address *@buf -- > the buffer holding the data read from the chip.*Return 0 --> Pass*Return 1 --> Fail***************************************************/int norFlash_read(int cnt, int addr, unsigned char *buf){ if (buf == 0) return M_FAIL; if (cnt == 0) return M_FAIL; // Read data from flash dspi.addr = addr; //3-byte addressing dspi.bufPtr = buf; dspi.bufByteCount = cnt; dspi_config(READ_DATA,&dspi); return M_PASS;}

Running the Demonstration Program

The demo program will start displaying Micron NOR Flash ID bytes: 0x20, 0xba, 0x17,0x10

The following displays in the menu:

Press:1 to start BULK ERASE, program, and read test.2 to start Sector ERASE, program, and read test.3 to start Subsector ERASE, program, and read test.4 to start short BULK ERASE, program, and read test.5 to start short Sector ERASE, program, and read test.6 to start short Subsector ERASE, program, and read test.

Press the appropriate number to start. If there is an error, the error message displaysand the demo program stops. When the selected test is done, the demo menu is reloa-ded.

/****************************************************Demo program to start the demo menu for the test selections***************************************************/void test_main (void){ uint32 idBytes; uint8 *idByte,ch; // freeScale SPI controller init SPI_init(); SPI_reset_check(); // Micron norFlash init norFlash_driverInit();




step1: // display Micron NOR flash 4 ID bytes idBytes = norFlash_readID(); idByte = (uint8 *)&idBytes; printf("\n Micron Nor Flash ID: 0x%x 0x%x 0x%x 0x%x\n",idByte[0],idByte[1],idByte[2],idByte[3]); printf("\n Press: \n"); printf(" 1 to start BULK ERASE, program, and read test. \n"); printf(" 2 to start Sector ERASE, program, and read test. \n"); printf(" 3 to start Subsector ERASE, program, and read test. \n"); printf(" 4 to start short BULK ERASE, program, and read test. \n"); printf(" 5 to start short Sector ERASE, program, and read test. \n"); printf(" 6 to start short Subsector ERASE, program, and read test. \n");ch = in_char(); switch (ch) { case '1': m25_nor_Bulk_erase_test(); break; case '2': m25_nor_Sector_erase_test(); break; case '3': m25_nor_subSector_erase_test(); break; case '4': m25_nor_short_Bulk_erase_test(); break; case '5': m25_nor_short_Sector_erase_test(); break; case '6': m25_nor_short_subSector_erase_test(); break; goto step1; }

goto step1; while(1);}




Appendix ACopy and paste all of the code in this section into the text file and save as n25qNorLib.c.

#include "common.h"#include "dspi_common.h"#include "dspi_nor_n25q.h"#define MICRON_VERSION_FOR_ST "AIRDRI_Porting_1.0.1_03052014"#define M_FTL_V_NUMBER_MAJOR 1#define M_FTL_V_NUMBER_MINOR 0#define M_FTL_V_NUMBER_EVAL 1

extern int int_spi_rfdf; extern int int_spi_rfof;void dspi_config(int DSPI_COMMAND , dspi_ctl *dspi_value);void SPI_init(void);void SPI_reset_check(void);int norFlash_subSectorErase(unsigned int subSectorAddr);int norFlash_SectorErase(unsigned int SectorAddr);int norFlash_BulkErase(void);int norFlash_programPage(int cnt, int addr, unsigned char *buf);int norFlash_read(int cnt, int addr, unsigned char *buf);

void norFlash_driverInit(void);unsigned int norFlash_readID(void);char *m_ftl_version_stream(void);unsigned char m_ftl_version_number(unsigned int *verNum);

dspi_ctl dspi;

char chhhh[] = MICRON_VERSION_FOR_ST;

/*-----------------------------------------------------------------------------Function: Read FTL version.Description: Three integer representing the release version #Notes: NoneReturns: M_PASS and M_FAIL-------------------------------------------------------------------------------*/unsigned char m_ftl_version_number(unsigned int *verNum){ if (verNum == NULL) return M_FAIL; verNum[0] = M_FTL_V_NUMBER_MAJOR; verNum[1] = M_FTL_V_NUMBER_MINOR; verNum[2] = M_FTL_V_NUMBER_EVAL; return M_PASS; }

TN-12-32: TWRPI SPI NOR Module With Freescale PlatformAppendix A



/*-----------------------------------------------------------------------------Function: Read FTL version stream.Description: stream of the version #Notes: NoneReturns: the pointer of the stream-------------------------------------------------------------------------------*/char *m_ftl_version_stream(void){

return chhhh; }

void SPI_init(void){/* clock gate */ SIM_SCGC3 |= SIM_SCGC3_SPI2_MASK; /* pin mux */ // JNG PORTD_PCR11 &= ~PORT_PCR_MUX_MASK;// JNG PORTD_PCR11 |= PORT_PCR_MUX(2); //SPI2_PCS0 PORTD_PCR12 &= ~PORT_PCR_MUX_MASK; PORTD_PCR12 |= PORT_PCR_MUX(2); //SPI2_SCK PORTD_PCR13 &= ~PORT_PCR_MUX_MASK; PORTD_PCR13 |= PORT_PCR_MUX(2); //SPI2_SOUT PORTD_PCR14 &= ~PORT_PCR_MUX_MASK; PORTD_PCR14 |= PORT_PCR_MUX(2); //SPI2_SIN PORTD_PCR15 &= ~PORT_PCR_MUX_MASK; PORTD_PCR15 |= PORT_PCR_MUX(2); //SPI2_PCS1 }

/********************************************************************/// For checking reset value of all I2C registersvoid SPI_reset_check(void){ /*For SPI2*/ if(SPI2_MCR != 0x00004001 ) printf("SPI2 register reset value SPI2_MCR is not correct %08X \n",SPI2_MCR ); if(SPI2_TCR != 0x00000000 ) printf("SPI2 register reset value SPI2_TCR is not correct %08X \n",SPI2_TCR ); if(SPI2_CTAR0 != 0x78000000 ) printf("SPI2 register reset value SPI2_CTAR0 is not correct %08X \n",SPI2_CTAR0 ); if(SPI2_CTAR1 != 0x78000000 ) printf("SPI2 register reset value SPI2_CTAR1 is not correct %08X \n",SPI2_CTAR1 ); if(SPI2_SR != 0x00000000 ) printf("SPI2 register reset value SPI2_SR is not correct %08X \n",SPI2_SR ); if(SPI2_RSER != 0x00000000 ) printf("SPI2 register reset value SPI2_RSER is not correct %08X \n",SPI2_RSER ); if(SPI2_PUSHR != 0x00000000 ) printf("SPI2 register reset value SPI2_PUSHR is not correct %08X \n",SPI2_PUSHR );




if(SPI2_PUSHR_SLAVE != 0x00000000 ) printf("SPI2 register reset value SPI2_PUSHR_SLAVE is not correct %08X \n",SPI2_PUSHR ); if(SPI2_POPR != 0x00000000 ) printf("SPI2 register reset value SPI2_POPR is not correct %08X \n",SPI2_POPR ); if(SPI2_TXFR0 != 0x00000000 ) printf("SPI2 register reset value SPI2_TXFR0 is not correct %08X \n",SPI2_TXFR0 ); if(SPI2_TXFR1 != 0x00000000 ) printf("SPI2 register reset value SPI2_TXFR1 is not correct %08X \n",SPI2_TXFR1 ); if(SPI2_TXFR2 != 0x00000000 ) printf("SPI2 register reset value SPI2_TXFR2 is not correct %08X \n",SPI2_TXFR2 ); if(SPI2_TXFR3 != 0x00000000 ) printf("SPI2 register reset value SPI2_TXFR3 is not correct %08X \n",SPI2_TXFR3 ); if(SPI2_RXFR0 != 0x00000000 ) printf("SPI2 register reset value SPI2_RXFR0 is not correct %08X \n",SPI2_RXFR0 ); if(SPI2_RXFR1 != 0x00000000 ) printf("SPI2 register reset value SPI2_RXFR1 is not correct %08X \n",SPI2_RXFR1 ); if(SPI2_RXFR2 != 0x00000000 ) printf("SPI2 register reset value SPI2_RXFR2 is not correct %08X \n",SPI2_RXFR2 ); if(SPI2_RXFR3 != 0x00000000 ) printf("SPI2 register reset value SPI2_RXFR3 is not correct %08X \n",SPI2_RXFR3 );}

// Init the SPI NOR drivervoid norFlash_driverInit(void){

SPI2_MCR = 0x80023c01; // init global variables dspi.br = 0x00; dspi.cpha = 0;//SPI_CTAR0_CPHA;//0x00000000; dspi.cpol = 0;//SPI_CTAR0_CPOL;//0x00000000; }

// read NOR flash ID for 4 bytes// return 4 bytes IDunsigned int norFlash_readID(void){ // read ID dspi_config(MEM_RDID,&dspi); return dspi.rxdata;}

// erase sub-sector at the sub-sector-address(3-byte address)// return 0 --> Pass// return 1 --> Failint norFlash_subSectorErase(unsigned int subSectorAddr)




{ int i;// dspi_config(MEM_WREN,&dspi); dspi_config(VERIFY_WREN,&dspi); while ((dspi.rxdata & 0x03) != 0x02) { i = 0x100; while(i--); dspi_config(MEM_WREN,&dspi); dspi_config(VERIFY_WREN,&dspi); } // Sub-sector erase dspi.addr = subSectorAddr; //3-byte addressing for sub-sector dspi_config(SUB_SECTOR_ERASE,&dspi); i = 0x100; while(i--); //Wait for erase to over dspi_config(WAIT_WR_OVER,&dspi); dspi_config(FLAG_STATUS,&dspi); if (dspi.rxdata & N25Q_STATUS_FLAG_ERASE_BIT) return M_FAIL; else return M_PASS; }

// erase sector at the sector-address(3-byte address)// return 0 --> Pass// return 1 --> Failint norFlash_SectorErase(unsigned int SectorAddr){ dspi_config(MEM_WREN,&dspi); // sector erase dspi.addr = SectorAddr; //3-byte addressing for sub-sector dspi_config(SECTOR_ERASE,&dspi);

//Wait for erase to over //Wait for erase to over dspi_config(WAIT_WR_OVER,&dspi); dspi_config(FLAG_STATUS,&dspi); if (dspi.rxdata & N25Q_STATUS_FLAG_ERASE_BIT) return M_FAIL; else return M_PASS;}

// erase entire NOR // return 0 --> Pass// return 1 --> Failint norFlash_BulkErase(void)




{ dspi_config(MEM_WREN,&dspi); // Bulk erase dspi_config(BULK_ERASE,&dspi);

//Wait for erase to over //Wait for erase to over dspi_config(WAIT_WR_OVER,&dspi); dspi_config(FLAG_STATUS,&dspi); if (dspi.rxdata & N25Q_STATUS_FLAG_ERASE_BIT) return M_FAIL; else return M_PASS;}

// program NOR flash within one page// return fail --> 1// return pass --> 0int norFlash_programPage(int cnt, int addr, unsigned char *buf){ if (cnt > N25Q_FLASH_PAGE_SIZE) return M_FAIL; if ((buf == 0) || (cnt == 0)) return M_FAIL; if (((addr & N25Q_FLASH_PAGE_SIZE_MASK) + cnt) > N25Q_FLASH_PAGE_SIZE) return M_FAIL; //writing to Nor flash //write enable dspi_config(MEM_WREN,&dspi); dspi.addr = addr; dspi.bufPtr = buf; dspi.bufByteCount = cnt; //write to flash dspi_config(WRITE_TX_DATA,&dspi); //Wait for write to over dspi_config(WAIT_WR_OVER,&dspi); dspi_config(FLAG_STATUS,&dspi); if (dspi.rxdata & N25Q_STATUS_FLAG_PROGRAM_BIT) return M_FAIL; else return M_PASS; }




// read NOR flash at the address for number of continuous bytes specified in the function parameter// return fail --> 1// return pass --> 0int norFlash_read(int cnt, int addr, unsigned char *buf){ if (buf == 0) return M_FAIL; if (cnt == 0) return M_FAIL; // Read data from flash dspi.addr = addr; //3-byte addressing dspi.bufPtr = buf; dspi.bufByteCount = cnt; dspi_config(READ_DATA,&dspi); return M_PASS;}

void dspi_config(int DSPI_COMMAND , dspi_ctl *dspi_value){

uint32 pop_reg, mcr_reg, tmp_reg, i, j, k, cnt, tmp; switch(DSPI_COMMAND) {

case MEM_RDID: // read chip id SPI2_CTAR0 = (0x78000000 +dspi_value->br) | dspi_value->cpha | dspi_val-ue->cpol; SPI2_CTAR1 = (0x38000000 +dspi_value->br) | dspi_value->cpha | dspi_val-ue->cpol; SPI2_PUSHR = 0x80019F00; mcr_reg = SPI2_MCR; mcr_reg &= 0xfffdfffe; SPI2_MCR = mcr_reg; while( SPI_SR_TCF != (SPI2_SR & SPI_SR_TCF)); SPI2_SR = SPI2_SR | SPI_SR_TCF ; pop_reg = SPI2_POPR ; dspi_value->rxdata = pop_reg & 0xff; SPI2_PUSHR = 0x80010000; while( SPI_SR_TCF != (SPI2_SR & SPI_SR_TCF)); SPI2_SR = SPI2_SR | SPI_SR_TCF ; pop_reg = SPI2_POPR ; dspi_value->rxdata |= pop_reg & 0xff00; dspi_value->rxdata |= (pop_reg << 16) & 0xff0000; SPI2_PUSHR = 0x18010000; while( SPI_SR_EOQF != (SPI2_SR & SPI_SR_EOQF)) {} SPI2_SR = SPI2_SR | SPI_SR_EOQF | SPI_SR_TCF ; pop_reg = SPI2_POPR; mcr_reg = SPI2_MCR; mcr_reg |= 0x20001; SPI2_MCR = mcr_reg; dspi_value->rxdata |= (pop_reg << 24) & 0xff000000;




break; case MEM_WREN: //write enable

SPI2_CTAR0 = (0x38000000 +dspi_value->br) | dspi_value->cpha | dspi_value->cpol; SPI2_PUSHR = 0x08010006; mcr_reg = SPI2_MCR; mcr_reg &= 0xfffdfffe; SPI2_MCR = mcr_reg; while( SPI_SR_EOQF != (SPI2_SR & SPI_SR_EOQF)) {} SPI2_SR = SPI2_SR | SPI_SR_EOQF | SPI_SR_TCF ; mcr_reg = SPI2_MCR; mcr_reg |= 0x20001; SPI2_MCR = mcr_reg; pop_reg = SPI2_POPR; break;

case SECTOR_ERASE: // sector erase SPI2_CTAR0 = (0x78000000 +dspi_value->br) | dspi_value->cpha | dspi_value->cpol; tmp_reg = 0x8001D800; tmp_reg = tmp_reg | (dspi_value->addr >> 16); SPI2_PUSHR = tmp_reg; mcr_reg = SPI2_MCR; mcr_reg &= 0xfffdfffe; SPI2_MCR = mcr_reg; while( SPI_SR_TCF != (SPI2_SR & SPI_SR_TCF)) {} SPI2_SR = SPI2_SR | SPI_SR_TCF ; pop_reg = SPI2_POPR; tmp_reg = 0x08010000; tmp_reg = tmp_reg | (dspi_value->addr & 0xffff); SPI2_PUSHR = tmp_reg; while( SPI_SR_EOQF != (SPI2_SR & SPI_SR_EOQF)) { } SPI2_SR = SPI2_SR | SPI_SR_EOQF | SPI_SR_TCF ; mcr_reg = SPI2_MCR; mcr_reg |= 0x20001; SPI2_MCR = mcr_reg; pop_reg = SPI2_POPR; break;




case SUB_SECTOR_ERASE: //sub sector erase SPI2_CTAR0 = (0x78000000 +dspi_value->br) | dspi_value->cpha | dspi_value->cpol; tmp_reg = 0x80012000; tmp_reg = tmp_reg | (dspi_value->addr >> 16); SPI2_PUSHR = tmp_reg; mcr_reg = SPI2_MCR; mcr_reg &= 0xfffdfffe; SPI2_MCR = mcr_reg; while( SPI_SR_TCF != (SPI2_SR & SPI_SR_TCF)) {} SPI2_SR = SPI2_SR | SPI_SR_TCF ; pop_reg = SPI2_POPR; tmp_reg = 0x08010000; tmp_reg = tmp_reg | (dspi_value->addr & 0xffff); SPI2_PUSHR = tmp_reg; while( SPI_SR_EOQF != (SPI2_SR & SPI_SR_EOQF)) { } SPI2_SR = SPI2_SR | SPI_SR_EOQF | SPI_SR_TCF ; mcr_reg = SPI2_MCR; mcr_reg |= 0x20001; SPI2_MCR = mcr_reg;

pop_reg = SPI2_POPR; break;

case BULK_ERASE: // BULK ERASE SPI2_CTAR0 = (0x38000000 +dspi_value->br) | dspi_value->cpha | dspi_value->cpol; SPI2_PUSHR = 0x080100c7; mcr_reg = SPI2_MCR; mcr_reg &= 0xfffdfffe; SPI2_MCR = mcr_reg; while( SPI_SR_EOQF != (SPI2_SR & SPI_SR_EOQF)) {} SPI2_SR = SPI2_SR | SPI_SR_EOQF | SPI_SR_TCF ; mcr_reg = SPI2_MCR; mcr_reg |= 0x20001; SPI2_MCR = mcr_reg; pop_reg = SPI2_POPR; break;




case WAIT_WR_OVER: //WAIT_WR_OVER case VERIFY_WREN : SPI2_CTAR0 = (0x78000000 +dspi_value->br) | dspi_value->cpha | dspi_value->cpol; pop_reg = 0x1; while(pop_reg & 0x1) { i=0x20; while(i--); SPI2_PUSHR = 0x08010500; mcr_reg = SPI2_MCR; mcr_reg &= 0xfffdfffe; SPI2_MCR = mcr_reg;

while( SPI_SR_EOQF != (SPI2_SR & SPI_SR_EOQF)) {} SPI2_SR = SPI2_SR | SPI_SR_EOQF | SPI_SR_TCF ; mcr_reg = SPI2_MCR; mcr_reg |= 0x20001; SPI2_MCR = mcr_reg; pop_reg = SPI2_POPR ; } dspi_value->rxdata = pop_reg; break; case FLAG_STATUS : SPI2_CTAR0 = (0x78000000 +dspi_value->br) | dspi_value->cpha | dspi_value->cpol; SPI2_PUSHR = 0x08017000; mcr_reg = SPI2_MCR; mcr_reg &= 0xfffdfffe; SPI2_MCR = mcr_reg; while( SPI_SR_EOQF != (SPI2_SR & SPI_SR_EOQF)) {} SPI2_SR = SPI2_SR | SPI_SR_EOQF | SPI_SR_TCF ; mcr_reg = SPI2_MCR; mcr_reg |= 0x20001; SPI2_MCR = mcr_reg; pop_reg = SPI2_POPR; dspi_value->rxdata = pop_reg; break;

case FLAG_CLEAR : SPI2_CTAR0 = (0x38000000 +dspi_value->br) | dspi_value->cpha | dspi_value->cpol; SPI2_PUSHR = 0x08010050;




mcr_reg = SPI2_MCR; mcr_reg &= 0xfffdfffe; SPI2_MCR = mcr_reg;

while( SPI_SR_EOQF != (SPI2_SR & SPI_SR_EOQF)) {} SPI2_SR = SPI2_SR | SPI_SR_EOQF | SPI_SR_TCF ; mcr_reg = SPI2_MCR; mcr_reg |= 0x20001; SPI2_MCR = mcr_reg; pop_reg = SPI2_POPR; break; case WRITE_TX_DATA: //write to NOR SPI2_CTAR0 = (0x78000000 +dspi_value->br) | dspi_value->cpha | dspi_value->cpol; SPI2_CTAR1 = (0x38000000 +dspi_value->br) | dspi_value->cpha | dspi_value->cpol; tmp_reg = 0x80010200; tmp_reg = tmp_reg | ((dspi_value->addr >> 16) & 0xff); SPI2_PUSHR = tmp_reg; mcr_reg = SPI2_MCR; mcr_reg &= 0xfffdfffe; SPI2_MCR = mcr_reg; while( SPI_SR_TCF != (SPI2_SR & SPI_SR_TCF)) {} SPI2_SR = SPI2_SR | SPI_SR_TCF ; pop_reg = SPI2_POPR; tmp_reg = 0x80010000; tmp_reg = tmp_reg | (dspi_value->addr & 0xffff); SPI2_PUSHR = tmp_reg; while( SPI_SR_TCF != (SPI2_SR & SPI_SR_TCF)) {} SPI2_SR = SPI2_SR | SPI_SR_TCF ; pop_reg = SPI2_POPR;

if (dspi_value->bufByteCount == 1) { SPI2_PUSHR = 0x18010000 + (uint32)dspi_value->bufPtr[0]; while( SPI_SR_EOQF != (SPI2_SR & SPI_SR_EOQF)) {} SPI2_SR = SPI2_SR | SPI_SR_EOQF | SPI_SR_TCF ; pop_reg = SPI2_POPR;




} else { i = dspi_value->bufByteCount / 2; j = dspi_value->bufByteCount % 2; if (j == 0) i = i -1; cnt = 0; tmp = 0; for(k=0; k<i; k++){ tmp = (uint32)dspi_value->bufPtr[cnt]; tmp = tmp << 8; tmp = tmp + (uint32)dspi_value->bufPtr[cnt+1]; cnt += 2; SPI2_PUSHR = 0x80010000 + tmp; tmp = 0; while( SPI_SR_TCF != (SPI2_SR & SPI_SR_TCF)) {} SPI2_SR |= SPI_SR_TCF; pop_reg = SPI2_POPR; } if (j == 0) { tmp = (uint32)dspi_value->bufPtr[cnt]; tmp = tmp << 8; tmp = tmp + (uint32)dspi_value->bufPtr[cnt+1]; SPI2_PUSHR = 0x08010000 + tmp; while( SPI_SR_EOQF != (SPI2_SR & SPI_SR_EOQF)) {} SPI2_SR = SPI2_SR | SPI_SR_EOQF | SPI_SR_TCF ; pop_reg = SPI2_POPR;




} else { dspi_value->bufPtr[cnt] = pop_reg & 0xff; } } } else { tmp = (uint32)dspi_value->bufPtr[cnt]; SPI2_PUSHR = 0x18010000 + tmp; while( SPI_SR_EOQF != (SPI2_SR & SPI_SR_EOQF)) {} SPI2_SR = SPI2_SR | SPI_SR_EOQF | SPI_SR_TCF ; pop_reg = SPI2_POPR;

} } mcr_reg = SPI2_MCR; mcr_reg |= 0x20001; SPI2_MCR = mcr_reg; break; case READ_DATA://read NOR flash SPI2_CTAR0 = (0x78000000 +dspi_value->br) | dspi_value->cpha | dspi_value->cpol; tmp_reg = 0x80010300; tmp_reg = tmp_reg | ((dspi_value->addr >> 16) & 0xff); SPI2_PUSHR = tmp_reg; mcr_reg = SPI2_MCR; mcr_reg &= 0xfffdfffe; SPI2_MCR = mcr_reg; while( SPI_SR_TCF != (SPI2_SR & SPI_SR_TCF)) {} SPI2_SR |= SPI_SR_TCF; pop_reg = SPI2_POPR; tmp_reg = 0x80010000; tmp_reg = tmp_reg | (dspi_value->addr & 0xffff);




SPI2_PUSHR = tmp_reg; while( SPI_SR_TCF != (SPI2_SR & SPI_SR_TCF)) {} SPI2_SR |= SPI_SR_TCF; pop_reg = SPI2_POPR;

if (dspi_value->bufByteCount == 1) { SPI2_PUSHR = 0x18010000; while( SPI_SR_EOQF != (SPI2_SR & SPI_SR_EOQF)) {} SPI2_SR = SPI2_SR | SPI_SR_EOQF | SPI_SR_TCF ; pop_reg = SPI2_POPR; dspi_value->bufPtr[0] = (unsigned char)pop_reg; } else { i = dspi_value->bufByteCount / 2; j = dspi_value->bufByteCount % 2; if(j == 0) i = i - 1; cnt = 0; tmp = 0; for(k=0; k<i; k++) { SPI2_PUSHR = 0x80010000; while( SPI_SR_TCF != (SPI2_SR & SPI_SR_TCF)) {} SPI2_SR |= SPI_SR_TCF; pop_reg = SPI2_POPR; dspi_value->bufPtr[cnt] = (pop_reg >> 8) & 0xff; dspi_value->bufPtr[cnt+1] = pop_reg & 0xff; cnt += 2;

}




SPI2_PUSHR = 0x08010000; while( SPI_SR_EOQF != (SPI2_SR & SPI_SR_EOQF)) {} SPI2_SR = SPI2_SR | SPI_SR_EOQF | SPI_SR_TCF ; pop_reg = SPI2_POPR; if (j == 0) { dspi_value->bufPtr[cnt] = (pop_reg >> 8) & 0xff; dspi_value->bufPtr[cnt+1] = pop_reg & 0xff; } else { dspi_value->bufPtr[cnt] = pop_reg & 0xff; } } mcr_reg = SPI2_MCR; mcr_reg |= 0x20001; SPI2_MCR = mcr_reg;

break;

} }




Appendix BCut and paste the below example code into the text file, and save as "dspi_test.c."

/* * File: intc_reset_check.c * Purpose: Main process * */

#include "common.h"#include "dspi_common.h"#include "dspi_nor_n25q.h"

void test_main (void);

void n25q_nor_Sector_erase_test(void);void n25q_nor_subSector_erase_test(void);void n25q_nor_Bulk_erase_test(void);void n25q_nor_short_Sector_erase_test(void);void n25q_nor_short_subSector_erase_test(void);void n25q_nor_short_Bulk_erase_test(void);

extern void dspi_config(int DSPI_COMMAND , dspi_ctl *dspi_value);extern void SPI_init(void);extern void SPI_reset_check(void);

extern int norFlash_subSectorErase(unsigned int subSectorAddr);extern int norFlash_SectorErase(unsigned int SectorAddr);extern int norFlash_BulkErase(void);extern int norFlash_programPage(int cnt, int addr, unsigned char *buf);extern int norFlash_read(int cnt, int addr, unsigned char *buf);extern void norFlash_driverInit(void);extern unsigned int norFlash_readID(void);extern dspi_ctl dspi;

uint32 test_pin[40];uint8 dataBuf_in[256];uint8 dataBuf_out[256];

/********************************************************************/

void test_main (void){ uint32 idBytes; uint8 *idByte,ch; // freeScale SPI controller init SPI_init(); SPI_reset_check(); // Micron norFlash init norFlash_driverInit();

TN-12-32: TWRPI SPI NOR Module With Freescale PlatformAppendix B



step1: // display Micron NOR flash 4 ID bytes idBytes = norFlash_readID(); idByte = (uint8 *)&idBytes; printf("\n Micron Nor Flash ID: 0x%x 0x%x 0x%x 0x%x\n",idByte[0],id-Byte[1],idByte[2],idByte[3]); printf("\n Press: \n"); printf(" 1 to start BULK ERASE, program, and read test. \n"); printf(" 2 to start Sector ERASE, program, and read test. \n"); printf(" 3 to start Subsector ERASE, program, and read test. \n"); printf(" 4 to start short BULK ERASE, program, and read test. \n"); printf(" 5 to start short Sector ERASE, program, and read test. \n"); printf(" 6 to start short Subsector ERASE, program, and read test. \n"); ch = in_char(); switch (ch) { case '1': n25q_nor_Bulk_erase_test(); break; case '2': n25q_nor_Sector_erase_test(); break; case '3': n25q_nor_subSector_erase_test(); break; case '4': n25q_nor_short_Bulk_erase_test(); break; case '5': n25q_nor_short_Sector_erase_test(); break; case '6': n25q_nor_short_subSector_erase_test(); break; goto step1; }

goto step1; while(1);

}

// Erase all sub-sectors // verify all pages are "0xff" content by reading out the pages// Program all pages with known content// Read back all pages to compare the known content// Will stop and print out if there is an error.void n25q_nor_subSector_erase_test(void){ int rtn,i,j;




// To erase NOR printf("\n Erase all Subsectors \n"); for (i=0; i<N25Q_FLASH_SUBSECTOR_COUNT; i++) { rtn = norFlash_subSectorErase(i<<N25Q_FLASH_SUBSECTORSIZE_BIT); if (rtn == M_FAIL) { printf("\n SubErase erase Fail !! \n"); while(1); // erase fail } printf("\n Erased Subsector 0x%x at address 0x%x \n",i,i<<N25Q_FLASH_SUBSEC-TORSIZE_BIT); } printf("\n Subsector erase Test PASSED \n"); printf("\n To read all erased pages and compare expected value of 0xff \n"); for (i=0; i<N25Q_FLASH_PAGE_COUNT; i++) { for(j=0; j<N25Q_FLASH_PAGE_SIZE; j++) { dataBuf_out[j] = 0; } for(j=0; j<N25Q_FLASH_PAGE_SIZE; j++) { if (dataBuf_out[j] != 0) { printf("\n Read Failed !! \n"); while(1); // erase fail } } rtn = norFlash_read(N25Q_FLASH_PAGE_SIZE, i<<8, dataBuf_out); if (rtn == M_FAIL) { printf("\n Read Failed !! \n"); while(1); // erase fail } for(j=0; j<N25Q_FLASH_PAGE_SIZE; j++) { if (dataBuf_out[j] != 0xff) { printf("\n Read Failed !! i= 0x%x j=0x%x\n",i,j); while(1); // erase fail } }




printf("\n Read page 0x%x --> compared erased pattern 0xff passed. \n",i); } printf("\n Read all erased pages test PASSED \n"); // Assign known pattern for(i=0; i<N25Q_FLASH_PAGE_SIZE; i++) { dataBuf_in[i] = (unsigned char)i; } printf("\n To program all pages with the known pattern. \n"); for (i=0; i<N25Q_FLASH_PAGE_COUNT; i++) {

rtn = norFlash_programPage(N25Q_FLASH_PAGE_SIZE, i<<8, dataBuf_in); if (rtn == M_FAIL) { printf("\n Program Failed !! \n"); while(1); // erase fail } printf("\n Program page 0x%x with the known pattern. \n",i); } printf("\n Program all pages test PASSED \n");

printf("\n To read all pages and compare with the known pattern. \n"); for (i=0; i<N25Q_FLASH_PAGE_COUNT; i++) { for(j=0; j<N25Q_FLASH_PAGE_SIZE; j++) { dataBuf_out[j] = 0; } for(j=0; j<N25Q_FLASH_PAGE_SIZE; j++) { if (dataBuf_out[j] != 0) { printf("\n Read Failed !! \n"); while(1); // erase fail } }




rtn = norFlash_read(N25Q_FLASH_PAGE_SIZE, i<<8, dataBuf_out); if (rtn == M_FAIL) { printf("\n Read Failed !! \n"); while(1); // erase fail } for(j=0; j<N25Q_FLASH_PAGE_SIZE; j++) { if (dataBuf_out[j] != dataBuf_in[j]) { printf("\n Read Failed !! i= 0x%x j=0x%x\n",i,j); while(1); // erase fail } } printf("\n Read page 0x%x --> compared the expected known pattern passed. \n",i); } printf("\n Read all pages test PASSED \n"); }

// Erase all sectors // verify all pages are "0xff" content by reading out the pages// Program all pages with known content// Read back all pages to compare the known content// Will stop and print out error message if there is an errorvoid n25q_nor_Sector_erase_test(void){ int rtn,i,j; printf("\n Erase all Sectors \n"); for (i=0; i<N25Q_FLASH_SECTOR_COUNT; i++) { rtn = norFlash_SectorErase(i<<N25Q_FLASH_SECTORSIZE_BIT); if (rtn == M_FAIL) { printf("\n Sector Erase Fail !! \n"); while(1); // erase fail } printf("\n Erased sector 0x%x at sector address 0x%x \n",i,i<<N25Q_FLASH_SEC-TORSIZE_BIT); } printf("\n Sector Erase Test PASSED \n");




printf("\n To read all pages to compare with the erased pattern 0xff. \n"); for (i=0; i<N25Q_FLASH_PAGE_COUNT; i++) { for(j=0; j<N25Q_FLASH_PAGE_SIZE; j++) { dataBuf_out[j] = 0; } for(j=0; j<N25Q_FLASH_PAGE_SIZE; j++) { if (dataBuf_out[j] != 0) { printf("\n Read Failed !! \n"); while(1); // erase fail } } rtn = norFlash_read(N25Q_FLASH_PAGE_SIZE, i<<8, dataBuf_out); if (rtn == M_FAIL) { printf("\n Read Failed !! \n"); while(1); // erase fail } for(j=0; j<N25Q_FLASH_PAGE_SIZE; j++) { if (dataBuf_out[j] != 0xff) { printf("\n Read Failed !! i= 0x%x j=0x%x\n",i,j); while(1); // erase fail } } printf("\n Read page 0x%x --> compared the erased pattern of 0xff passed. \n",i); } printf("\n Read all erased pages test PASSED \n"); // To program NOR pages for(i=0; i<N25Q_FLASH_PAGE_SIZE; i++) { dataBuf_in[i] = (unsigned char)i; } printf("\n To program all pages with the known pattern. \n"); for (i=0; i<N25Q_FLASH_PAGE_COUNT; i++) {




rtn = norFlash_programPage(N25Q_FLASH_PAGE_SIZE, i<<8, dataBuf_in); if (rtn == M_FAIL) { printf("\n Program Failed !! \n"); while(1); // erase fail } printf("\n Program page 0x%x with the known pattern at address 0x%x \n",i,i<<8); } printf("\n Program all pages PASSED \n");

// read NOR pages printf("\n To read all pages and compare the written known pattern. \n"); for (i=0; i<N25Q_FLASH_PAGE_COUNT; i++) { for(j=0; j<N25Q_FLASH_PAGE_SIZE; j++) { dataBuf_out[j] = 0; } for(j=0; j<N25Q_FLASH_PAGE_SIZE; j++) { if (dataBuf_out[j] != 0) { printf("\n Read Failed !! \n"); while(1); } } rtn = norFlash_read(N25Q_FLASH_PAGE_SIZE, i<<8, dataBuf_out); if (rtn == M_FAIL) { printf("\n Read Failed !! \n"); while(1); // erase fail } for(j=0; j<N25Q_FLASH_PAGE_SIZE; j++) { if (dataBuf_out[j] != dataBuf_in[j]) { printf("\n Read Failed !! i= 0x%x j=0x%x\n",i,j); while(1); // erase fail } } printf("\n Read page 0x%x --> compared the known pattern passed. \n",i); } printf("\n Read all pages test PASSED \n"); }




// Bulk Erase all sectors // verify all pages are "0xff" content by reading out the pages// Program all pages with known content// Read back all pages to compare the known content// Will stop and print out error message if there is an errorvoid n25q_nor_Bulk_erase_test(void){ int rtn,i,j; printf("\n Bulk Erase all Sectors --> wait ... \n");

rtn = norFlash_BulkErase(); if (rtn == M_FAIL) { printf("\n Bulk Erase Fail !! \n"); while(1); // erase fail } printf("\n Bulk Erase PASSED \n"); printf("\n To read all pages and compare the expected erased pattern of 0xff. \n"); for (i=0; i<N25Q_FLASH_PAGE_COUNT; i++) { for(j=0; j<N25Q_FLASH_PAGE_SIZE; j++) { dataBuf_out[j] = 0; } for(j=0; j<N25Q_FLASH_PAGE_SIZE; j++) { if (dataBuf_out[j] != 0) { printf("\n Read Failed !! \n"); while(1); } } rtn = norFlash_read(N25Q_FLASH_PAGE_SIZE, i<<8, dataBuf_out); if (rtn == M_FAIL) { printf("\n Read Failed !! \n"); while(1); } for(j=0; j<N25Q_FLASH_PAGE_SIZE; j++) { if (dataBuf_out[j] != 0xff) {




printf("\n Read Failed !! i= 0x%x j=0x%x\n",i,j); while(1); } } printf("\n Read page 0x%x --> compared the erased pattern of 0xff passed. \n",i); } printf("\n Read all erased pages test PASSED \n"); // To program NOR pages for(i=0; i<N25Q_FLASH_PAGE_SIZE; i++) { dataBuf_in[i] = (unsigned char)i; } printf("\n To program all pages with the known pattern. \n"); for (i=0; i<N25Q_FLASH_PAGE_COUNT; i++) {

rtn = norFlash_programPage(N25Q_FLASH_PAGE_SIZE, i<<8, dataBuf_in); if (rtn == M_FAIL) { printf("\n Program Failed !! \n"); while(1); } printf("\n Program page 0x%x with the known pattern at address 0x%x. \n",i,i<<8); } printf("\n Program all pages PASSED \n");

// read NOR pages printf("\n To read all pages and compare with the written known pattern. \n"); for (i=0; i<N25Q_FLASH_PAGE_COUNT; i++) { for(j=0; j<N25Q_FLASH_PAGE_SIZE; j++) { dataBuf_out[j] = 0; } for(j=0; j<N25Q_FLASH_PAGE_SIZE; j++) { if (dataBuf_out[j] != 0) { printf("\n Read Failed !! \n"); while(1); } } rtn = norFlash_read(N25Q_FLASH_PAGE_SIZE, i<<8, dataBuf_out); if (rtn == M_FAIL) {




printf("\n Read Failed !! \n"); while(1); // erase fail } for(j=0; j<N25Q_FLASH_PAGE_SIZE; j++) { if (dataBuf_out[j] != dataBuf_in[j]) { printf("\n Read Failed !! i= 0x%x j=0x%x\n",i,j); while(1); } } printf("\n Read page 0x%x --> compared the known pattern passed. \n",i); } printf("\n Read all pages test PASSED \n"); }

// Erase 16 sub-sectors // verify all pages are "0xff" content by reading out the pages// Program all pages with known content// Read back all pages to compare the known content// Will stop and print out if there is an error.void n25q_nor_short_subSector_erase_test(void){ int rtn,i,j; // To erase NOR printf("\n Erase 16 Subsectors \n"); for (i=0; i<16; i++) { rtn = norFlash_subSectorErase(i<<N25Q_FLASH_SUBSECTORSIZE_BIT); if (rtn == M_FAIL) { printf("\n SubErase erase Fail !! \n"); while(1); // erase fail } printf("\n Erased Subsector 0x%x at address 0x%x \n",i,i<<N25Q_FLASH_SUBSEC-TORSIZE_BIT); } printf("\n Subsector erase Test PASSED \n"); printf("\n To read all erased pages and compare expected value of 0xff \n"); for (i=0; i<256; i++) {




for(j=0; j<256; j++) { dataBuf_out[j] = 0; } for(j=0; j<256; j++) { if (dataBuf_out[j] != 0) { printf("\n Read Failed !! \n"); while(1); // erase fail } } rtn = norFlash_read(256, i<<8, dataBuf_out); if (rtn == M_FAIL) { printf("\n Read Failed !! \n"); while(1); // erase fail } for(j=0; j<N25Q_FLASH_PAGE_SIZE; j++) { if (dataBuf_out[j] != 0xff) { printf("\n Read Failed !! i= 0x%x j=0x%x\n",i,j); while(1); // erase fail } } printf("\n Read page 0x%x --> compared erased pattern 0xff passed. \n",i); } printf("\n Read 256 erased pages test PASSED \n"); // Assign known pattern for(i=0; i<N25Q_FLASH_PAGE_SIZE; i++) { dataBuf_in[i] = (unsigned char)i; } printf("\n To program all pages with the known pattern. \n"); for (i=0; i<256; i++) {

rtn = norFlash_programPage(N25Q_FLASH_PAGE_SIZE, i<<8, dataBuf_in); if (rtn == M_FAIL) {




printf("\n Program Failed !! \n"); while(1); // erase fail } printf("\n Program page 0x%x with the known pattern. \n",i); } printf("\n Program 256 pages test PASSED \n");

printf("\n To read 256 pages and compare with the known pattern. \n"); for (i=0; i<256; i++) { for(j=0; j<N25Q_FLASH_PAGE_SIZE; j++) { dataBuf_out[j] = 0; } for(j=0; j<N25Q_FLASH_PAGE_SIZE; j++) { if (dataBuf_out[j] != 0) { printf("\n Read Failed !! \n"); while(1); // erase fail } } rtn = norFlash_read(N25Q_FLASH_PAGE_SIZE, i<<8, dataBuf_out); if (rtn == M_FAIL) { printf("\n Read Failed !! \n"); while(1); // erase fail } for(j=0; j<N25Q_FLASH_PAGE_SIZE; j++) { if (dataBuf_out[j] != dataBuf_in[j]) { printf("\n Read Failed !! i= 0x%x j=0x%x\n",i,j); while(1); // erase fail } }




printf("\n Read page 0x%x --> compared the expected known pattern passed. \n",i); } printf("\n Read 256 pages test PASSED \n"); }

// Erase 1 sector // verify all pages are "0xff" content by reading out the pages// Program all pages with known content// Read back all pages to compare the known content// Will stop and print out error message if there is an errorvoid n25q_nor_short_Sector_erase_test(void){ int rtn,i,j; printf("\n Erase 1 Sectors \n"); for (i=0; i<1; i++) { rtn = norFlash_SectorErase(i<<N25Q_FLASH_SECTORSIZE_BIT); if (rtn == M_FAIL) { printf("\n Sector Erase Fail !! \n"); while(1); // erase fail } printf("\n Erased sector 0x%x at sector address 0x%x \n",i,i<<N25Q_FLASH_SEC-TORSIZE_BIT); } printf("\n Sector Erase 1 sector test PASSED \n"); printf("\n To read 256 pages to compare with the erased pattern 0xff. \n"); for (i=0; i<256; i++) { for(j=0; j<256; j++) { dataBuf_out[j] = 0; } for(j=0; j<256; j++) { if (dataBuf_out[j] != 0) { printf("\n Read Failed !! \n"); while(1); // erase fail } }




rtn = norFlash_read(N25Q_FLASH_PAGE_SIZE, i<<8, dataBuf_out); if (rtn == M_FAIL) { printf("\n Read Failed !! \n"); while(1); // erase fail } for(j=0; j<256; j++) { if (dataBuf_out[j] != 0xff) { printf("\n Read Failed !! i= 0x%x j=0x%x\n",i,j); while(1); // erase fail } } printf("\n Read page 0x%x --> compared the erased pattern of 0xff passed. \n",i); } printf("\n Read 256 erased pages test PASSED \n"); // To program NOR pages for(i=0; i<256; i++) { dataBuf_in[i] = (unsigned char)i; } printf("\n To program 256 pages with the known pattern. \n"); for (i=0; i<256; i++) {

rtn = norFlash_programPage(N25Q_FLASH_PAGE_SIZE, i<<8, dataBuf_in); if (rtn == M_FAIL) { printf("\n Program Failed !! \n"); while(1); // erase fail } printf("\n Program page 0x%x with the known pattern at address 0x%x \n",i,i<<8); } printf("\n Program 256 pages PASSED \n");




// read NOR pages printf("\n To read 256 pages and compare the written known pattern. \n"); for (i=0; i<256; i++) { for(j=0; j<256; j++) { dataBuf_out[j] = 0; } for(j=0; j<256; j++) { if (dataBuf_out[j] != 0) { printf("\n Read Failed !! \n"); while(1); } } rtn = norFlash_read(256, i<<8, dataBuf_out); if (rtn == M_FAIL) { printf("\n Read Failed !! \n"); while(1); // erase fail } for(j=0; j<256; j++) { if (dataBuf_out[j] != dataBuf_in[j]) { printf("\n Read Failed !! i= 0x%x j=0x%x\n",i,j); while(1); // erase fail } } printf("\n Read page 0x%x --> compared the known pattern passed. \n",i); } printf("\n Read 256 pages test PASSED \n"); }




// Bulk Erase all sectors // verify all pages are "0xff" content by reading out the pages// Program all pages with known content// Read back all pages to compare the known content// Will stop and print out error message if there is an errorvoid n25q_nor_short_Bulk_erase_test(void){ int rtn,i,j; printf("\n Bulk Erase all Sectors --> wait ... \n");

rtn = norFlash_BulkErase(); if (rtn == M_FAIL) { printf("\n Bulk Erase Fail !! \n"); while(1); // erase fail } printf("\n Bulk Erase PASSED \n"); printf("\n To read 256 pages and compare the expected erased pattern of 0xff. \n"); for (i=0; i<256; i++) { for(j=0; j<256; j++) { dataBuf_out[j] = 0; } for(j=0; j<256; j++) { if (dataBuf_out[j] != 0) { printf("\n Read Failed !! \n"); while(1); } } rtn = norFlash_read(256, i<<8, dataBuf_out); if (rtn == M_FAIL) { printf("\n Read Failed !! \n"); while(1); } for(j=0; j<256; j++) { if (dataBuf_out[j] != 0xff) { printf("\n Read Failed !! i= 0x%x j=0x%x\n",i,j); while(1); } }




printf("\n Read page 0x%x --> compared the erased pattern of 0xff passed. \n",i); } printf("\n Read 256 erased pages test PASSED \n"); // To program NOR pages for(i=0; i<256; i++) { dataBuf_in[i] = (unsigned char)i; } printf("\n To program 256 pages with the known pattern. \n"); for (i=0; i<256; i++) {

rtn = norFlash_programPage(N25Q_FLASH_PAGE_SIZE, i<<8, dataBuf_in); if (rtn == M_FAIL) { printf("\n Program Failed !! \n"); while(1); } printf("\n Program page 0x%x with the known pattern at address 0x%x. \n",i,i<<8); } printf("\n Program 256 pages PASSED \n");




// read NOR pages printf("\n To read 256 pages and compare with the written known pattern. \n"); for (i=0; i<256; i++) { for(j=0; j<256; j++) { dataBuf_out[j] = 0; } for(j=0; j<256; j++) { if (dataBuf_out[j] != 0) { printf("\n Read Failed !! \n"); while(1); } } rtn = norFlash_read(256, i<<8, dataBuf_out); if (rtn == M_FAIL) { printf("\n Read Failed !! \n"); while(1); // erase fail } for(j=0; j<256; j++) { if (dataBuf_out[j] != dataBuf_in[j]) { printf("\n Read Failed !! i= 0x%x j=0x%x\n",i,j); while(1); } } printf("\n Read page 0x%x --> compared the known pattern passed. \n",i); } printf("\n Read 256 pages test PASSED \n"); }




Appendix CCut and paste the below example code into the text file, and save as "dspi_common.h."

/* Bit definitions and macros for SPI_SR */#define SPI_SR_RFDF (0x00020000)#define SPI_SR_RFOF (0x00080000)#define SPI_SR_TFFF (0x02000000)#define SPI_SR_TFUF (0x08000000)#define SPI_SR_EOQF (0x10000000)#define SPI_SR_TXRXS (0x40000000)#define SPI_SR_TCF (0x80000000)

/* Bit definitions and macros for SPI_RSER */#define SPI_RSER_RFDF_DIRS (0x00010000)#define SPI_RSER_RFDF_RE (0x00020000)#define SPI_RSER_RFOF_RE (0x00080000)#define SPI_RSER_TFFF_DIRS (0x01000000)#define SPI_RSER_TFFF_RE (0x02000000)#define SPI_RSER_TFUF_RE (0x08000000)#define SPI_RSER_EOQF_RE (0x10000000)#define SPI_RSER_TCF_RE (0x80000000)

#define SPI_CTAR0_LSBFE (0x01000000)#define SPI_CTAR0_CPHA (0x02000000)#define SPI_CTAR0_CPOL (0x04000000)

typedef struct{

uint32 cpol;uint32 cpha;uint32 br;uint32 txdata;uint32 rxdata;uint32 buffer;uint32 bufByteCount;uint32 addr;uint8 *bufPtr; } dspi_ctl;

TN-12-32: TWRPI SPI NOR Module With Freescale PlatformAppendix C



enum DSPI_COMMAND{ DSPI_PINS_ENB,//-->0 MEM_WREN,//-->1 SECTOR_ERASE,//-->2 WAIT_WR_OVER,//-->3 CHK_MEM_SR,//-->4 CHK_WREN_SR,//-->5 WRITE_TX_DATA,//-->6 READ_DATA,//-->7 EOQF_INT_CONFIG,//-->8 TCF_INT_CONFIG,//-->9 TFFF_INT_CONFIG,//-->10 RFOF_INT_CONFIG,//-->11 RFDF_INT_CONFIG,//-->12 TFFF_DMA_CONFIG,//-->13 RFDF_DMA_CONFIG,//-->14 DSPI_STOP_MODE,//-->15 MOD_READ_DATA, //-->16 MOD_CHK_WREN_SR,//-->17 MOD_CHK_MEM_SR,//-->18 MOD_MEM_WREN, //--->19 CONT_SCK_READ_DATA, //---20 DELAY_READ_DATA, //-----21 FLAG_STATUS, //-----22 FLAG_CLEAR, //-----23 SUB_SECTOR_ERASE, //-->24 BULK_ERASE, //-->25 READ_PARAMETER_TABLE, //-->26 VERIFY_WREN, //-->27 MEM_RDID };

void dspi_config(int COMMAND ,dspi_ctl *dspi_value);

TN-12-32: TWRPI SPI NOR Module With Freescale PlatformAppendix C



Appendix DCut and paste the below example code into the text file, and save as "dspi_nor_n25q.h."

/* memory N25Q 64Mb organization */ #define N25Q_FLASH_SIZE 0x800000#define N25Q_FLASH_SECTOR_SIZE 0x10000#define N25Q_FLASH_SECTOR_COUNT 0x80#define N25Q_FLASH_SUBSECTOR_COUNT 0x800#define N25Q_FLASH_SUBSECTORSIZE_BIT 12#define N25Q_FLASH_SECTORSIZE_BIT 16#define N25Q_FLASH_PAGE_COUNT 0x8000#define N25Q_FLASH_PAGE_SIZE 0x100#define N25Q_FLASH_PAGE_SIZE_MASK 0xff#define N25Q_FLASH_ADDRESS_MASK 0x00ff

#define N25Q_STATUS_FLAG_ERASE_BIT 0x20#define N25Q_STATUS_FLAG_PROGRAM_BIT 0x10#define N25Q_STATUS_FLAG_PROTECTION 0x02

#define M_PASS 0#define M_FAIL 1

TN-12-32: TWRPI SPI NOR Module With Freescale PlatformAppendix D



Revision History

Rev. A – 4/13

• Initial release

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TN-12-32: TWRPI SPI NOR Module With Freescale PlatformRevision History



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