transferred-substrate heterojunction bipolar transistor integrated circuit technology
DESCRIPTION
1999 IEEE Symposium on Indium Phosphide & Related Materials. Transferred-Substrate Heterojunction Bipolar Transistor Integrated Circuit Technology. M Rodwell , Q Lee, D Mensa, J Guthrie, Y Betser, S Jaganathan, T Mathew, P Krishnan, S Long University of California, Santa Barbara - PowerPoint PPT PresentationTRANSCRIPT
Transferred-Substrate Heterojunction Bipolar Transistor Integrated Circuit Technology
M Rodwell , Q Lee, D Mensa, J Guthrie, Y Betser, S Jaganathan, T Mathew, P Krishnan, S LongUniversity of California, Santa Barbara
SC Martin, RP Smith, NASA Jet Propulsion Labs
Supported by ONR (M Yoder, J Zolper, D Van Vechten), AFOSR ( H Schlossberg )
1999 IEEE Symposium on Indium Phosphide & Related Materials
Why are HEMTs smaller & faster than HBTs ?FETs have deep submicron dimensions.
0.1 µm HEMTs with 400 GHz bandwidths (satellites).5 million 1/4-µm MOSFETs on a 200 MHz, $500 CPU.FET lateral scaling decreases transit times.FET bandwidths then increase.
HBTs have ~1 µm junctions. vertical scaling decreases electron transit times.vertical scaling increases RC charging times.lateral scaling should decrease RC charging times.HBT & RTD bandwidths should then increase.
But, HBTs must first be modified . . .
Scaling for THz device bandwidths
Current-gain cutoff frequency in HBTs
collex
Ebc
Ejecollectorbase RR
qIkTC
qIkTC
f
21
nbbase DT 22 satccollector vT 2
Collector velocities can be high: velocity overshoot in InGaAsBase bandgap grading reduces transit time substantiallyRC terms quite important for > 200 GHz ft devices
Excess Collector-Base Capacitance in Mesa HBTs
• base contacts: must be > 1 transfer length (0.3 m) sets minimum collector width sets minimum collector capacitance Ccb
• base resistancespreading resistance scales with emitter scalingcontact resistance independent of emitter scaling sets minimum base resistance sets minimum RbbCcb time constant
fmax does not improve with submicron scaling
0
200
400
600
800
1000
0 0.5 1 1.5
f max
, G
Hz
emitter width, microns
Transferred-Substrate HBTs: A Scalable HBT Technology
• Collector capacitance reduces with scaling:• Bandwidth increases rapidly with scaling:
ecb WC
eWf 1max
Ohmics base m .01
Ohmics base m 5.0
Thinning base, collector epitaxial layers improves ft, degrades fmaxLateral scaling provides moderate improvements in fmaxRegrowth (similar to Si BJT !) should help considerablyTransferred-substrate helps dramatically
Integrated Circuit Technology
• very high HBT bandwidths, low interconnect capacitance, lowground-return inductance, low thermal resistance
metal 1
bypass capacitortransistor resistor capacitor microstrip
BCB
GaAs carrier wafer
In/Pb/Ag solder
polyimide metal 2 SiN NiCr contact
C
gold ground plane
goldthermal via ground
via
BE
50 mm transferred-substrate HBT Wafer: Cu substrate
AlInAs/GaInAs graded base HBT
Band diagram under normal operating voltagesVce = 0.9 V, Vbe= 0.7 V
• 400 Å 5E19 graded base ( Eg = 2kT), 3000 Å collector
-2
-1.5
-1
-0.5
0
0.5
0 1000 2000 3000 4000 5000 6000Distance, Å
Gradedbase
Collector depletion regionEmitter
Schottkycollector
Transferred-Substrate Heterojunction Bipolar Transistor
0.25 µm devices should obtain >1000 GHz fmax
Device with 0.6 µm emitter & 1.8 µm collectorextrapolated fmax at instrument limits, >400 GHz
0
5
10
15
20
25
30
35
1 10 100
Gai
ns, d
B
Frequency, GHz
fmax
=470 GHz
f=215 GHz
Mason'sGain, U
H21
(?)
0
5
10
15
20
25
100 1000
Gai
ns, d
B
Frequency. GHz
Mason's gain, U
MSG, common emitter
MSG,common base
H21
, common emitterfmax
= 820 GHz
Submicron Transferred-Substrate HBT
0.4 m x 6 m emitter, 0.4 m x 10 m collector
Emitter Profile: Stepper Device
0.15 m e/b junction
0.5 m emitter stripe
0
5
10
15
20
25
30
100 1000
Gai
ns, d
B
Frequency, GHz
Mason's gain, U
H21
fmax
= 805 GHz f = 147 GHz
Transferred-Substrate HBT: Stepper Lithography
0.4 m emitter, ~0.7 m collector
DC characteristics, stepper device
0
0.5
1
1.5
2
2.5
3
3.5
4
0 0.2 0.4 0.6 0.8 1 1.2
Vce, Volts
Ib step,0.01 mA
We=0.2 X 6 m2
Wc=1.5 X 9 m2
=50
Given high fmax, vertical scaling exhanges reduced fmax for increased f
Transit times: HBT with 2kT base grading
0
0.2
0.4
0.6
0.8
1
1.2
0 0.1 0.2 0.3 0.4 0.5 0.6
1/2
f (ps)
1/Ic (1/mA)
0.51 ps
2000 Å InGaAs collector400 Å InGaAs base, 2kT bandgap grading
ps 045.0
ps 065.0 ps 114.0
ps 41.0
mcb
mje
cbex
cb
gC
gCCR
ps 634.0 total GHz 252f
Digital microwave / RF transmitters (DC-20 GHz)direct digital synthesis at microwave bandwidthsmicrowave digital-analog converters
Digital microwave / RF receiversdelta-sigma ADCs with 10-30 GHz sample rates 16 effective bits at 100 MHz signal bandwidth ?
Basic Science: 0.1 µm Ebeam device: 1000 GHz transistor (?)transistor electronics in the far-infrared
Fast fiber optics, fast digital communications:200 GHz f, 500 GHz fmax device: ~ 75-90 Gb/s160 Gb/s needs ~350 GHz f, 500 GHz fmax
Why would you want a 1 THz transistor ?
Transferred-Substrate HBT ICs: Key Features
100 GHz clock-rate ICs will need: very fast transistors short wires –> high IC density –> high thermal conductivity low capacitance wiring low ground inductance –> microstrip wiring environment
Transferred Substrate HBT ICs offer: 800 GHz fmax now , > 1000 GHz with further scaling 250 GHz ft now, >300 GHz with improved emitter Ohmics copper substrates / thermal vias for heatsinking low capacitance (= 2.5) wiring
THz-Bandwidth HBTs ???
1) regrown P+++ InGaAs extrinsic base --> ultra-low-resistance 2) 0.05 µm wide emitter --> ultra low base spreading resistance3) 0.05 µm wide collector --> ultra low collector capacitance4) 100 Å, carbon-doped graded base --> 0.05 ps transit time5) 1kÅ thick InP collector --> 0.1 ps transit time.
Projected Performance: Transistor with 500 GHz ft, 1500 GHz fmax
1
2
3
45
deep submicron transferred-substrateregrown-base HBT
The wiring environment for100 GHz logic
Why is Improved Wiring Essential?
ground return loops createinductance
Wire bond createsground bounce betweenIC & package
30 GHz M/S D-FF in UCSB - mesa HBT technology
Ground loops & wire bonds:degrade circuit & packaged IC performance
ADC digitalsections
inputbuffer
ground returncurrents
Lground
Vingroundbouncenoise
Ground Bound Noise in ADCs
Ground bounce noise must be ~100 dB below full-scale inputDifferential input will partly suppress ground noise coupling
~ 30 to 40 dB common-mode rejection feasibleCMRR insufficient to obtain 100 dB SNR
Eliminate ground bounce noise by good IC grounding
Microstrip IC wiring to Eliminate Ground Bounce Noise
a
Brass carrier andassembly ground
interconnectsubstrate
IC with backsideground plane & vias
near-zeroground-groundinductance
IC viaseliminateon-wafergroundloops
Transferred-substrate HBT process provides vias & ground plane.
Power Density in 100 GHz logic
Transistors tightly packed to minimize delays 105 W/cm2 HBT junction power density. ~103 W/cm2 power density on-chip 75 C temperature rise in 500 m substrate.
Solutions: Thin substrate to < 100 m Replace semiconductor with metal copper substrate
Transferred-Substrate HBT Integrated Circuits47 GHz master-slave flip-flop
7 dB, 5-80 GHz distributed amplifier
11 dB, 50+ GHz AGC / limiting amplifier
10 dB, 50+ GHz feedback amplifier
Transferred-Substrate HBT Integrated CircuitsW-band VCO
Clock recovery PLL
multiplexer
2:1 demultiplexer (120 HBTs)
16 dB, DC-60 GHz amplifier
6.7 dB, DC-85 GHz amplifier
Darlington Amplifier - 360 GHz GBW
• 15.6 dB DC gain• Interpolated 3dB bandwidth of 60 GHz• 360 GHz gain-bandwidth product
-15
-10
-5
0
5
10
15
20
0 20 40 60 80 100
dB
Frequency, GHz
S21
S11
S22
0
2
4
6
8
10
0 20 40 60 80 100
Forw
ard
Gai
n, S
21, d
B
Frequency, GHz
6.7 dB, 85 GHz Mirror Darlington Amplifier
• 6.7 dB DC gain• 3 dB bandwidth of 85 GHz• f-doubler (mirror Darlington) configuration
Master-Slave Flip-Flops
CML: 47 GHz ECL: 48 GHz
66 GHz Static Frequency Divider in Transferred-substrate HBT Technology
Q. Lee, D. Mensa, J. Guthrie, S. Jaganathan, T. Mathew, Y. Betser, S. Krishnan, S. Ceran, M.J.W. RodwellUniversity of California, Santa Barbara
IEEE RFIC’99, Anaheim, California
Fiber OpticICs(not yet working !)
AGC / limiting amplifier CML decision circuit
PIN / transimpedance amplifier
Delta-Sigma ADC In Development (300 HBTs)
Transferred Substrate HBTsAn ultrafast bipolar integrated circuit technology
Ultrahigh fmax HBTs
Low capacitance interconnects
Superior heat sinking, low parasitic packaging
Demonstrated: HBTs with fmax > 800 GHz
fast flip-flops, 85 GHz amplifiers, ...
Future: 0.1 m HBTs with fmax > 1000 GHz
100 GHz digital logic ICs --> DACs, DDS, ADCs, fiber