transient performance of cvts

7/27/2019 Transient Performance of CVTs

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Tra nsient Perfo rma nce o f

Ca pa cit o r Vo lt a g e

Tra nsfo rm ers (CVT)

Introduction

In steady state, the secondary volt-

age of a capacitor voltage trans-

former mirrors the primary voltage.

Because of the energy-storage

elements used, the transient out-

put, caused by sudden change in

primary voltage, is no longer a rep-

lica of the primary. This distorted

output may last for a few cycles of

the supply frequency. These errors

may be termed as the CVT linear

transient since they would still

occur in the event that all of the

components of the CV T were line-

ar. In addition to this, ferroreson-

ance may occur resulting in volt-age measurement error. Ferroreson-

ance is caused by the saturation

of the electromagnetic unit or

inductive burden. Unlike the linear

transient it does not occur with

every change in primary voltage.

Line a r Tra nsien t Erro r

(Tra nsien t Respo nse)

The linear transient error is mainlyinfluenced by the following factors:

1 The Thevenin equivalent capaci-

tance referred to the secondary

voltage level, Ce.

2 The burden value and configura-

tion.

3 The point of wave voltage inter-

ruption.

A CVT system can be represented

by its Thevenin equivalent circuit.

The analysis of a simplified L-C-R

circuit for the case of a sudden

collapse of the primary voltage

(assuming a given set of initial

conditions) produced the following

conclusions:

1 If the equivalent capacitance Ce

is larger and assuming a fixed

value of the burden, the magni-

tude of the residual transient

voltage becomes smaller. The

intermediate voltage should also

be maximized in order to achieve

a high value of the equivalent

capacitance.

2 The effect of the burden is so

profound that i t can dominate

the CVT behavior. The burden

configuration is insignificant

since it determines the way in

which energy can be stored and

the path through which it can

discharge. Pure resistive burden

dissipates and does not store

energy. Stored energy burdens

(lagging or leading) create harm-

ful effect on the transient

response producing oscillations

of low frequency nature.

The oscillograms shown below

illustrate the variation in the

residual voltages as a function of

burden at crest fault ini tiation. A t

zero fault initiation, the transient

response worsens.



3 During the sudden application

or sudden disappearance of

primary voltage, the distribution

of energy stored in the CVT is

a major factor in understanding

the effect of the point of wave

voltage interruption. The tran-sient performance in those

cases is similar with the transi-

ents in the case of the primary

short circuit.

The amount of energy accumula-

ted by the capacitor at zero in-

itiation is equivalent to the energy

stored by the series reactor at

crest voltage initiation.

The discharge time constant willvary depending upon where the

maximum energy is stored. A

typical example of transient res-

ponse ( see below) indicates the

worse case with the maximum

energy on the capacitor at the

time the primary voltage wave is

going through the zero voltage

interruption.



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E 214.60

Subject to change without notice (05.2006)

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