transistors, logic gates and karnaugh maps references: lecture 4 from last

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Transistors, Logic Gates and Karnaugh Maps References: http://www.st-and.ac.uk/~www_pa/Scots_Guide/info/comp/active/ BiPolar/page1.html Lecture 4 from last semester Introduction to Digital Systems (J.Palmer and D. Perlman)

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Page 1: Transistors, Logic Gates and Karnaugh Maps References:  Lecture 4 from last

Transistors, Logic Gates and Karnaugh Maps

References:http://www.st-and.ac.uk/~www_pa/Scots_Guide/info/comp/active/BiPolar/page1.htmlLecture 4 from last semesterIntroduction to Digital Systems (J.Palmer and D. Perlman)

Page 2: Transistors, Logic Gates and Karnaugh Maps References:  Lecture 4 from last

Transistors There are various kinds of transistors:

bipolar, field-effect, etc. They differ in stability, energy usage,

and so on, but they serve a similar purpose

They are used to amplify a signal or to act as a switch It is as switches that they are used in

computers

Page 3: Transistors, Logic Gates and Karnaugh Maps References:  Lecture 4 from last

Diode Review Recall that a pn junction — the

joining together of p-doped (“too few” electrons) and n-doped (“extra” electrons) — makes a diode

A diode is a circuit element that allows current to flow in one direction (forward bias) but not in the other (reverse bias)

Page 4: Transistors, Logic Gates and Karnaugh Maps References:  Lecture 4 from last

Diode Review (Cont.) Some of the “extra” electrons from

the n side fill the empty levels in the p side, forming a region in which the valence band is filled and conduction band is empty

This region (called the depletion zone) is a poor conductor

Page 5: Transistors, Logic Gates and Karnaugh Maps References:  Lecture 4 from last

Bipolar transistors A bipolar transistor starts with two

back-to-back diodes (pn junctions) There are two kinds NPN and PNP

The middle region is usually smaller

N-doped

P-doped

N-doped

P-doped

N-doped

P-doped

Page 6: Transistors, Logic Gates and Karnaugh Maps References:  Lecture 4 from last

Third lead So far the device seems useless;

two back-to-back diodes wouldn’t conduct in either direction

But we add a third lead (connection) directly to the middle portion

Page 7: Transistors, Logic Gates and Karnaugh Maps References:  Lecture 4 from last

Not symmetric The transistor would seem to be

symmetric with the two N-doped regions being the same, but actually these regions differ in their amount of doping and serve different purposes in the transistor

Page 8: Transistors, Logic Gates and Karnaugh Maps References:  Lecture 4 from last

Collector, base, emitter

Collector

Base

Emitter

Page 9: Transistors, Logic Gates and Karnaugh Maps References:  Lecture 4 from last

Connecting the transistor Imagine applying a

potential difference (voltage) across the base-collector leads with the collector higher, this reverse biases that pn junction so there would be no current flow

C

B

E

Page 10: Transistors, Logic Gates and Karnaugh Maps References:  Lecture 4 from last

No flow There is no flow because of the

depletion zone (the region in which the valence band is filled and the conduction band empty)

Reverse bias voltages tend to make the depletion zone a bit larger

Page 11: Transistors, Logic Gates and Karnaugh Maps References:  Lecture 4 from last

Connecting the transistor (Cont.)

Now consider applying a (smaller) voltage across the base-emitter leads with the base higher, this forward biases that pn junction so current will flow

C

B

E

Page 12: Transistors, Logic Gates and Karnaugh Maps References:  Lecture 4 from last

Flow Forward biasing a pn junction tends to

eliminate the depletion zone (in this case putting electrons into the conduction band)

Because the transistor has one shared depletion zone that has been eliminated by the base-emitter forward bias, both currents (collector-base and base-emitter) can flow

Page 13: Transistors, Logic Gates and Karnaugh Maps References:  Lecture 4 from last

NPN in a circuit The arrow on an

NPN points from base to emitter indicating the forward-bias direction that turns the transistor “on”

CBE

Page 14: Transistors, Logic Gates and Karnaugh Maps References:  Lecture 4 from last

Off

Page 15: Transistors, Logic Gates and Karnaugh Maps References:  Lecture 4 from last

Off Base-emitter circuit

Little to no current flowing Most of the voltage dropped across the

base-emitter as opposed to the resistor in the circuit

Collector-emitter circuit Little to no current flowing Most of the voltage dropped across the

collector-emitter as opposed to the resistor in the circuit

Page 16: Transistors, Logic Gates and Karnaugh Maps References:  Lecture 4 from last

On

Page 17: Transistors, Logic Gates and Karnaugh Maps References:  Lecture 4 from last

On Base-emitter circuit

Current flowing Most of the voltage dropped across the

resistor as opposed to the base-emitter in the circuit

Collector-emitter circuit Current flowing Most of the voltage dropped across the

resistor as opposed to the collector-emitter in the circuit

Page 18: Transistors, Logic Gates and Karnaugh Maps References:  Lecture 4 from last

Unusual feature One feature that people find unusual

when learning about transistors is that when the transistor is “on” the collector-emitter voltage is less than the base-emitter voltage

This is because in the collector-emitter, one is going from n-doped material to n-doped material, whereas in the base-emitter, one is going from p-doped to n-doped

Page 19: Transistors, Logic Gates and Karnaugh Maps References:  Lecture 4 from last

Logic gates As seen in lab, the on-off nature of

diodes and transistors make them ideal for building logic gates

Logic gates have input which is interpreted as a logic value (0 or 1, low or high, false or true) and have output which can also be interpreted logically

Page 20: Transistors, Logic Gates and Karnaugh Maps References:  Lecture 4 from last

Logic gates

Logic Circuit Symbol

NOT

AND

OR

NAND

NOR

Page 21: Transistors, Logic Gates and Karnaugh Maps References:  Lecture 4 from last

A Truth TableA B C Out

0 0 0 0

0 0 1 0

0 1 0 1

0 1 1 1

1 0 0 0

1 0 1 0

1 1 0 1

1 1 1 1

Page 22: Transistors, Logic Gates and Karnaugh Maps References:  Lecture 4 from last

Simplifying A´BC´ + A´BC + ABC´ + ABC A´B (C´ + C) + AB (C´ + C) A´B + AB (A´ + A) B B

ABC means A and B and C A + B means A or B A’ means not A

Page 23: Transistors, Logic Gates and Karnaugh Maps References:  Lecture 4 from last

Simplifying made easy Simplifying Boolean expressions is

not always easy So we introduce next a method

that is supposed to make simplification more visual

Page 24: Transistors, Logic Gates and Karnaugh Maps References:  Lecture 4 from last

Gray code In addition to binary numbers,

there is another way of representing numbers using 1’s and 0’s

It is not useful for doing arithmetic, but has other purposes

In gray code the numbers are ordered such that consecutive numbers differ by one bit only

Page 25: Transistors, Logic Gates and Karnaugh Maps References:  Lecture 4 from last

Gray code (Cont.)

0 0 0

0 0 1

0 1 1

0 1 0

1 1 0

1 1 1

1 0 1

1 0 0

Page 26: Transistors, Logic Gates and Karnaugh Maps References:  Lecture 4 from last

Constructing Gray code

0

1

Page 27: Transistors, Logic Gates and Karnaugh Maps References:  Lecture 4 from last

Reflect lower bits and 0’s then 1’s in front

0 0

0 1

1 1

1 0

Lower bits

Reflect through red line

Page 28: Transistors, Logic Gates and Karnaugh Maps References:  Lecture 4 from last

Reflect lower bits and 0’s then 1’s in front (again)

0 0 0

0 0 1

0 1 1

0 1 0

1 1 0

1 1 1

1 0 1

1 0 0

Reflect through red line

Page 29: Transistors, Logic Gates and Karnaugh Maps References:  Lecture 4 from last

An important property In gray-code order, two

consecutive rows of a truth table differ by one bit only

If two consecutive rows contain a 1, then a simplification of the Boolean expression is possible

Page 30: Transistors, Logic Gates and Karnaugh Maps References:  Lecture 4 from last

A Truth Table RevisitedA B C Out

0 0 0 0

0 0 1 0

0 1 1 1

0 1 0 1

1 1 0 1

1 1 1 1

1 0 1 0

1 0 0 0

Page 31: Transistors, Logic Gates and Karnaugh Maps References:  Lecture 4 from last

Improving Some combinations that differ only

by a single bit are not in consecutive rows

Thus we might miss such a simplification

So we put some of the inputs in as columns

Page 32: Transistors, Logic Gates and Karnaugh Maps References:  Lecture 4 from last

A B C Out

0 0 0 0

0 0 1 0

0 1 1 1

0 1 0 1

1 1 0 1

1 1 1 1

1 0 1 0

1 0 0 0

Page 33: Transistors, Logic Gates and Karnaugh Maps References:  Lecture 4 from last

A row-column version

A B\C 0 1

0 0 0 0

0 1 1 1

1 1 1 1

1 0 0 0

Page 34: Transistors, Logic Gates and Karnaugh Maps References:  Lecture 4 from last

Karnaugh-map This way of arranging truth tables

combined with the rules for simplifying Boolean expressions goes under the name Karnaugh map

Page 35: Transistors, Logic Gates and Karnaugh Maps References:  Lecture 4 from last

The rules One identifies blocks (as large as

possible) containing 1’s The blocks must contain all 1’s The number of 1’s should be a

power of 2 (1, 2, 4, 8, …) A given 1 can belong to more than

1 block

Page 36: Transistors, Logic Gates and Karnaugh Maps References:  Lecture 4 from last

Wrapping Imagine that the rows wrap

around, so for instance, a block can include the top and bottom rows (without intermediate rows)

Similarly for columns

Page 37: Transistors, Logic Gates and Karnaugh Maps References:  Lecture 4 from last

Example WXY’Z + W’XY’Z + WX’Y’Z’ +

W’X’Y’Z’ + WXYZ’ + WXY’Z’ + W’XY’Z’ + W’XYZ’

Page 38: Transistors, Logic Gates and Karnaugh Maps References:  Lecture 4 from last

Example in Karnaugh

Z 0 1 1 0

W X\Y 0 0 1 1

0 0 1W’X’Y’Z’

0 0 0

0 1 1W’XY’Z’

1W’XY’Z

0 1W’XYZ’

1 1 1WXY’Z’

1WXY’Z

0 1WXYZ’

1 0 1WX’Y’Z’

0 0 0

Page 39: Transistors, Logic Gates and Karnaugh Maps References:  Lecture 4 from last

Result Y’Z’ + XY’ + X Z’ A block of size two eliminates one Boolean

variable; a block of four eliminates two Boolean variables; and so on

For a block identify the elements in the block that don’t change, AND them together, that’s your expression for the block

Obtain an expression for each block and OR them together