triboard tc1130 - farnelltriboard tc1130 hardware manual introduction user’s manual 1-1 v 1.2,...

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Microcontrol lers

User’s Manual, V 1.2, June 2004

Tr iBoard TC1130Hardware Manual TC1130-300

Edition 2004-06

Published by Infineon Technologies AG,St.-Martin-Strasse 53,D-81541 München, Germany

© Infineon Technologies AG 2004.All Rights Reserved.

Attention please!

The information herein is given to describe certain components and shall not be considered as warranted characteristics.Terms of delivery and rights to technical change reserved.We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding circuits, descriptions and charts stated herein.Infineon Technologies is an approved CECC manufacturer.

Information

For further information on technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies Office in Germany or our Infineon Technologies Representatives worldwide (see address list).

Warnings

Due to technical requirements components may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies Office.Infineon Technologies Components may only be used in life-support devices or systems with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system, or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered.

Microcontrol lers

User’s Manual, V 1.2, June 2004

N e v e r s t o p t h i n k i n g .

Tr iBoard TC1130Hardware Manual TC1130-300

Controller Area Network (CAN): License of Robert Bosch GmbH

TriBoard TC1130 Hardware Manual TC1130-100 Revision History: 2004-06 V 1.2

Previous Version: -

Page Subjects (major changes since last revision)

We Listen to Your CommentsAny information within this document that you feel is wrong, unclear or missing at all?Your feedback will help us to continuously improve the quality of this document.Please send your proposal (including a reference to this document) to:[email protected]

TriBoard TC1130Hardware Manual

Table of Contents Page

1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-1

2 TriBoard Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-12.1 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-22.2 Placement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-3

3 TriBoard Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-13.1 Power Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-13.2 Clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-13.3 Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-13.4 FLASH . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-23.5 SDRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-23.6 Peripherals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-23.7 ASC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-33.8 SSC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-33.9 MultiCAN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-33.10 USB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-33.11 Ethernet . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-33.12 ADC (optional) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-43.13 Other peripherals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-43.14 Toggle LED . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-43.15 Debug System . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-43.15.1 OCDS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-43.15.2 On Board Wiggler . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-5

4 TriBoard Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-14.1 Boot Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-14.1.1 TC1130 Boot Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-24.2 SW Boot Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-24.3 Clock Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-34.4 Jumper Settings. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-34.5 Optional Resistors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-3

5 TriBoard Software . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-15.1 Requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-15.2 Software Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-15.3 Software Installation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-1

6 Signal Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-1

7 Connector Pin Assignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-17.1 TC1130 Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-27.2 General Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-47.3 Power Connector Pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-67.4 RS232 Pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-6

User’s Manual I-1 V 1.2, 2004-06


Table of Contents Page

7.5 CAN Pinou . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-87.6 OCDS Pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-8

8 Schematic and Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-18.1 Schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-18.1.1 Changes to the Schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-18.2 Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-138.3 Layout with Dimensioning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-15

9 Keyword Index . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Index-1

User’s Manual I-2 V 1.2, 2004-06


List of Figures Page

Figure 2-1 TriBoard Block Schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2Figure 2-2 TriBoard-TC1130.300 Placement . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-3Figure 3-1 Clock socket usage (XT301) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-1Figure 4-1 Configuration DIP-Switch. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-1Figure 7-1 Connector for TC1130 - Pinout (Part I) . . . . . . . . . . . . . . . . . . . . . . . 8-2Figure 7-2 Connector for TC1130 - Pinout (Part II) . . . . . . . . . . . . . . . . . . . . . . . 8-3Figure 7-3 General Connector - Pinout (Part I) . . . . . . . . . . . . . . . . . . . . . . . . . . 8-4Figure 7-4 General Connector - Pinout (Part II) . . . . . . . . . . . . . . . . . . . . . . . . . 8-5Figure 7-5 Power Connector Pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-6Figure 7-6 RS232-0 Pinout (DB9) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-6Figure 7-7 ASC1 Pinout (BERG10). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-7Figure 7-8 CAN Pinout (BERG10). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-8Figure 7-9 3.3V OCDS1 Pinout (BERG16) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-8Figure 7-10 3.3V OCDS2 Pinout (SAMTEC QSH) . . . . . . . . . . . . . . . . . . . . . . . . 8-9Figure 7-11 On Board Wiggler Pinout (DB25). . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-9Figure 8-1 Schematic - Project . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-2Figure 8-2 Schematic - Bussystem . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-3Figure 8-3 Schematic - external SDRAM and Flash Memory . . . . . . . . . . . . . . . 9-4Figure 8-4 Schematic - Clock, OCDS1 and Config . . . . . . . . . . . . . . . . . . . . . . 9-5Figure 8-5 Schematic - Peripherals (CAN and Ethernet PH4) . . . . . . . . . . . . . . 9-6Figure 8-6 Schematic - Debug System (OCDS1 and OCDS2) . . . . . . . . . . . . . . 9-7Figure 8-7 Schematic - Peripherals (ASC, SSC, ADC and USB) . . . . . . . . . . . . 9-8Figure 8-8 Schematic - Power Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-9Figure 8-9 Schematic - Connectors (Plug) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-10Figure 8-10 Schematic - Connectors (Socket) . . . . . . . . . . . . . . . . . . . . . . . . . . 9-11Figure 8-11 Schematic - Busdriver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-12Figure 8-12 Component Plot Top Layer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-13Figure 8-13 Component Plot Bottom Layer. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-14Figure 8-14 Dimensioning (mil) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-15Figure 8-15 Dimensioning (mm) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-16

User’s Manual II-1 V 1.2, 2004-06


List of Figures Page

User’s Manual II-2 V 1.2, 2004-06


List of Tables Page

Table 4-1 Boot Configuration for TC1130 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-2Table 4-2 Jumper for On Board Wiggler . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-3Table 4-3 Resistors for XTAL1 Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-3Table 6-1 Power Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-1Table 6-2 Reset Signals. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-1Table 6-3 Interrupt Signals. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-1Table 6-4 Clock Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-1Table 6-5 BUS Signals. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-2Table 6-6 BUS Control Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-2Table 6-7 Debug Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-2Table 6-8 Peripheral Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-3Table 6-9 Analog Signals (optional) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-3

User’s Manual III-3 V 1.2, 2004-06


List of Tables Page

User’s Manual III-4 V 1.2, 2004-06


Introduction

1 IntroductionWe congratulate you on your purchase of the TriCore Evaluation Board. This kit is aversatile tool, providing quick access to the capabilities of TriCore's powerfularchitecture.

Applications can be developed easily. The Evaluation Board is equipped with a varietyof memories and peripherals for connection to the environment. There is also aninterface for the On Chip Debugging Features (OCDS1 and OCDS2). The kit alsoincludes several sets of development tools, which are stored on the included EvaluationBoard CD-ROM.

The Evaluation Board allows easily the development of TriCore applications with thecorresponding tools.

Subsequently, the applications can be downloaded and can be tested with the powerfuldebugger software.

This TriBoard Hardware Manual familiarizes you with the TriCore Evaluation Board andguides you through the initial setup of the TriBoard and the installation of thedevelopment software tool chain.

User’s Manual 1-1 V 1.2, 2004-06


Introduction

User’s Manual 1-2 V 1.2, 2004-06


TriBoard Features

2 TriBoard Features• CPU: - TC1130 (TriCore)• MEMORY: - Burst FLASH up to 64 MBytes (default: 32 MBytes)

- PC100 SDRAM 2 banks up to 64 MBytes per bank (default: 1banks with 64 MBytes) or- Micron SyncFlash 2 banks with 16 MBytes per bank

• CLOCK: - Crystal 20MHz (default), Oscillator or External Clock• INTERFACE: - DB9 for RS232-0

- BERG10 for RS232-1- two BERG10 for CAN-0/1 with Transceiver- BERG16 for OCDS1- SAMTEC QSH-030-01-F-D-A for OCDS2- RJ45 Connector with LED’s for Ethernet- USB connector (type B) for USB connections- DB25 On Board Wiggler for OCDS1- four 80-pin connectors (male) with all I/O signals- four 80-pin connectors (female) with all I/O signals

• POWER: - 5.5V to 60V - generated internally 5V for CAN, on board Wiggler- generated internally 3.3V- generated internally 1.5V- Power On Reset circuit used from power devices

• DIMENSION: - 100mm x 160mm (EURO-Board)

User’s Manual 2-1 V 1.2, 2004-06


TriBoard Features

2.1 Block Diagram

Figure 2-1 TriBoard Block Schematic

XTAL

Transceiver

TxD0

TxD1

RxD0

RxD1

Transceiver

TxCAN0

TxCAN1

RxCAN0

RxCAN1

TC1130

TriCoreCPU

Wiggler Wiggler

OC

DS1

OCDS1

OC

DS2

BUS

ADD

RES

S a

nd D

ATA

BUS

BUS

BUS

PC100SDRAM

32 Bit2 banks

Buffer

BUS BurstFLASH32 Bit

PLLCAN0

CAN1

e

ASC0

/CS0

/CS1 and /CS2

USB lines

MIIPHY

Twisted Pair

USB type B

RJ45

User’s Manual 2-2 V 1.2, 2004-06


TriBoard Features

2.2 Placement

Figure 2-2 TriBoard-TC1130.300 Placement

RS

232-

0

RS2

32-1

OC

DS

1

Power

Reset

Wig

gler

JP5011

1CAPCOM / GPTU BUS EXPANSION

ADC PERIPHERALS

X804 X801

X803 X802

1

1

1

1

1

TOGGLE

RESET5V

3V3

1V5

Clo

ck

OCDS2

XT301

TC1130

A1

CAN

1C

AN0

11

1 8

S301

1

BurstFLASH

BurstFLASH

SDR

AM

SD

RA

M

18

S303

1 18

S302

1

USB

RJ45

User’s Manual 2-3 V 1.2, 2004-06


TriBoard Features

User’s Manual 2-4 V 1.2, 2004-06


TriBoard Information

3 TriBoard Information

3.1 Power Supply

The Board has to be connected to a single power supply with 5.5V to 60V DC. TheTriBoard generates internally 3.3V and 1.5V. As a guide, a supply of 7V and 500mA isdeemed sufficient for operation. The pinout for the supply connector is shown inFigure 7-5. There can be used any standard power pack with a connector where thepositive line is surrounded by the ground line.

Applying a stable supply voltage causes the power on reset after a short period. ThreeLED's indicate the status of the on board generated voltage.

A manual reset is executed by pressing the reset button.

3.2 Clock

There are three possibilities to apply the CPU clock.

• Large oscillator circuit (DIP14)• Small oscillator circuit (DIP8)• Crystal oscillator (default)• External clock generator

The crystal oscillator and the oscillator circuit use the socket XT301. It's possible to applya 14pol DIP oscillator package or an 8pol DIP oscillator package.

3.3 Memory

The TriBoard supports the following memory configurations:

• 8 MBytes external ST Burst Flash• 16 MBytes external ST Burst Flash• 16 MBytes external Intel Burst Flash• 32 MBytes external Intel Burst Flash (default)• 64 MBytes external Intel Burst Flash

Figure 3-1 Clock socket usage (XT301)

OSCILLATOR

DIP14 OSCILLATOR

DIP8 ExternalClock InputGNDXT

AL

User’s Manual 3-1 V 1.2, 2004-06



• 16 MBytes external SDRAM per bank or• 32 MBytes external SDRAM per bank or• 64 MBytes external SDRAM per bank (default, 1 bank) or• 16 MBytes external Micron SyncFlash per bank

The Board supports programming though the JTAG port (OCDS1).

3.4 FLASH

The Flash uses 32 Data Bits (AD0...AD31) and 24 Address Bits (A0...A23). It’s accessedvia /CS0.

3.5 SDRAM

The SDRAM uses 32 Data Bits (AD0...AD31) and 18 Address Bits (A2...A16). Bank0(U201 and U202) is connected to /CS1 and Bank1 (U203 and U204) to /CS2.

If Bank0 is equipped with 256MBit devices then remove R204 and R205 and assembleR201, R202 and R203.

If Bank1 is equipped with 256MBit devices then remove R209 and R210 and assembleR206, R207 and R208.

If Bank0 is equipped with Micron SyncFlash devices then assemble R211, R212 andR213.

If Bank1 is equipped with Micron SyncFlash devices then assemble R214, R215 andR216.

The board is always equipped with 256MBit devices on Bank0. Bank1 is not assembled.

Please refer to schematic Figure 8-3 for more information.

3.6 Peripherals

The available peripherals on the TC1130 are

• System Timer• General Purpose Timer Unit (GPTU)• Asynchronous Serial Interface (ASC0, ASC1 and ASC2)• Synchronous Serial Interface (SSC0 and SSC1)• MultiCAN (CAN)• I2C Module (I2C)• Capture/Compare Unit 6 (CCU6)• Micro Link Serial Bus Interface (MLI0 and MLI1)• Ethernet (ETH)• USB_11D (USB)

User’s Manual 3-2 V 1.2, 2004-06



3.7 ASC

There are three ASC interfaces possible. ASC0 (via P2.1 and P2.0) is connected to theDB9 socket and ASC1(via P0.1 and P0.0) is connected to the BERG10 plug. ASC0 andASC1 are driven via the RS232 Transceiver MAX3225. The DB9 socket can beconnected to the serial port of a PC with a 1 to 1 RS232 cable.

To use the ASC interfaces via the plug X802 (without Transceiver) or connect anotherASC to DB9 and BERG10 plug change the resistors R601, R602, R603, R605 and R614up to R621. For more information look at the TC1130 User’s Manual. for ports and theTriBoard schematics for the resistors (Figure 8-7).

3.8 SSC

On the TC1130 there are two synchronous serial interfaces available but there is nospecial plug on board. To connect peripherals to SSC’s the connector X802(Peripherals) can be used.

The SSC of the TC1130 is connected to a serial EEPROM with a size of 128K (16.384x 8). As chip select for this EEPROM is used the I/O line P2.9. To disable the EEPROMremove resistor R604. Optional it is possible to have an AD converter connected to theSSC’s. See “ADC (optional)” on Page 3-4 for more information

3.9 MultiCAN

On the board are two CAN transceiver connected to the MultiCAN on TC1130. Thetransceivers are connected to two BERG10 plug. For the pinout of BERG10 plug seeFigure 7-8 on page 8.

To use the interfaces via the plug X802 (without Transceiver) or connect another CAN-node to the transceiver . Change the resistors R406 up to R413 and R454 up to R457.For more information look at the TC1130 User’s Manual. for ports and the TriBoardschematics for the resistors (Figure 8-5).

3.10 USB

The TriBoard provide an USB type B connector (X602). Optional, this USB connectorcan be used with an on board transceiver (see Figure 8-7).

3.11 Ethernet

The TriBoard provide a RJ45 connector (X401) for twisted pair ethernet connections.The TriBoard use a Intel LXT941A as physical interface device. For more informationabout the ethernet modul see TC1130 User’s Manual, about the PHY see the LXT941Adatasheet.

User’s Manual 3-3 V 1.2, 2004-06



3.12 ADC (optional)

The TriBoard is prepared for a 10 channel AD converter with 16-Bit resolution. To usethis AD converter you must assemble the following devices:

• AD7708BR (U603)• Crystal 32,786kHz size TQEC45• 2 SMD capacitor 18pF size 0603 (C605, C606)• HF-coil 10µH (L601)• SMD Tantal capacitor 10µF/10V size A (C607)• 3 SMD capacitor 100nF size 0603 (CB603, CB604, CB605)• 3 SMD resistor 0R size 0603 (R606, R607, R612)

To connect the device to port 2 (SSC0) you need:

• 4 SMD resistor 0R size 0603 (R608, R609, R610, R611)

To connect the device to port 3 (SSC1) you need:

• 4 SMD resistor 0R size 0603 (R622, R623, R624, R630)

It is possible to connect the RDY pin of AD converter to P0.14. To do this you need:

• 1 SMD resistor 0R size 0603 (R613)

For more information about the AD converter, programming and access please see thedatasheet of AD7708 and the user’s manual of TC1130. For the needed devices pleasesee Figure 8-7 and their locations see Figure 8-12 and Figure 8-13.

3.13 Other peripherals

For all other peripherals there are no special plugs on the board. The peripheral signalsare available on the different connectors. See “Connector Pin Assignment” onPage 7-1

NOTE:

- I/O P2.9 is used as chip select for the serial eeprom on board.

3.14 Toggle LED

P0.7 is connected to a single LED (D401) and can be controlled by Software. This statusLED is low active.

3.15 Debug System

3.15.1 OCDS

The OCDS1 signals are connected to the BERG16 plug (X501). They work with the portsupply of 3.3V.

User’s Manual 3-4 V 1.2, 2004-06



The OCDS2 signals are connected to the SAMTEC HighSpeed plug (X502). They alsowork with the port supply of 3.3V.

The clock signal for OCDS1 and OCDS2 is always TRCLK.

3.15.2 On Board Wiggler

The On Board Wiggler is used to connect a PC to the TriBoard OCDS1 via the 5V parallelport.

The Wiggler can be enabled or disabled by setting the jumper JP501 (see Table 4-2 andFigure 8-12).

User’s Manual 3-5 V 1.2, 2004-06



User’s Manual 3-6 V 1.2, 2004-06


TriBoard Configuration

4 TriBoard Configuration

4.1 Boot Configuration

The picture above shows the definition of the boot configuration switch. The meaning ofthe switches will be described in the following table (Table 4-1).

Note: The ON position of the switch is equal to a logical LOW at the dedicated pin.

Figure 4-1 Configuration DIP-Switch

7LOW on

8653 421HIGH

HWCFG

0

HWCFG

1

HWCFG

2

BYPASS

SHDN 3,3V

SHDN 1,5V

Don’t u

se

Don’t u

se

User’s Manual 4-1 V 1.2, 2004-06



4.1.1 TC1130 Boot Configuration

4.2 SW Boot Configuration

The TC1130 has 16 inputs (Port 1) which are latched with the /HDRST signal. Thislatched value can be used as SW configuration. On the Topside (see Figure 8-12) fromthe TriBoard exist two Dipswitches which can be used for SW configuration. TheDipswitches are connected to a driver which drive the signals from the Dipswitchesduring /HDRST is activ. If the Dipswitch is closed the the corresponding bit is lowotherwise high.

Refer to Users Manual TC1130 for more information.

All pins can be used by your own software.

Table 4-1 Boot Configuration for TC1130

Note: The shadowed line indicates the default setting.

Note: ’x’ represents the don’t care state.

Note: The two signals /OCDS_E and /BRK_IN will be set by the Debugger via OCDS-Interface.

/BRK_IN CFG[2...0] Type of Boot PC Start value

1 000 Serial boot from ASC to PMIscratchpad, run loaded program

0xD4000000

1 001 Serial boot from CAN to PMIscratchpad, run loaded program

0xDFFFFFFC

1 010 Serial boot from SSC to PMIscratchpad, run loaded program

0xDFFFFFFC

1 011 External memory, EBU as master 0xA0000000

1 100 External memory, EBU as slave 0xA0000000

1 101 External memory, EBU as master 0xA0000000

1 110 PMI scratchpad 0xD4000000

1 111 reserved; don’t use this combination -

0 01x1xx

reserved; don’t use this combination -

0 001 go to external emulator space 0xDE000000

0 000 put chip in tristate (deep sleep) -

User’s Manual 4-2 V 1.2, 2004-06



4.3 Clock Selection

The resulting CPU clock is:

• without Bypass (switch is ON)

• with Bypass (switch is OFF)

Note: The factors K, P and N are controlled via bitfields in register PLL_CLC located inthe SCU.

The resulting system clock is:

• if SYSFS cleared (default after reset)

• if SYSFS is set

Note: The bit SYSFS is controlled via bit 2 in register PLL_CLC located in the SCU.

4.4 Jumper Settings.

4.5 Optional Resistors

Table 4-2 Jumper for On Board Wiggler

Note: The shadowed line indicates the default setting

Setting On Board Wiggler

1 - 2 Enable On Board Wiggler

2 - 3 Disable On Board Wiggler

Table 4-3 Resistors for XTAL1 Operation

R315 use XT301 (default: short)

R317 Rserial (default: short)

R316 Rparallel (default: open)

fCPUCLKN

PK-------- fOSC⋅=

fCPUCLK fOSC=

fSYSTEMCLKfCPUCLK

2----------------------=

fSYSTEMCLK fCPUCLK=

User’s Manual 4-3 V 1.2, 2004-06



User’s Manual 4-4 V 1.2, 2004-06


TriBoard Software

5 TriBoard Software

5.1 Requirements

To install the software from your TriBoard or Starterkit CD you need a PC withWindows95/98/ME, WindowsNT4.0 or Windows 2000.

5.2 Software Overview

The CD does not contain any tool. For the availablity for Demo Versions of the differentTools, please contact the toolvendor directly (e.g. Ashling, GreenHills, HighTec, Hitex,Lauterbach, Tasking, PLS...). To install tools for compiling and debugging use seperatCD’s from Toolvendors. There are also some application notes and software examples.The directory “Schematics” contains libraries and some examples of extension boardsin the Protel file format. The data sheets of all used parts can be found in the“TriBoard_Components” directory. The manuals for the microcontrollers and theTriBoard are located in the “Manual” folder.

The current Errata Sheet can be found in the directory “Erata Sheet”. To make sure youhave always the most recent one, please contact your local FAE.

Note: For more details see the file ReadMe.txt.

5.3 Software Installation

To install tools for the TriCore insert the CD from the Toolvendor and start the file“setup.exe” if the CD is not automatically started. Follow the instructions of theinstallationprogram.

User’s Manual 5-1 V 1.2, 2004-06


TriBoard Software

User’s Manual 5-2 V 1.2, 2004-06


Signal Description

6 Signal DescriptionTable 6-1 Power Signals

Short Name Description

VCC_IN Supply Input (5,5V...60V)

GND Ground

VDDL Core Logic Supply Voltage (1.5V)

VDDM Core Memory Supply Voltage (1.5V)

VDDP Port Supply Voltage (3.3V)

VDDOSC3 Main Oscillator Power Supply Voltage (3.3V)

VDDOSC Main Oscillator Power Supply Voltage (1.5V)

Table 6-2 Reset Signals


/PORST External Power On Reset

/HDRST Hardware Reset

HWCFG0 Hardware Configuration Input 0



Table 6-3 Interrupt Signals


/NMI Non Maskable Interrupt

Table 6-4 Clock Signals


XTAL1 Crystal Oscillator Input

XTAL2 Crystal Oscillator Output

SDCLKO SDRAM Clock Output

SDCLKI SDRAM Clock Input

BFCLKO Burst Mode Flash Clock Output

BFCLKI Burst Mode Flash Clock Input

TRCLK Trace Clock Output

User’s Manual 6-1 V 1.2, 2004-06


Signal Description

Table 6-5 BUS Signals


AD[0...31] Data Bus

A[0...23] Address Bus

Table 6-6 BUS Control Signals


/CS[0...3] Chip Selects

/CSCOMB Combined Chip Select Output

/BC[0...3] Byte Controls

/RD Read

/WR Write

MR/W Motorola-style Read/Write

/BAA Burst address advance output

/ADV Address Valid

/BREQ Bus Request Output

/HOLD Hold Request Input

/HLDA Hold Acknowledge

/WAIT Wait Input

ALE Address Latch Enable

/RAS Row Address Strobe

/CAS Column Address Strobe

CKE Clock Enable Output

/BREQ Bus Request Output

/HOLD Hold Request Input

/HLDA Hold Acknowledge

/WAIT Wait

Table 6-7 Debug Signals


/TRST Test Reset

TCLK Test Clock

TMS Test Mode Select

User’s Manual 6-2 V 1.2, 2004-06


Signal Description

TDI Test Data Input

TDO Test Data Output

TESTMODE Test Mode Select Input

/BRK_IN TriCore Breakpoint Input

/BRK_OUT TriCore Breakpoint Output

BRKPT[0...2] TriCore Breakpoint

STATUS[0...4] TriCore Status

IND_PC[0...7] TriCore Indirect Program Counter

Table 6-8 Peripheral Signals


RXD0 Receive Data ASC0


TXD1 Transmit Data ASC1


P0 [0...15] General Purpose I/O Port 0.0 ... 0.15





MII_TXCLK MII Transmit Clock

MII_RXCLK MII Receive Clock

MII_MDIO MII Data Input / Output

D+ USB Dataline +

D- USB Dataline -

Table 6-9 Analog Signals (optional)


AN [0...9] Analog Input 0 ... 9

ANCOM Optional Reference Voltage Input

VAREF Analog Reference Voltage Supply

VAGND Analog Reference Voltage Supply Ground

Table 6-7 Debug Signals (cont’d)

User’s Manual 6-3 V 1.2, 2004-06


Signal Description

VADC Power Supply ADC Converter

VSSA Power Supply Ground ADC Converter

Table 6-9 Analog Signals (optional)

User’s Manual 6-4 V 1.2, 2004-06


Connector Pin Assignment

7 Connector Pin AssignmentThe TriBoard is shipped with four male (plug) connectors on top layer and four female(socket) connectors on bottom layer. The default connectors are 80-pol. Board to Boardconnectors from Samtec:

http://www.samtec.com

Plug:

FTSH-140-02-L-DV-ES-A

Socket:

FLE-140-01-G-DV-A

Alternative there can be used the Board to Board System from Robinson Nugent:

http://www.robinsonnugent.com

Plug:

P50L-80P-AS-TGF

Socket:

P50L-80S-AS-TGF

User’s Manual 7-1 V 1.2, 2004-06

http://www.samtec.com

http://www.robinsonnugent.com



7.1 TC1130 Connector

Figure 7-1 Connector for TC1130 - Pinout (Part I)

GND 1 2 GND GND 1 2 GNDGND 3 4 GND GND 3 4 GNDD0 5 6 A0 VCC_IN 5 6 VCC_IND1 7 8 A1 VCC_IN 7 8 VCC_IND2 9 10 A2 /ADV 9 10 /BAAD3 11 12 A3 BFCLKO 11 12 RMWD4 13 14 A4 /CSEMU 13 14D5 15 16 A5 /NMI 15 16 /HDRSTD6 17 18 A6 17 18D7 19 20 A7 GND 19 20 GNDD8 21 22 A8 P1.10 21 22 /PORSTD9 23 24 A9 P1.11 23 24 P1.0D10 25 26 A10 P1.12 25 26 P1.1D11 27 28 A11 P1.13 27 28 P1.2D12 29 30 A12 MII_TXCLK 29 30 P1.3D13 31 32 A13 MII_RXCLK 31 32 MII_MDIOD14 33 34 A14 P1.7 33 34 P1.5D15 35 36 A15 P1.8 35 36 P1.6D16 37 38 A16 P1.9 37 38 P1.4D17 39 40 A17 GND 39 40 P1.14D18 41 42 A18 P0.6 41 42 GNDD19 43 44 A19 P2.10 43 44 P2.11D20 45 46 A20 P2.14 45 46 P2.15D21 47 48 A21 P2.12 47 48 P2.13D22 49 50 A22 GND 49 50 GNDD23 51 52 A23 XTAL1 51 52D24 53 54 XTAL2 53 54 BFCLKID25 55 56 P2.0 55 56 P2.8D26 57 58 /CS2 P2.1 57 58 P2.9D27 59 60 P0.8 59 60 P0.10D28 61 62 /CS0 P0.9 61 62 P0.11D29 63 64 /BC3 P2.4 63 64 P2.7D30 65 66 /BC2 P2.3 65 66 P2.6D31 67 68 /BC1 P2.2 67 68 P2.5/RD 69 70 /BC0 P0.12 69 70 P0.13/WR 71 72 ALE P0.8 71 72 P0.9

MR/W 73 74 P0.10 73 74 P0.11P0.6 75 76 /WAIT 75 76 GND

77 78 P0.4 3V3 77 78 3V3P0.5 79 80 /CS3 3V3 79 80 3V3

BUS EXPANSION (X801,X901) PERIPHERALS (X802,X902)

User’s Manual 7-2 V 1.2, 2004-06



Figure 7-2 Connector for TC1130 - Pinout (Part II)

VSSA 1 2 VSSA GND 1 2 GNDVSSA 3 4 VSSA GND 3 4 GNDAN0 5 6 P2.6 5 6 P2.13AN1 7 8 P2.7 7 8 P2.12AN2 9 10 P2.8 9 10 P2.15AN3 11 12 P2.9 11 12 P2.14AN4 13 14 P2.10 13 14AN5 15 16 P2.11 15 16AN6 17 18 P2.5 17 18AN7 19 20 P0.5 19 20AN8 21 22 P0.6 21 22 P3.8AN9 23 24 P2.13 23 24 P3.9

ANCOM 25 26 P2.14 25 26 P3.1027 28 P2.15 27 28 P3.1129 30 P2.12 29 30 P3.1231 32 P3.1 31 32 P3.1333 34 P3.2 33 34 P3.1435 36 P3.3 35 36 P3.15

VSSA 37 38 VSSA P3.4 37 38VADC 39 40 VADC P3.5 39 40

41 42 P3.6 41 42VAGND 43 44 P3.0 43 44VAREF 45 46 P3.11 45 46GND 47 48 GND P3.12 47 48

49 50 P3.8 49 5051 52 P3.9 51 5253 54 P3.10 53 5455 56 P3.7 55 5657 58 57 5859 60 59 6061 62 P0.0 61 62 P0.463 64 P0.1 63 64 P0.565 66 P0.2 65 66 P0.667 68 P0.3 67 68 P0.7

3V3 69 70 3V3 P4.0 69 70 P4.771 72 P4.1 71 72 P4.673 74 P4.2 73 74 P4.5

P0.13 75 76 P4.3 75 76 P4.4P1.15 77 78 P0.12 3V3 77 78 3V3P0.15 79 80 P0.14 3V3 79 80 3V3

ADC (X803, X903) CAPCOM / GPTU / MLI (X804,X904)

User’s Manual 7-3 V 1.2, 2004-06



7.2 General Connector

The general connector is defined as an standard for future releases of boards like theTriBoard. There have been borne in mind yet another TriCore based CPUs.

Figure 7-3 General Connector - Pinout (Part I)

GND 1 2 GND GND 1 2 GNDGND 3 4 GND GND 3 4 GNDAD0 5 6 A0 VCC_IN 5 6 VCC_INAD1 7 8 A1 VCC_IN 7 8 VCC_INAD2 9 10 A2 /ADV 9 10 /BAAAD3 11 12 A3 EBUCLK_OUT 11 12 /CODEAD4 13 14 A4 /CSEMU 13 14 /CSOVLAD5 15 16 A5 /NMI 15 16 /HRSTAD6 17 18 A6 SVM 17 18 VDDFLTAD7 19 20 A7 GND 19 20 GNDAD8 21 22 A8 /TRST 21 22 /PORSTAD9 23 24 A9 TCLK 23 24 STATUS0AD10 25 26 A10 TMS 25 26 STATUS1AD11 27 28 A11 TDI 27 28 STATUS2AD12 29 30 A12 TDO 29 30 STATUS3AD13 31 32 A13 /OCDS_E 31 32 STATUS4AD14 33 34 A14 /BRK_IN 33 34 /TESTMODEAD15 35 36 A15 /BRK_OUT 35 36 SCAN_EAD16 37 38 A16 FT-ANALOG 37 38 BRKPT0AD17 39 40 A17 BRKPT1 39 40 BRKPT2AD18 41 42 A18 IND_PC0 41 42 IND_PC1AD19 43 44 A19 IND_PC2 43 44 IND_PC3AD20 45 46 A20 IND_PC4 45 46 IND_PC5AD21 47 48 A21 IND_PC6 47 48 IND_PC7AD22 49 50 A22 GND 49 50 GNDAD23 51 52 A23 XTAL1 51 52 XTAL3AD24 53 54 A24 XTAL2 53 54 EBUCLK_INAD25 55 56 A25 RXD0_EXT 55 56 RXD1_EXTAD26 57 58 /CS2 TXD0 57 58 TXD1AD27 59 60 /CS1 RXCAN0 59 60 RXCAN1AD28 61 62 /CS0 TXCAN0 61 62 TXCAN1AD29 63 64 /BC3 SCLK0 63 64 SCLK1AD30 65 66 /BC2 MTSR0 65 66 MTSR1AD31 67 68 /BC1 MRST0 67 68 MRST1/RD 69 70 /BC0 RXJ1850 69 70 TXRJ1850/WR 71 72 ALE P13.12 71 72 P13.13/RAS 73 74 /CAS P13.14 73 74 P13.15

/HLDA 75 76 /WAIT VDDSTBY 75 76 GND/CSFPI 77 78 /BREQ VDDPERI 77 78 VDDBUS/HOLD 79 80 /CS3 VDDPERI 79 80 VDDBUS

BUS EXPANSION (X801,X901) PERIPHERALS / OCDS (X802,X902)

User’s Manual 7-4 V 1.2, 2004-06



Figure 7-4 General Connector - Pinout (Part II)

VSSA 1 2 VSSA GND 1 2 GNDVSSA 3 4 VSSA GND 3 4 GNDAN0 5 6 AN16 GPTA0 5 6 GPTA32AN1 7 8 AN17 GPTA1 7 8 GPTA33AN2 9 10 AN18 GPTA2 9 10 GPTA34AN3 11 12 AN19 GPTA3 11 12 GPTA35AN4 13 14 AN20 GPTA4 13 14 GPTA36AN5 15 16 AN21 GPTA5 15 16 GPTA37AN6 17 18 AN22 GPTA6 17 18 GPTA38AN7 19 20 AN23 GPTA7 19 20 GPTA39AN8 21 22 AN24 GPTA8 21 22 GPTA40AN9 23 24 AN25 GPTA9 23 24 GPTA41AN10 25 26 AN26 GPTA10 25 26 GPTA42AN11 27 28 AN27 GPTA11 27 28 GPTA43AN12 29 30 AN28 GPTA12 29 30 GPTA44AN13 31 32 AN29 GPTA13 31 32 GPTA45AN14 33 34 AN30 GPTA14 33 34 GPTA46AN15 35 36 AN31 GPTA15 35 36 GPTA47VSSA 37 38 VSSA GPTA16 37 38 GPTA48

VDDA2 39 40 VDDA2 GPTA17 39 40 GPTA49VDDA2 41 42 VDDA2 GPTA18 41 42 GPTA50

VSSAREF0 43 44 VSSAREF1 GPTA19 43 44 GPTA51VDDAREF0 45 46 VDDAREF1 GPTA20 45 46 GPTA52

GND 47 48 GND GPTA21 47 48 GPTA53GPTU1.0 49 50 GPTU1.1 GPTA22 49 50 GPTA54GPTU1.2 51 52 GPTU1.3 GPTA23 51 52 GPTA55GPTU1.4 53 54 GPTU1.5 GPTA24 53 54 GPTA56GPTU1.6 55 56 GPTU1.7 GPTA25 55 56 GPTA57PCP_PC0 57 58 PCP_PC1 GPTA26 57 58 GPTA58PCP_PC2 59 60 PCP_PC3 GPTA27 59 60 GPTA59PCP_PC4 61 62 PCP_PC5 GPTA28 61 62 GPTA60PCP_PC6 63 64 PCP_PC7 GPTA29 63 64 GPTA61PCP_PC8 65 66 P2.0 GPTA30 65 66 GPTA62

/PCP_BRK_O 67 68 PCP_PC_OR GPTA31 67 68 GPTA63VDDPERI 69 70 VDDBUS GPTU0.0 69 70 GPTU0.4

AD0EMUX0 71 72 AD1EMUX0 GPTU0.1 71 72 GPTU0.5AD0EMUX1 73 74 AD1EMUX1 GPTU0.2 73 74 GPTU0.6AD0EMUX2 75 76 AD1EMUX2 GPTU0.3 75 76 GPTU0.7AD0EXTIN0 77 78 AD0EXTIN1 VDDPERI 77 78 VDDBUSAD1EXTIN0 79 80 AD1EXTIN1 VDDPERI 79 80 VDDBUS

ADC / GPIO (X803, X903) GPTU / GPTA (X804,X904)

User’s Manual 7-5 V 1.2, 2004-06



7.3 Power Connector Pinout

7.4 RS232 Pinout

Figure 7-5 Power Connector Pinout

Figure 7-6 RS232-0 Pinout (DB9)

5.5V...60V

GND

6 7 8 9

GN

D

RxD

0

TxD

0

1 2 3 4 5

User’s Manual 7-6 V 1.2, 2004-06



Figure 7-7 ASC1 Pinout (BERG10)

2 4 6 8

GN

D

RxD

1

TxD

1

1 3 5 7 9

10

User’s Manual 7-7 V 1.2, 2004-06



7.5 CAN Pinou

7.6 OCDS Pinout

Figure 7-8 CAN Pinout (BERG10)

Figure 7-9 3.3V OCDS1 Pinout (BERG16)

2 4 6 8

GN

D

CAN H

CAN

L1 3 5 7 9

10G

ND

TDO

2 4 6 8

1 3 5 7 9

10 12 14 16

11 13 15

EB

UC

LK TDI

/TR

ST

TCLK

/BR

K_I

N

TMS

GN

D

GN

D

/MR

/BR

K_O

UT

GN

D

/OC

DS

_E

3V3

User’s Manual 7-8 V 1.2, 2004-06



Figure 7-10 3.3V OCDS2 Pinout (SAMTEC QSH)

Figure 7-11 On Board Wiggler Pinout (DB25)

2 4 6 8

1 3 5 7 9

10 12 14 16

11 13 15

/PO

RST

BRKP

T1

+3V

3

STAT

US

4

STA

TUS3

BRKP

T2

18 20 22 24

17 19 21 23

26 28 30 32

25 27 29 31

34 36 38 40

33 35 37 39

/BR

K_O

UT

IND

_PC

7

STA

TUS2

STA

TUS1

STA

TUS0

42 44 46 48

41 43 45 47 49

50 52 54 56

51 53 55

IND

_PC

0

58 60

57 59

+3V3

CPU

CLK

/BR

K_IN

BRKP

T0

IND

_PC

6

IND

_PC

2

IND

_PC

1

IND

_PC

5

IND

_PC

4

IND

_PC

3

TMS

TDI

14 15

16

17

1 2 3 4 5 6 7 8 9 10

11

12

13

18

19

20

21

22

23

24

25

TCLK

/B

RK

_IN / MR

/O

CD

S_E

/TR

ST

/BR

K_O

UT

TDO

GN

D

GN

D

GN

D

GN

D

GN

D

GN

D

GN

D

GN

D

(Pul

lDow

n)

(Pul

lUp

)

User’s Manual 7-9 V 1.2, 2004-06



User’s Manual 7-10 V 1.2, 2004-06


Schematic and Layout

8 Schematic and Layout

8.1 Schematic

8.1.1 Changes to the Schematic

1. No changes to Schematic.

User’s Manual 8-1 V 1.2, 2004-06



Figure 8-1 Schematic - Project

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User’s Manual 8-2 V 1.2, 2004-06



Figure 8-2 Schematic - Bussystem

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Boa

rd T

C11

30\T

riB

oard

TC

1130

.ddb

- T

riB

oard

TC

1130

V1.

20\B

us.s

chF

ile:

INT

_AD

[0..3

1]

INT

_/W

AIT

/NM

I

/PO

RS

T/H

DR

ST

INT

_A[0

..23]

R101

4K7

INT

_/C

S0

INT

_/C

S1

INT

_/C

S2

INT

_/A

DV

INT

_/B

AA

INT

_MR

/W

INT

_/W

R

INT

_/W

AIT

INT

_AL

E

+3V

3

/NM

I

R102

100K

R103

100K

R104

100K

R105

100K

R106

100K

R107

100K

R108

100K

R109

100K

R110

100K

R111

100K

R112

100K

R113

100K

GN

D

BU

S..I

NT

INT

_/C

S3

INT

_/C

SC

OM

B

INT

_/R

D

NO

TE

: a

ll s

ign

als

wit

h p

refi

x 'IN

T_' are

in

tern

al si

gn

als

.T

hes

e si

gnal

s ar

e co

nn

ecte

d t

o co

nn

ecto

rs v

ia b

uff

er o

r on

ly t

o sd

ram

.

all si

gnal

s w

ith

out

pre

fix

'IN

T_'

are

dir

ectl

y co

nn

ecte

d t

o co

nn

ecto

rs o

r ar

e th

e b

uff

ered

'IN

T_'

sig

nal

s.

+3V

3

BU

S..C

TR

L

INT

_AD

0IN

T_A

D1

INT

_AD

2IN

T_A

D3

INT

_AD

4IN

T_A

D5

INT

_AD

6IN

T_A

D7

INT

_AD

8IN

T_A

D9

INT

_AD

10IN

T_A

D11

INT

_AD

12IN

T_A

D13

INT

_AD

14IN

T_A

D15

INT

_AD

16IN

T_A

D17

INT

_AD

18IN

T_A

D19

INT

_AD

20IN

T_A

D21

INT

_AD

22IN

T_A

D23

INT

_AD

24IN

T_A

D25

INT

_AD

26IN

T_A

D27

INT

_AD

28IN

T_A

D29

INT

_AD

30IN

T_A

D31

INT

_A0

INT

_A1

INT

_A2

INT

_A3

INT

_A4

INT

_A5

INT

_A6

INT

_A7

INT

_A8

INT

_A9

INT

_A10

INT

_A11

INT

_A12

INT

_A13

INT

_A14

INT

_A15

INT

_A16

INT

_A17

INT

_A18

INT

_A19

INT

_A20

INT

_A21

INT

_A22

INT

_A23

RN

113

0R

RN

112

0R

RN

115

0R

RN

114

0R

RN

117

0R

RN

116

0R

RN

119

0R

RN

118

0R

RN

107

0R

RN

109

0R

RN

108

0R

RN

111

0R

RN

110

0R

INT

_/C

S0

INT

_/C

S1

INT

_/C

S2

INT

_/B

AA

INT

_AL

E

INT

_/B

C0

INT

_/B

C1

INT

_/W

R

INT

_/R

D

INT

_/B

C2

INT

_/B

C3

INT

_/A

DV

INT

_/C

S3

INT

_/C

SC

OM

B

INT

_MR

/W

INT

_/C

AS

INT

_/R

AS

INT

_CK

E

INT

_SD

CL

K

INT

_BF

CL

KO

RN

102

0R

RN

101

0R

RN

104

0R

RN

103

0R

RN

105

0R

R114

20R

R115

0R

RN

106

0R

all

ser

ial re

sist

ors

an

d a

rrays

nea

r to

th

e T

C1130 t

o p

reven

t re

flec

tion

s.

RD

P2

RD

/ W

RT

3

AD

VB

11

BC

0A

5B

C1

A6

WA

ITB

9

NM

IT

7

A0

K1

A1

L1

A2

M1

A3

N1

A4

P1

A5

J2

A6

K2

A7

L2

A8

M2

A9

N2

A10

J3

A11

K3

A12

L3

A13

M3

A14

K4

A15

A8

A16

A9

A17

A10

A18

B10

A19

C10

A20

D10

A21

T4

A22

R4

A23

P4

BU

S I

NT

ER

FA

CE

HD

RS

TN

5P

OR

ST

R5

CS

3B

8C

S2

C9

CS

1D

8C

S0

D9

AD

0C

8A

D1

C7

AD

2B

6A

D3

C6

AD

4C

5

AD

5A

3

AD

6A

2A

D7

C3

AD

8C

2

AD

9D

2

AD

10F

1

AD

11E

3

AD

12F

3

AD

13G

1

AD

14H

2

AD

15G

3

AD

16D

7

AD

17B

5

AD

18A

4

AD

19B

4

AD

20C

4

AD

21B

3

AD

22B

2

AD

23B

1

AD

24C

1

AD

25D

3

AD

26E

2

AD

27F

2

AD

28F

4

AD

29G

4

AD

30H

3

AD

31G

2

AL

ER

3

BA

AA

11

CK

EL

4

BC

2B

7B

C3

A7

CA

SD

5

RA

SD

6

MR

/ W

P3

CS

CO

MB

N3

SD

CL

KI

J1S

DC

LK

OH

1

BF

CL

KO

E1

BF

CL

KI

D1

U101C

TC

1130

INT

_SD

CL

K

INT

_BF

CL

KI

User’s Manual 8-3 V 1.2, 2004-06



Figure 8-3 Schematic - external SDRAM and Flash Memory

12

34

56

78

ABCD

87

65

43

21

D C B A

2In

fine

on T

echn

olog

ies

AG

AI

MC

MA

TM

Tho

mas

iusp

latz

D-8

1541 M

unic

hT

el.: +

49-8

9-2

34-0

11

27-A

pr-

2004

Num

ber

:

Dat

e:

She

et:

of

Tri

Board

TC

1130 O

n b

oard

Mem

ory

1.2

Rev

isio

n:

G:\

Tec

hnic

al_

Support

\Tri

Core

\Tri

Board

\ED

A\T

riB

oard

TC

1130\T

riB

oard

TC

1130.d

db -

Tri

Board

TC

1130 V

1.2

0\M

emory

.sch

Fil

e:

A2

A3

A4

A5

A6

A7

A8

A9

A10

A11

A12

A13

A14

A15

A16

A17

A18

A19

A20

A21

AD

0A

D1

AD

2A

D3

AD

4A

D5

AD

6A

D7

AD

8A

D9

AD

10

AD

11

AD

12

AD

13

AD

14

AD

15

AD

16

AD

17

AD

18

AD

19

AD

20

AD

21

AD

22

AD

23

AD

24

AD

25

AD

26

AD

27

AD

28

AD

29

AD

30

AD

31

AD

[0..3

1]

A[0

..23]

BU

S..C

TR

L

CB215100n

+3V

3

/HD

RS

T

/RD

/WR

/CS

0

VP

P_V

PE

N

/L_N

C

CB216100n

CB217100n

GN

D

CB232100n

+3V

3

CB233100n

CB234100n

GN

D

/WAIT

INT

_/C

S1

INT

_CK

E

INT

_/W

RIN

T_/B

C0

INT

_/B

C1

CB204100n

CB205100n

GN

D

+3V

3

INT

_A2

INT

_A3

INT

_A4

INT

_A5

INT

_A6

INT

_A7

INT

_A8

INT

_A9

INT

_A

10

INT

_A

11

INT

_A

12

INT

_A

13

A12_B

0B

A0_B

0

INT

_A2

INT

_A3

INT

_A4

INT

_A5

INT

_A6

INT

_A7

INT

_A8

INT

_A9

INT

_A

10

INT

_A

11

INT

_A

12

INT

_A

13

INT

_SD

CL

K

INT

_/R

AS

INT

_/C

AS

CB206100n

CB207100n

CB203100n

CB202100n

CB201100n

+3V

3

GN

D

INT

_/C

S1

INT

_CK

E

INT

_/W

RIN

T_/B

C2

INT

_/B

C3

CB227100n

CB218100n

GN

D

+3V

3

INT

_SD

CL

K

INT

_/R

AS

INT

_/C

AS

CB219100n

CB220100n

CB226100n

CB225100n

CB224100n

+3V

3

GN

D

INT

_/C

S2

INT

_CK

E

INT

_/W

RIN

T_/B

C0

INT

_/B

C1

CB211100n

CB212100n

GN

D

+3V

3

INT

_A2

INT

_A3

INT

_A4

INT

_A5

INT

_A6

INT

_A7

INT

_A8

INT

_A9

INT

_A

10

INT

_A

11

INT

_A

12

INT

_A

13

INT

_A2

INT

_A3

INT

_A4

INT

_A5

INT

_A6

INT

_A7

INT

_A8

INT

_A9

INT

_A

10

INT

_A

11

INT

_A

12

INT

_A

13

INT

_SD

CL

K

INT

_/R

AS

INT

_/C

AS

CB213100n

CB214100n

CB210100n

CB209100n

CB208100n

+3V

3

GN

D

INT

_/C

S2

INT

_CK

E

INT

_/W

RIN

T_/B

C2

INT

_/B

C3

CB231100n

CB221100n

GN

D

+3V

3

INT

_SD

CL

K

INT

_/R

AS

INT

_/C

AS

CB222100n

CB223100n

CB230100n

CB229100n

CB228100n

+3V

3

GN

D

INT

_A

D[0

..31]

INT

_A

[0..2

3]

BU

S..I

NT

INT

_AD

0IN

T_A

D1

INT

_AD

2IN

T_A

D3

INT

_AD

4IN

T_A

D5

INT

_AD

6IN

T_A

D7

INT

_AD

8IN

T_A

D9

INT

_A

D10

INT

_A

D11

INT

_A

D12

INT

_A

D13

INT

_A

D14

INT

_A

D15

INT

_A

D16

INT

_A

D17

INT

_A

D18

INT

_A

D19

INT

_A

D20

INT

_A

D21

INT

_A

D22

INT

_A

D23

INT

_A

D24

INT

_A

D25

INT

_A

D26

INT

_A

D27

INT

_A

D28

INT

_A

D29

INT

_A

D30

INT

_A

D31

INT

_AD

0IN

T_A

D1

INT

_AD

2IN

T_A

D3

INT

_AD

4IN

T_A

D5

INT

_AD

6IN

T_A

D7

INT

_AD

8IN

T_A

D9

INT

_A

D10

INT

_A

D11

INT

_A

D12

INT

_A

D13

INT

_A

D14

INT

_A

D15

INT

_A

D16

INT

_A

D17

INT

_A

D18

INT

_A

D19

INT

_A

D20

INT

_A

D21

INT

_A

D22

INT

_A

D23

INT

_A

D24

INT

_A

D25

INT

_A

D26

INT

_A

D27

INT

_A

D28

INT

_A

D29

INT

_A

D30

INT

_A

D31

/WA

ITN

OT

E:

a

ll s

ign

als

wit

h p

refi

x 'IN

T_' are

in

tern

al si

gn

als

.T

hes

e si

gn

als

are

con

nec

ted

to c

on

nec

tors

via

bu

ffer

or

on

ly t

o s

dra

m.

all

sig

nals

wit

hou

t p

refi

x 'IN

T_' are

dir

ectl

y c

on

nec

ted

to c

on

nec

tors

or

are

th

e b

uff

ered

'IN

T_' si

gn

als

.

A0

23

CS

19

CA

S1

7

WE

16

A1

24

A2

25

A3

26

A4

29

A5

30

A6

31

A7

32

A8

33

A9

34

A10

22

A11

35

LD

QM

15

DQ

02

DQ

14

DQ

25

DQ

37

DQ

48

DQ

51

0

DQ

61

1

DQ

71

3

DQ

84

2

DQ

94

4

DQ

10

45

DQ

11

47

DQ

12

48

DQ

13

50

DQ

14

51

DQ

15

53

CL

K3

8C

KE

37

RA

S1

8

UD

QM

39

VD

D1

VD

D1

4

VD

DQ

3

VD

DQ

9

VS

S4

1

VS

S5

4

VS

SQ

6

VS

SQ

12

VS

SQ

46

VS

SQ

52

VD

DQ

43

VD

DQ

49

BA

02

0

BA

12

1

VD

D2

7

VS

S2

8

A12/V

CC

P3

6

NC

/RP

40

U201

HY

B39S

256160D

T-7

A0

23

CS

19

CA

S1

7

WE

16

A1

24

A2

25

A3

26

A4

29

A5

30

A6

31

A7

32

A8

33

A9

34

A10

22

A11

35

LD

QM

15

DQ

02

DQ

14

DQ

25

DQ

37

DQ

48

DQ

51

0

DQ

61

1

DQ

71

3

DQ

84

2

DQ

94

4

DQ

10

45

DQ

11

47

DQ

12

48

DQ

13

50

DQ

14

51

DQ

15

53

CL

K3

8C

KE

37

RA

S1

8

UD

QM

39

VD

D1

VD

D1

4

VD

DQ

3

VD

DQ

9

VS

S4

1

VS

S5

4

VS

SQ

6

VS

SQ

12

VS

SQ

46

VS

SQ

52

VD

DQ

43

VD

DQ

49

BA

02

0

BA

12

1

VD

D2

7

VS

S2

8

A12/V

CC

P3

6

NC

/RP

40

U203

HY

B39S

256160C

T_opt

A0

23

CS

19

CA

S1

7

WE

16

A1

24

A2

25

A3

26

A4

29

A5

30

A6

31

A7

32

A8

33

A9

34

A10

22

A11

35

LD

QM

15

DQ

02

DQ

14

DQ

25

DQ

37

DQ

48

DQ

51

0

DQ

61

1

DQ

71

3

DQ

84

2

DQ

94

4

DQ

10

45

DQ

11

47

DQ

12

48

DQ

13

50

DQ

14

51

DQ

15

53

CL

K3

8C

KE

37

RA

S1

8

UD

QM

39

VD

D1

VD

D1

4

VD

DQ

3

VD

DQ

9

VS

S4

1

VS

S5

4

VS

SQ

6

VS

SQ

12

VS

SQ

46

VS

SQ

52

VD

DQ

43

VD

DQ

49

BA

02

0

BA

12

1

VD

D2

7

VS

S2

8

A12/V

CC

P3

6

NC

/RP

40

U204

HY

B39S

256160C

T_opt

A0

23

CS

19

CA

S1

7

WE

16

A1

24

A2

25

A3

26

A4

29

A5

30

A6

31

A7

32

A8

33

A9

34

A10

22

A11

35

LD

QM

15

DQ

02

DQ

14

DQ

25

DQ

37

DQ

48

DQ

51

0

DQ

61

1

DQ

71

3

DQ

84

2

DQ

94

4

DQ

10

45

DQ

11

47

DQ

12

48

DQ

13

50

DQ

14

51

DQ

15

53

CL

K3

8C

KE

37

RA

S1

8

UD

QM

39

VD

D1

VD

D1

4

VD

DQ

3

VD

DQ

9

VS

S4

1

VS

S5

4

VS

SQ

6

VS

SQ

12

VS

SQ

46

VS

SQ

52

VD

DQ

43

VD

DQ

49

BA

02

0

BA

12

1

VD

D2

7

VS

S2

8

A12/V

CC

P3

6

NC

/RP

40

U202

HY

B39S

256160D

T-7

R203

0R

R205

0R

_opt

R202

0R

A12_B

0

BA

0_B

0

BA

1_B

0

INT

_A

14

R201

0R

R204

0R

_optIN

T_A

15

INT

_A

16

BA

1_B

0

R208

0R

R210

0R

_opt

R207

0R

A12_B

1

BA

0_B

1

BA

1_B

1

INT

_A

14

R206

0R

R209

0R

_optIN

T_A

15

INT

_A

16

A12_B

0B

A0_B

0B

A1_B

0

A12_B

1B

A0_B

1B

A1_B

1

A12_B

1B

A0_B

1B

A1_B

1

If U

201 a

nd

U202 a

re 1

28M

Bit

dev

ices

th

en r

emove

R201, R

202 a

nd

R203 a

nd

ass

emb

le R

204 a

nd

R205.

If U

203 a

nd

U204 a

re 1

28M

Bit

dev

ices

th

en r

emove

R206, R

207 a

nd

R208 a

nd

ass

emb

le R

209 a

nd

R210.

R211

0R

_opt

+3V

3

R212

0R

_opt

+3V

3

R214

0R

_opt

+3V

3

R215

0R

_opt

+3V

3

R216

0R

_opt

+3V

3R

213

0R

_opt

+3V

3

If U

201 a

nd

U202 a

re M

icro

n S

yn

cFla

sh d

evic

es t

hen

ass

emb

le R

211, R

212 a

nd

R213.

If U

203 a

nd

U204 a

re M

icro

n S

yn

cFla

sh d

evic

es t

hen

ass

emb

le R

214, R

215 a

nd

R216.

GN

D

A22

A23

GN

D

A2

A3

A4

A5

A6

A7

A8

A9

A10

A11

A12

A13

A14

A15

A16

A17

A18

A19

A20

A21

/HD

RS

T

/RD

/WR

/CS

0

BFCLKO/ADV

A22

A23

R217

0R

+3V

3

CE

B4

OE

F8

WE

G8

A1

A1

A2

B1

A3

C1

A4

D1

A5

D2

A6

A2

A7

C2

A8

A3

A9

B3

A10

C3

A11

D3

A12

C4

A13

A5

A14

B5

A15

C5

A16

D7

A17

D8

A18

A7

A19

B7

DQ

0F

2

DQ

1E

2

DQ

2G

3

DQ

3E

4

DQ

4E

5

DQ

5G

5

DQ

6G

6

DQ

7H

7

DQ

8E

1

DQ

9E

3

DQ

10

F3

DQ

11

F4

DQ

12

F5

DQ

13

H5

DQ

14

G7

DQ

15

E7

RE

SE

TD

4V

DD

H3

VS

SB

2

VS

SH

4

A20

C7

A21

C8

A22

A8

NC

/ A

23

G1

NC

/ A

24

H8

VS

SQ

H6

NC

/ V

SS

QH

2

VD

DA

6

VP

P /

VP

EN

A4

VD

DQ

G4

NC

/ V

DD

QD

6N

C /

VD

DQ

D5

NC

/ W

PC

6

R /

NC

B8

NC

/ C

LK

E6

RB

/ S

TS

E8

K / N

CF

1

NC

/ A

DV

F6

NC

/ W

AIT

F7

B /

NC

G2

L / N

CH

1

U205

RC

28F

128K

3C

115

CE

B4

OE

F8

WE

G8

A1

A1

A2

B1

A3

C1

A4

D1

A5

D2

A6

A2

A7

C2

A8

A3

A9

B3

A10

C3

A11

D3

A12

C4

A13

A5

A14

B5

A15

C5

A16

D7

A17

D8

A18

A7

A19

B7

DQ

0F

2

DQ

1E

2

DQ

2G

3

DQ

3E

4

DQ

4E

5

DQ

5G

5

DQ

6G

6

DQ

7H

7

DQ

8E

1

DQ

9E

3

DQ

10

F3

DQ

11

F4

DQ

12

F5

DQ

13

H5

DQ

14

G7

DQ

15

E7

RE

SE

TD

4V

DD

H3

VS

SB

2

VS

SH

4

A20

C7

A21

C8

A22

A8

NC

/ A

23

G1

NC

/ A

24

H8

VS

SQ

H6

NC

/ V

SS

QH

2

VD

DA

6

VP

P /

VP

EN

A4

VD

DQ

G4

NC

/ V

DD

QD

6N

C /

VD

DQ

D5

NC

/ W

PC

6

R /

NC

B8

NC

/ C

LK

E6

RB

/ S

TS

E8

K / N

CF

1

NC

/ A

DV

F6

NC

/ W

AIT

F7

B /

NC

G2

L / N

CH

1

U206

RC

28F

128K

3C

115

A0

A1

A0

A1

R224

0R

R225

0R

_opt

R218

0R

R219

0R

_opt

R220

0R

R221

0R

_opt

R222

0R

R223

0R

_opt

/BAA

NC

_/W

PK

_N

CN

C_C

LK

NC

_/A

DV

/B_N

C

VP

P_V

PE

N

/L_N

C

NC

_/W

P

K_N

C

NC

_C

LK

NC

_/A

DV

/B_N

C

VP

P_V

PE

N

/L_N

C

NC

_/W

PK

_N

CN

C_C

LK

NC

_/A

DV

/B_N

C

C201

opt

R226

opt

GN

D

R226 and C201 near to U201/38

INT

_SD

CL

K

C202

opt

R227

opt

GN

D


INT

_SD

CL

K

C203

opt

R228

opt

GN

D


INT

_SD

CL

K

C204

opt

R229

opt

GN

D


INT

_SD

CL

K

User’s Manual 8-4 V 1.2, 2004-06



Figure 8-4 Schematic - Clock, OCDS1 and Config

12

34

56

78

ABCD

87

65

43

21

D C B A

3In

fine

on T

echn

olog

ies

AG

AI

MC

MA

TM

Thom

asiu

spla

tzD

-81541 M

unic

hT

el.: +

49-8

9-2

34-0

11

27-A

pr-

2004

Num

ber

:

Dat

e:

She

et:

of

Tri

Board

TC

1130 C

lock

, C

on

fig a

nd

OC

DS

1.2

Rev

isio

n:

G:\

Tec

hnic

al_

Support

\Tri

Core

\Tri

Board

\ED

A\T

riB

oard

TC

1130\T

riB

oard

TC

1130.d

db -

Tri

Board

TC

1130 V

1.2

0\C

lock

.sch

Fil

e:

+3V

3

HW

CF

G0

OC

DS

[1..2]

/TR

ST

TC

LK

TM

ST

DI

/BR

K_IN

TD

O

TR

CL

K

1 2

C301

10u/1

0V

L301

10uH

+1V

5

/TR

ST

TC

LK

TM

S

TD

I

/BR

K_IN

_E

XT

+3V

3

R322

100K

R321

100K

R320

100K

R319

100K

R318

100K

R302

100K

R303

100K

R304

100K

R308

0R

_opt

R307

0R

_opt

R306

0R

_opt

R309

10K

HW

CF

G1

HW

CF

G2

1 2

C302

10u/1

0V

L302

10uH

VD

DO

SC

3

GN

D

VC

C1

4

OE

1

GN

D7

XT

AL

18

XT

AL

21

0

OE

4

VC

C1

1

XT

301

Cry

stal

20M

Hz

R316

opt

+3V

3

GN

DCB

301

10

0n

C303

18pF

C304

18pF

GN

D

GN

D

R317

0R

R315

0R

XT

AL

1

NO

TE

: S

301 is

for

boot

con

figu

rati

on

(ab

ou

t co

nfi

gu

rati

on

see

th

e T

C1130 m

an

ual)

.

Sw

itch

ON

mea

ns

the

corr

esp

on

din

g s

ign

al is

low

.

Sw

itch

OF

F m

ean

s th

e co

rres

pon

din

g s

ign

al is

hig

h.

XT

AL

2

P2_1

R301

100K

VD

DO

SC

+3V

3

GN

D

XT

AL

[1..2

]

XTAL1

XTAL2

R314

49R

9_opt

XTAL1

GN

D

CL

OC

K &

CO

NF

IG

XT

AL

1M

16

XT

AL

2N

16

HW

CF

G0

M14

HW

CF

G1

L14

HW

CF

G2

T6

TR

ST

T11

TC

KT

12

TD

IT

13

TD

OT

10

TM

ST

9

BR

KIN

T5

VD

DO

SC

3P

16

VS

SO

SC

L15

TR

CL

KT

8

JTA

G

OC

DS

VS

SO

SC

3R

16

VD

DO

SC

L16

U101B

TC

1130

GN

D

P2[0

..15]

HW

CF

G0

HW

CF

G1

HW

CF

G2

1 2 3 4 5 6 7 8

16

15

14

13

12

11

10

9

1

S302

SW

CF

G_L

1 2 3 4 5 6 7 8

16

15

14

13

12

11

10

9

1

S303

SW

CF

G_H

1A1

47

1A2

46

1A3

44

1A4

43

1A5

41

1A6

40

1A7

38

1A8

37

1O

E4

8

1D

IR1

1B

12

1B

23

1B

35

1B

46

1B

58

1B

69

1B

71

1

1B

81

2

VC

C7

GN

D4

2A1

36

2A2

35

2A3

33

2A4

32

2A5

30

2A6

29

2A7

27

2A8

26

2O

E2

5

2D

IR2

4

2B

11

3

2B

21

4

2B

31

6

2B

41

7

2B

51

9

2B

62

0

2B

72

2

2B

82

3

GN

D1

0

GN

D1

5

GN

D2

1

GN

D2

8

GN

D3

4

GN

D3

9

GN

D4

5

VC

C3

1

VC

C4

2V

CC

18

U301

74A

LV

CH

16245

GN

DG

ND

CB

302

10

0n

CB

303

10

0n

CB

304

10

0n

CB

305

10

0n

+3V

3

+3V

3

GN

D

GN

D

R313

4K

7C

305

18pF

GN

D

/HDRST

1 2 3 4 5 6 7 8

16

15

14

13

12

11

10

9

1

S301

DIP

SW

-8

GN

D

R312

10K

SH

DN

_1V

5

SH

DN

_3V

3S

HD

N_3V

3S

HD

N_1V

5+

5V

R305

100K

R310

10K

/PO

RS

T /PORST

BU

S..C

TR

L

/HD

RS

T

A/B

1

1A

2

1Y

4

2A

5

2Y

7

3A

11

3Y

9

4A

14

4Y

12

VC

C1

6G

ND

8G

15

1B

32B

63B

10

4B

13

U302

74L

VC

157A

/BR

K_IN

/BR

K_IN

_E

XT

R326

0R

_opt

CB

308

10

0n

+3V

3

GN

D

/BR

K_IN

+3V

3

GN

D

R311

100K

R325

0R

_opt

R324

0R

_opt

R323

0R

_opt

13

2

Q301

BC

858C

+3V

3

CB

306

10

0n

CB

307

10

0n

C306

10

n

C308

10

n

C307

10

n

GN

D

GN

D

GN

D

C309

10

n

GN

DN

OT

E:

For

norm

al

op

erati

on

R323,R

324, R

325 a

nd

R326 a

re a

ssem

ble

d.

U302 a

nd

Q301 o

nly

for

inte

rnal

test

ing.

RN

304

4K

7

RN

303

4K

7+

3V

3

RN

301

4K

7

RN

302

4K

7

GN

DP

1_

0P

1_

1P

1_

2P

1_

3P

1_

4P

1_

5P

1_

6P

1_

7

P1

_8

P1

_9

P1

_1

0P

1_

11

P1

_1

2P

1_

13

P1

_1

4P

1_

15

P1[0

..15]

GN

D

R3270R_opt

R3280R_opt

R3290R_opt

R3300R_opt

R3310R_opt

R3320R_opt

R3330R_opt

R3340R_opt R335

0R_optR336

0R_optR337

0R_optR338

0R_optR339

0R_optR340

0R_optR341

0R_optR342

0R_opt

+3V

3

GN

D GN

D

User’s Manual 8-5 V 1.2, 2004-06



Figure 8-5 Schematic - Peripherals (CAN and Ethernet PH4)

12

34

56

78

ABCD

87

65

43

21

D C B A

4In

fine

on T

echn

olog

ies

AG

AI

MC

MA

TM

Tho

mas

iusp

latz

D-8

1541 M

unic

hT

el.: +

49-8

9-23

4-0

11

27-A

pr-

2004

Num

ber

:

Dat

e:

She

et:

of

Tri

Board

TC

1130 P

erip

her

als

1.2

Rev

isio

n:

G:\

Tec

hnic

al_

Support

\Tri

Core

\Tri

Board

\ED

A\T

riB

oard

TC

1130\T

riB

oard

TC

1130.d

db -

Tri

Board

TC

1130 V

1.2

0\P

erip

her

ie.s

chF

ile:

+5V

R458

0R

GN

D

R466

120R

R460

0R

R461

0R

GN

D2

RX

D4

CA

NH

7

TX

D1

VC

C3

CA

NL

6

Rs

8

3V

35

U402

TL

E6250G

V33

R459

0R

+3V

3

+5V

R462

0R

GN

D

R467

120R

R464

0R

R465

0R

GN

D2

RX

D4

CA

NH

7

TX

D1

VC

C3

CA

NL

6

Rs

8

3V

35

U403

TL

E6250G

V33

R463

0R

+3V

3

R455

0R

1 3 5 7 9

2 4 6 8 10

X402

CA

N0

1 3 5 7 9

2 4 6 8 10

X403

CA

N1

GN

D

GN

D

BU

S..C

TR

L

P0.2

/ G

PT

U2 /

RX

D2B

P1

0

P0.3

/ G

PT

U3 /

TX

D2B

M15

P0.0

/ G

PT

U0 /

RX

D1B

N11

P0.4

/ G

PT

U4 /

SL

SI1

/ B

RE

QR

11

P0.1

/ G

PT

U1 /

TX

D1B

P1

5

P0.6

/ G

PT

U6 /

HO

LD

A /

CC

60_T

13H

R /

SL

SO

0_0

R10

P E

R I

P H

E R

A L

S 1

MII

_TX

CL

KT

2

P0.5

/ G

PT

U5 /

HO

LD

/ C

C60_T

12H

R /

BR

KO

UT

_B

R12

PO

RT

1

PO

RT

0

MII

_MD

IOR

1

P0.7

/ G

PT

U7 /

SL

SO

1_0

N10

P0.8

/ R

XD

CA

N0_A

/ R

EQ

0 /

TC

LK

0A

R13

P0.9

/ T

XD

CA

N0_A

/ R

EQ

1 /

TR

EA

DY

0A

R15

P0.1

0 /

RX

DC

AN

1_A

/ R

EQ

2 /

TV

AL

ID0A

R14

P0.1

1 /

TX

DC

AN

1_A

/ R

EQ

3 /

TD

AT

A0A

N9

P0.1

2 /

RX

DC

AN

2 /

RE

Q4 /

RC

LK

0A

P9

P0.1

3 /

TX

DC

AN

2 /

RE

Q5 /

RR

EA

DY

0A

P8

P0.1

4 /

RX

DC

AN

3 /

RE

Q6 /

RV

AL

ID0A

N8

P0.1

5 /

TX

DC

AN

3 /

RE

Q7 /

RD

AT

A0A

P7

P1.0

/ M

II_T

XD

0 / R

XD

CA

N0_B

/ S

WC

FG

0 / O

CD

SA

_0

D11

P1.1

/ M

II_T

XD

1 / T

XD

CA

N0_B

/ S

WC

FG

1 / O

CD

SA

_1

C12

P1.2

/ M

II_T

XD

2 / R

XD

CA

N1_B

/ S

WC

FG

2 / O

CD

SA

_2

D12

P1.3

/ M

II_T

XD

3 / T

XD

CA

N1_B

/ S

WC

FG

3 / O

CD

SA

_3

B12

P1.4

/ M

II_T

XE

R / S

WC

FG

4 / O

CD

SA

_4

C11

P1.5

/ M

II_T

XE

N / S

WC

FG

5 / O

CD

SA

_5

C13

P1.

6 / M

II_M

DC

/ S

WC

FG

6 / O

CD

SA

_6A

12

P1.

7 / M

II_R

XD

V / S

WC

FG

7 / O

CD

SA

_7B

13

P1.

8 / M

II_C

RS

/ S

WC

FG

8 / O

CD

SA

_8A

13

P1.

9 / M

II_C

OL

/ S

WC

FG

9 / O

CD

SA

_9A

14

P1.1

0 /

MII

_R

XD

0 /

SW

CF

G10 /

OC

DS

A_10

B14

P1.1

1 /

MII

_R

XD

1 /

SL

SO

0_1 /

SW

CF

G11 /

OC

DS

A_11

C14

P1.1

2 /

MII

_R

XD

2 /

SL

SO

1_1 /

SW

CF

G12 /

OC

DS

A_12

F13

P1.1

3 /

MII

_R

XD

3 /

SL

SO

0_2 /

SW

CF

G13 /

OC

DS

A_13

E14

P1.1

4 /

MII

_R

XE

R /

SL

SO

1_2 /

SW

CF

G14 /

OC

DS

A_14

D14

P1.

15 / S

LS

I0 / R

MW

/ S

WC

FG

15 / O

CD

SA

_15

F14

MII

_RX

CL

KR

2

U101D

TC

1130

RB

IAS

17

TP

FIP

23

VCCIO40

VCCIO8

VCCD51

VCCA21

VCCA22

LE

D / C

FG

13

8

GND25

GND18

LE

D / C

FG

23

7

LE

D / C

FG

33

6

TX_EN56

RX_DV49

GND50

XI

1

GND41

GND35

GND34

XO

2

GND7

SL

EE

P3

2

TMS29

TP

FIN

24

SD

/ T

P2

6

TP

FO

N2

0T

PF

OP

19

MDIO42

PW

RD

WN

39

TDI27

TCK30

TRST31

PA

US

E3

3

MDINT64

MDC43

MDDIS3

GND61

TX_CLK55

RE

SE

T4

TDO28

LX

T971A

GND11

AD

DR

01

2

AD

DR

11

3

AD

DR

21

4

AD

DR

31

5

AD

DR

41

6

TX

SL

EW

05

TX

SL

EW

16

TXD057

TXD158

TXD259

TXD360

RXD048

RXD147

RXD246

RXD345

RX_ER53

TX_ER54

RX_CLK52

COL62

CRS63

U401

DJL

XT

971A

LC

.A4

MII

_TX

CL

KM

II_R

XC

LK

MII

_MD

IO

GN

DC

B401

10

0n

CB

402

10

0n

CB

403

10

0n

CB

405

10

0n

CB

404

10

0n

GN

D

GN

D

+3V

3

FB

401

FE

RR

ITE

R447

120R

R448

120R

R427

4K7

+3V

3

C403

270pF

C404

270pF

GN

D

R450

49R

9

R449

49R

9

R426

4K7

GN

D

C405

10

nG

ND

FB

402

FE

RR

ITE

C401

18pF

C402

18pF

4

3

1

2

Y401

25M

Hz

GN

DG

ND

R425

4K7

GN

D

R418

4K7

R446

22K

1 1

%

R421

4K7

GN

DG

ND

GN

D

R405

opt

R422

4K7

GN

D

+3V

3

R403

opt

R416

4K7

GN

D

+3V

3

R42822RR429

22R R43022RR431

22R R43222RR433

22R R43422RR435

22R R43622RR437

22R R43822RR439

22R R44022RR441

22R R44222R

R44322R R444

22RR44522R

R420

4K7

R424

4K7

R419

4K7

R423

4K7

C406

10

0n

GN

D

R404

opt

R417

4K7

GN

D

+3V

3

R406

opt

R408

opt

R454

0R

R409

opt

R407

opt

R457

0R

R410

opt

R412

opt

R456

0R

R413

opt

R411

opt

MII_TXCLKMII_RXCLKMII_MDIO

R451

120R

12

D401

LE

D y

ello

w

R453

100K

+3V

3

NO

TE

: D

401

is a

tog

gle

LE

DG

ND

P0

_8

P1

_0

P0

_1

2

P0

_9

P1

_1

P0

_1

3

P0

_1

0

P1

_2

P0

_1

4

P0

_1

1

P1

_3

P0

_1

5

P0

_7

/HD

RS

T

MII

..

R402opt

R4154K7

GN

D

+3V

3

R401

0R

R4144K7

P0

_1

5

P0

_1

5

P0[0

..15]

P1[0

..15]

1 3

2

Q401

BC

858C

R452

10K

+3V

3

R468

0R

P1

_0

P1

_1

P1

_2

P1

_3

P1

_4

P1

_5

P1

_6

P1

_7

P1

_8

P1

_9

P1

_1

0P

1_

11

P1

_1

2P

1_

13

P1

_1

4P

1_

15

P0

_0

P0

_1

P0

_2

P0

_3

P0

_4

P0

_5

P0

_6

P0

_7

P0

_8

P0

_9

P0

_1

0P

0_

11

P0

_1

2P

0_

13

P0

_1

4P

0_

15

P1_0P1_1P1_2P1_3P1_4P1_5P1_6P1_7P1_8P1_9P1_10P1_11P1_12P1_13P1_14

TX

+2

TC

T1

RX

+4

TX

-3

RC

T6

RX

-5

LK

9L

A1

0

RA

8R

K7

SH

IEL

DS

X401

P36-1

03-1

1R

9

User’s Manual 8-6 V 1.2, 2004-06



Figure 8-6 Schematic - Debug System (OCDS1 and OCDS2)

12

34

56

78

ABCD

87

65

43

21

D C B A

5In

fine

on T

echn

olog

ies

AG

AI

MC

MA

TM

Tho

mas

iusp

latz

D-8

1541

Mun

ich

Tel

.: +

49-8

9-23

4-0

11

27-A

pr-2

004

Num

ber:

Dat

e:

She

et:

of

Tri

Boa

rd T

C11

30 O

CD

S1

and

OC

DS

2

1.2

Rev

isio

n:

G:\

Tec

hnic

al_S

uppo

rt\T

riC

ore\

Tri

Boa

rd\E

DA

\Tri

Boa

rd T

C11

30\T

riB

oard

TC

1130

.ddb

- T

riB

oard

TC

1130

V1.

20\O

CD

S.sc

hF

ile:

TM

S1

TD

O3

CP

U_C

LO

CK

5

TD

I7

TR

ST

9

TC

LK

11

BR

K_I

N1

3

NC

15

VC

C2

GN

D4

GN

D6

PO

RS

T8

BR

K_O

UT

10

GN

D1

2

OC

DS

_E1

4

KE

Y1

6

X501

OC

DS

1

+3V

3 GN

D

TM

ST

DO

TR

CL

KT

DI

/TR

ST

TC

LK

/BR

K_I

N_E

XT

/PO

RS

T/B

RK

_OU

T

GN

D

OC

DS

[1..2

]

R516

82R

R512

82R

R519

47R

R515

82R

R520

47R

R510

10K

5TD

I

5TM

S

5TC

LK

5/T

RS

T

5/B

RK

_IN

5/P

OR

ST

5/O

CD

S_E

GN

D

+5V

+3V

3

CB

501

10

0n

GN

D

R517

82R

R514

82R

R518

82R

R513

82R

TD

I

TM

S

TC

LK

/TR

ST

/BR

K_I

N_E

XT

12

D501

BA

T42

5/B

RK

OU

T

5T

DO

/BR

K_O

UT

TD

O

TC

K_L

OO

P

TC

K_L

OO

P

R501

120R

C501

3n

3

GN

D R521

2K2

+5V

C502

10

n

GN

D

BR

K_L

OO

P

BR

K_L

OO

P

13

25

12

24

11

23

10

22927

267 8651 432 21

20

19

18

17

16

15

14

P5

01

OC

DS

1

R511

10K

GN

D

G1

1A1

21Y

11

8

1A2

41Y

21

6

1A3

61Y

31

4

1A4

81Y

41

2

VC

C2

0

GN

D1

0

2Y

19

2Y

27

2Y

35

2Y

43

G1

9

2A1

11

2A2

13

2A3

15

2A4

17

U501

SN

74A

HC

244D

WGN

D

R502

10K

+5V

1 2 3

JP5

01

On

Boa

rd W

iggl

er

G1

1A1

21Y

11

8

1A2

41Y

21

6

1A3

61Y

31

4

1A4

81Y

41

2

VC

C2

0

GN

D1

0

2Y

19

2Y

27

2Y

35

2Y

43

G1

9

2A1

11

2A2

13

2A3

15

2A4

17

U502

SN

74A

HC

T24

4DW

+5V

CB

502

10

0n

GN

D

R50310K

R50410K

R50510K

R50610K

R50710K

+5V

R50810K

R50910K

+3V

3 TR

CL

K

ST

AT

US

1

ST

AT

US

3

BR

KP

T1

ST

AT

US

0

ST

AT

US

2

ST

AT

US

4B

RK

PT

0

BR

KP

T2

/PO

RS

T

PO

RS

T1

BR

KP

T2

2

EV

TI

3B

RK

PT

14

RS

TI

5M

DO

76

MD

I37

VC

C I

O8

MD

I29

BR

KP

T0

10

MD

I11

1S

TA

TU

S4

12

MD

I01

3S

TA

TU

S3

14

MC

KI

15

ST

AT

US

21

6

MS

EI

17

ST

AT

US

11

8

MC

KO

19

ST

AT

US

02

0

MS

EO

12

1M

DO

62

2

MS

EO

02

3M

DO

52

4

VR

EF

25

MD

O4

26

EV

TO

27

MD

O3

28

PC

P_P

C_O

R2

9M

DO

23

0

PC

P_B

RK

_OU

T3

1M

DO

13

2

BR

K_O

UT

33

MD

O0

34

BR

K_I

N3

5IN

D_P

C7

36

PO

RT

11

37

IND

_PC

63

8

PC

P_P

C8

39

IND

_PC

54

0

PC

P_P

C7

41

EM

UC

LK

60

IND

_PC

44

2

PC

P_P

C0

59

PC

P_P

C6

43

OC

DS

_L2_

EN

58

V. d

ef.

44

PC

P_P

C1

57

PC

P_P

C5

45

VC

C I

O5

6

V. d

ef.

46

PC

P_P

C2

55

PC

P_P

C4

47

IND

_PC

05

4

IND

_PC

34

8

PO

RT

35

3

PC

P_P

C3

49

IND

_PC

15

2IN

D_P

C2

50

PO

RT

45

1

X502

OC

DS

2_H

S

+3V

3

/BRK_IN_EXT

IND

_PC

7IN

D_P

C6

IND

_PC

5IN

D_P

C4

IND

_PC

3IN

D_P

C2

IND

_PC

1IN

D_P

C0

/BR

K_O

UT

/BR

K_I

N_E

XT

TD

I

TD

O

TC

LK

TM

S

/TR

ST

R522

0R_o

pt

R523

0R_o

pt

R524

0R

GN

D

R525

opt

R541

0R

R526

opt

R542

0R

R527

opt

R543

0R

R528

opt

R544

0R

R529

opt

R545

0R

R530

opt

R546

0R

R531

opt

R547

0R

R532

opt

R548

0R

R533

opt

R549

0R

R534

opt

R550

0R

R535

opt

R551

0R

R536

opt

R552

0R

R537

opt

R553

0R

R538

opt

R554

0R

R539

opt

R555

0R

R540

opt

R556

0R

R557

opt

R558

0R

P4

_7

P0

_5

P4[0

..7]

/BR

K_O

UT

BR

KP

T0

BR

KP

T1

BR

KP

T2

ST

AT

US

0

ST

AT

US

1

ST

AT

US

2

ST

AT

US

3

ST

AT

US

4

IND

_PC

0

IND

_PC

1

IND

_PC

3

IND

_PC

2

IND

_PC

4

IND

_PC

5

IND

_PC

6

IND

_PC

7

P3[0

..15]

BU

S..C

TR

L

P0[0

..15]

P1[0

..15]

P1

_0

P3

_0

P1

_1

P3

_1

P1

_2

P3

_2

P1

_3

P3

_3

P1

_4

P3

_4

P1

_5

P3

_5

P1

_6

P3

_6

P1

_7

P3

_7

P1

_8

P3

_8

P1

_9

P3

_9

P1

_1

0P

3_

10

P1

_1

1P

3_

11

P1

_1

2P

3_

12

P1

_1

3P

3_

13

P1

_1

4P

3_

14

P1

_1

5P

3_

15

User’s Manual 8-7 V 1.2, 2004-06



Figure 8-7 Schematic - Peripherals (ASC, SSC, ADC and USB)

12

34

56

78

ABCD

87

65

43

21

D C B A

6In

fine

on T

echn

olog

ies

AG

AI

MC

MA

TM

Thom

asiu

spla

tzD

-81541 M

unic

hT

el.: +

49-8

9-2

34-0

11

27-A

pr-

2004

Num

ber

:

Dat

e:

She

et:

of

Tri

Board

TC

1130 P

erip

her

als

an

d A

DC

1.2

Rev

isio

n:

G:\

Tec

hnic

al_

Support

\Tri

Core

\Tri

Board

\ED

A\T

riB

oard

TC

1130\T

riB

oard

TC

1130.d

db -

Tri

Board

TC

1130 V

1.2

0\p

erip

her

ie2.s

chF

ile:

P2.2

/ M

RS

T0

P13

P2.3

/ M

TS

R0

P14

P2.0

/ R

XD

0 /

CS

EM

UP

12

P2.4

/ S

CL

K0

N15

P2.1

/ T

XD

0 /

TE

ST

MO

DE

P11

P2.6

/ M

TS

R1A

/ C

C60_0

N12

P E

R I

P H

E R

A L

S 2

D+

T14

P2.5

/ M

RS

T1A

/ C

OU

T60_3

N14

PO

RT

3

PO

RT

2

D-

T15

P2.7

/ S

CL

K1A

/ C

OU

T60_0

K16

P2.8

/ R

XD

1A

/ C

C60_1

J16

P2.9

/ T

XD

1A

/ C

OU

T60_1

H16

P2.1

0 /

RX

D2A

/ C

C60_2

L13

P2.1

1 /

TX

D2A

/ C

OU

T60_2

G16

P2.1

2 /

SD

A0 /

CT

RA

P0 /

SL

SO

0_3

K15

P2.1

3 /

SC

L0 /

CC

PO

S0_0 /

SL

SO

1_3

K14

P2.1

4 /

SD

A1 /

CC

PO

S0_1 /

SL

SO

0_4

F16

P2.1

5 /

SC

L1 /

CC

PO

S0_2 /

SL

SO

1_4

E16

P3.0

/ C

OU

T61_3 /

OC

DS

B_0

A15

P3.1

/ C

C61_0 /

OC

DS

B_1

B15

P3.2

/ C

OU

T61_0 /

OC

DS

B_2

D15

P3.3

/ C

C61_1 /

OC

DS

B_3

E15

P3.4

/ C

OU

T61_1 /

OC

DS

B_4

G14

P3.5

/ C

C61_2 /

OC

DS

B_5

G15

P3.6

/ C

OU

T61_2 /

OC

DS

B_6

F15

P3.7

/ C

TR

AP

1 /

SL

SO

0_5 /

OC

DS

B_7

H14

P3.8

/ C

CP

OS

1_0 /

TC

LK

1 /

SL

SO

1_5 /

OC

DS

B_8

C15

P3.9

/ C

CP

OS

1_1 /

TR

EA

DY

1 /

SL

SO

0_6 /

OC

DS

B_9

H15

P3.1

0 /

CC

PO

S1_2 /

TV

AL

ID1 /

SL

SO

1_6 /

OC

DS

B_10

B16

P3.1

1 /

CC

61_T

12H

R /

TD

AT

A1 /

SL

SO

0_7 /

OC

DS

B_11

C16

P3.1

2 /

CC

61_T

13H

R /

RC

LK

1 /

SL

SO

1_7 /

OC

DS

B_12

D16

P3.1

3 /

MR

ST

1B

/ R

RE

AD

Y1 /

OC

DS

B_13

K13

P3.1

4 /

MT

SR

1B

/ R

VA

LID

1 /

OC

DS

B_14

J14

P3.1

5 /

SC

LK

1B

/ R

DA

TA

1 /

OC

DS

B_15

J15

PO

RT

4 P4.0

/ U

SB

CL

K /

TC

LK

0B

R8

P4.1

/ R

CV

1 /

TR

EA

DY

0B

R9

P4.2

/ V

PI

/ T

VA

LID

0B

N7

P4.3

/ V

MI

/ T

DA

TA

0B

N6

P4.4

/ V

PO

/ R

CL

K0B

P6

P4.5

/ V

MO

/ R

RE

AD

Y0B

R7

P4.6

/ U

SB

OE

/ R

VA

LID

0B

R6

P4.7

/ B

RK

OU

T_A

/ T

DA

TA

0B

P5

U101E

TC

1130

1 3 5 7 9

2 4 6 8 10

X601

AS

C1

CB

602

10

0n

GN

D

+3V

3C

601

10

0n

C602

10

0n

GN

D

C604

10

0n

C603

10

0n

GN

D

TX

D0

TX

D1

RX

D0

RX

D1

1 6 2 7 3 8 4 9 5 10

11

P6

01

RS

232-f

emal

e (A

SC

0)

HO

LD

7

WP

3

VC

C8

CS

1

GN

D4

SO

2

SC

K6

SI

5

U601

AT

25128N

-10S

I2.7

+3V

3

GN

DCB

601

10

0n

P2

_4

P2

_3

P2

_2

R632

10K

R631

10K

+3V

3

P2

_9

R1 I

N1

6

R2 I

N9

T1 I

N1

3

T2 I

N1

2

GN

D1

8V

+3

V-

7V

CC

19

R1 O

UT

15

R2 O

UT

10

T1 O

UT

17

T2 O

UT

8

C1+

2

C1 -

4C

2+

5

C2 -

6

EN

/RE

AD

Y1

SH

DN

/FO

RC

EO

FF

20

NC

/IN

VA

LID

11

NC

/FO

RC

EO

N1

4

U602

ICL

3225E

IAR

634

10K

R633

10K

R635

10K

GN

D

+3V

3

+3V

3

213

D601

BA

V99

213

D602

BA

V99

GN

D

+3V

3

GN

D

+3V

3

R641

22R

R640

22R

R637

1K

5

+3V

3

13 24

X602

US

B C

onnec

tor

VC

C4

OE

1

GN

D2

OU

T3

XT

601

48M

Hz_

opt

GN

D

GN

D

+3V

3

GN

DCB

606

100n_opt

R639

0R

_opt

P4

_0

+3V

3

R625

opt

VC

C1

6

D+

12

SO

FT

CO

N2

SU

SP

ND

7

GN

D8

VP

O1

3

VM

O1

4

OE

3

VP

U1

VR

EG

15

VP

5

VM

6

RC

V4

D-

11

SP

EE

D1

0

VC

CIO

9

U604

ISP

1106D

H_opt

R644

33R

_opt

R645

33R

_opt

R643

1K

5_opt

P4

_1

P4

_2

P4

_3

P4

_4

P4

_5

P4

_6

P4[0

..7]

R638

0R

_opt

R642

1K

5_opt

R647

4K

7_opt

R627

opt

R648

4K

7_opt

R629

opt

R628

opt

R649

4K

7_opt

+3V

3

GN

DG

ND

GN

D

+3V

3+

3V

3

CB

607

100n_opt

CB

608

100n_opt

+3V

3

GN

D

P3[0

..15]

R626

opt

R646

4K

7_opt

GN

D

+3V

3

R601

0R

R616

opt

R614

opt

R602

0R

R617

opt

R615

opt

R603

opt

R620

opt

R618

0R

R605

opt

R621

opt

R619

0R

R604

0R

P2[0

..15]

R636

100K

+3V

3

P2

_1

P2

_9

P2

_0

P2

_8

P2

_1

1

P2

_1

0

P2

_1

1

P2

_1

0

P0

_0

P0

_1

P0

_2

P0

_3

DV

DD

26

RE

FIN

1+

6

AG

ND

4

SC

LK

20

DIN

24

DG

ND

25

AIN

CO

M1

2

AIN

61

5

AIN

71

AIN

82

AIN

9 / R

EF

IN2+

13

AIN

10 / R

EF

IN2-

14

RE

SE

T1

9

P1

18

P2

16

XT

AL

12

8

XT

AL

22

7

CS

21

DO

UT

23

AIN

17

AIN

28

AIN

39

AIN

41

0

AIN

51

1

RE

FIN

1-

5

AV

DD

3

AG

ND

17

RD

Y2

2

U603

AD

7708B

R_opt

CB

604

100n_opt

CB

603

100n_opt

CB

605

100n_opt

C605

18pF

_opt

C606

18pF

_opt

4

3

1

2

Y601

32,7

86kH

z_opt

GN

DG

ND

VA

GN

D

VA

RE

F

L601

10uH

_opt

1 2

C607

10u/1

0V

_opt

VS

SA

GN

D

R612

0R

_opt

R606

0R

_opt

R607

0R

_opt

VA

DC

VS

SA

VA

DC

GN

D

+3V

3

+3V

3

AN

0A

N1

AN

2A

N3

AN

4A

N5

AN

6A

N7

AN

8A

N9

AN

CO

M

AN

[0..1

0]

BU

S..C

TR

L

/HD

RS

T

R613

0R

_opt

R608

0R

_opt

R622

opt

R609

0R

_opt

R623

opt

R610

0R

_opt

R624

opt

R611

0R

_opt

R630

opt

P2

_1

5

P2

_7

P2

_6

P2

_5

P3

_1

0

P3

_1

5

P3

_1

4

P3

_1

3

P2[0

..15]

P3[0

..15]

P0

_1

4

P0[0

..15]

P0[0

..15]

R650

10K

+3V

3

R651

10K

+3V

3

R652

10K

+3V

3

R653

10K

+3V

3

P2

_1

2P

2_

13

P2

_1

4P

2_

15

P2

_0

P2

_1

P2

_2

P2

_3

P2

_4

P2

_5

P2

_6

P2

_7

P2

_8

P2

_9

P2

_1

0P

2_

11

P2

_1

2P

2_

13

P2

_1

4P

2_

15

P3

_0

P3

_1

P3

_2

P3

_3

P3

_4

P3

_5

P3

_6

P3

_7

P3

_8

P3

_9

P3

_1

0P

3_

11

P3

_1

2P

3_

13

P3

_1

4P

3_

15

P4

_0

P4

_1

P4

_2

P4

_3

P4

_4

P4

_5

P4

_6

P4

_7

GN

D

GN

D

User’s Manual 8-8 V 1.2, 2004-06



Figure 8-8 Schematic - Power Supply

12

34

56

78

ABCD

87

65

43

21

D C B A

7In

fine

on T

echn

olog

ies

AG

AI

MC

MA

TM

Tho

mas

iusp

latz

D-8

1541 M

unic

hT

el.: +

49-8

9-23

4-0

11

27-A

pr-2

004

Num

ber

:

Dat

e:

She

et:

of

Tri

Board

TC

1130 P

ow

er s

up

ply

1.2

Rev

isio

n:

G:\

Tec

hnic

al_

Support

\Tri

Core

\Tri

Board

\ED

A\T

riB

oard

TC

1130\T

riB

oard

TC

1130.d

db -

Tri

Board

TC

1130 V

1.2

0\S

upply

.sch

Fil

e:

R718

270R

12

D705

LE

D g

reen

(3V

3)

+3V

3

GN

D

GN

D

CB

712

10

0n

CB

711

10

0n

CB

714

10

0n

CB

713

10

0n

GN

D

R708

0R

R707

0R

+1V

5

+3V

3

R717

620R

12

D704

LE

D g

reen

(5V

)

+5V

GN

D

GN

D

CB

715

10

0n

R709

0R

GN

D

+1V

5

GN

DCB

716

10

0n

CB

705

10

0n

CB

706

10

0n

CB

707

10

0n

CB

708

10

0n

PO

WE

R

VDDLG7

VDDLG8

VDDLG9

VDDLK10

VD

DP

D4

VD

DP

H4

VD

DP

M4

VD

DP

D13

VD

DP

J13

VD

DM

K8

VDDLG10

VD

DP

N13

VD

DM

K7

VD

DM

K9

VSSE4

VSSJ4

VSSN4

VSSE13

VSSH13

VSSM13

VSSH7

VSSH8

VSSH9

VSSH10

VSSJ7

VSSJ8

VSSJ9

VSSJ10

VD

DM

G13

U101A

TC

1130

GN

DG

ND

GN

D

CB

709

10

0n

GN

D

R722

120R

12

D706

LE

D r

ed (

RE

SE

T)

R720

4K7

+3V

3

C704

10

0n

5,5

V..60V

GN

D

1 2

D702

MB

RS

340T

3

1 2

C706

100u/6

.3V

L701

47uH

/2A

(D

O3340P

-473)

1

2

X701

PO

WE

RV

CC

_IN

12

D701

MB

RS

360T

3

R702

100K

R701

402K

+5V

+1V

5

1 2

C707

10u/1

0V

R715

8K

2 1

%

R716

30K

1%

CB

702

10

0n

VO

UT

3

RO

10

GN

D4

FB

2

SY

NC

5

GD

RV

12

EN

AB

LE

/ S

I_E

N1

SI_

GN

D6

SI

7

RD

8

SO

9

BD

S1

1

VS

13

CS

14

U701

TL

E6389G

V /

TL

E6389G

50-1

1 2

C705

47u/6

0V

C702

220nF

/100V

C701

220nF

/100V

GN

D

R713

0R

05

GN

D

C703

10

0n

GN

D

R705

0R

GN

D

R704

10K

2

1 3Q701

SP

D09P

06P

L

R706

82K

1%

GN

D

GN

D

GN

DR

714

27K

1%

GN

D

+5V

/PO

RS

T

R719

4K7

+3V

3

R723

240R

12

D703

LE

D g

reen

(+

1V

5)

+3V

3

GN

D

S701

RE

SE

T

GN

D

R721

82R

R703

10K

13

2Q

702

BC

848C

1 2

C708

4,7

u/1

0V

GN

DG

ND

+3V

3

R710

0R

R711

0R

_opt

GN

D

/HD

RS

T

/PO

RS

T

GN

D

13

2Q704

BC

848C

R724

82K

+1V

5

CB

704

10

0n

GN

D

VD

DP

CB

710

10

0n

VD

DL

GN

DCB

717

10

0n

GN

DCB

718

10

0n

VD

DM

BU

S..C

TR

L

R725

10K

+3V

3+

1V

5

GN

D

1

TP

703

VD

DP

_opt

1

TP

704

VD

DL

_opt

1

TP

705

VD

DM

_opt

SH

DN

_1V

5S

HD

N_1V

5

VC

C

1 3

2Q

703

BC

858C

R712

10K

+3V

3

+3V

3

1 2

C709

10u/1

0V

R727

43K

1%

R728

24K

1%

CB

703

10

0n

GN

DR726

10K

_opt

SH

DN

_3V

3S

HD

N_3V

3

13

2Q

705

BC

848C

R733

10K

R734

10K

GN

D

R731

0R

R732

0R

_opt

R735

0R

_opt

R736

0R

R729

0R

_opt

R730

0R

+5V

+5V

12

D707

PR

LL

5817+3V

3

1 32 4

TP

701

PO

WE

R_o

pt

+5V

OU

T1

3

RE

SE

T/P

G1

6

GND3

FB

/NC

15

EN

5

OU

T1

4IN

6

IN7

U702

TP

S76801Q

PW

P

OU

T1

3

RE

SE

T/P

G1

6

GND3

FB

/NC

15

EN

5

OU

T1

4IN

6

IN7

U703

TP

S76701Q

PW

P

R738

1K

R739

1K

R740

1R

5 1

W

R741

opt

BU

S..C

TR

L

R737

0R

_opt

/NM

I

12

D708

BA

T42

_opt

User’s Manual 8-9 V 1.2, 2004-06



Figure 8-9 Schematic - Connectors (Plug)

12

34

56

78

ABCD

87

65

43

21

D C B A

8In

fine

on T

echn

olog

ies

AG

AI

MC

MA

TM

Tho

mas

iusp

latz

D-8

1541

Mun

ich

Tel

.: +

49-8

9-23

4-0

11

27-A

pr-2

004

Num

ber:

Dat

e:

She

et:

of

Tri

Board

TC

1130 C

on

nec

tors

plu

g

1.2

Rev

isio

n:

G:\

Tec

hnic

al_

Support

\Tri

Core

\Tri

Board

\ED

A\T

riB

oard

TC

1130\T

riB

oard

TC

1130.d

db -

Tri

Board

TC

1130 V

1.2

0\C

onnec

tm.s

chF

ile:

AD

0A

D1

AD

2A

D3

AD

4A

D5

AD

6A

D7

AD

8A

D9

AD

10A

D11

AD

12A

D13

AD

14A

D15

AD

16A

D17

AD

18A

D19

AD

20A

D21

AD

22A

D23

AD

24A

D25

AD

26A

D27

AD

28A

D29

AD

30A

D31

AD

[0..3

1]

/WR

AL

E

/AD

V

NC

1_74

A[0

..23]

/RD

A0

A1

A2

A3

A4

A5

A6

A7

A8

A9

A10

A11

A12

A13

A14

A15

A16

A17

A18

A19

A20

A21

A22

A23

NC

1_60

/CS

3

/CS

2

/CS

0/B

C3

/BC

2/B

C1

/BC

0

NC

1_77

/WA

IT

P0

_5

P0

_4

BU

S..C

TR

L

GN

D

GN

D

NC

2_17

BF

CL

KO

/CS

EM

U/N

MI

P2

_0

P2

_1

P2

_3

P2

_2

/BA

A

NC

2_14

/HD

RS

T

/PO

RS

T

GN

D

BU

S..C

TR

L

VC

C_I

NV

CC

_IN

GN

DG

ND

GN

DG

ND

GN

D +3V

3

BU

S E

XP

AN

SIO

NP

ER

IPH

ER

AL

S

CA

PC

OM

/ G

PT

U /

ML

ITO

P

+3V

3

+3V

3+

3V

3

PL

UG

1 3 5 7 9 11

13

15

17

19

21

23

25

27

29

31

33

35

37

39

41

43

45

47

49

51

53

55

57

59

61

63

65

67

69

71

73

75

77

79

2 4 6 8 10

12

14

16

18

20

22

24

26

28

30

32

34

36

38

40

42

44

46

48

50

52

54

56

58

60

62

64

66

68

70

72

74

76

78

80

X801

SA

MT

EC

50M

IL_8

0/M

PL

UG

1 3 5 7 9 11

13

15

17

19

21

23

25

27

29

31

33

35

37

39

41

43

45

47

49

51

53

55

57

59

61

63

65

67

69

71

73

75

77

79

2 4 6 8 10

12

14

16

18

20

22

24

26

28

30

32

34

36

38

40

42

44

46

48

50

52

54

56

58

60

62

64

66

68

70

72

74

76

78

80

X802

SA

MT

EC

50M

IL_8

0/M

PL

UG

1 3 5 7 9 11

13

15

17

19

21

23

25

27

29

31

33

35

37

39

41

43

45

47

49

51

53

55

57

59

61

63

65

67

69

71

73

75

77

79

2 4 6 8 10

12

14

16

18

20

22

24

26

28

30

32

34

36

38

40

42

44

46

48

50

52

54

56

58

60

62

64

66

68

70

72

74

76

78

80

X804

SA

MT

EC

50M

IL_8

0/M

P4

_0

P4

_1

P4

_2

P4

_3

P4

_7

P4

_6

P4

_5

P4

_4

XT

AL

1

XT

AL

[1..2

]

XT

AL

2

P2

_1

2

P0

_0

P0

_1

P0

_2

P0

_3

P0

_4

P0

_5

P0

_6

P0

_7

RM

W

MR

/WP

0_

6

GN

DG

ND

P2

_1

4P

2_

13

P2

_1

2P

2_

15

P2

_8

P0

_1

0P

0_

11

P2

_7

P2

_6

P0

_9

P0

_8

P2

_9

P2

_4

NC

2_18

NC

2_52

BF

CL

KI

P2

_5

P0

_1

2P

0_

8P

0_

10

P0

_1

3P

0_

9P

0_

11

NC

1_54

NC

1_56

+3V

3+

3V

3

AD

C

VS

SA

NC

3_52

NC

3_54

NC

3_56

NC

3_58

NC

3_60

NC

3_62

NC

3_64

NC

3_66

NC

3_68

NC

3_76

P0

_1

2P

0_

14

NC

3[1

..80]

NC

3_49

NC

3_51

NC

3_53

NC

3_55

NC

3_57

NC

3_59

NC

3_61

NC

3_63

NC

3_65

NC

3_67

P0

_1

5

NC

3_72

NC

3_74

PL

UG

1 3 5 7 9 11

13

15

17

19

21

23

25

27

29

31

33

35

37

39

41

43

45

47

49

51

53

55

57

59

61

63

65

67

69

71

73

75

77

79

2 4 6 8 10

12

14

16

18

20

22

24

26

28

30

32

34

36

38

40

42

44

46

48

50

52

54

56

58

60

62

64

66

68

70

72

74

76

78

80

X803

SA

MT

EC

50M

IL_8

0/M

P0

_6

P2

_1

3P

2_

14

P2

_1

5P

2_

12

P3

_0

P3

_1

1P

3_

12

P3

_8

P3

_9

P3

_1

0P

3_

7N

C4_57

NC

4_59

P2

_1

3

P2

_1

4P

2_

15

NC

4_14

P2

_6

P2

_7

P2

_8

P2

_9

P2

_1

0P

2_

11

P2

_5

P0

_5

NC

4_16

NC

4_38

NC

4_40

NC

4_42

NC

4_44

NC

4_46

NC

4_48

NC

4_50

NC

4_52

NC

4_54

NC

4_56

NC

4_58

NC

4_60

NC

4[1

..80]

NC

4[1

..80]

P1

_1

0P

1_

11

P1

_1

2P

1_

13

MII

_TX

CL

KM

II_R

XC

LK

P1

_7

P1

_8

P1

_9

P2

_1

0P

0_

6

P1

_0

P1

_1

P1

_2

P1

_3

MII

_MD

IOP

1_

5P

1_

6P

1_

4P

1_

14

P2

_1

1

NC

3_71

NC

3_73

P0

_1

3P

1_

15

NC

4_18

NC

4_20

NC

1[1

..80]

GN

DG

ND

VS

SA

VA

DC

AN

0A

N1

AN

2A

N3

AN

4A

N5

AN

6A

N7

AN

8A

N9

AN

CO

MN

C3_27

NC

3_29

NC

3_31

NC

3_33

NC

3_35

VS

SA

VA

DC

VA

GN

DV

AR

EF

NC

3_41

NC

3_6

NC

3_8

NC

3_10

NC

3_12

NC

3_14

NC

3_16

NC

3_18

NC

3_20

NC

3_22

NC

3_24

NC

3_26

NC

3_28

NC

3_30

NC

3_32

NC

3_34

NC

3_36

NC

3_46

NC

3_50

NC

3_42

NC

3_44

AN

[0..1

0]

NC

2_75

P4[0

..7]

P3[0

..15]

P2[0

..15]

NC

2[1

..80]

MII

..

NC

2[1

..80]

MII

..

P0[0

..15]

P1[0

..15]

P0[0

..15]

P1[0

..15]

P0[0

..15]

P3

_1

P3

_2

P3

_3

P3

_4

P3

_5

P3

_6

P3

_8

P3

_9

P3

_1

0P

3_

11

P3

_1

2P

3_

13

P3

_1

4P

3_

15

User’s Manual 8-10 V 1.2, 2004-06



Figure 8-10 Schematic - Connectors (Socket)

12

34

56

78

ABCD

87

65

43

21

D C B A

9In

fine

on T

echn

olog

ies

AG

AI

MC

MA

TM

Tho

mas

iusp

latz

D-8

1541

Mun

ich

Tel

.: +

49-8

9-23

4-0

11

27-A

pr-2

004

Num

ber:

Dat

e:

She

et:

of

Tri

Boa

rd T

C11

30 C

onn

ecto

rs s

ock

et

1.2

Rev

isio

n:

G:\

Tec

hnic

al_S

uppo

rt\T

riC

ore\

Tri

Boa

rd\E

DA

\Tri

Boa

rd T

C11

30\T

riB

oard

TC

1130

.ddb

- T

riB

oard

TC

1130

V1.

20\C

onne

ctf.sc

hF

ile:

BO

TT

OM

SO

CK

ET

1 3 5 7 9 11

13

15

17

19

21

23

25

27

29

31

33

35

37

39

41

43

45

47

49

51

53

55

57

59

61

63

65

67

69

71

73

75

77

79

2 4 6 8 10

12

14

16

18

20

22

24

26

28

30

32

34

36

38

40

42

44

46

48

50

52

54

56

58

60

62

64

66

68

70

72

74

76

78

80

X901

SA

MT

EC

50M

IL_8

0/F

SO

CK

ET

1 3 5 7 9 11

13

15

17

19

21

23

25

27

29

31

33

35

37

39

41

43

45

47

49

51

53

55

57

59

61

63

65

67

69

71

73

75

77

79

2 4 6 8 10

12

14

16

18

20

22

24

26

28

30

32

34

36

38

40

42

44

46

48

50

52

54

56

58

60

62

64

66

68

70

72

74

76

78

80

X902

SA

MT

EC

50M

IL_8

0/F

SO

CK

ET

1 3 5 7 9 11

13

15

17

19

21

23

25

27

29

31

33

35

37

39

41

43

45

47

49

51

53

55

57

59

61

63

65

67

69

71

73

75

77

79

2 4 6 8 10

12

14

16

18

20

22

24

26

28

30

32

34

36

38

40

42

44

46

48

50

52

54

56

58

60

62

64

66

68

70

72

74

76

78

80

X903

SA

MT

EC

50M

IL_8

0/F

SO

CK

ET

1 3 5 7 9 11

13

15

17

19

21

23

25

27

29

31

33

35

37

39

41

43

45

47

49

51

53

55

57

59

61

63

65

67

69

71

73

75

77

79

2 4 6 8 10

12

14

16

18

20

22

24

26

28

30

32

34

36

38

40

42

44

46

48

50

52

54

56

58

60

62

64

66

68

70

72

74

76

78

80

X904

SA

MT

EC

50M

IL_8

0/F

AD

0A

D1

AD

2A

D3

AD

4A

D5

AD

6A

D7

AD

8A

D9

AD

10A

D11

AD

12A

D13

AD

14A

D15

AD

16A

D17

AD

18A

D19

AD

20A

D21

AD

22A

D23

AD

24A

D25

AD

26A

D27

AD

28A

D29

AD

30A

D31

AD

[0..3

1]

/WR

AL

E

/AD

V

NC

1_74

A[0

..23]

/RD

A0

A1

A2

A3

A4

A5

A6

A7

A8

A9

A10

A11

A12

A13

A14

A15

A16

A17

A18

A19

A20

A21

A22

A23

NC

1_60

/CS

3

/CS

2

/CS

0/B

C3

/BC

2/B

C1

/BC

0

NC

1_77

/WA

IT

P0

_5

P0

_4

BU

S..C

TR

L

GN

D

GN

D

NC

2_17

BF

CL

KO

/CS

EM

U/N

MI

P2

_0

P2

_1

P2

_3

P2

_2

/BA

A

NC

2_14

/HD

RS

T

/PO

RS

T

GN

D

BU

S..C

TR

L

VC

C_I

NV

CC

_IN

GN

DG

ND

GN

DG

ND

GN

D +3V

3

BU

S E

XP

AN

SIO

NP

ER

IPH

ER

AL

S

CA

PC

OM

/ G

PT

U /

ML

I

+3V

3

+3V

3+

3V

3

P4

_0

P4

_1

P4

_2

P4

_3

P4

_7

P4

_6

P4

_5

P4

_4

XT

AL

1

XT

AL

[1..2

]

XT

AL

2

P2

_1

2

P0

_0

P0

_1

P0

_2

P0

_3

P0

_4

P0

_5

P0

_6

P0

_7

RM

W

MR

/WP

0_

6

GN

DG

ND

P2

_1

4P

2_

13

P2

_1

2P

2_

15

P2

_8

P0

_1

0P

0_

11

P2

_7

P2

_6

P0

_9

P0

_8

P2

_9

P2

_4

NC

2_18

NC

2_52

BF

CL

KI

P2

_5

P0

_1

2P

0_

8P

0_

10

P0

_1

3P

0_

9P

0_

11

NC

1_54

NC

1_56

+3V

3+

3V

3

AD

C

VS

SA

NC

3_52

NC

3_54

NC

3_56

NC

3_58

NC

3_60

NC

3_62

NC

3_64

NC

3_66

NC

3_68

NC

3_76

P0

_1

2P

0_

14

NC

3[1

..80]

NC

3_49

NC

3_51

NC

3_53

NC

3_55

NC

3_57

NC

3_59

NC

3_61

NC

3_63

NC

3_65

NC

3_67

P0

_1

5

NC

3_72

NC

3_74

P0

_6

P2

_1

3P

2_

14

P2

_1

5P

2_

12

P3

_0

P3

_1

1P

3_

12

P3

_8

P3

_9

P3

_1

0P

3_

7N

C4_57

NC

4_59

P2

_1

3

P2

_1

4P

2_

15

NC

4_14

P2

_6

P2

_7

P2

_8

P2

_9

P2

_1

0P

2_

11

P2

_5

P0

_5

NC

4_16

NC

4_38

NC

4_40

NC

4_42

NC

4_44

NC

4_46

NC

4_48

NC

4_50

NC

4_52

NC

4_54

NC

4_56

NC

4_58

NC

4_60

NC

4[1

..80]

NC

4[1

..80]

P1

_1

0P

1_

11

P1

_1

2P

1_

13

MII

_TX

CL

KM

II_R

XC

LK

P1

_7

P1

_8

P1

_9

P2

_1

0P

0_

6

P1

_0

P1

_1

P1

_2

P1

_3

MII

_MD

IOP

1_

5P

1_

6P

1_

4P

1_

14

P2

_1

1

NC

3_71

NC

3_73

P0

_1

3P

1_

15

NC

4_18

NC

4_20

NC

1[1

..80]

GN

DG

ND

VS

SA

VA

DC

AN

0A

N1

AN

2A

N3

AN

4A

N5

AN

6A

N7

AN

8A

N9

AN

CO

MN

C3_27

NC

3_29

NC

3_31

NC

3_33

NC

3_35

VS

SA

VA

DC

VA

GN

DV

AR

EF

NC

3_41

NC

3_6

NC

3_8

NC

3_10

NC

3_12

NC

3_14

NC

3_16

NC

3_18

NC

3_20

NC

3_22

NC

3_24

NC

3_26

NC

3_28

NC

3_30

NC

3_32

NC

3_34

NC

3_36

NC

3_46

NC

3_50

NC

3_42

NC

3_44

AN

[0..1

0]

NC

2_75

P4[0

..7]

P3[0

..15]

P2[0

..15]

NC

2[1

..80]

MII

..

NC

2[1

..80]

MII

..

P0[0

..15]

P1[0

..15]

P0[0

..15]

P1[0

..15]

P0[0

..15]

P3

_1

P3

_2

P3

_3

P3

_4

P3

_5

P3

_6

P3

_8

P3

_9

P3

_1

0P

3_

11

P3

_1

2P

3_

13

P3

_1

4P

3_

15

User’s Manual 8-11 V 1.2, 2004-06



Figure 8-11 Schematic - Busdriver

12

34

56

78

ABCD

87

65

43

21

D C B A

10In

fine

on T

echn

olog

ies

AG

AI

MC

MA

TM

Tho

mas

iusp

latz

D-8

1541

Mun

ich

Tel

.: +

49-8

9-23

4-0

11

27-A

pr-2

004

Num

ber:

Dat

e:

She

et:

of

Tri

Board

TC

1130 E

BU

Port

Dri

ver

s

1.2

Rev

isio

n:

G:\

Tec

hnic

al_

Support

\Tri

Core

\Tri

Board

\ED

A\T

riB

oard

TC

1130\T

riB

oard

TC

1130.d

db -

Tri

Board

TC

1130 V

1.2

0\E

BU

-Dri

ver.

sch

Fil

e:

AD

0A

D1

AD

2A

D3

AD

4A

D5

AD

6A

D7

AD

8A

D9

AD

10A

D11

AD

12A

D13

AD

14A

D15

AD

16A

D17

AD

18A

D19

AD

20A

D21

AD

22A

D23

AD

24A

D25

AD

26A

D27

AD

28A

D29

AD

30A

D31

1A1

47

1A2

46

1A3

44

1A4

43

1A5

41

1A6

40

1A7

38

1A8

37

1O

E4

8

1DIR

1

1B

12

1B

23

1B

35

1B

46

1B

58

1B

69

1B

71

1

1B

81

2

VC

C7

GN

D4

2A1

36

2A2

35

2A3

33

2A4

32

2A5

30

2A6

29

2A7

27

2A8

26

2O

E2

5

2DIR

24

2B

11

3

2B

21

4

2B

31

6

2B

41

7

2B

51

9

2B

62

0

2B

72

2

2B

82

3

GN

D1

0

GN

D1

5

GN

D2

1

GN

D2

8

GN

D3

4

GN

D3

9

GN

D4

5

VC

C3

1

VC

C4

2V

CC

18

U1001

74L

VC

H16

245A

DG

G

1A1

47

1A2

46

1A3

44

1A4

43

1A5

41

1A6

40

1A7

38

1A8

37

1O

E4

8

1DIR

1

1B

12

1B

23

1B

35

1B

46

1B

58

1B

69

1B

71

1

1B

81

2

VC

C7

GN

D4

2A1

36

2A2

35

2A3

33

2A4

32

2A5

30

2A6

29

2A7

27

2A8

26

2O

E2

5

2DIR

24

2B

11

3

2B

21

4

2B

31

6

2B

41

7

2B

51

9

2B

62

0

2B

72

2

2B

82

3

GN

D1

0

GN

D1

5

GN

D2

1

GN

D2

8

GN

D3

4

GN

D3

9

GN

D4

5

VC

C3

1

VC

C4

2V

CC

18

U1002

74L

VC

H16

245A

DG

G

INT

_AD

0IN

T_A

D1

INT

_AD

2IN

T_A

D3

INT

_AD

4IN

T_A

D5

INT

_AD

6IN

T_A

D7

INT

_AD

8IN

T_A

D9

INT

_AD

10IN

T_A

D11

INT

_AD

12IN

T_A

D13

INT

_AD

14IN

T_A

D15

INT

_AD

16IN

T_A

D17

INT

_AD

18IN

T_A

D19

INT

_AD

20IN

T_A

D21

INT

_AD

22IN

T_A

D23

INT

_AD

24IN

T_A

D25

INT

_AD

26IN

T_A

D27

INT

_AD

28IN

T_A

D29

INT

_AD

30IN

T_A

D31

GN

DG

ND

GN

DG

ND

CB

1001

10

0n

CB

1002

10

0n

CB

1003

10

0n

CB

1004

10

0n

GN

D

+3V

3+

3V

3

CB

1005

10

0n

CB

1006

10

0n

CB

1007

10

0n

CB

1008

10

0n

GN

D

+3V

3+

3V

3

GN

DG

ND

CB

1009

10

0n

CB

1010

10

0n

CB

1011

10

0n

CB

1012

10

0n

GN

D

+3V

3+

3V

3

GN

D

CB

1013

10

0n

CB

1014

10

0n

CB

1015

10

0n

CB

1016

10

0n

GN

D

+3V

3+

3V

3

GN

DIN

T_A

0IN

T_A

1

INT

_A2

INT

_A3

INT

_A4

INT

_A5

INT

_A6

INT

_A7

INT

_A8

INT

_A9

INT

_A10

INT

_A11

INT

_A12

INT

_A13

INT

_A14

INT

_A15

INT

_A16

INT

_A17

INT

_A18

INT

_A19

INT

_A20

INT

_A21

INT

_A22

INT

_A23

A0

A1

A2

A3

A4

A5

A6

A7

A8

A9

A10

A11

A12

A13

A14

A15

A16

A17

A18

A19

A20

A21

A22

A23

INT

_/C

S0

INT

_/C

S3

/CS

0

/CS

3

GN

DG

ND

GN

DG

ND

CB

1017

10

0n

CB

1018

10

0n

CB

1019

10

0n

CB

1020

10

0n

GN

D

+3V

3+

3V

3

GN

D

R1005

0R

GN

D

GN

DG

ND

INT

_AL

E

INT

_/B

C0

INT

_/B

C1

INT

_/W

RIN

T_/

RD

INT

_/B

C2

INT

_/B

C3

INT

_/A

DV

INT

_/B

AA

AL

E

/BC

0/B

C1

/WR

/RD

/BC

2/B

C3

/AD

V/B

AA

BU

S..C

TR

L

BU

S..I

NT

INT

_A[0

..23]

INT

_AD

[0..3

1]

AD

[0..3

1]

A[0

..23]

INT

_BF

CL

KO

BF

CL

KO

INT

_MR

/W

1A1

47

1A2

46

1A3

44

1A4

43

1A5

41

1A6

40

1A7

38

1A8

37

1O

E4

8

1DIR

1

1B

12

1B

23

1B

35

1B

46

1B

58

1B

69

1B

71

1

1B

81

2

VC

C7

GN

D4

2A1

36

2A2

35

2A3

33

2A4

32

2A5

30

2A6

29

2A7

27

2A8

26

2O

E2

5

2DIR

24

2B

11

3

2B

21

4

2B

31

6

2B

41

7

2B

51

9

2B

62

0

2B

72

2

2B

82

3

GN

D1

0

GN

D1

5

GN

D2

1

GN

D2

8

GN

D3

4

GN

D3

9

GN

D4

5

VC

C3

1

VC

C4

2V

CC

18

U1003

74L

VC

H16

245A

DG

G

1A1

47

1A2

46

1A3

44

1A4

43

1A5

41

1A6

40

1A7

38

1A8

37

1O

E4

8

1DIR

1

1B

12

1B

23

1B

35

1B

46

1B

58

1B

69

1B

71

1

1B

81

2

VC

C7

GN

D4

2A1

36

2A2

35

2A3

33

2A4

32

2A5

30

2A6

29

2A7

27

2A8

26

2O

E2

5

2DIR

24

2B

11

3

2B

21

4

2B

31

6

2B

41

7

2B

51

9

2B

62

0

2B

72

2

2B

82

3

GN

D1

0

GN

D1

5

GN

D2

1

GN

D2

8

GN

D3

4

GN

D3

9

GN

D4

5

VC

C3

1

VC

C4

2V

CC

18

U1004

74L

VC

H16

245A

DG

G

1A1

47

1A2

46

1A3

44

1A4

43

1A5

41

1A6

40

1A7

38

1A8

37

1O

E4

8

1DIR

1

1B

12

1B

23

1B

35

1B

46

1B

58

1B

69

1B

71

1

1B

81

2

VC

C7

GN

D4

2A1

36

2A2

35

2A3

33

2A4

32

2A5

30

2A6

29

2A7

27

2A8

26

2O

E2

5

2DIR

24

2B

11

3

2B

21

4

2B

31

6

2B

41

7

2B

51

9

2B

62

0

2B

72

2

2B

82

3

GN

D1

0

GN

D1

5

GN

D2

1

GN

D2

8

GN

D3

4

GN

D3

9

GN

D4

5

VC

C3

1

VC

C4

2V

CC

18

U1005

74L

VC

H16

245A

DG

G

/WA

ITIN

T_/

WA

IT

MR

/W

/WA

IT

R1001

100K

+3V

3

INT

_/C

SC

OM

BIN

T_/

RD

INT

_/C

SC

OM

BIN

T_/

RD

R1004

0R

+3V

3

R1003

0R

+3V

3

INT

_/C

SC

OM

BIN

T_/

RD

INT

_/C

SC

OM

BIN

T_/

CS

CO

MB

INT

_/C

S2

/CS

2

INT

_BF

CL

KI

BF

CL

KI

P2

_0

/CS

EM

UR

MW

P1

_1

5

R1006

0R

BF

CL

KO

BF

CL

KI

R1002

68R

P2[0

..15]

P1[0

..15]

EN

_U

1005

R1007

4K7

+3V

3

21

J10

01

DIS

_U

1005

GN

D

User’s Manual 8-12 V 1.2, 2004-06



8.2 Layout

Figure 8-12 Component Plot Top Layer

User’s Manual 8-13 V 1.2, 2004-06



Figure 8-13 Component Plot Bottom Layer

User’s Manual 8-14 V 1.2, 2004-06



8.3 Layout with Dimensioning

The following dimensions should be used for development of extension boards.

Note: these are the pictures from the TriBoard TC10GP. Connectors X801...X804 are onthe same place.

Figure 8-14 Dimensioning (mil)

User’s Manual 8-15 V 1.2, 2004-06



Figure 8-15 Dimensioning (mm)

User’s Manual 8-16 V 1.2, 2004-06


Keyword Index

9 Keyword IndexThis section lists a number of keywords which refer to specific details of the TriBoardTC1130 in terms of its architecture, its functional units or functions. This helps to quicklyfind the answer to specific questions about the TriBoard TC1130.

Symbols/BRK_IN 5-2

Numerics16 MBytes external Intel Burst Flash 4-116 MBytes external Micron SyncFlash 4-216 MBytes external SDRAM 4-216 MBytes external ST Burst Flash 4-1CFG 5-232 MBytes external Intel Burst Flash 4-132 MBytes external SDRAM 4-264 MBytes external Intel Burst Flash 4-164 MBytes external SDRAM 4-28 MBytes external ST Burst Flash 4-1

AADC (optional) 4-4Analog Signals (optional) 7-3ASC 4-3

BBoot Configuration 5-1Burst FLASH 2-1Burst Flash 4-1BUS Control Signals 7-2BUS Signals 7-2

CCAN Pinout 8-8CLOCK 2-1Clock 4-1Clock Selection 5-3Clock Signals 7-1Configuration 5-1configuration switch 5-1

Connector for TC1130 8-2Connector Pin Assignment 8-1CPU 2-1CPU clock 4-1Crystal oscillator 4-1

DDebug Signals 7-2Debug System 4-4DIMENSION 2-1Dimensioning 9-15

EEthernet 4-3External clock 4-1

FFLASH 4-2Flash 4-1

GGeneral Connector 8-4

IINTERFACE 2-1Interrupt Signals 7-1

JJumper for On Board Wiggler 5-3Jumper Settings 5-3

LLayout 9-2, 9-13LED 4-4

User’s Manual 9-1 V 1.2, 2004-06


Keyword Index

Mmanual reset 4-1MEMORY 2-1Memory 4-1memory configurations 4-1MultiCAN 4-3

OOCDS Pinout 8-8OCDS1 2-1OCDS2 2-1On Board Wiggler 4-5, 5-3Optional Resistors 5-3oscillator circuit 4-1Other peripherals 4-4

PPC Start value 5-2PC100 SDRAM 2-1Peripheral Signals 7-3Peripherals 4-2PLL_CLC 5-3POWER 2-1Power Connector 8-6Power Signals 7-1power supply 4-1

Rreset 4-1Reset Signals 7-1Resistors for XTAL1 Operation 5-3Robinson Nugent 8-1RS232 2-1RS232 cable 4-3RS232 Pinout 8-6RS232 Transceiver 4-3

SSamtec 8-1Schematic 9-1Schematic and Layout 9-1SDRAM 4-2

Serial EEPROM 4-3Signal Description 7-1Software 6-1SSC 4-3status LED 4-4Supply 4-1SW Boot Configuration 5-2SyncFlash 2-1synchronous serial interface 4-3

TTC1130 2-1Toggle LED 4-4Transceiver 4-3TriBoard Software 6-1TriCore 2-1Type of Boot 5-2

UUSB 4-3

WWiggler 4-5

User’s Manual 9-2 V 1.2, 2004-06


Keyword Index

User’s Manual 9-3 V 1.2, 2004-06


Keyword Index

User’s Manual 9-4 V 1.2, 2004-06

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