turn-on performance comparison of current- source vs ... · the gate drive loop has no influence on...
TRANSCRIPT
Frank Wolfgang, Zheng ZiqingInfineon Technologies
Turn-on performance comparison of current-source vs. voltage-source gate drivers
Copyright © Infineon Technologies AG 2018. All rights reserved. 2
Content
Introduction
Gate driver boards
Double pulse test result
Summary
1
2
3
4
no marking
Copyright © Infineon Technologies AG 2018. All rights reserved. 3
Agenda
Introduction
Gate driver boards
Double pulse test result
Summary
1
2
3
4
no marking
What does “current-source” and “voltage-source” gate drivers mean?
› Current sources have a high resistive output by default.
› Any additional voltage drop in the gate drive loop has no influence on the gate current Ig (inside limits).
› Supposed to damp oscillations
› Voltage sources shall be as low resistive as possible.
› Any additional voltage drop in the gate drive loop has immediate influence on the gate current Ig.
› Prone to oscillations
Current source Voltage source
CGD
CGSCDS
RintLG
IG
LSC
Idr +
-
+-
Is
VDS
CGD
CGS
CDS
Rint
Ron
LGIG
LSC
Vdr+
-
+-
Is
VDS
Copyright © Infineon Technologies AG 2018. All rights reserved.
Comparison of gate driver IC functions
› Isolated gate driver
› Current source control for turn-on integrated
› Adjustability of swiching speed from input side on-the-fly
› DESAT
› Current sense input
› Optional Two-level turn-off
› Soft turn-off
› Precise output side monitoring
› Isolated gate driver
› 2 A output capability
› Adjustability of swiching speed by manual change of Rg
› DESAT
› ---
› Optional Two-level turn-off
› ---
› Limited output side monitoring
Current source (1EDS20I12SV) Voltage source (1ED020I12-F2)
Copyright © Infineon Technologies AG 2018. All rights reserved.
Copyright © Infineon Technologies AG 2018. All rights reserved. 6
Agenda
Introduction
Gate driver boards
Double pulse test result
Summary
1
2
3
4
no marking
Driver boards for FF1200R12IE5 1200 A / 1200 V power module
› The same design and layout philosophy applies to both designs
› Approximately the same number of components per board
Current source (1EDS20I12SV) Voltage source (1ED020I12-F2)
1EDS20I12SV
Bias spupply
Output buffer
Active clamping
1ED020I12-F2
Copyright © Infineon Technologies AG 2018. All rights reserved.
Copyright © Infineon Technologies AG 2018. All rights reserved. 8
Agenda
Introduction
Gate driver boards
Double pulse test result
Summary
1
2
3
4
no marking
Test bench and test pulse timing
VIN
T1
T2
D1
D2
L
iL(t)
iT(t)
iD(t)
vG2
vG2
tTon1 Ton2
ToffCapacitor bank
Wide bandwidth
Pearson probe
Power Module FF1200R12IE5
Gate driver board under
test
-9 V
Copyright © Infineon Technologies AG 2018. All rights reserved.
Switching waveform comparisonVDC = 600 V, IC = 120A, Tvj = 25°C
Level 1 Level 11Level 5
Curr
ent
sourc
e
(1ED
S20I1
2SV)
Voltage s
ourc
e
(1ED
020I1
2-F
2)
Rg = 4.7 W Rg = 2.2 W Rg = 0.4 W
Slow (3 V/ns) Normal (5 V/ns) Fast (9 V/ns)
200 V/div 200 V/div 200 V/div
500 V/div 500 V/div 200 V/div
Stronger tendency for oscillations
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Commutation speed (dvF/dt) comparison
› Current source IC keeps dv/dt constant over load range!
› Easy to obtain test results due to simple change of speed from input side
› Speed is a decreasing function because Rgint reduces driving voltage, thus the gate current
› Manual change of Rg for every branch of diagram
Current source (1EDS20I12SV) Voltage source (1ED020I12-F2)
Low load (dvF/dt) ≈5 V/ns @2.2 W
Low load (dvF/dt) ≈5 V/ns @ level5
Hi load (dvF/dt)
≈5 V/ns @ level5
Hi load (dvF/dt) ≈2.2V/ns @2.2 W
Copyright © Infineon Technologies AG 2018. All rights reserved.
Turn-on energy Eon comparison
› Turn-on energy is a linear function
› Turn-on energy is a non-linear function
Current source (1EDS20I12SV) Voltage source (1ED020I12-F2)
Current source method has much lower turn-on losses over load range when starting at the same low load condition !
Starting with <30mJ@120A
Ending with 140mJ@1200A
Starting with <30mJ@120A
Ending with 320mJ@1200A
Copyright © Infineon Technologies AG 2018. All rights reserved.
Copyright © Infineon Technologies AG 2018. All rights reserved. 13
Agenda
Introduction
Gate driver boards
Double pulse test result
Summary
1
2
3
4
no marking
Summary
The design effort of schematic and layout is equal for current source and voltage source gate driver boards.
Eon at full load (Inom) is less than 50% for the same dvF/dt condition at low load (1/10 Inom) when using the current source gate driver.
Current source gate drivers such as 1EDS20I12SV overcome parasitic effects which influence the gate drive loop.
Copyright © Infineon Technologies AG 2018. All rights reserved.