tutorial chapter 3 gate_level minimization part 2
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Tutorial Chapter 3 Gate_level Minimization Part 2. TA. Arwa Al Saad . 9 November 2013. NAND and NOR Implementation. - Digital circuits are frequently constructed with NAND or NOR gates rather than with AND and OR gates. NAND Circuits. - PowerPoint PPT PresentationTRANSCRIPT
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TUTORIAL CHAPTER 3GATE_LEVEL MINIMIZATIONPART 2
TA. Arwa Al Saad. 9 November 2013
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NAND and NOR Implementation
- Digital circuits are frequently constructed with NAND or NOR gates rather than with AND and OR gates.
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NAND Circuits NAND gate: a universal gate
– Any digital system can be implemented with it• including AND, OR and complement
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Steps of Implementation two levels NAND gates
1. Express simplified function in sum of products.
2. Change every AND in first level to AND-invert.3. Change OR in second level to AND-invert or
invert-OR4. Invert any single literal in the first level.
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Two-Level Implementation with NAND
sum of product expression and its equivalent
NAND implementation
F = AB + CD([ =AB(*’)CD’]’)
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Question#1 Draw a NAND diagram that implements
the following function: F(A,B,C)=∑(5,6,7):
F= AC+AB
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Diagram with AND,OR:
Diagram with AND-invert and invert-OR: Diagram with two AND-invert:
Question#1
F=((AC)’(AB)’)’F= AC+AB
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Steps of implementing Multilevel NAND Circuits1. Convert all AND gates to NAND gates with AND-
invert graphic symbols.2. Convert all OR gates to NAND gates with only invert-
OR graphic symbols.3. Check all the bubbles in the diagrams. For a single
bubble, invert an inverter (one-input NAND gate) or complement the input literal.
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NOR Circuite The NOR gate is anothar universal gate to
implement any Boolean Function.
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Steps of Implementation two levels NOR gates
1. Express simplified function in product of sum.2. Change every OR in first level to OR-invert.3. Change AND in second level to OR-invert or
invert-AND.4. Invert any single literal in the first level.
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Questions #2 Draw a NOR diagram that implements
the following function: F= (A+B)(C+D)E
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Questions #2Diagram with OR-invert and invert-AND:
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Steps of implementing Multilevel NOR Circuits
1. Convert all OR gates to NOR gates with OR-invert graphic symbols.
2. Convert all AND gates to NOR gates with only invert-AND graphic symbols.
3. Check all the bubbles in the diagrams. For a single bubble, invert an inverter (one-input NOR gate) or complement the input literal.
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Draw logic diagram with NOR gate for the following function:
F=(AB’ + A’B) (C+D’)
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Evolution 4 Draw a NAND logic diagram that
implements the following function: F(A,B,C,D)=∑(0,4,8,9,10,11,12,14)
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Q3.28
Derive the circuits for a three-bit parity generator and four-bit checker using an odd parity bit
0 means a correct transmission.
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Three-bit parity generator (odd) F=(X Y Z)’
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Four-bit parity checker(odd) F=(X Y Z)’
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DONE