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Twin Binary Sequences:A Non-Redundant Representation for General Non-Slicing Floorplan

Twin Binary Sequences:A Non-Redundant Representation for General Non-Slicing Floorplan

Evan YoungEvan YoungDepartment of Computer Science and EngineeringDepartment of Computer Science and Engineering

The Chinese Univ. of Hong KongThe Chinese Univ. of Hong Kong

Chris Chu Zion ShenChris Chu Zion ShenDepartment of Electrical and Computer EngineeringDepartment of Electrical and Computer Engineering

Iowa State UniversityIowa State University

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Types of Floorplanning Structures Types of Floorplanning Structures

• Slicing FloorplanSlicing Floorplan

• Mosaic FloorplanMosaic Floorplan

• General FloorplanGeneral FloorplanEmpty Room

Slicing

Mosaic

General

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Mosaic FloorplanMosaic Floorplan• Introduced by Hong et al. [ICCAD-00]Introduced by Hong et al. [ICCAD-00]• Mosaic Floorplan Representations:Mosaic Floorplan Representations:

– Corner Block List (CBL): Hong et al. [ICCAD-00]Corner Block List (CBL): Hong et al. [ICCAD-00]– Q-Sequence: Sakanushi & Kajitani [APCCAS-Q-Sequence: Sakanushi & Kajitani [APCCAS-

00]00]

• Advantages:Advantages:– Much smaller solution space compared with Much smaller solution space compared with

general floorplangeneral floorplan– Linear time floorplan realizationLinear time floorplan realization

• Disadvantage:Disadvantage:– Some floorplans are excluded, e.g., Some floorplans are excluded, e.g.,

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Extending Mosaic to GeneralExtending Mosaic to General• Dissect into more than m (>= n) roomsDissect into more than m (>= n) rooms• Include m-n Include m-n emptyempty rooms rooms

HoweverHowever• Don’t know where to assign the empty roomsDon’t know where to assign the empty rooms

– Assigning randomly results in redundant roomsAssigning randomly results in redundant rooms

• A large # of empty rooms needed to be insertedA large # of empty rooms needed to be inserted– In [ISPD-01], CBL is extended to cover the optimal In [ISPD-01], CBL is extended to cover the optimal

floorplan by inserting nfloorplan by inserting n22–n empty rooms –n empty rooms – Size of solution space is Size of solution space is

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Our ContributionsOur Contributions• Twin Binary Sequences (TBS)Twin Binary Sequences (TBS)

– a new representation for mosaic floorplana new representation for mosaic floorplan

• We know exactly where to insert irreducible We know exactly where to insert irreducible empty rooms for any given TBSempty rooms for any given TBS

• Every general floorplan can be obtained this Every general floorplan can be obtained this wayway

• Every general floorplan can be obtained Every general floorplan can be obtained from a unique TBSfrom a unique TBS

• Tight bound on the maximum # of empty Tight bound on the maximum # of empty rooms in a mosaic floorplanrooms in a mosaic floorplan

• A linear time floorplan realization algorithmA linear time floorplan realization algorithm

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Twin Binary Trees (TBT)Twin Binary Trees (TBT)

1 0

1 00 1 0 1

1

0 1

0

Labeling=100101 Labeling=011010

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TBT as Mosaic FP RepresentationTBT as Mosaic FP Representation• First suggested by Yao et al. [ISPD-01] to be First suggested by Yao et al. [ISPD-01] to be

used as a mosaic floorplan representationused as a mosaic floorplan representation

• However, However, – not easy to maintain the twin binary property when not easy to maintain the twin binary property when

we perturb the two treeswe perturb the two trees– more complicated to be implemented in computermore complicated to be implemented in computer

E

D F

BA

C

B

A E

C F

D

D

A F

EC

B

0

01

1

1 0

1

0 1

0

T1 T2

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Inorder Traversal and LabelingInorder Traversal and Labeling

Observation:Observation:Mosaic FP Mosaic FP A pair of binary trees with A pair of binary trees with

with same with same inorder traversalsinorder traversals and and complementary complementary

labelingslabelings

Inorder traversal: ABCDEF ABCDEFLabeling: 01101 10010

E

D F

BA

C

B

A E

C F

D

D

A F

EC

B

0

01

1

1 0

1

0 1

0

T1 T2

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Maintaining Twin Binary Property Maintaining Twin Binary Property • However, it is not sufficient to represent However, it is not sufficient to represent

a mosaic floorplan uniquely by:a mosaic floorplan uniquely by:– inorder traversal of modules inorder traversal of modules – labeling of T1 (= complemented labeling of T2)labeling of T1 (= complemented labeling of T2)

ED F

BA

C

B

A E

C F

D0

1

0 1

0

D

A F

EC

B

0

01

1

1

T1 T2A

D

F

EC

B

0

01

1

1

T1

BCD

F

EA

ABCDEF01101

ABCDEF01101

ABCDEF10010

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Directional BitsDirectional Bits• Given an inorder traversal and a labeling,Given an inorder traversal and a labeling,

a binary tree can be uniquely specified bya binary tree can be uniquely specified byadding adding directional bitsdirectional bits

Inorder traversal (): ABCDEFLabeling (): 01101

Directional bits (): 001001

D

A F

EC

B

0

01

1

10

00

1

1 0

Conditions on valid Conditions on valid ::Let Let ==1122......n-1n-1, , = = 1122......nn..For the bit sequence For the bit sequence 111122......n-1n-1nn,, (1) # of 0’s = # of 1’s + 1(1) # of 0’s = # of 1’s + 1 (2) # of 0’s >= # of 1’s for any prefix (2) # of 0’s >= # of 1’s for any prefix

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Twin Binary Sequences (TBS)Twin Binary Sequences (TBS)• Definition: Definition:

A twin binary sequence is a 4-tuple (A twin binary sequence is a 4-tuple (’) ’) s.t.s.t.

= inorder traversal of T1 and T2= inorder traversal of T1 and T2 = labeling(T1) = labeling= labeling(T1) = labelingCC(T2)(T2) = directional bits of T1= directional bits of T1

’’ = directional bits of T2= directional bits of T2

• Given a TBS, the mosaic floorplan can be Given a TBS, the mosaic floorplan can be constructed in O(n) time by a simple and constructed in O(n) time by a simple and efficient floorplan realization algorithmefficient floorplan realization algorithm

Theorem: There is a one-to-one mapping between twin binary sequences and mosaic floorplans.

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Size of Solution SpaceSize of Solution Space• One-to-one mapping between TBS and One-to-one mapping between TBS and

mosaic floorplanmosaic floorplan• So # of different TBS is given by Baxter So # of different TBS is given by Baxter

number (Yao et al. [ISPD-01])number (Yao et al. [ISPD-01])• Asymtotically, O(n! 2Asymtotically, O(n! 23n3n / n / n1.51.5))

n! permutations of module namesn! permutations of module names

’’

# of binary trees = # of binary trees = ((222n2n / n / n1.51.5))

O(2O(2nn) combinations) combinations

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Irreducible Empty RoomIrreducible Empty Room• An irreducible empty room is an empty room An irreducible empty room is an empty room

that cannot be removed by merging with that cannot be removed by merging with another room in the floorplan.another room in the floorplan.

• Irreducible empty room (X) must occur in Irreducible empty room (X) must occur in

reducibleempty room

irreducibleempty room

orX X

AD

BC

DA

CB

• wheel structure• A,B,C & D are not X

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Mapping Between Mosaic & General FPMapping Between Mosaic & General FP

• Mapping MMapping Mxx::

X

X

X XA

DB

C

DA

CB

A

BC

D A

B C

D

Theorem: Every general floorplan can be mapped by Mx

from one and only one mosaic floorplan.

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Change in TBT when Inserting XChange in TBT when Inserting X

• Only two ways to insert X into a tree:Only two ways to insert X into a tree:

X XA

DB

C

DA

CB

A

BC

D A

B C

D

C

D

A

B

T1 T2

C

B

A

D

T1 T2

C

X

A

X

D B

C

X

A

X

T1 T2

D B

T1 T2

A

B

A

B

A

X

A

X

B B

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Insertion and Matching of X in TBTInsertion and Matching of X in TBT

ABC

D E FD

T1

A

C

B

E

F

B

T2

A C

F

E

D

D

X

A

X

X

C

B

E

X

X

F

T1’

X

A

X

F

X

E

X

D

X

C

B

T2’

X0A0X0B1C1X1D0E0F1X1X

X0A1B0C0X0X0D1E1F1X1X

Inorder traversal + Labeling

T1’:

T2’:

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Different Ways of Matching X Different Ways of Matching X

A0B1C1X1D0E0FA1B0C0X0D1E1F

T1”:T2”:

D

T1”

A

X

C

E

F

B

B

T2”

A C

F

E

D

X

ABC

D EF

XA

BC

DE F

X

D

T1”

A

X

C

E

F

B

B

T2”

A C

F

D

X

E

Inorder traversal + Labeling

Match1st X

Match2nd X

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X Insertion AlgorithmX Insertion Algorithm• An efficient algorithm designed:An efficient algorithm designed:

– Without constructing any tree. Insert X to TBS Without constructing any tree. Insert X to TBS directly.directly.

– Linear timeLinear time

• Every general floorplan can be generated Every general floorplan can be generated uniquely from one mosaic floorplan and one uniquely from one mosaic floorplan and one way of matching Xway of matching X

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Bounds on # of X InsertedBounds on # of X Inserted• Upper bound: Upper bound: • Lower bound:Lower bound:

X

X

X

X

X

X

X

X

X

X

X

X

X

X

X

X

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Experimental SetupExperimental Setup• PC with 1400 MHz Intel Xeon Processor PC with 1400 MHz Intel Xeon Processor

and 256 Mb memoryand 256 Mb memory• Simulated annealing to perturb TBSSimulated annealing to perturb TBS• Best result out of 10 runs is reportedBest result out of 10 runs is reported

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Experimental ResultsExperimental Results• Area minimizationArea minimization

MCNCMCNCbenchmarkbenchmark

TBS (with X)TBS (with X) TBS (no X)TBS (no X)

%%DeadspaceDeadspace

Runtime Runtime (s)(s)

% % DeadspaceDeadspace

Runtime Runtime (s)(s)

apteapte 1.891.89 0.860.86 1.301.30 0.730.73

xeroxxerox 2.172.17 1.301.30 2.462.46 1.201.20

hphp 2.102.10 0.760.76 2.222.22 0.630.63

ami33aami33a 3.053.05 1.261.26 4.054.05 0.980.98

ami49aami49a 4.054.05 2.552.55 4.384.38 2.082.08

playoutplayout 6.206.20 2.582.58 7.607.60 1.091.09

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Experimental ResultsExperimental Results• Area and wirelength minimizationArea and wirelength minimization

MCNC MCNC benchbenchmarkmark

TBS (with X)TBS (with X) TBS (no X)TBS (no X)

%%DeadDeadspacespace

WireWirelengthlength CostCost

RunRuntimetime (s)(s)

%%DeadDeadspacespace

WireWirelengthlength CostCost

RunRuntimetime (s)(s)

apteapte 1.791.79 1265212652 9549295492 0.890.89 3.453.45 1326713267 9864298642 0.620.62

xeroxxerox 2.642.64 1493714937 3929539295 1.361.36 4.414.41 1473814738 3940539405 1.221.22

hphp 1.321.32 42464246 1829118291 0.730.73 3.433.43 42924292 1858718587 0.610.61

ami33aami33a 8.418.41 60786078 2600026000 1.301.30 7.257.25 64886488 2674226742 1.021.02

ami49aami49a 9.409.40 2966829668 8066080660 2.602.60 10.8210.82 3025630256 8210782107 2.142.14

playoutplayout 5.195.19 2.3732.373 93419341 2.502.50 6.326.32 2.2652.265 94549454 1.081.08

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Floorplan RepresentationsFloorplan Representations• SlicingSlicing

– Normalized Polish Expression: Wong & Liu [DAC-Normalized Polish Expression: Wong & Liu [DAC-86]86]

• Mosaic Mosaic – Corner Block List (CBL): Hong et al. [ICCAD-00]Corner Block List (CBL): Hong et al. [ICCAD-00]– Q-Sequence: Sakanushi & Kajitani [APCCAS-00]Q-Sequence: Sakanushi & Kajitani [APCCAS-00]

• GeneralGeneral– Polar graphs: Ohtsuki et al. [ICCST-70]Polar graphs: Ohtsuki et al. [ICCST-70]– Sequence pair: Murata et al. [ ICCAD-95]Sequence pair: Murata et al. [ ICCAD-95]– Bounded Slicing Grid (BSG): Nakatake [ICCAD-96]Bounded Slicing Grid (BSG): Nakatake [ICCAD-96]– Transitive Closure Graph (TCG): Lin & Chang Transitive Closure Graph (TCG): Lin & Chang

[DAC-01][DAC-01]