ultra-low k spin-on polymer; benefits, challenges and ... · thermal stability @ 450 oc < 1% /...
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SiLK *
Semiconductor Dielectric
S E M I C O N D U C T O R F A B M A T E R I A LS S E M I C O N D U C T O R F A B M A T E R I A LS
Ultra-Low k Spin-on Polymer;Benefits, Challenges and Solutions for
Damascene Integration
Don FryeSemiconductor Fab Materials
Dow Chemical Co.
SiLK *
Semiconductor Dielectric
S E M I C O N D U C T O R F A B M A T E R I A LS S E M I C O N D U C T O R F A B M A T E R I A LS
Acknowledgements
J. Hsu, S. Cummings, K. Foster, K. Itchhaporia, M. Mills, C. Mohler, A. Oshima, J.G. Song, J. Waeterloos, R. Woods
Ensemble* Dielectric Solutions Development Team
porous SiLK* Dielectric Development Team
SiLK* Semiconductor Dielectric Development Team
SFM Application Lab Team
* Trademark of The Dow Chemical Company
SiLK *
Semiconductor Dielectric
S E M I C O N D U C T O R F A B M A T E R I A LS S E M I C O N D U C T O R F A B M A T E R I A LS
ITRS 2001 - Dielectric needsYear of Production 2001 2004 2007 2010DRAM 1/2 PITCH (nm) 130 90 65 45Interlevel metal insulator - effective dielectric constant (k)
3.0 - 3.6 2.6 - 3.1 2.3 - 2.7 2.1 - 2.4
Interlevel metal insulator (minimum expected) - bulk dielectric constant (k)
< 2.7 < 2.4 <2.1 < 1.9
• K-effective is the goal ! ⇒ ILD material selection and integration choice is open
• Most companies will use the same low k ILD material for 2 technology generations but achieve a lower k-effective with a different integration scheme for the second generation. •Different low k materials can potentially leapfrog each other atsuccessive technology generations
SiLK *
Semiconductor Dielectric
S E M I C O N D U C T O R F A B M A T E R I A LS S E M I C O N D U C T O R F A B M A T E R I A LS
Low k Spin-on Polymers
Benzocyclobutene k = 2.7
Fluorinated Polyimide k = 2.5 - 2.9 *
Perfluorocyclobutane k = 2.4
Polyarylene k = 2.8
Polybenzoxazole k = 2.6 - 2.9 *
Polynorbornene k = 2.5
Polyphenylene k = 2.6
* anisotropic materials exist in these polymer families
SiLK *
Semiconductor Dielectric
S E M I C O N D U C T O R F A B M A T E R I A LS S E M I C O N D U C T O R F A B M A T E R I A LS
SiLK Semiconductor Dielectric Properties
Thermal Stability @ 450 oC < 1% / hr weight lossGlass Transition > 490 oCDielectric Constant @ 1 MHz 2.6 (isotropic)Refractive Index @ 633 nm 1.62Moisture Uptake (25 oC / 85% RH) < 0.24 % (wt)Expansion Coefficient 62 ppm / oC (50-150 oC)Film Stress @ 25 oC 60 MPa (tensile)Thermal Conductivity 0.23 W / mK @ 125 oCVoltage Breakdown > 4 MV/cmHardness (indentation) 0.29 GPaModulus (indentation) 3.6 MPaToughness 0.62 MPa m1/2
Strength (tensile) 93 MPa
This does not look like Oxide !
SiLK *
Semiconductor Dielectric
S E M I C O N D U C T O R F A B M A T E R I A LS S E M I C O N D U C T O R F A B M A T E R I A LS
Low k Spin-on Polymer Material Property Benefits
Initial Cu+ Drift Rates
105
106
107
108
109
1010
1011
1012
1013
1.4 1.6 1.8 2.0 2.2 2.4 2.6 2.8
300 250 200 150 100°C350
1000/Temperature (1/K)
Initi
al C
u+ Drif
t Rat
e (io
ns/c
m2 s)
PECVDoxynitride
(1.39 eV)
BCB (1.20 eV )
FPI (0.85 eV)
PAE (1.01 eV)
0.8 MV/cm
1.0 MV/cm
depositedoxide
(0.99 eV)
Ref: Loke et al., “Copper Drift in Low-K Polymer Dielectrics for ULSI Metallization,” presented at the 1998 Symposium on VLSI Technology (Honolulu, HI), June 9, 1998.
SiLK (0.97)
• Low k Spin-on Polymers have Cu drift rates approaching SiN and are more then 104 times lower then oxide or oxide based (OSG) ILD materials
SiLK *
Semiconductor Dielectric
S E M I C O N D U C T O R F A B M A T E R I A LS S E M I C O N D U C T O R F A B M A T E R I A LS
Low k Spin-on Polymer Material Property Challenges
• Modulus and hardness will decrease for all materials when voids (air) is introduced•At k<2.6, all ILD materials will have a modulus significantly less then the metal conductor (Cu)
Modulus vs. Dielectric
0
10
20
30
40
50
60
70
80
1.00 1.50 2.00 2.50 3.00 3.50 4.00Dielectric Constant
Mod
ulus
, GPa
SiO2SiLK*
SiLK *
Semiconductor Dielectric
S E M I C O N D U C T O R F A B M A T E R I A LS S E M I C O N D U C T O R F A B M A T E R I A LS
Low k Spin-on Polymer Material Property SolutionsFracture Toughness
0.0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5
Dielectric Constant
Toug
hnes
s, M
Pa-m
^1/2
OxideSiLK*
Aerogels
OSG
HSQ
OSG
SiO2
SiLK
PorousSiLK*
IncreasingCMP & Packaging
concerns
• Toughness determines CMP survivability not hardness or modulus for polymers. •Polymers have almost the same toughness as oxide and are significantly tougher then OSG materials at equivalent k values
SiLK *
Semiconductor Dielectric
S E M I C O N D U C T O R F A B M A T E R I A LS S E M I C O N D U C T O R F A B M A T E R I A LS
Low k Spin-on Polymer Integration Processes
Hybrid ILDHybrid ILD Buried Etch StopBuried Etch Stop Timed EtchTimed EtchIntegrationIntegration Integration IntegrationIntegration Integration
Technology AdvancementTechnology Advancement• Extendible K-effective roadmap• Leveraged development knowledge through multiple technology generations• CoO reduction roadmap
SiLK *
Semiconductor Dielectric
S E M I C O N D U C T O R F A B M A T E R I A LS S E M I C O N D U C T O R F A B M A T E R I A LS
Low k Spin-on Polymer Hybrid Integration Processes
SOPk=2.6
Oxide
SOPk=2.6
FSG
SOPk=2.1
OSG
Oxide FSG Oxide FSG OSGOSGHybrid ILDHybrid ILD Hybrid ILDHybrid ILD Hybrid ILDHybrid ILDIntegrationIntegration Integration IntegrationIntegration Integration
Technology AdvancementTechnology Advancement
• Extendible K-effective roadmap• Leveraged development knowledge through multiple technology generations• Multiple Low k strategy entry points
SiLK *
Semiconductor Dielectric
S E M I C O N D U C T O R F A B M A T E R I A LS S E M I C O N D U C T O R F A B M A T E R I A LS
Low k Spin-on Polymer Integration ModulesChallengeAvailability of integrated all spin-on dielectric stackDielectric Dep.
Lithography
Etch SolutionAll dielectric layers deposited sequentially with a single final cure per interconnect layer !
Clean
Metal Barrier
CMP
Packaging
Reliability
Extendibility
SiLK *
Semiconductor Dielectric
S E M I C O N D U C T O R F A B M A T E R I A LS S E M I C O N D U C T O R F A B M A T E R I A LS
Low k Spin-on Polymer Integration Modules
Dielectric Dep.
Lithography
Etch
ChallengeCompatibility with 248nm, 193nm, … photoresistSolutionMost low k spin-on polymer materials do not contain any amine (NH) structures nor are they prone to amine absorption during etch and clean processing !
Clean
Metal Barrier
CMP
Packaging
Reliability
Extendibility
SiLK *
Semiconductor Dielectric
S E M I C O N D U C T O R F A B M A T E R I A LS S E M I C O N D U C T O R F A B M A T E R I A LS
Low k Spin-on Polymer Integration Modules
Dielectric Dep.
Lithography
Etch
StandardAsh
Process• Bottom hardmask protects polymer during ash•Top hardmask is removed during CMP to lower k-effective
ChallengeAvailability of a photoresist rework process
SolutionDual Hard mask integration scheme !Clean
Metal Barrier
CMP
Packaging
Reliability
Extendibility
SiLK *
Semiconductor Dielectric
S E M I C O N D U C T O R F A B M A T E R I A LS S E M I C O N D U C T O R F A B M A T E R I A LS
Low k Spin-on Polymer Integration Modules
• Both “timed etch” and “buried etch stop”integration schemes have been demonstrated
ChallengeEtch of high aspect structures in damascene integrationDielectric Dep.
Lithography SolutionDual Hard mask materials offer an etch selectivity of greater then 20:1 !
Etch
Clean
Metal Barrier
CMP
Packaging
Reliability
Extendibility
Courtesy of Tokyo Electron, Ltd.
SiLK *
Semiconductor Dielectric
S E M I C O N D U C T O R F A B M A T E R I A LS S E M I C O N D U C T O R F A B M A T E R I A LS
Before wet clean processing After wet clean processing
Depending on the etch chemistryDepending on the etch chemistryPost etch clean removes this material prior to Post etch clean removes this material prior to metallizationmetallizationCleaning similar to dense SiLKCleaning similar to dense SiLK
Lithography
Etch
Clean
Metal Barrier
CMP
Packaging
Reliability
Extendibility
Porous SiLKDielectric Dep.
SiLK *
Semiconductor Dielectric
S E M I C O N D U C T O R F A B M A T E R I A LS S E M I C O N D U C T O R F A B M A T E R I A LS
Low-k Materials in CMPMinimum Toughness/Adhesion Threshold to survive CMP
Dielectric Dep.
Lithography
0
0.1
0.2
0.3
0.4
0.5
SiLK
TM
PQ-6
00
CVD
SOG
E
SOG
D
SOG
A
SOG
B
SOG
C
KC
(MPa
-m1/
2 )
Not Debonding Debonding
CMP Test Results*
Ohta et. al., JAPS Sept. 2000
Etch
Clean
Metal Barrier
CMP
Packaging
Reliability
Extendibility
SiLK *
Semiconductor Dielectric
S E M I C O N D U C T O R F A B M A T E R I A LS S E M I C O N D U C T O R F A B M A T E R I A LS
5
7
9
11
13
15
17
19
21
23
25
27
36 38 40 42 44 46 48
Ultrasonic Power(Arb. Units)B
ond
Forc
e (A
rb. U
nits
)
Cu/SiO2
Cu/Low-k• Higher Bond force is
necessary to ensure intimate contact between the wire and bond pad.
Dielectric Dep.
Lithography
Etch
Clean
Metal Barrier
CMP
Packaging
Reliability
Extendibility
• Inter metallic coverage and ball shear value was observed slightly less due to less efficient energy transfer to the wire/pad interface.
• With careful optimization of bond process parameter or wire bond pad design, good bond with tensile failure on the bond wire at the neck during wire pull can be achieved
V.Kripesh et.al., Institute of Microelectronics, ECTC 2002, May 28th -31st, San Diego, US
SiLK *
Semiconductor Dielectric
S E M I C O N D U C T O R F A B M A T E R I A LS S E M I C O N D U C T O R F A B M A T E R I A LS
Sequential Processing ModelingSequential Processing Modeling
Stacked Via Structure - FEA
SiLK(1)
Si
TaN(1) Cu(1)
SiN(1)
SiLK(2)
TaN(2) Cu(2)
SiN(2)
25
25
180
130
180
130
90
5000
7
• Simulation Stepsstep 1: SiLK(1) cured at 400C
step 3: Heat up to 350Cstep 2: Cool down to 20C
step 11: Heat up to 400C
step 9: Heat up to 350Cstep 8: Cu(1) plating
step 6: Cool down to 100Cstep 5: TaN(1) depositionstep 4: Numerical CMP of TaN(1)
step 7: Numerical CMP of Cu(1)
step 10: SiN(1) deposition
step 12: SiLK(2) cured at 400Cstep 13: Cool down to 20Cstep 14: Heat up to 350Cstep 15: Numerical CMP of TaN(2)
step 17: Cool down to 100Cstep 16: TaN(2) deposition
step 22: Cool down to 20C
step 18: Numerical CMP of Cu(2)step 19: Cu(2) platingstep 20: Heat up to 350Cstep 21: SiN(2) deposition
Dielectric Dep.
Lithography
Etch
Clean
Metal Barrier
CMP
Packaging
Reliability
Extendibility
SiLK *
Semiconductor Dielectric
S E M I C O N D U C T O R F A B M A T E R I A LS S E M I C O N D U C T O R F A B M A T E R I A LS
Stress of Stacked Via StructureStress of Stacked Via Structure
• Simulation Stepsstep 1: SiLK(1) cured at 400C
step 3: Heat up to 350Cstep 2: Cool down to 20C
step 11: Heat up to 400C
step 9: Heat up to 350Cstep 8: Cu(1) plating
step 6: Cool down to 100Cstep 5: TaN(1) depositionstep 4: CMP of TaN(1)
step 7: CMP of Cu(1)
step 10: SiN(1) deposition
step 12: SiLK(2) cured at 400Cstep 13: Cool down to 20Cstep 14: Heat up to 350Cstep 15: CMP of TaN(2)
step 17: Cool down to 100Cstep 16: TaN(2) deposition
step 22: Cool down to 20C
step 18: CMP of Cu(2)step 19: Cu(2) platingstep 20: Heat up to 350Cstep 21: SiN(2) deposition
-800
-600
-400
-200
0
200
400
step8 step9 step10 step11 step12 step13 step14 step15 step16 step17 step18 step19 step20 step21 step22A
xial
Str
ess
of C
u (M
Pa)
Cu(1)ViaCu(2)
SiLK *
Semiconductor Dielectric
S E M I C O N D U C T O R F A B M A T E R I A LS S E M I C O N D U C T O R F A B M A T E R I A LS
Stress during Thermal CycleStress during Thermal CycleAfter Step 22Dielectric Dep.
-1000
-800
-600
-400
-200
0
200
400
600
-100 0 100 200 300 400 500Temperature (C)
Axi
al S
tres
s of
Cu
Via
(MPa
)
Lithography
Etch
Clean
Metal Barrier
CMP
Packaging
Reliability
Extendibility
SiLK *
Semiconductor Dielectric
S E M I C O N D U C T O R F A B M A T E R I A LS S E M I C O N D U C T O R F A B M A T E R I A LS
Low k Spin-on Polymer Integration Modules
Extendibility is the key to maintaining pace with the ITRS and the IC Industry
Leveraging 70-80% of the process knowledge from the previous technology node is as important as high utilization of the existing tool set
Dielectric Dep.
Lithography
Etch
Clean
Metal Barrier
CMP
Packaging
Reliability
Extendibility
SiLK *
Semiconductor Dielectric
S E M I C O N D U C T O R F A B M A T E R I A LS S E M I C O N D U C T O R F A B M A T E R I A LS
Low k Spin-on Polymer ExtendibilityMicrostructure Challenges
Dielectric Dep.
Lithography
Etch
……mechanical integrity, mechanical integrity, dielectric performancedielectric performance
Uniform DistributionUniform Distribution
……protection from protection from electrical shortselectrical shorts
Small Pore SizeSmall Pore Size
andand
Clean
Metal Barrier
CMP
Packaging andandReliability
0.80.8
0.00.0
0.10.1
0.20.2
0.30.3
0.40.4
0.50.5
0.60.6
0.70.7
1.01.0 1.51.5 2.02.0 2.52.5 3.03.0 3.53.5 4.04.0 4.54.5
Dielectric ConstantDielectric Constant
Tou
ghn
ess,
MP
aTo
ugh
nes
s, M
Pa --
mm1/
21/
2
OxideOxide
SiLK*SiLK*
AerogelsAerogels
OSGOSG
HSQHSQ
OSGOSG
SiO2SiO2SiLK*SiLK*
PorousPorousSiLK*SiLK*
Fracture ToughnessFracture Toughnessandand
……protection from protection from trapped mat'ls, device trapped mat'ls, device yieldyield
Closed Pore SystemClosed Pore System
Potential for trapped chemicalsPotential for trapped chemicals
Extendibility
SiLK *
Semiconductor Dielectric
S E M I C O N D U C T O R F A B M A T E R I A LS S E M I C O N D U C T O R F A B M A T E R I A LS
Low k Spin-on Polymer Extendibility
Templated Pore SolutionTemplated Pore SolutionDielectric Dep.
Lithography
Etch "one poragen yields one pore""one poragen yields one pore"
Clean
Poragen ⇒ Pre-formed nano-particlesMetal Barrier
CMP Inherent advantages:
• doesn't rely on nucleation and growth• less process dependent
Technical challenges:• < 10 nm size is a new frontier • particles must be isolated• requires a metal free process
Packaging
Reliability
Extendibility
SiLK *
Semiconductor Dielectric
S E M I C O N D U C T O R F A B M A T E R I A LS S E M I C O N D U C T O R F A B M A T E R I A LS
Low k Spin-on Polymer Extendibility
Dielectric Dep.
Lithography
Etch
Clean
Metal Barrier
CMP
Packaging
Reliability
Extendibility
SiLK *
Semiconductor Dielectric
S E M I C O N D U C T O R F A B M A T E R I A LS S E M I C O N D U C T O R F A B M A T E R I A LS
Low k Spin-on Polymer Extendibility
Dielectric Dep.
Lithography
Etch
Clean
Metal Barrier
CMP
Packaging
Reliability
Extendibility
Porous SiLK Evolution: V1 Porous SiLK Evolution: V1 ⇒⇒ porous SiLK porous SiLK
V1 / V2V1 / V2 V3 / V4V3 / V4 V5V5
V6 / V7V6 / V7 V8V8 Porous SiLKPorous SiLK
SiLK *
Semiconductor Dielectric
S E M I C O N D U C T O R F A B M A T E R I A LS S E M I C O N D U C T O R F A B M A T E R I A LS
Low k Spin-on Polymer ExtendibilitySiLK V7 V8 Porous
SiLKK 2.65 2.35 2.20 2.10
Davg(nm) NA 25 16 < 10
Modulus(GPa @ 1 um) 3.6 2.8 2.7 2.8
Hardness(GPa @ 1 um) 0.27 0.17 0.16 0.15
CTE 62 62 62 ~ 62Toughness /
Adhesion(Mpa-m0.5)
> 0.35 > 0.35 > 0.35 > 0.35
ProcessTemperature
(oC)400 – 450 430 430 400
Chemistry SiLK SiLK SiLK SiLK
• Extendible material that leverages processing knowledge
Dielectric Dep.
Lithography
Etch
Clean
Metal Barrier
CMP
Packaging
Reliability
Extendibility
SiLK *
Semiconductor Dielectric
S E M I C O N D U C T O R F A B M A T E R I A LS S E M I C O N D U C T O R F A B M A T E R I A LS
Low k Spin-on Polymer Extendibility
0.0
0.3
0.5
0.8
1.0
0 5 10 15Diameter (nm)
Nor
mal
ized
Fra
ctio
n 8.2 nm mean diameter
0.99
0.992
0.994
0.996
0.998
1
16.0 16.5 17.0 17.5 18.0 18.5
0.6% > 2X Mean Size
Log-Normal Distributions for Porous SiLKTm
0.00E+00
5.00E-03
1.00E-02
1.50E-02
2.00E-02
2.50E-02
0 100 200 300
r (Å)
f(r) (
norm
aliz
ed)
V(9A)V9(B)V8
Dielectric Dep.
Lithography
Etch
Clean
Metal Barrier
CMP
Packaging
Reliability
Extendibility
• Continual reduction in pore size (closed) and pore size distribution•Good barrier metal integrity
SiLK *
Semiconductor Dielectric
S E M I C O N D U C T O R F A B M A T E R I A LS S E M I C O N D U C T O R F A B M A T E R I A LS
Pore Size Impact on Yield
Yield increase with decreasing pore size
Measurement ofleakage current
25 m meander line required to observe electrical differences (5025 m meander line required to observe electrical differences (50m effective length)m effective length)
SiLK *
Semiconductor Dielectric
S E M I C O N D U C T O R F A B M A T E R I A LS S E M I C O N D U C T O R F A B M A T E R I A LS
SummaryChallenges for Low k Spin-on Polymers
Polymer mechanical properties are not like oxide and will require different integration and design mindset
Benefits of Low k Spin-on Polymers (SiLK)Chemistry is unchanged since the mid 1990’s
Compatible with all existing process modules and tools
Extendible versions, lower dielectric constant (k=2.1), are already available
Existing materials meet ITRS targets for k and k-effective through 45nm technology
Have passed full reliability qualification at 130nm and 90nm
In manufacturing at 130nm already