ultralow residue (ulr) semiconductor grade fluxes for
TRANSCRIPT
36th International Electronic Manufacturing Technology Conference, 2014
Ultralow Residue (ULR) Semiconductor Grade Fluxes for Copper Pillar Flip-Chip
SzePei Lim, Jason Chou, Maria Durham, Dr. Hyoryoon Jo, and Dr. Andy Mackie
Indium Corporation
Clinton, NY, USA
[email protected], [email protected], [email protected], [email protected], [email protected]
Abstract
Copper pillars topped with solder microbumps are
emerging as a standard flip-chip solderbump replacement in
the semiconductor assembly industry. The relentless drive
towards finer pitch, combined with reduced copper pillar
height, makes aqueous cleaning of flip-chip flux residues
more difficult. An emergent failure mode is joint damage
during aqueous jet impingement.
The move towards Semiconductor Grade ultralow
residue no-clean fluxes and away from cleaning processes is
therefore inevitable, and this paper discusses the testing of
assembly materials for this purpose.
1. Introduction
The most recent edition of the International Technology
Roadmap for Semiconductors (ITRS) [ref. 1] shows that
package pitches, cost per I/O, die thickness and overall
package thickness will all see significant reductions in the
remainder of the millenium [Fig. 1].
Year of Mass production = 2014 2016 2018 2020 Units
Transistor (T1)
MPU 1/2 Gate Length
after etch 18 15 13 11 nm
Wafer
Die thickness (min) -
Extremely thin packages 10 5 5 5 microns
Cost per I/O for OSAT
production (minimum cost) 0.36 0.34 0.32 0.3 (USD$/pin/100)
Chip Area 100 100 100 100 mm^2
Package pin count 207 - 1100 218 - 1150 252 - 1150 278-1150 number of I/O
Package profile or
thickness (minimum) 0.22 - 0.40 0.20 - 0.35 0.19 - 0.35 0.19 - 0.35 mm
Junction temperature - Tj
(maximum) 105 105 105 105 degC
Operating temperature -
ambient (maximum) 45 45 45 45 degC
Mobile Device
Packages
Single Chip Package Technology Requirements for Mobile Devices
Figure 1: Package Changes 2014-2020 from ITRS
The stress caused by the CTE mismatch between the
substrate and die is exacerbated by reduced die/substrate
clearances, and for this reason, as well as avoidance of
electromigration issues, electroplated copper/pillar
microbumps are becoming standard, replacing the more
common solder bumps [ref. 2].
Flip-chip assembly onto substrates using solder has
typically been carried out by either spraying oxide-removing
flux onto the substrate; dipping the die bumps into flux; or
occasionally, both [Fig. 2]. In most instances, the flux used
has been able to be cleaned away using water or an aqueous-
based solvent system. However, the combination of large
die, finer pitch, and reduced clearances has led to increased
complexity in ensuring adequate cleaning [ref. 3].
Figure 2: Typical Flip-Chip Flux Application Methods
2. Characteristics of Ultralow Residue Fluxes
Ultralow residue (ULR) no-clean fluxes have several
characteristics that are critical to their functionality, such as
rheology, residue level, solderability, the ability to retain die
in place, and compatibility of the final residue with molded
underfill (MUF) and capillary underfill (CUF).
Rheology of the flux is important in several different
aspects of the flux behavior, such as flux-reservoir height
(that is, the actual measured flux height); ability to remove
die from the flux dipping reservoir; consistent dipping
performance; and ability to hold the die in place during
placement and reflow (so-called “MDR” – movement during
reflow).
If the viscosity is too low, flux may wick up the
bump/copper pillar and contaminate the die surface. If
viscosity is too high, it may lead to bridging [Fig. 3]. If the
tack (extensional viscosity) is too high, it may even make it
impossible to remove the device from the flux dipping
reservoir.
Please note that viscosity is only one of the rheological
characteristics of a flux, and only for a Newtonian material is
the viscosity independent of the shear rate; fluxes are mostly
non-Newtonian. Therefore the use of this single point
measurement, although common, is not recommended for
complete characterization, but may be used as a “shorthand”
for many different rheological parameters [ref. 4].
36th International Electronic Manufacturing Technology Conference, 2014
Figure 3: Flux Rheology for Fine-Pitch Dipping
All fluxes leave behind a certain amount of material after
reflow, called “flux residue”. ULR no-clean flux is designed
to provide the same functionality as both standard (high-
residue) no-clean fluxes and watersoluble types, and leaves
almost undetectable amounts of flux residue. Because the
level is so low, free flow of the CUF/MUF is enabled,
minimizing the risk of void formation and delamination. If
the residue chemistry is compatible with the underfills, then
delamination during subsequent thermal cycling and other
stress testing is avoiding.
As with most fluxes, the purpose of the flux is to promote
good solderability (wetting) between two surfaces. It does
this by reacting with metal oxides, making a salt that then
dissolves into the remainder of the flux residues (away from
the joint), leaving clean metal surfaces, and allowing the
formation of intermetallics that drives the formation of a
strong bond between the cooled solder and the underlying
metal.
If the solderability of flux is insufficient, it will lead to
weak joint formation and/or voiding, whereas, if the flux
solderability is excessive it may, in certain instances, lead to
bridging. Hence the solderability of flux must be optimized
to promote good wetting without causing solder bridging
between adjacent I/Os.
It is important for the flux to be able to retain the flipped
die in place during reflow, to minimize die-skew. A test
method (the MDR test) designed to study the movement of
solder on flux during the reflow process is studied in this
paper.
Underfill compatibility is becoming a growing concern as
clearances and the pitch of flip-chips is getting tighter, as
discussed previously.
3. Experiment and Discussion
Rheology: A Brookfield Cone and Plate Viscometer was
used to measure the viscosity of the flux as a function of
time. The spindle used was a CP-51 and measurements were
taken at 25°C at 20RPM. The results for a few versions of
the ULR no-clean fluxes are shown in Figure 4.
Figure 4: Flux Stability shown by Viscosity versus Time
For this study three different versions of the ULR no-
clean fluxes were tested and have consistent viscosity over a
period of 10 hours, which is more than a single shift. After
each shift, the user is advised to clean the flux tray and
replenish with fresh flux, this is to ensure consistent flux
dipping performance is achieved. The rheology (viscosity or
tack) of a flux can be fine-tuned to suit the specific
application, package configuration and equipment capability.
Residue Level: The ULR no-clean flux was compared to
a standard flux residue before and after reflow was explored.
Figure 5 shows the results.
Figure 5: Visual Comparison of Flux Residue Types
Thermal Gravimetric Analysis (TGA) (equipment: TA
Instruments SDT Q600) is used to measure the amount of
flux residue after reflow. This test is done by using a ramp
rate of 10°C/min, with 10mg±1mg sample size, and nitrogen
flow of 100ml/min. The results are shown in Figure 6. Two
different ULR no-clean fluxes (NC-826 and NC-26-A) and
one standard residue flux (Tacflux007) are used to show the
differences in residue levels.
36th International Electronic Manufacturing Technology Conference, 2014
Figure 6: Results of TGA
As shown in Figure 5, there was little or no residue
visible from the ULR flux, whereas with the standard residue
material there was clearly still some flux present. Figure 6
confirms this: at a standard reflow peak temperature range of
235-250°C, the ULR no-clean fluxes have about 10% or less
residue in comparison to about 50% for the standard residue
flux. However, the TGA test is unrepresentative of real
situations for flip-chip flux. The exposed surface area is
much smaller in TGA than for most real flip-chip
applications. In most reflow conditions, the flip-chip fluxes
should therefore leave lower residue levels than shown here.
Solderability: Testing for solderability was done by
printing flux onto a metallized coupon using a stencil, then
96.5Sn3Ag0.5Cu (SAC305) 28mil solder spheres were
placed onto the flux using an automated pick & place
machine. The metallized coupon with the printed flux and
sphere was then reflowed in a BTU oven in a nitrogen-
purged environment at <500ppm O2.
After reflow, solder wetting is calculated from
measurement of the height of the solder bump, and the solder
spread ratio (%) is calculated using the below equation:
S = [(D-H)/H] * X100
Where: S = Spread factor
D = Initial sphere diameter
H = Post-reflow solder height (1)
The results of the solderability test are show in figure 7.
Figure 7: Results of Solderability Test
Three different ULR no-clean fluxes (NC-26-A, NC-510,
and NC-826), one standard residue no-clean flux
(TacFlux007), and one water-soluble flux (WS-575-A) were
used in this test. Typically the standard residue no-clean
flux and water-soluble flux will have better wetting. As
shown in figure 7, NC-826 ULR flux wetting behavior is
close to the WS-575-A water soluble flux. Depending on the
application and the solderability requirement, a suitable ULR
no-clean flux can be chosen.
Movement During Reflow (MDR): The ability of the
flux to hold die in place during reflow was studied by using a
proprietary “movement during reflow” (MDR) test. This
used the same test setup as the solderability test. The results
are shown in figure 8.
Figure 8: Results of the MDR Test
Same as the solderability testing, three different ULR no-
clean fluxes (NC-26-A, NC-510, and NC-826), one standard
residue no-clean flux (TacFlux007), and one water-soluble
flux (WS-575-A) were again used. The results shown in
figure 8 show that Tacflux007 has the least movement during
reflow, as is typical for a standard residue flux. However a
standard flux will have a high residue, partially-filling the
area under the chip, and so making it impossible to get a
void-free underfilling process.
Two of the ULR no-clean fluxes, NC-26-A and NC-826
show a similar amount of movement to that seen when using
the water soluble flux WS-575-A, which is generally
acceptable for most applications.
Compatibility with MUF/CUF: In this study for
underfill compatibility, two different test methods were used.
The first test (Test 1) is used as a more visual aid with a
copper lead frame and glass slide, whereas the second test
(Test 2) was used to evaluate the shear strength.
Test 1a: Tape Test (No T/C): To test the compatibility of
underfill using an adhesive tape test method, a thin film of
flux was spread onto a glass microscope slide. Flux was
then placed onto a copper leadframe and heated on a hot
plate at 240°C for 10-15 seconds. Two leadframes were
used: one with a ULR no-clean flux (NC-26-A) and one as a
control (no flux). After being removed from the hot plate
the leadframes were then placed on a microscope slide. CUF
is then deposited and cured under the recommended
conditions. A visual check (eye and optical microscope) was
used to check the sample surface. A peel/adhesion test was
then performed by placing adhesive tape on the sample
surface then tearing it off to check the adhesion of the
interface.
36th International Electronic Manufacturing Technology Conference, 2014
This test showed no voiding or delamination between the
interface for both the ULR no-clean flux sample, and the
control sample.
Test 1b: Tape Test (with Thermal Cycle): The samples
were initially prepared in the same way as in Test 1a. The
glass slide was then treated with either no bake (control),
baking at 180°C for 1 hour, or baking at 180°C for 3 hours.
After the bake treatment the underfill was deposited and
cured under the recommended curing conditions.
After cure, the underfill was again checked by eye and
OM. An adhesive tape test was performed, tearing it off the
sample surface to check the adhesion of the interface. SEM
cross-sections are then used to check the interface.
Checking by eye and optical microscope showed no void
or delamination between the interface for flux on glass slide
sample. The adhesive tape test also showed before and after
the test a smooth surface with no film delamination.
Test 1b: SEM Inspection: The SEM cross section on the
three post-reflow treatment condition samples: the control
(no baking), baking at 180°C for 1 hour, and baking at
180°C for 3 hours the results are shown in figure 9. The
interface between underfill and glass slide shows no voids or
delamination. Post thermal cycle also shows the good
compatibility result with no voids or delamination issue.
Figure 9: SEM Cross Sections: Before and After Thermal
Cycling
Test 2: Shear Strength Test. The interfacial shear
strength test of the ULR no-clean flux NC-26-A was also
used to evaluate the compatibility between flux residue with
the MUF and CUF by using a MTS Alliance RT/10. The
compatibility is related to the chemistry between flux residue
and the underfill. Therefore the degree of compatibility can
be varied by applying different materials. For each shear
strength measurement, one combination of flux and underfill
(five samples of each) was tested.
For this test there were three test parameters: open
surface of flux, sandwich shape, and a blank substrate for the
control.
Open: For the open surface of flux test, flux was applied
on the top of the substrate, then reflowed under a typical
lead-free reflow profile using a BTU reflow oven. Underfill
was then applied between the substrate and cured under the
recommended conditions.
Sandwich: As in the previous tests, flux was applied on
each of two substrates. These substrates were then plcaed
together in a sandwich, then treated at 180°C for 3 hours.
After treatment, underfill was applied between the substrates
and then cured.
Blank: For the blank substrate (control), no flux was
applied to the substrate, but underfill was applied between
the substrates, then cured.
With this test method, ULR no-clean flux NC-26-A was
evaluated using two underfills: one from Hitachi and one
from Shin-Etsu [Fig. 10].
Figure 10: Underfill Shear Strength
There was almost no influence from the residue of the
ULR no-clean flip-chip flux NC-26-A. The open surface
sample allows easy escape of flux and shows high strength,
but even with the sandwich samples (two flux/underfill
interfaces) good compatibility with the underfills was also
seen.
4. Conclusions
Simple test methods for flux materials alone (that is, tests
outside the auspices of system-level tests like those from
JEDEC [ref. 5]) are, in many instances, inadequate to
quantify the critical to functionality parameters of ULR no-
clean fluxes. The authors have worked together to develop a
suite of novel test methods and associated data that have
given customers confidence that the materials are suitable for
use in emerging copper-pillar flip-chip applications at the
sub-100micron pitch node.
The successful implementation of flip-chip fluxes such as
the NC-26-A and the NC-826 at customer sites in China,
Taiwan, and Korea underlines their utility in the high-
volume package, and high-yield assembly processes
demanded by today’s manufacturers of portable electronic
devices.
References
1. http://www.itrs.net/
2. Gerber et al., “Next generation fine pitch Cu Pillar
technology”, ECTC 2011
3. Lee et al., “Flux study for ultra fine pitch flip chip
packages”, Microsystems, Packaging, Assembly and
Circuits Technology Conference, 2009. IMPACT 2009.
4. S. P. Lim et al., “Ultralow Residue Semiconductor
Grade Fluxes for Copper Flip-Chip”, SEMICON
Taiwan 2014
5. http://www.jedec.org