university of cincinnati - department of electrical engineering
TRANSCRIPT
UNIVERSITY OF CINCINNATI
Date:_____12/21/05______ I, ________ANGAN DAS_________________________________________,
hereby submit this work as part of the requirements for the degree of:
Master of Science in:
Electrical Engineering It is entitled:
A System for Testing of Microelectrode
Sensors
This work and its defense approved by:
Chair: __Dr. Fred R. Beyette Jr.____ __Dr. Ian Papautsky__________ __Dr. Wen-Ben Jone___________ _____________________________ _____________________________
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A System for Testing of Microelectrode Sensors
A thesis submitted to the
Division of Graduate Studies and Research University of Cincinnati
in partial fulfillment of the requirements for the degree of
MASTER OF SCIENCE in the Department of Electrical and Computer Engineering and Computer Science
College of Engineering University of Cincinnati
December 2005
by
ANGAN DAS Bachelor of Electrical Engineering Jadavpur University, India, 2002
Thesis Advisor and Committee Chair: Dr. Fred R. Beyette Jr.
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ABSTRACT
In the modern era, one of the most serious causes for public health problems is attributed to
environmental pollution. The pollutants encompass inorganic chemicals like nitrates, phosphates,
sulfates and chlorides. Proper monitoring of the environmental conditions not only helps to
assess the effect of the serious contaminants but also provide means of controlling them in an
effective manner. This calls for in situ environmental monitoring. The University of Cincinnati-
Microelectrode Research group has been working on the development of such a system, an
integrated microelectrode sensor for in situ environmental monitoring. The main specifications
of such a system are its high precision, portability, low power consumption and minimum effects
of noise. A microelectrode sensor array has been developed in the MEMS fabrication facility. An
ASIC chip has been designed and fabricated through the MOSIS foundry to process the signal
produced by the microelectrodes. A Printed Circuit Board mounts the chip along with the sensor
array in the pursuit to build a portable and integrated sensor system. The system uses the
principle of potentiometric measurement to sense the potential produced across the two probes,
the working probe (microelectrode array) and the reference probe, placed in the solution under
test. This is followed by amperiometric measurement that senses the current flowing through the
probes. The results indicate that the voltage and current signals produced vary in a monotonic
fashion with the changing conditions of the solution in which the probes are placed. This helps in
estimating and monitoring the external conditions of the probes from a knowledge of the signals
produced. Summarizing, the system introduces the testing methodology of the microelectrode
sensor for in situ monitoring of environmental conditions that finds applications in various areas
like soil and water, medicines, laboratory research and monitoring of bioreactors.
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ACKNOWLEDGEMENT
The execution and completion of this research work would have been impossible without the
help and cooperation of many people to whom I owe my sincere thanks. In the first place, I
would like to take this opportunity to express my gratitude to my academic advisor, Dr.Fred R.
Beyette Jr. for his guidance based on thorough knowledge about the subject; his support; and the
encouragement, patience and personal care with which he guided me during the successful
completion of my research. There has been lot of instances where I have realized the implication
and usefulness of a good advisor that I got in him. My sincere thanks also go to Dr.Marc Cahay
and Dr.Ranga Vemuri along with Dr.Beyette for the courses I took under them at the University
of Cincinnati which taught me the basics as well as the inner details of VLSI design. In this
regard, I would also like to thank Dr.Wen-Ben Jone for the course VLSI Testing and Validation
that helped me to build a thorough understanding of the different aspects of chip testing.
It is also extremely important for me to owe my thanks to my parents without whom I would not
have achieved the platform on which I am standing on this very day. I would not elaborate my
thanks to them any further because I know that it is something which will always be
unfathomable.
I am also thankful to my colleagues at PSDL, Prashant Bhadri and Suresh Alla, for being
instrumental in providing all sorts of help and cooperation throughout the project work. I also
thank the other members in the Microelectrode Research group including Dr.Am Jang, Dr.Paul
Bishop, Jin-Hwan Lee, Xingtao Wei, Dr.Ian Papautsky and Dr.William Timmons. I am
especially thankful to Dr.Papautsky for his valuable advice and suggestions in the course of the
project work.
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Further, I would also like to thank my friends at Cincinnati without mentioning anybody in
particular for making my stay over here pleasant and enjoyable. I owe my special thanks to
Shubhankar Basu for not only being my closest associate over here for the last two years, but
also being the best mentor I have ever encountered till now in my life without whose advice and
support, I wouldn’t have been a successful graduate student in my own terms. The
acknowledgement section would have been incomplete without including my girlfriend, Torsha
Banerjee for helping me in all the phases of work through times thick and thin, both
academically and personally. She always provided me the courage and motivation throughout
my graduate school life.
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TABLE OF CONTENTS
LIST OF FIGURES…………………………….......………………………………………......viii
LIST OF TABLES…………………………….....…...………………………………………….xi
I. INTRODUCTION & BACKGROUND....………...………………………………………...1
1.1 Motivation...............................................................................................................................1
1.2 Previous Work.........................................................................................................................2
1.3 Problem Statement..................................................................................................................2
1.4 Definition of Potentiometric and Amperiometric Measurements...........................................4
1.5 Sensor Chip.............................................................................................................................6
1.5.1 Stand-Alone Circuits..................................................................................................7
1.5.2 Potentiometric Circuit..............................................................................................10
1.5.3 Amperiometric (Type-I) Circuit...............................................................................11
1.5.4 Amperiometric (Type-II) Circuit.............................................................................12
1.6 Overview of the Thesis.........................................................................................................13
II. PRINTED CIRCUIT BOARD.................................................................................................15
2.1 Purpose of the PCB..............................................................................................................15
2.2 Components of the PCB.......................................................................................................15
2.3 Schematic Layout of the PCB..............................................................................................21
III. TEST METHODOLOGY AND RESULTS.........................................................................23
3.1 Potentiometric Testing.......................................................................................................23
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3.2 Amperiometric Testing......................................................................................................32
IV. REDESIGN OF SENSOR CHIP............................................................................................45
4.1 Reasons for Redesign of Chip............................................................................................45
4.2 Redesign of Potentiometric Circuit....................................................................................45
4.3 Redesign of Amperiometric Circuit...................................................................................49
4.4 Design and Incorporation of an ADC................................................................................52
4.4.1 Specifications of the ADC.......................................................................................52
4.4.2 Choice of the Type of ADC (Integrating Type ADC).............................................53
4.4.3 Principle of Operation of an Integrating type ADC................................................54
4.4.4 Design of Individual Components...........................................................................55
4.4.4.1 Operational Amplifier.................................................................................55
4.4.4.2 Sample and Hold Circuit.............................................................................57
4.4.4.3 Integrator.....................................................................................................59
4.4.4.4 Comparator..................................................................................................59
4.4.4.5 Combinational Circuit.................................................................................60
4.4.4.6 Counter........................................................................................................61
V. CONCLUSIONS........................................................................................................................64
5.1 Summary............................................................................................................................64
5.2 Future Work.......................................................................................................................65
REFERENCES...............................................................................................................................80
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LIST OF FIGURES
Fig. 1.1 System Level Block Diagram of the Integrated Sensor.......................................................3
Fig. 1.2 Schematic Representation of Potentiometric Measurement.................................................4
Fig. 1.3 Schematic Representation of Amperiometric Measurement................................................5
Fig. 1.4 Pin-Out Diagram of the Sensor Chip....................................................................................7
Fig. 1.5 Operational amplifier............................................................................................................7
Fig. 1.6 Resistor Divider Network.....................................................................................................8
Fig. 1.7 Resistor-Capacitor Circuit....................................................................................................8
Fig. 1.8 Voltage Follower Circuit......................................................................................................9
Fig. 1.9 Current Mirror Circuit…......................................................................................................9
Fig. 1.10 Potentiometric Circuit…...................................................................................................10 Fig. 1.11 Amperiometric (Type-I) Circuit…...................................................................................12
Fig. 1.12 Amperiometric (Type-II) Circuit......................................................................................12
Fig. 2.1 Voltage Regulator Circuit...................................................................................................17
Fig. 2.2 Schematic Layout of the PCB showing the various Components......................................22
Fig. 3.1 Schematic Layout of the Potentiometric Test Setup..........................................................24
Fig. 3.2 Transient Response of the Microelectrode in the 225 mV Standard Solution...................25
Fig. 3.3 Transient Response of the Microelectrode in the pH4 Solution........................................26
Fig. 3.4 Transient Response of the Microelectrode in the pH7 Solution........................................26
Fig. 3.5 Potentiometric Noise Measurement Test Setup (with Sensor Chip and PCB) .................28
Fig. 3.6 External Noise Distribution in Potentiometric Measurements without the Sensor Chip or
PCB (Mean value: 28.40mV) ..........................................................................................................30
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Fig. 3.7 Noise Distribution after Noise Elimination with only Sensor Chip (placed on breadboard)
in Potentiometric Measurements outside Faraday’s Cage (Mean value: 9.49 mV) .......................30
Fig. 3.8 Noise Distribution after Noise Elimination with both Sensor Chip and Printed Circuit
Board in Potentiometric Measurements outside Faraday’s Cage (Mean value: 3.28 mV).............31
Fig. 3.9 Noise Distribution after Noise Elimination with only Sensor Chip (placed on Breadboard)
in Potentiometric Measurements inside Faraday’s Cage (Mean value: 7.78 mV) .........................31
Fig. 3.10 Noise Distribution after Noise Elimination with both Sensor Chip and Printed Circuit
Board in Potentiometric Measurements inside Faraday’s Cage (Mean value: 2.79 mV) ..............32
Fig. 3.11 Calibration of Amperiometric Type-II Circuit (I vs. V) ..................................................34
Fig. 3.12 Schematic Layout of the Amperiometric Test Setup.......................................................35
Fig. 3.13 Transient Response of the Microelectrode in the ClO2 Solution; Conditions: Applied
Bias Potential: 0.125V, Concentration of Solution: 10ppm, Test Setup kept outside Faraday’s
Cage..................................................................................................................................................39
Fig. 3.14 Plot of Current vs. Solution Strength for Different Values of applied Bias Potential
(0.05-0.15V) outside Faraday’s cage...............................................................................................40
Fig. 3.15 Plot of Current vs. Solution Strength for Different Values of applied Bias Potential
(0.05-0.15V) inside Faraday’s cage.................................................................................................40
Fig. 3.16 Amperiometric Noise Measurement Test Setup (with Sensor Chip and PCB) ..............42
Fig. 3.17 External Noise Distribution in Amperiometric Measurements without the Sensor Chip or
PCB (Mean value: 32.65 mV) .........................................................................................................42
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Fig. 3.18 Noise Distribution after Noise Elimination with only Sensor Chip (placed on
Breadboard) in Amperiometric Measurements outside Faraday’s Cage (Mean value:15.82 mV).43
Fig. 3.19 Noise Distribution after Noise Elimination with both Sensor Chip and Printed Circuit
Board in Amperiometric Measurements outside Faraday’s Cage (Mean value: 8.38 mV) ...........43
Fig. 3.20 Noise Distribution after Noise Elimination with only Sensor Chip (placed on
Breadboard) in Amperiometric Measurements inside Faraday’s Cage (Mean value: 10.03 mV)..44
Fig. 3.21 Noise Distribution after Noise Elimination with both Sensor Chip and Printed Circuit
Board in Amperiometric Measurements inside Faraday’s Cage (Mean value: 3.78 mV) .............44
Fig. 4.1 Second Order Low Pass Butterworth Filter Circuit...........................................................46
Fig. 4.2 Potentiometric Measurement Circuit (Phase-2).................................................................49
Fig. 4.3 Amperiometric Measurement Circuit (Phase-2) ................................................................50
Fig. 4.4 Layout of the amperiometric circuit (Phase-2) in Magic layout editor..............................51
Fig 4.5 H-Spice simulation waveform of the amperiometric circuit (Phase-2) ..............................52
Fig. 4.6 Block Diagram Representation of a Single Slope Integrating ADC..................................54
Fig. 4.7 Timing Diagram for (a) Comparator Input and Output and (b) Counted Pulses...............55
Fig. 4.8 Schematic Design of the Op-Amp with Compensation.....................................................56
Fig. 4.9 Sample and Hold Circuit.....................................................................................................57
Fig. 4.10 Voltage Divider Network..................................................................................................58
Fig. 4.11 Integrator Circuit with the Reset Signal...........................................................................59
Fig. 4.12 Comparator Circuit...........................................................................................................60
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Fig. 4.13 Combinational Circuit Logic for providing Clock and Reset Signals for Counter..........60
Fig. 4.14 Design of the 7-bit Up Counter........................................................................................61
Fig. 4.15 Layout of the Analog to Digital Converter in the Magic Layout Editor..........................62
Fig. 4.16 H-Spice Simulation Waveform of the ADC for Analog Input Voltage = 2.4V (Digital
Output: 0111101) ............................................................................................................................63
LIST OF TABLES
TABLE 3.1 Potentiometric Measurement Results...........................................................................27
TABLE 3.2 Amperiometric Measurement Results..........................................................................38
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CHAPTER I
INTRODUCTION & BACKGROUND
1.1 Motivation
Environmental pollution has become one of the most detrimental factors contributing to public
health problems. To keep the pollution levels under control, there is a need to properly monitor
the environmental conditions. Substantial monitoring verifies the constant removal of the
toxicants or pollutants and ensures that the environmental conditions necessary for bioremediation
of specific toxicants are present (as in hazardous waste sites). This requires measurement of the
concentration of the various pollutants both in aqueous and soil mediums. Mostly, the
measurements are made on samples extracted from the related site. This is often not acceptable
for sites that require constant monitoring or in situ monitoring, i.e. monitoring of the conditions at
the actual location rather than measurements with the bulk samples collected. The applications
requiring accurate in situ monitoring encompass a large number of areas including the monitoring
of water and waste water treatment reactors, water distribution systems and stream or lake
sediments. In situ monitoring also finds applications in the manufacturing and chemical
production industry such as the monitoring of industrial reactors and processes, the healthcare
industry for medical diagnosis, pharmaceutical manufacturing, biological research and the food
industry for monitoring bioreactors and fermentation processes. This kind of monitoring
necessitates the development of robust integrated microelectrode sensors that can sense the
external environmental conditions in a proper and efficient manner. The following work deals
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with such a sensor developed by the Microelectrode research group at the University of
Cincinnati.
1.2 Previous Work
The sensors currently made use various types of chemical electrodes including those for
measurement of oxidation-reduction potential (ORP), pH, dissolved oxygen etc. Knowledge of
these parameters is necessary because many chemical or biological reactions occur under certain
optimum values of those parameters [1, 2]. But unfortunately, the conventional sensors used to
make these measurements use electrodes that are 1-3 cm in diameter, which often become
inappropriate for measurements in small volumes of liquids or in soils when there is not sufficient
volume of liquid to wet the electrode contacts. Moreover, the large size introduces difficulty in
making spatial measurements over small distances. This is especially significant for applications
like biofilm monitoring. Hence, there is a need for miniature electrodes or more specifically
microelectrodes. The microelectrode sensors that have been developed over the past decade are
fragile and difficult to use for in situ measurements. Further, they are difficult to manufacture and
susceptible to electrical interference that introduces unwanted noise in the measurement of signals
produced by these microelectrodes. All these factors constrain their use to laboratory
environments under highly controlled conditions.
1.3 Problem Statement
From the previous sections, it can be concluded that there is an urgent need for robust, self-
contained, inexpensive, microelectrode sensors that have integrated signal processing circuitry so
that they can be used in situ in various harsh environments. The system needs to utilize sensing
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modules that combine a microelectrode array with a custom microchip. From a system level
perspective, the environmental sensor essentially should consist of two major components as
shown in Fig. 1.1. The first one is the microelectrode sensor array (MEA) that is required to
monitor the external environmental conditions. It should be stable, possess an appreciable lifetime
and a fast response time. The signal sensed by these electrodes needs to be passed on to the
second component, the sensor chip.
Fig. 1.1 System Level Block Diagram of the Integrated Sensor
The chip will contain the necessary drive electronics along with signal processing circuitry to
process and produce the necessary sensed signals. The signals produced give an indication of the
conditions prevailing around the microelectrode probes. Both of them should be embedded on a
common platform, say a Printed Circuit Board (PCB) with the aim of building an integrated
system. The output signal from the chip is to be measured with suitable measuring instruments.
The main aim of this thesis is to build the PCB and test the microelectrode sensor system
successfully. The key requirements of the microelectrode system are precision, portability, range
Environmental Conditions
Printed Circuit Board
Microelectrode Sensor Array
Sensor Chip
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of measurement, low power consumption and elimination of noise effects as far as possible. These
are required for successful potentiometric and amperiometric measurements with theintegrated
microelectrode sensor system.
1.4 Definition of Potentiometric and Amperiometric Measurements
Potentiometric Measurement
The microelectrode sensor basically consists of two probes – a Working probe or sensing probe
(i.e. the Microelectrode Array) and the Reference probe. The probes, when placed in a solution,
produce a potential difference that can be measured with a voltmeter. This potential difference is a
function of the activity of the hydrogen ions in the sample, i.e. the pH of the solution. Fig. 1.2
shows schematically the experimental method for measurement of the voltage produced across the
probes.
Fig. 1.2 Schematic Representation of Potentiometric Measurement
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Theoretically, the response of the probes is given by the Nernst equation. Notice that in the
conventional measurement setup, the solution, the probes, and the voltmeter are contained in a
Faraday cage which helps to reduce external interference or noise that can be coupled on to the
probes and/or cabling used. This approach to noise reduction severely limits the ability to conduct
in situ measurements. Thus, one of the primary requirements of the sensor chip has been to
eliminate the effects of external noise to a large extent through necessary noise cancellation
circuitry.
Amperiometric Measurement
Unlike potentiometric measurement, amperiometric measurement is related to the measurement of
current rather than the voltage. The experimental setup for an amperiometric measurement is
shown schematically in Fig. 1.3. In this measurement, an external voltage supply (control voltage)
is provided across the electrodes (probes) and adjusted to produce the appropriate bias potential.
With the bias potential applied across the working and reference probes, a current starts flowing
Fig. 1.3 Schematic Representation of Amperiometric Measurement
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through the solution that is present in between the two probes. Similar to potentiometric
measurement, amperiometric measurement is also affected by external noise effects and hence the
need of appropriate noise cancellation circuitry. The sensor chip amplifies the amperiometric
signal produced by the probes and produces an analog output voltage proportional to the current
sensed. The value of the current is obtained from the output voltage produced.
1.5 Sensor Chip
The microelectrode system consists of the MEA that produces the signal which is passed on to the
sensor chip embedded on the Printed Circuit Board. The fabrication process for the
micromachined microelectrode array (MEA) has been developed by researchers in the MEMS
fabrication facility at the University of Cincinnati [3, 4, 5]. The chip contains the necessary
circuitry required to amplify and process the signal. The sensor chip has been designed and laid
out by Dr.Prashant Bhadri and Dr.Fred R. Beyette Jr. at the University of Cincinnati. The layout
had been done using the Tanner Tools L-Edit layout editor in the CMOS 1.5um process .The chip
is fabricated in a standard 40 pin DIP package through the MOSIS [6] foundry. This section
provides an overview of the circuits contained inside the chip, which will help the reader to
understand the various testing procedures adopted to test the correct functionality of the chip. The
pin-out diagram of the chip is shown in Fig. 1.4. The main circuits contained in the sensor chip
are divided into three sub-sections as follows.
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Fig. 1.4 Pin-Out Diagram of the Sensor Chip 1.5.1 Stand-Alone Circuits The different stand-alone or isolated circuits in the chip are provided for various test and
evaluation purposes. They are as follows:
Operational Amplifier
The op-amp forms the core of various circuits in the chip. To get an idea about the operation and
the performance of the circuits, a characterization of the op-amp is necessary. Hence it has been
provided as a stand-alone component inside the chip. It consists of three external terminals as
shown in Fig. 1.5 viz. two input terminals (Pin_37 & Pin_36) and one output terminal (Pin_ 34).
Fig. 1.5 Operational amplifier
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Resistor Divider Circuit
Various resistors all of the same nominal value (1 k-Ohm) have been used in different circuits of
the chip including the resistor divider. The resistor divider circuit is used to obtain the exact value
of these resistances and also to test the uniformity of the various resistors. It consists of eight
equal 1 k-Ohm resistors, separated by seven tapping points (Pin_17 – Pin_23), one supply point
(Pin_16) and a Ground connection (provided to Pin_24). The schematic layout of the resistor
divider is shown in Fig. 1.6.
Fig. 1.6 Resistor Divider Network R-C Circuit The Type-I amperiometric measurement circuit (Section 1.5.3) contains a capacitor that is used as
part of a sample and hold circuit. A stand-alone R-C circuit using the same capacitance value has
been included on the chip. The purpose of this circuit is to measure the value of the capacitor and
thereby help to estimate the sampling period necessary for the operation of the sample and hold
circuit. The R-C circuit consists of 3 terminals – two (Pin_9 & Pin_7) for providing the waveform
input the other for collecting the output (Pin_8). The schematic layout is shown in Fig. 1.7.
Fig. 1.7 Resistor-Capacitor Circuit
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Voltage Follower Circuit
The voltage follower circuit can be used for providing the necessary bias potential in an
amperiometric measurement. It consists of a voltage follower followed by a unity gain op-amp.
The circuit has two pin connections, Pin_12 (input) and Pin_29 (output), as shown in Fig. 1.8.
Fig. 1.8 Voltage Follower Circuit
Current Mirror Circuit
The Type-I amperiometric circuit (Section 1.5.3) uses a current mirror in the first stage of its
circuitry. A stand-alone current mirror has been included on the sensor chip to enable
measurement of its operating characteristics i.e. the linear region in which current mapping occurs
and the output current measured corresponds to the input current fed to the current mirror. The
schematic diagram of the current mirror is shown in Fig. 1.9.
Fig. 1.9 Current Mirror Circuit
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1.5.2 Potentiometric Circuit
The potentiometric circuit is meant for potentiometric measurement with the microelectrodes. The
circuit, shown in Fig. 1.10, consists of the following two stages connected in succession.
A. Voltage Follower Circuit:
The first stage of the potentiometric circuit is a set of two separate voltage follower circuits. It
provides an effective isolation of the output from the input signal source and loading effects are
avoided. The working probe is connected to Pin_4 (input of one voltage follower) and the
reference probe to Pin_3 (input of another voltage follower).
B. Differential Instrumentation Amplifier:
The next stage of the potentiometric circuit is a buffered differential amplifier stage with three
resistors linking the two buffer circuits together. The resistor RGAIN used is connected externally
to the sensor chip between Pin_6 and Pin_11 by means of a 10k-Ohm potentiometer. The voltage
drop produced between points 3 and 4 V3-4 is given by:
V3-4 = (V2 – V1) (1 + 2R / RGAIN)
Fig. 1.10 Potentiometric Circuit
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The regular differential amplifier in the next part of this sub-circuit uses resistors all of value 1kΩ,
making the gain equal to unity. The advantages of the differential amplifier lie in the fact that the
overall gain can be varied by varying only a single resistor RGAIN, high common mode rejection
ratio (CMRR) and noise elimination capability. The output is obtained at Pin_31.
1.5.3 Amperiometric (Type-I) Circuit
The amperiometric (Type-I) circuit for current measurement is shown in Fig. 1.11. It consists of
the following three stages connected in succession.
A. Current Mirror Circuit:
The first stage of the amperiometric (Type-I) circuit is a current mirror circuit. A current mapping
with a definite gain occurs from the input provided at Pin_1 to the output of this stage.
B. Sample and Hold Circuit:
This stage samples the current obtained from the current mirror and convert it to a voltage level
that is proportional to the input current. The proportionality constant and the dynamic range of the
output signal are related to the period of the sample control signal. The required frequency of the
sampling signal (clock) provided at Pin_40 is obtained from the requirement specification
regarding the rate at which the readings are to be taken, as well as by the time the capacitor C
takes to charge itself to the value of the input voltage. The NMOS across the capacitor is used to
discharge the capacitor after a sample operation and before the start of a fresh sample cycle.
C. Buffer:
The sampled voltage obtained from the sample and hold stage is fed through a unity gain buffer to
provide impedance matching between the previous stage and the measuring instrument.
12
Fig. 1.11 Amperiometric (Type-I) Circuit
1.5.4 Amperiometric (Type-II) Circuit
The amperiometric (Type-II) circuit is an alternate circuit for current measurement and is shown
in Fig. 1.12. It consists of the following three stages connected in succession.
Fig. 1.12 Amperiometric (Type-II) Circuit
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A. Transimpedance Amplifier:
The current I sensed from the electrode is fed into Pin_13 (Amperiometric In) and converted
through the resistance R into a corresponding voltage at node 2 that is governed by the equation:
V2 = - R · IIN (R = 1kΩ) (2.8.1)
This voltage is then passed on to the next stage of the circuit. The other transimpedance amplifier
has its input pin (Pin_14) grounded and thereby provides a 0V reference voltage at node 1.
B. Differential Instrumentation Amplifier:
The principle of operation of the differential instrumentation amplifier has already been discussed
in the potentiometric circuit (section 1.5.2).
C. Unity Gain Inverting Amplifier:
A unity gain inverting amplifier is used in the last stage of the amperiometric type-II circuit. It has
both the resistors of value 1kΩ. This circuit functions as a buffer amplifier and helps in
impedance matching and signal isolation.
1.6 Overview of the Thesis
The remaining portion of the thesis has been organized into four separate chapters. The section
below provides a brief overview of the various chapters.
• Chapter II: Chapter II describes the Printed Circuit Board (PCB) designed for this thesis
work. The various components of the PCB along with the factors taken into consideration
during the design phase are dealt within this chapter. It also highlights the main purpose of
implementation of the PCB in producing a fully integrated system.
• Chapter III: This chapter details the test procedure adopted for the testing the three broad
groups of circuits in the sensor chip, viz. isolated components, potentiometric circuit and
14
amperiometric circuit. It also presents the experimental results of testing and the related
conclusions that can be drawn about the performance of the sensor chip.
• Chapter IV: Chapter IV deals with the design of a second generation chip for the same
purpose. Taking into consideration the limitations of the present chip, the second chip has
been designed to meet the more stringent specifications. It also describes the requirement
and implementation of an Analog to Digital Converter needed for obtaining the digital
representation of the analog signals produced.
• Chapter V: Chapter V concludes the research work with an emphasis on the achievements
of the present work as well as suggestions for future work.
15
CHAPTER II
PRINTED CIRCUIT BOARD
2.1 Purpose of the PCB
The chip is meant to perform two primary functions – sensing voltage in the range of millivolts
during potentiometric testing and sensing current in the range of nanoamperes during
amperiometric testing. As a part of the previous work, initial testing of the chip on a bread board
was done to assess the proper functionality of the sensor chip. In addition to substantiating the
chip design, this method of testing introduces a lot of external noise, a major portion of which is
due to the breadboard connection grid. Furthermore, the bread board procedure of testing
necessitates the use of active elements like voltage supply for the chip as well as passive elements
like resistors and capacitors to be connected externally. In order to eliminate the noise effects due
to wire connectivity as far as possible and to reduce the number of external power supplies etc.
needed for circuit operation, it is desired to have all the components needed for operation of the
chip integrated onto a common platform. To achieve this, a Printed Circuit Board (PCB) has been
designed and produced. To reduce cost, a 2-layered PCB design was selected instead of a 4-
layered design. The top copper layer holds the various components while the bottom layer is used
for soldering them to the PCB.
2.2 Components of the PCB
The design is accomplished using the Express PCB software [7] and it is fabricated through the
16
foundry service of Express PCB. The board dimension is 6.5”X6”. The vias used for connectivity
of the different signal traces are of dimensions 0.075” round pads with 0.046” holes (hole
tolerance +/-0.004”). Special care is taken of the fact that choosing a hole that is bigger than that
required is much better than choosing one that is of smaller dimensions. The trace width for the
various signals is 0.01” while that for power and ground lines is 0.05”. The main components of
the PCB are as follows.
Power Supply:
The chip requires a 5V (VDD) DC power supply for its proper operation. The battery that supplies
this voltage is not only consumed during the process of testing and but it also suffers charge
leakage during the off period. So to maintain a constant voltage of 5V at its output, a battery with
an output voltage higher than 5V is required as the supply. A 9V battery placed in a battery holder
is provided as the power supply and the necessary voltage regulation circuit is provided to bring it
down to 5V. Apart from the 5V power supply, a variable power supply is also required for
providing the necessary bias potential to drive the microelectrode probes during amperiometric
measurements. This is provided from two 1.5 V AAA batteries connected in series providing a
total voltage of 3V. This voltage is fed to the input of a resistor divider network to obtain a
variable supply at its output.
Battery Holder
Two sets of battery configurations need to be placed on the PCB such that they remain intact and
do not fall off during the testing and operation of the microelectrode system. In order to achieve
this purpose, two battery holders are used in the PCB for holding the two supply configurations.
17
They are:
1) 9V battery holder: This battery holder is needed to place the 9V battery. The body is
modeled from high impact glass filled nylon material. It has nickel plated steel contacts for
the two battery terminals and two tin-plated brass terminals soldered with the PCB.
2) 3V battery holder: This battery holder is also similar to the 9V battery holder in
construction except that it places two 1.5V AAA batteries connected in series, instead of
the 9V battery.
Voltage Regulator Circuit:
For providing a 5V constant voltage to the chip from the 9V supply, the required voltage
regulation is achieved through an adjustable Low Dropout voltage regulator (National
Semiconductor LM1086 3-lead TO-220 package) [8]. It has a maximum dropout of 1.5V at a load
current of 1.5A and works in a temperature range of -40˚C to +125˚C. The circuit for adjustable
voltage regulation is shown in Fig. 2.1.
Fig. 2.1 Voltage Regulator Circuit
18
A 10uF solid tantalum capacitor is chosen to provide the decoupling capacitance at the output and
a 10uF capacitor is provided at the input for ripple rejection. The variable resistors chosen for the
regulator are R1 = 5 kΩ and R2= 1 kΩ. The LM1086 develops a reference voltage (VREF) of 1.25V
between the output and the adjustable terminal. This voltage when applied across resistor R1
generates a constant current I1 that flows through R2. The voltage drop across R2 adds to VREF to
give the desired output voltage. The resulting output voltage is given by the equation:
21
2 )1( RIRRVV ADJREFOUT ++=
But when R1 is in the 100 Ohm range, IADJ is very small (120uA max) and so the IADJR2 term can
be neglected. Hence VOUT reduces to:
)1(1
2
RR
VV REFOUT +=
This regulated output voltage is applied to the VDD supply pin of the chip.
Dual-In-Package (DIP) Socket
DIP sockets are provided on the PCB to hold certain components and provide proper connectivity.
The various DIP sockets used and their functions are enlisted below.
1) 40 Pin DIP socket: This is used for placing the sensor chip on the PCB. It is a 40 pin open
frame solder tail (gold) low profile IC socket [9]. The advantage of the open frame design
is that it leaves space beneath the IC for improved heat dissipation, easier PCB cleaning
and inspection.
2) 18 pin DIP socket: The 18 pin Dip socket is similar to the 40 pin socket described above. It
is used for providing the necessary jumper connections for providing a connection pathway
19
between the input pins of the sensor chip and the microelectrodes during potentiometric
and amperiometric testing.
3) 20 pin DIP socket: The 20 pin DIP socket is also similar to the other DIP sockets used. It is
used for providing the necessary connectivity to the various input and output pins of the
sensor chip for providing the necessary test signals or for obtaining the required outputs.
Potentiometer
Potentiometers used in the testing process are passive components required to provide a variable
resistance between two points in the interconnection of the various circuits used. Even in
situations where a known value of resistance is desired, potentiometers are placed in order to
provide flexibility of testing. All the potentiometers used are of the same kind - 6mm square top-
adjust carbon composition trimmer potentiometers. They are 3 pin devices. One is the input end,
one is the other extreme end of the resistor, and the third is the variable tapping point. The
dustproof construction induces high reliability. The various potentiometers used and their
functions are enlisted below:
1) 100 k-Ohm: This is required to provide the variable RGAIN between Pin_6 and Pin_11 of
the potentiometric circuit.
2) 10 k-Ohm: There are two 10 k-Ohm potentiometers. They form a resistor divider circuit
providing a variable voltage at the output. The input voltage is obtained from the 3V
battery supply. These are required to provide the required bias potential in amperiometric
measurement.
3) 5 k-Ohm: This is used in the voltage regulation circuitry denoted as R2.
20
4) 1 k-Ohm: This potentiometer is also used in the voltage regulation circuitry denoted as R1.
Capacitor:
The different capacitors soldered on to the PCB are either of a fixed value or are variable ones.
They are needed for various purposes as given below.
1) 10uF: Two 10uF solid tantalum capacitors are used in the voltage regulation circuitry
outlined above. Their characteristic advantage is low leakage current and impedance, very
small physical size and exceptional temperature stability. The voltage rating is 10V DC.
2) 9-100pF: A variable capacitor of value 9-100pF is provided as an onboard capacitor that
can be used in any part of the connectivity that has open ends and requires a capacitance in
between. It is basically kept as a future provision. The capacitor used is a ceramic surface
mount dielectric trimmer capacitor having a voltage rating of 25V DC.
Electrode Sockets:
Two electrode sockets are provided on the PCB. One is required for holding the mini-PCB
containing the array of four working or sensing electrodes and the other is required for holding the
reference electrode. Both the sockets are of the same make – Sullins Part No. EZC06DRAS [10].
They are 12-pin right angle edge connectors. The insulation material is glass-filled thermoplastic
polyester and the contacts are provided by gold-plated phosphor bronze contacts.
21
Right angle eject header:
This right angle edge connector is used as the input-output connector interface for the various
analog signals to be provided to different components of the PCB and also for providing a
gateway to capture the required output signals to be observed in various phases of testing. It has a
glass filled polyester insulated coating and the solder tails are in the ratio of 60:40 of Tin and
Lead in composition and of dimensions 200u” in diameter. The current and voltage ratings are 1A
and 1000Vrms respectively, and the temperature rating is –55°C to +105°C.
Ribbon Cable Connector:
The ribbon cable socket connector is connected to the 14-pin right angle eject header. It comprises
of 14 gray colored insulated conductor wires. It is required to provide the various test inputs and
for capturing the various output signals during the process of testing.
2.3 Schematic Layout of the PCB
The schematic layout of the PCB showing all the important components and modules used is
provided in the Fig. 2.2.
22
1. 9V Battery Supply contained within a battery holder 2. 3V Battery Supply contained within a battery holder 3. Resistor divider network for providing bias potential 4. Variable Capacitor (9-100pF) 5. Voltage Regulation Circuitry 6. 20 pin DIP socket for providing connectivity 7. 18 pin DIP socket for providing connectivity 8. 40 pin DIP socket holding sensor chip 9. Reference electrode socket 10. Working electrode socket 11. Right angle eject header connected to ribbon cable connector 12. 100 k-Ω potentiometer between pin_6 and pin_11 Fig. 2.2 Schematic Layout of the PCB showing the various Components
23
CHAPTER III
TEST METHODOLOGY AND RESULTS
The thesis mainly concentrates on the testing of the sensor chip embedded on the PCB. So
various test procedures suitable for the respective circuits are adopted in such a manner that they
ensure the correct functionality of the complete chip. The various circuits contained in the sensor
chip can be broadly classified into three major divisions. The first class of circuits comprise of
the different stand-alone or isolated components provided for various test and evaluation
purposes. The second and third class of circuits are the potentiometric circuit and the
amperiometric circuits respectively. Testing of the stand-alone circuits was completed by
Dr.Bhadri as a part of verifying the correct operation of the fabricated chip. This chapter will
focus on the test methodology and the results obtained from the testing of the potentiometric and
amperiometric circuits.
3.1 Potentiometric Testing
The purpose of Potentiometric measurement with the chip is to measure the Oxidation Reduction
Potential (ORP) value of the solution in which the two electrodes are immersed. The potential
generated across the electrodes is directly related to the chemical nature of the solution. It gives
an idea about the conditions of the pH and other properties of the solution. At the time of
potentiometric testing with the PCB, the MEA was unavailable due to some fabrication issues.
So to verify the correct functionality of the chip embedded on the PCB, the microelectrodes
fabricated by Dr. Am Jang (Environmental Engineering, UC) were used for test purposes [5].
The test setup is shown in Fig. 3.1. Three types of solutions are used for the test –225 mV
24
Fig. 3.1 Schematic Layout of the Potentiometric Test Setup
standard solution, pH4 and pH7 solutions. The working and reference electrode probes, placed in
the solution, are connected to the two input pins, pin_4 and pin_3, respectively of the
potentiometric circuit. The sensor chip on the PCB is powered using a 5V supply from the 9V
battery on the PCB. The output voltage is obtained at Pin_31. The value of the variable resistor
RGAIN is kept zero (pins 6 and 1 shorted), i.e. overall gain of the circuit equal to unity. Initial
measurements with an oscilloscope in the test procedure gave unsatisfactory results because the
oscilloscope induces appreciable noise rising from its inherent measurement circuitry. So the
output voltage readings are taken with a precision multimeter and monitored using the National
Instruments LABVIEW automated software program designed for the measurement purpose.
The measurement is done for a sampling rate of 1000 samples per second. The temperature of
the surroundings during the potentiometric testing was 22 degrees Celsius. One of the primary
purposes of the chip and the PCB is elimination of external noise. So to have an idea about the
effects of noise and ensure its proper elimination, two kinds of testing procedures are adopted:
1) All of the testing equipments and the probes placed outside the Faraday’s cage.
2) All of the testing equipments and the probes placed inside the Faraday’s cage.
25
To note the change in behavior of the probes over time, the measurements are taken for a time
interval ranging from 0-300 seconds. The transient behavior of the probes for the three solutions
– 225mV standard solution, pH4 and pH7 are shown in Fig.3.2, Fig.3.3 and Fig.3.4 respectively.
It is seen that the measured potential attains a high value as soon as the probes are placed in the
solution under test. But soon, after a transient drop, it settles down to a steady state value. The
response times for the probe, i.e. the time required to attain the final steady state value for the
three solutions are approximately:
• 37 seconds for 225mV standard solution
• 35 seconds for pH4 solution
• 32 seconds for pH7 solution
Fig. 3.2 Transient Response of the Microelectrode in the 225 mV Standard Solution
26
Fig. 3.3 Transient Response of the Microelectrode in the pH4 Solution
Fig. 3.4 Transient Response of the Microelectrode in the pH7 Solution
27
The response times for commercial millielectrodes under the same conditions are in the range of
several minutes for the three solutions used. The results given above undoubtedly prove the fact
that the microelectrodes demonstrate much faster response time than the commercial electrodes
available. The voltage values obtained in the potentiometric testing are given in Table 3.1. It is
seen that the potentiometric circuit in the sensor chip is capable of reproducing the voltage
developed across the two probes in an efficient way eliminating the effects of extraneous noise to
a great extent. These low values of voltage obtained can be read on an LED display that may be
attached to the output of the chip. Also, the voltage values inside and outside the Faraday’s cage
are comparable which establishes the fact that the microelectrode sensor system is robust to
environmental noise or in other words, is immune to the effects of external noise. An extensive
analysis of noise elimination is given in the succeeding section.
TABLE 3.1 Potentiometric Measurement Results
Solution Measured ORP Potential (mV) Outside Faraday’s Cage
Measured ORP Potential (mV) Inside Faraday’s Cage
225 mV Standard
Solution
226.476
+ 2.152
227.505
+ 1.715
pH4 Solution
195.047
+ 2.801
198.022
+ 2.575
pH7 Solution
78.724
+ 2.406
80.599
+ 2.249
28
Noise Analysis in Potentiometric Testing
One of the primary functions of the sensor chip and the PCB designed is the elimination of
external interference noise effect as far as possible. This enables the chip to produce a high
signal to noise ratio and prevents the output from being rendered erroneous through the effects of
extraneous noise signals. Extensive measurements are done to estimate noise throughout the
whole test procedure. Noise is a random signal and accurate evaluation of noise is always a big
challenge. An attempt is made to record the the root-mean-square (rms) value of the noise signals
obtained and then an average of the rms values obtained is taken over the time range considered.
Noise measurements are seldom done with an oscilloscope because the oscilloscope, no matter
how precise it is, always has some appreciable noise produced by its internal circuitry. So the
noise signals are obtained with a precision digital multimeter and monitored using an automated
LABVIEW measurement software program designed for the purpose. To test the usefulness of
the PCB in eliminating noise effects in addition to that already eliminated by the chip, two kinds
of testing procedures are adopted. Firstly, the chip is tested and noise measurements taken with
Fig. 3.5 Potentiometric Noise Measurement Test Setup (with Sensor Chip and PCB)
the chip placed on a conventional breadboard. Secondly, noise measurements are taken with the
chip placed on the PCB. Each of them is implemented for both the situations: Inside the
29
Faraday’s cage and Outside the Faraday’s cage. The schematic diagram of the noise
measurement test setup with the sensor chip and PCB is shown in Fig. 3.5. The test setups for
noise measurement without the PCB (only the chip) and that without both the chip and the PCB
are similar to Fig. 3.5 but with the required changes (eliminating the PCB in the former case and
both the chip and the PCB in the latter case). The average external noise distribution is shown in
Fig. 3.6. The average of the rms values obtained is 28.40 mV with randomly distributed
intermittent spikes as shown. Now the chip helps in eliminating this external noise by virtue of
the differential amplifier circuitry contained inside it. In addition to that, the printed circuit board
helps in eliminating noise further by removing the need of external cabling and external power
supply, both of which acts as potential sources of noise injection. The results are given in the
plots in Figs. 3.7 – 3.10 provided below. It is to be noted though that the potentiometric results
given in Table 3.1 are those obtained using the chip placed on the PCB. The description of the
graphs provided below each plot gives the test conditions and the average of the rms values of
noise obtained over the specified time range. In addition, in Figs.3.7 - 3.10, an inset plot is
provided showing the distribution of noise for that particular configuration, but on the same scale
as that used for Fig.3.6, i.e. the total external noise. Using the same scale gives the reader a
ground for comparison of the noise signals in different configurations and thus helps to gauge the
elimination of noise in the process. It can be noted from the values of the noise signals obtained
that the chip reduces noise to a great extent. The PCB reduces it further. Also, comparable results
are obtained inside and outside the Faraday’s cage that justifies the usefulness of the
microelectrode sensor system in eliminating the necessity of any kind of external shielding
mechanism. Thus the chip together with the PCB is capable of producing a robust system that
preserves the integrity of the signal, giving a very high signal to noise ratio.
30
Fig. 3.6 External Noise Distribution in Potentiometric Measurements without the Sensor Chip or PCB (Mean value: 28.40mV)
Fig. 3.7 Noise Distribution after Noise Elimination with only Sensor Chip (placed on Breadboard) in Potentiometric Measurements outside Faraday’s Cage (Mean value: 9.49 mV)
31
Fig. 3.8 Noise Distribution after Noise Elimination with both Sensor Chip and Printed Circuit Board in Potentiometric Measurements outside Faraday’s Cage (Mean value: 3.28 mV)
Fig. 3.9 Noise Distribution after Noise Elimination with only Sensor Chip (placed on Breadboard) in Potentiometric Measurements inside Faraday’s Cage (Mean value: 7.78 mV)
32
Fig. 3.10 Noise Distribution after Noise Elimination with both Sensor Chip and Printed Circuit Board in Potentiometric Measurements inside Faraday’s Cage (Mean value: 2.79 mV)
3.2 Amperiometric Testing
Amperiometric measurement with the chip is carried out to evaluate the current flowing through
the probes. It is required to determine the external conditions of the probes. The two circuits
designed for amperiometric measurement are as follows:
Amperiometric Type-I circuit:
The amperiometric type-I circuit contains the current mirror in its first stage. It is observed from
the stand-alone testing of the current mirror circuit that the gain of the current mirror varies
according to the range of operation. Moreover, though the gain decreases in a monotonic way, the
rate of decrease is not constant. This very fact introduces difficulties in amperiometric
33
measurement using this circuit. Amperiometric testing was done with this circuit but it did not
produce results as expected. So the amperiometric Type-II circuit is utilized for amperiometric
testing of the microelectrode probes.
Amperiometric Type-II circuit:
The amperiometric type-II circuit does not suffer from the problems encountered in
amperiometric type-I circuit. At the time of amperiometric testing, the Microelectrode Array
(MEA) was unavailable due to some fabrication issues. So instead of the MEAs, the
microelectrodes fabriacated at Dr.Ahm’s laboratory (Environmental Engineering, University of
Cincinnati) are chosen to verify the correct functionality of the amperiometric type-II circuit.
Now, the purpose of amperiometric circuit is the measurement of current. But the circuit is so
designed that it produces an output voltage, which is measured, instead of the current. This owes
to the reason that the expected value of the current flowing through the probes is of the order of
nanoamperes. Accurate measurement of this low value of current, even with a precision
picoammeter, poses a challenge due to the noise levels introduced. On the contrary due to the high
gain of the circuit, the voltage produced is of a higher magnitude and hence convenient to
measure at the output pin (Pin_26). Hence voltage measurement is done instead of current
measurement. This necessitates the calibration of the circuit i.e. obtaining a relation between the
current flowing and the voltage produced, before conducting any kind of test experiment. The
calibration procedure comprises of providing known values of current at the input pin of the
circuit and measuring the output voltage. The input current, fed from a programmable current
source, is varied from 0.5-100nA and the voltage is measured at the output with a multimeter and
monitored using the LABVIEW measurement software program. The results shown in Fig. 3.11
34
demonstrates that the voltage obtained for the different values of current fed bears a second order
fit to the current as given in Eqn.(3.5) with the value of the degree of determination (R2) equal to
0.9894, which is statistically acceptable.
)10*49811.6()10*39962.1()10*54327.7( 7627 −−− +−= VVI (3.5)
Fig. 3.11 Calibration of Amperiometric Type-II Circuit (I vs. V)
As the voltage bears a definite relation to the current, the current flowing through the probes can
be obtained from the corresponding voltage values through the governing equation (Eqn.3.5). The
block diagram of the test setup is given in Fig. 3.12. The bias potential needed to drive the
current through the probes is provided from the 3V battery supply on the PCB. Since we need
varying values of this bias potential, the output of the battery is fed to the potentiometer (POT’)
on the PCB which gives varying voltages at its output, achieved by proper adjustment.
35
Fig. 3.12 Schematic Layout of the Amperiometric Test Setup
This voltage is passed through the voltage follower circuit which acts as a buffer providing
impedance matching, and is applied across the working and reference electrodes placed in
chlorine dioxide (ClO2) solution. From the electrochemistry point of view, in amperiometric
measurement, the probes sense the oxygen content of the solution under test. So the solution
chosen should be stable and more importantly should be such that its oxygen content can be
conveniently measured. Chlorine dioxide solution meets all of these criteria, making it an obvious
36
choice for the solution in which the probes are placed. The solution behaves like a resistor,
providing a finite resistance to the current flowing through it. This current enters the chip at
Pin_14 and the output voltage at Pin_26 is measured. The VDD (5V) supply of the chip is provided
from the 9V battery through the voltage regulator circuit on the PCB. The surrounding
temperature during amperiometric testing was 21 degrees Celsius. The concentration of the
chlorine dioxide solution is varied from 5ppm to 25ppm in steps of 5ppm. During the test, the
ClO2 solution available was of concentration 120ppm. This is taken as the mother solution and
diluted with pH7 buffer solution to prepare the five solutions of desired strength. 50ml of pH7
solution is taken for each set and the appropriate quantities of 120ppm solution mixed with it to
produce the various solutions of required strength. Note that before pouring in the required
amount of ClO2 solution in the beaker containing pH7 buffer solution, equal amount of pH7
solution is emptied from the beaker so that the total amounts to 50ml and the concentrations
obtained are accurate in nature. For each of these concentrations, the bias potential is varied from
0.05V to 0.15V in steps of 0.025V, i.e. within +0.05V of 0.1V. These values are so chosen
because amperiometric measurements with ClO2 solution is generally done at an optimum bias
potential of 0.1V. Therefore, in the process, two testing procedures are adopted:
1) Bias potential is kept constant and the concentration of the ClO2 solution is varied.
2) Concentration of the ClO2 solution is kept constant and the bias potential is varied.
Moreover, it is also to be noted that the current flowing through the probes for the bias potential
applied is affected highly by external noise. To have an idea of the effects of noise, a Faraday’s
cage is employed and the testing is carried out in two different situations:
37
1) All of the testing equipments and the probes kept outside the Faraday’s cage.
2) All of the testing equipments and the probes kept inside the Faraday’s cage.
The voltage measurements with the amperiometric circuit are converted to their corresponding
currents through the governing equation (Eqn.3.5). The results of amperiometric testing for both
the situations, inside and outside Faraday’s cage, are tabulated in Table 3.2. The resulting graphs
for the individual situations are given in Figs. 3.14 and 3.15. The results indicate that for a
particular strength of the solution, the current flowing through it gradually increases as the bias
potential increases. It is also noted that for a constant bias potential, with an increase in the
concentration of the solution, the current flowing through the probes gradually increases. The
reason for this kind of behavior is attributed to the oxygen content of the solution. With an
increase in solution concentration, the oxygen content of the solution increases which in turn
decreases the resistance offered by the solution, thereby increasing the current that flows through
it. The plots in Figs. 3.14 and 3.15 for each of the test conditions shows that the currents bear
straight line fits to increasing values of the solution concentration with statistically acceptable
values of coefficients of determination (R2). It is also observed that the results obtained without
Faraday’s cage are comparable to that obtained with the shielding provided. The sensor chip
thereby eliminates the need of any external shielding mechanism for the sensor. Also, to note the
change in behavior of the probes placed in the ClO2 solution over time, the measurements are
taken for a time period ranging from 0-300 seconds. The transient behavior of the probes for a
particular test condition is shown in Fig.3.13 below. It is seen that after a short transient period,
the current starts flowing in the proper direction and attains a steady state value. In the example
provided, the response time for the probe, i.e. the time required to attain the final steady state
value is chosen to be that time after which the current remains within 2.5nA to 4.0nA as shown
38
TABLE 3.2 Amperiometric Measurement Results
Applied Bias
Potential (Volts)
Solution Strength
(ppm)
Measured Voltage Outside
Faraday’s cage (mV)
Corresponding Current Outside Faraday’s cage
(nA)
Measured Voltage Inside
Faraday’s cage (mV)
Corresponding Current Inside Faraday’s cage
(nA)
0.05
5
10
15
20
25
939.043
950.921
962.668
979.011
988.912
1.162
1.673
2.217
3.058
3.633
960.957
974.043
987.844
1001.697
1010.959
2.135
2.790
3.568
4.486
5.227
0.075
5
10
15
20
25
947.999
965.237
975.493
990.512
999.910
1.544
2.342
2.867
3.732
4.357
984.614
999.046
1006.147
1012.494
1022.257
3.376
4.296
4.825
5.365
6.419
0.1
5
10
15
20
25
954.998
973.986
984.202
998.502
1007.514
1.857
2.787
3.352
4.258
4.935
1002.873
1015.103
1019.582
1024.442
1029.285
4.573
5.613
6.090
6.725
7.655
0.125
5
10
15
20
25
967.117
982.344
991.039
1005.590
1012.906
2.435
3.245
3.765
4.781
5.403
1016.521
1025.663
1028.102
1030.800
1031.524
5.756
6.917
7.373
8.168
8.962
0.15
5
10
15
20
25
976.183
992.208
1000.302
1012.668
1018.241
2.904
3.839
4.385
5.381
5.939
1025.837
1030.800
1031.514
1032.164
1032.935
6.946
8.168
8.726
9.562
10.376
39
(Mean value: 3.245nA). The time is recorded to be 25 seconds in this case. In general, the
currents obtained in the various cases of amperiometric testing attained the steady state value
within 30 seconds after the probes are placed in the solution. This shows that the response time
of the fabricated probes is quite appreciable compared to that obtained with commercial versions
which is of the order of several minutes.
Fig. 3.13 Transient Response of the Microelectrode in the ClO2 Solution; Conditions: Applied Bias Potential: 0.125V, Concentration of Solution: 10ppm, Test Setup kept outside Faraday’s Cage
40
Fig. 3.14 Plot of Current vs. Solution Strength for Different Values of applied Bias Potential (0.05-0.15V) outside Faraday’s cage
Fig. 3.15 Plot of Current vs. Solution Strength for Different Values of applied Bias Potential (0.05-0.15V) inside Faraday’s cage
41
Noise Analysis in Amperiometric Testing
As discussed in the noise analysis for potentiometric measurements, the sensor chip and the PCB
designed should eliminate external interference noise effects to a great extent. Exhaustive
measurements are done to estimate noise throughout the whole test procedure. The rms value of
noise is obtained with a precision multimeter and monitored using an automated LABVIEW
measurement software program. The test setup for noise measurement with the chip and the PCB
is shown in Fig. 3.16. The test setups for noise measurement with only the chip and that without
both the chip and the PCB are similar to Fig. 3.16 but with the required changes (eliminating the
PCB in the former case and eliminating both the chip and the PCB in the latter case). The average
external noise distribution is shown in Fig. 3.17. It has a mean rms value of 32.65 mV with
randomly distributed intermittent spikes as shown. The results of noise measurements with the
other setups as described above are given in the plots in Figs. 3.18 – 3.21 provided below. It is to
be noted though that the amperiometric results given in Table 3.2 are those obtained using the
chip placed on the PCB. The test conditions and the mean of the rms noise values for the various
test conditions are provided individually below the respective plots. Also, in Figs.3.18 – 3.21, an
inset plot is provided showing the noise distribution for the particular configuration, but on the
same scale as used for Fig.3.17, i.e. the total external noise. Providing the same scale helps the
reader to draw a comparison of the magnitude of noise in the various conditions. It can be
concluded from the mean of the rms values of the noise signals obtained that the chip helps in
eliminating noise to a great extent. The PCB helps to reduce it further. Moreover, comparable
results obtained inside and outside the Faraday’s cage prove the robustness of the integrated
microelectrode sensor in doing away with the necessity of any kind of external shielding
42
mechanism and thereby producing a noise-immune system that maintains signal integrity and
gives a high signal to noise ratio.
Fig. 3.16 Amperiometric Noise Measurement Test Setup (with Sensor Chip and PCB)
Fig. 3.17 External Noise Distribution in Amperiometric Measurements without the Sensor Chip or PCB (Mean value: 32.65 mV)
43
Fig. 3.18 Noise Distribution after Noise Elimination with only Sensor Chip (placed on Breadboard) in Amperiometric Measurements outside Faraday’s Cage (Mean value: 15.82 mV)
Fig. 3.19 Noise Distribution after Noise Elimination with both Sensor Chip and Printed Circuit Board in Amperiometric Measurements outside Faraday’s Cage (Mean value: 8.38 mV)
44
Fig. 3.20 Noise Distribution after Noise Elimination with only Sensor Chip (placed on Breadboard) in Amperiometric Measurements inside Faraday’s Cage (Mean value: 10.03 mV)
Fig. 3.21 Noise Distribution after Noise Elimination with both Sensor Chip and Printed Circuit Board in Amperiometric Measurements inside Faraday’s Cage (Mean value: 3.78 mV)
45
CHAPTER IV
REDESIGN OF THE SENSOR CHIP
4.1 Reasons for Redesign of Chip
The potentiometric and amperiometric testing results show that the voltage and current readings
are obtained in the range of millivolts and nanoamperes respectively. These low values of signals
pose serious problems in measurement even with precise measuring instruments like precision
voltmeter and picoammeter. Moreover external disturbances like noise also play a major role in
rendering the results erroneous. Taking all these factors into consideration, a redesign of the
potentiometric and amperiometric measurement circuits in the chip is required. Ways are devised
to amplify the signal and eradicate the noise issues as far as possible. Moreover, the output
analog signals also need to be converted to their digital representations for ease of measurement
and computing. This calls for the design and implementation of an analog to digital converter
(ADC) that needs to be integrated inside the chip.
4.2 Redesign of Potentiometric Circuit
The voltage signals in the case of potentiometric measurements still have some noise coupled
with them. These noise signals should be filtered out before they are fed into the measurement
circuit. This is achieved through the use of filters. A filter is a frequency-selective circuit that
allows or permits a specified band of frequencies and blocks or attenuates signals of frequencies
outside this band. In this case, the filter designed should be such that it allows the analog signals
with lower frequencies to pass through it and those with higher ones (noise) need to be blocked.
This necessitates a low pass filter. We choose an active RC filter owing to the following reasons:
46
1) An active filter is easier to tune or adjust.
2) The active filter does not cause loading of the source or load due to the high input
resistance and low output impedance of the operational amplifiers contained within.
3) Active filters are more economical than their passive counterparts due to the variety of
cheap op-amps available and absence of inductors.
4) The operation is a low frequency operation and hence requires RC filters instead of LC or
crystal filters.
5) Inductors are not used for this purpose because they are very large, costly, consume more
power and emit magnetic fields. Their use at lower frequencies is generally avoided.
The type of filter configuration chosen is a second order low pass Butterworth filter (with a gain
roll off-rate of 40dB/decade in the stop band region). The primary reasons for such a choice are
that it has a characteristic flat passband and a flat stopband, and is simple to design with a set of
given specifications. The schematic diagram of a second order low pass Butterworth filter is
shown in Fig. 4.1.
Fig. 4.1 Second Order Low Pass Butterworth Filter Circuit [11]
The magnitude of voltage-gain of the filter is given by:
47
4)(1
H
F
IN
o
ff
AVV
+= (4.1)
Where f = frequency of the input signal
fH = high cut-off frequency and is given by
32322
1CCRR
f H π= (4.2)
AF = passband gain of the filter and is given by
1
1RR
A FF += (4. 3)
The design process of the filter is carried out through the flowing steps in sequence:
1) A high cut-off frequency fH = 1 kHz is chosen. This will eliminate all the high-frequency
signals of frequency 1 kHz or higher. But this will definitely not eliminate the power supply
noise or the 60 cycle noise. Since the final goal of this project is to implement the sensor
system for remote monitoring where the power is supplied through an integrated battery, so it
is assumed that the 60 cycle noise will not be present predominantly. Instead, more
weightage is given to the environmental noise that generally has a frequency in the upper
ranges.
2) In order to simplify the design process, we set R2 = R3 = R and C2 = C3 = C.
3) The value of capacitance chosen is C = 5nF.
4) Substituting R2 = R3 =R, C2 = C3 = 5nF, fH = 1*103 Hz in Eqn.(4.2), we get
992
3
1051052110*1
−− ⋅⋅⋅⋅=
Rπ
R = 31.818 kΩ
Thus, we choose R2 = R3 = 31 kΩ.
48
5) To ensure Butterworth response, we choose equal resistors (R2 = R3) and equal capacitors (C2
= C3) values. This requires the passband voltage gain to be equal to 1.586.
Therefore from Eqn.(4.3), 1
1RRA F
F += =1.586
RF = 0.586 R1
Choosing R1 = 30 kΩ, we get RF = 0.586 * 30 kΩ
= 17.58 kΩ.
To get the required value of RF, we use a 20 kΩ potentiometer.
The above second order low pass Butterworth filter designed is introduced at the input terminals
of the potentiometric circuit for both the working electrode and the reference electrode pins. The
rest of the potentiometric circuit comprises of the voltage follower stage, followed by the
differential instrumentation amplifier stage, and finally the unity gain buffer amplifier that
produces a differential voltage at its output. The working principle of the last three stages of the
circuitry has already been explained in Chapter-I. The new potentiometric circuit (phase-2) with
the filters introduced is shown in the Fig. 4.2.
49
Fig. 4.2 Potentiometric Measurement Circuit (Phase-2)
4.3 Redesign of Amperiometric Circuit
The amperiometric measurements show that the current produced is in the range of nanoamperes
and below. This small value of current has to be amplified by suitable means to produce an
amplified signal that can be measured with ease. The current gain provided by current amplifiers,
designed with unequal MOS transistor aspect ratios, is limited by the geometry of the transistors.
Transimpedance and transconductance amplifiers also provide current gain but the circuits are
usually very complex. Moreover current amplification with extremely weak current signals (sub-
nA range) often poses a serious challenge. The simple circuit shown in Fig. 4.3 provides a way
of obtaining current amplification in the sub-nA range with a low supply voltage [12]. It also
provides a low power dissipation that makes it ideal for the purpose of amperiometric
measurements.
50
Fig. 4.3 Amperiometric Measurement Circuit (Phase-2)
The voltage VG1 turns the transistor M1 on. The first part of the circuit consists of two transistors
M2 and M3 biased with gate voltages VG2 and VG3. The voltage obtained at the drain node is:
VD = iIN * rD where rD = rDS2//rDS3 (4.4)
rDS2 and rDS3 being the drain-source resistances of M2 and M3 respectively. Since both
transistors M2 and M3 operate in the saturation region, rD is in the range of mega-ohms. Thus,
the first stage converts a very weak current variation into an appreciable voltage variation. The
second stage of the circuitry consists of transistors M4 and M5 biased with their threshold
voltages (VTH) (assumed to be equal) and transistors M6 and M7 with gate voltages VD and VG7
respectively. M6 operates in the saturation region and like a source follower, carries out a
transfer of voltage variation ∆VD from its gate to source. M5 converts the voltage variation ∆VDO
to a current variation ∆iN through the equation
∆VDO = rDS5 * ∆iN (4.5)
where rDS5 = equivalent drain-source resistance of M5.
51
The transistor M4 operates as a constant current source. The gate voltage VG7 makes M7 to
operate in the saturation region. It is required to stabilize the voltage at the common drain of
transistors M4 and M6 as well as to improve the output resistance of the current amplifier. The
output current is given by
55 DS
DIN
DS
DONOUT r
krirV
ii ⋅−=−=−= (4.6)
where k = VDO/VD. (k is generally equal to unity)
Thus the gain of the current amplifier is
5DS
Di r
krA = (4.7)
As krD >> rDS5 , Ai >>1. The voltage VD varies with the current signal. The above circuit is ideal
for the amperiometric measurement where the current sensed is in the range of nanoamperes.
The circuit is laid out in the Magic layout editor and the layout is shown in Fig. 4.4.
Fig. 4.4 Layout of the amperiometric circuit (Phase-2) in Magic layout editor
52
Fig 4.5 H-Spice simulation waveform of the amperiometric circuit (Phase-2)
The circuit is simulated using H-Spice and the spice simulation waveform is shown in Fig 4.5.
4.4 Design and Incorporation of an ADC
The potentiometric and amperiometric circuits in the sensor chip produce voltage and current
signals that are analog in nature. These analog signals need to be converted to their digital
versions to aid the process of measurement and computation.
4.4.1 Specifications of the ADC
The analog voltage signal produced is in the ranges of millivolts. On proper amplification, the
output signal will be obtained in the higher range of volts. So for the design of the analog to
digital converter, it is assumed that the voltage signal to be measured can vary from 0-5 volts
over a continuous range. Also, as per the requirement, the ADC is supposed to sample the analog
53
signal at a rate that enables to capture the maximum variation in voltage produced. The sampling
period, given by Nyquist criterion, is set to be @ 50 samples per second. The digital
representation desired is set to be of 7-bits. Moreover, it is to be noted that the sensor chip is
incorporated in a remote monitoring system that functions on battery power. This makes low
power consumption an important criterion for the design of the ADC.
4.4.2 Choice of the Type of ADC (Integrating Type ADC)
Taking into consideration all the above factors, the type of ADC chosen out of the various types
available is the Integrating type ADC. The reasons for choosing an Integrating type ADC are:
1) The sampling time period being 50 samples per second is not very high and it can be
conveniently applied to the integrating type ADC, which finds its usage in processing
slowly varying signals.
2) The ADC being incorporated into a remote monitoring system will be prone to noise and
other signal integrity issues. The integrating ADC has very good line frequency and noise
rejection capability.
3) The ADC should be linear in the voltage range provided and have very low offset and
gain errors. The integrating ADC is easily designed to accommodate these needs.
4) Since it is to operate on battery power, therefore the power consumption should be
reduced. Implementation of an integrating type ADC needs small amount of circuitry
which implies low power consumption.
5) The integrating ADC is also very cost-friendly.
54
4.4.3 Principle of Operation of an Integrating Type ADC
The single slope integrator ADC is shown schematically below in Fig. 4.6. The reference voltage
(negative value) is fed into the input of the integrator circuit. It produces a steadily increasing
positive saw-tooth waveform at its output. The output waveform is then compared by a
comparator against the sampled value of the analog input voltage to be measured. As the
integrator output surpasses the sampled value (S/H output), the comparator switches state and
triggers the control logic to latch the value of the counter. The controller also resets the system
Fig. 4.6 Block Diagram Representation of a Single Slope Integrating ADC [13]
for the next sample. The output of the counter gives the digital representation of the input analog
voltage. The conversion time (Tc) is proportional to the value of the input voltage. It is given by:
CLKN
REF
INC T
VV
T ⋅⋅= 2 (4.8)
where TCLK is the clock period
Fig. 4.7 shows the timing diagram for the integrator, comparator and counter operation.
55
Fig. 4.7 Timing Diagram for (a) Comparator Input and Output and (b) Counted Pulses [13]
4.4.4 Design of Individual Components
The designsof the individual components needed for a single slope integrator ADC are outlined
in the following sub-sections below.
4.4.4.1 Operational Amplifier:
The basic unit used in different parts of the circuit is an Operational Amplifier. The operational
amplifier used in the previous design phase was definitely a superior quality op-amp with very
good performance criteria. But at the time of design of the ADC, the L-Edit layout editor that
was used in the previous design was not available due to license expiration issues. So the author,
being unaware of the usage of the L-Edit layout editor, could not take the previous op-amp
designed for this ADC design. Instead, Magic layout editor was used for the implementation of
the ADC. An operational amplifier is not available in the standard cell library of the Magic
layout editor. So a standard op-amp design was taken to layout the circuit. But in the future when
the chip will be finally designed along with the other necessary circuits, if L-Edit layout editor is
available, the superior quality op-amp can definitely replace the one used presently with minute
56
Fig. 4.8 Schematic Design of the Op-Amp with Compensation [13]
changes in routing and wire placements. The op-amp used in the present design is a two-stage
op-amp with compensation provided. The schematic layout is provided in Fig. 4.8.
• Selection of the differential amplifier bias current ISS:
The selection of the current ISS is determined by the gain, CMRR, power dissipation, noise,
matching considerations and slew rate. The small-signal gain of the amplifier is given by:
))((22
)||(4242
040211THNGSss
m VVIrrgA
−+=
+==
λλλλβ
(4.9) Also, we must determine the VGS of the MOSFETs used. In general, higher is the W/L ratio at a
given bias current, the lower is the VGS. The selected values are: ISS =20uA and VGS=1.2V.
• Selection of device sizes:
The next step in the design of the op-amp is selection of the 2nd-stage biasing current. It is to be
57
noted that the same current flows in MOSFETs M3 and M4. Chossing the current thru M7 =
10uA, M7 and M4 are set at same size. We then size M8 so that drain current of M8 (10uA) =
current in M7. Under these circumstances (load current), the maximum output swing is given by
2.1max −=VDDVout 2.1min +=VSSVout (4.10)
For power supply = 2.5V, we get VOUTMAX = 1.23 V, VOUTMIN = -1.2 V (H-Spice simulations).
For higher ranges of supply like 5V, the saturation voltage is higher.
4.4.4.2 Sample and Hold Circuit:
The sample and hold circuit implemented is shown in Fig. 4.9. It is applicable for high speed
CMOS applications that are not too demanding. The circuit is capable of clock feedthrough
cancellation.
Fig. 4.9 Sample and Hold Circuit [14]
The chosen values for the capacitances are: C1 = 0.1uF and C2 = 0.1uF.
Q1 and Q2 are PMOS sections of dimensions 5λ * 15λ.
Here the Op-amp acts as a unity gain follower during the hold mode. As per the requirement
specifications, the clock has to sample the input analog signal @ 50 samples per second. So time
period for each sample:
T = 1/50 second = 0.02 second.
58
The on and off periods are of the clock are selected to be equal: TON = 0.01 second and TOFF =
0.01 second. Therefore, C1 is charged during 0.01 sec (sample time) and needs to hold the charge
for the other 0.01 sec. So the capacitors are chosen such that they can charge properly within
0.01sec and hold the charge without much leakage in the next 0.01 sec. During the hold mode,
Q1 and Q2 transistors are both turned off. The charge feedthrough from Q1, although signal
dependent, is matched by the charge feedthrough from Q2 since both of them are at the same
voltage and have the same clock waveforms. This leads to clock feedthrough cancellation.
Scaling of Input Voltage:
The input voltage can go up to the range of 5V. Since the op-amp saturates at VOUT = 1.2 V, so
the input voltage needs to be scaled down to the appropriate value. Fig. 4.10 shown below is the
simple resistor divider circuit needed to scale down the analog reference voltage.
Fig. 4.10 Voltage Divider Network
21
2
RRRVV INOUT +
⋅= (4.11)
Given VIN = 5V, VOUT = Saturation voltage of the op-amp = 1.2V. Choosing R1 = 10k-Ohm, we
obtain R2 ~ 3.25k-Ohm. This VOUT is fed to the input pin VIN of the sample and hold circuit.
59
4.4.4.3 Integrator:
The integrator designed with the op-amp is shown in Fig. 4.11. Here the same voltage scaling of
the reference voltage of 5V is done with the help of the resistor divider as explained above (in
case of Sample and Hold) since the saturation voltage of the op-amp is 1.2V. Referring to the
divider circuit, choosing R1 = 10k-Ohm, we obtain R2 ~ 3.25k-Ohm.
Now the integrator needs to ramp up the input voltage to the full scale voltage in the time period
when the S/H circuit functions in the hold mode. Therefore, T = 0.01sec implies time constant
RC = 0.01 sec. Choosing R=100k, we get C = 0.1uF. The pmos across the capacitor helps to
discharge the capacitor during the reset operation, before the start of a fresh cycle.
Fig. 4.11 Integrator Circuit with the Reset Signal [14]
4.4.4.4 Comparator:
The schematic layout of a comparator is shown in Fig. 4.12. The comparator is basically an op-
amp with an extremely large open loop gain.
For V2 > V1, VOUT = +V, and for V2 < V1, VOUT = -V
The gain is provided by choosing resistor values: R1 =1k-Ω and R3 = 100k-Ω.
60
Fig. 4.12 Comparator Circuit [11] 4.4.4.5 Combinational Circuit: A combinational circuit is required to provide the necessary control logic for the reset operation
and for providing the clock signal to the counter. To meet this need, a circuit is designed as
shown in Fig. 4.13. The Sample & Hold clock is fed through an inverter. When the S/H circuit
goes through the hold mode (S/H clock = 0), the counter clock starts functioning and the counter
starts its operation (it is to be noted that the system clock for counter operation runs
continuously). For the reset operation, the reset signal, being an active low signal, remains high
up to the point till the comparator output is high (in the hold mode). At the instant the
comparator output goes low, the reset signal becomes low. This resets the counter and discharges
the integrator capacitor.
Fig. 4.13 Combinational Circuit Logic for providing Clock and Reset Signals for Counter
61
4.4.4.6 Counter:
A 7-bit up counter needs to be designed that counts from 0000000 to 1111111. Generally, a
standard counter is designed using T-flip flops. But T-flip flop was not available in the standard
cell library of the Magic layout editor used. So the design is carried out using D flip flops which
were available in the standard cell library. The combinational circuit designed for the counter is
given in Fig. 4.14. The flip flops are positive edge-triggered ones with an active low reset (RST).
Clock period of the counter clock:
The counter starts its operation at the time when the sampling period is over, and when a
constant held voltage is fed to the comparator from the S/H output. Since it is a 7-bit counter, so
it has to go through 128 bit combinations in T = 0.01 sec. Therefore, time period for the clock =
0.01/128 = 78.125us.
Choosing equal on and off periods, TON = 39.06us, and TPERIOD = 78.125us.
Fig. 4.14 Design of the 7-bit Up Counter
62
Fig. 4.15 Layout of the Analog to Digital Converter in the Magic Layout Editor
The layout of the ADC in the Magic layout editor is shown in Fig. 4.15.
63
Fig. 4.16 below shows the H-Spice simulation waveform of the output of the ADC.
Fig. 4.16 H-Spice Simulation Waveform of the ADC for Analog Input Voltage = 2.4V (Digital Output: 0111101)
64
CHAPTER V
CONCLUSIONS
This chapter concludes the thesis work. It mainly focuses on two aspects of the work - one deals
with the achievements and accomplishments of the present work and the other highlights the
scope of future work. It is described in the following two different sections.
5.1 Summary
The thesis work introduced the detailed testing procedure and integration of the novel MEMS
based microelectrode sensor system designed for in situ environmental monitoring. From the
electrochemistry and MEMS point of view, the MEAs proved to be very stable in operation, and
performed faster than the commercial milli-electrodes available. From the circuitry point of
view, the sensor chip amplifies and reproduces the sensed signal at its output in a form suitable
for accurate measurements. It can also be read on an external display device like a LED display.
The chip also aids in eliminating the effects of external noise which acts as the main source of
disturbance in rendering the results erroneous. The printed circuit helps in further elimination of
noise. The potentiometric measurement gives the voltage developed across the two
microelectrodes while the amperiometric measurement gives a measure of the current flowing
through the electrodes. Both of these measurements depend on the external conditions in which
the probes are placed and vary with the change in conditions. Thus from a standardized datasheet
giving the value of the signal produced against the environmental conditions producing it, one
can easily judge the external conditions from a knowledge of the signals produced. This not only
65
helps to evaluate the external conditions, but also aids in controlling them as per the requirement.
The other advantage of the system developed is that it is portable and hence and can be deployed
in field tests. In summary, the results prove beyond doubt that that a new generation of a robust,
integrated microelectrode sensor system intended for use in situ in the environment to monitor
the external conditions, has been successfully developed.
5.2 Future Work:
The future work of the project primarily includes the implementation of the second generation
sensor chip. At the time the present sensor chip was designed, the requirements were not very
clear regarding the range of operation. Now that the requirements are more explicitly known, it
will help in the future design of the chip. As far as the fabrication of the microelectrodes is
concerned, new electrodes which will function more efficiently and precisely are being
developed by the other members in the project. Amperiometric testing needs to be done on the
MEAs designed and fabricated for the purpose. In Chapter IV, the phase-II design of the
potentiometric and amperiometric circuits have been presented, but the circuits need to be
refined, laid out and then simulated to check their correct functionality as per the requirements.
One of the primary aims, as always, is the elimination of high frequency noise apart from
precision. Also, the Analog to Digital converter needs to be incorporated inside the chip for
obtaining a digital output.
66
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