Upgrading the Digital Upgrading the Digital Component of the Bunch Component of the Bunch

Current MonitorsCurrent Monitors

Josh KlineJosh Kline

Mentor: Alan FisherMentor: Alan Fisher

Where? What? Why?Where? What? Why?

The PEP II storage rings at the Stanford The PEP II storage rings at the Stanford Linear Accelerator Center.Linear Accelerator Center.

The digital portion of the bunch current The digital portion of the bunch current monitor interface system.monitor interface system.

The original components are from 1995 The original components are from 1995 and have become difficult to replace.and have become difficult to replace.

How the ring worksHow the ring works

Electrons/positrons are fed to the ring from Electrons/positrons are fed to the ring from the linear accelerator.the linear accelerator.

The ring pushes bunches of The ring pushes bunches of electrons/positrons around the ring using electrons/positrons around the ring using microwave radiation.microwave radiation.

Buckets are phases of the standing Buckets are phases of the standing microwave that supplies the bunch with microwave that supplies the bunch with the energy equal to what it radiates. the energy equal to what it radiates.

How the detectors workHow the detectors work

The detector measures the electric field of The detector measures the electric field of a passing charge bunch. a passing charge bunch.

The charge bunches are moving with The charge bunches are moving with relativistic speed, causing the electric field relativistic speed, causing the electric field to flatten so the detector sees a fast pulse.to flatten so the detector sees a fast pulse.

v

The analog electronicsThe analog electronics

The analog system turns the fast pulse of The analog system turns the fast pulse of the bunch current detector into two periods the bunch current detector into two periods of a sinusoid using a comb filter with a of a sinusoid using a comb filter with a reference frequency of 1428 MHz the then reference frequency of 1428 MHz the then signal goes through a low pass filter and is signal goes through a low pass filter and is then digitized.then digitized.

BLOCK DIAGRAMBLOCK DIAGRAM

DecimatorDigital toAnalog

Digitizer 6 FPGAsCombfilter

DecimatorDigitizer 6 FPGAs

Main controlFPGADigitizerDigital to analog

Combfilter

Detector

Detector

Current system

Proposed system

The current systemThe current system

Big problem, some of Big problem, some of the electronics have the electronics have become to old to be become to old to be replaced.replaced.

Little problem, the Little problem, the system is too slow to system is too slow to handle the full data handle the full data rate, so 7/8 of the rate, so 7/8 of the data is thrown away.data is thrown away.

A/D

Even

Decimator

Odd

Decimator

FPGAsFPGAs

D/A

The proposed systemThe proposed system

Big solution, modern Big solution, modern components.components.

Little solution, the Little solution, the new system is fast new system is fast enough to sample at enough to sample at the full data rate.the full data rate.

A/D

Digitizer

FPGA

D/A

DetailsDetails

Linux computer Linux computer One digitizerOne digitizer One FPGAOne FPGA One digital to analog One digital to analog

I/O busI/O bus

VXI crate processorVXI crate processor Two DigitizersTwo Digitizers Two Decimators Two Decimators Twelve FPGAs Twelve FPGAs One digital to analog One digital to analog

I/O bus I/O bus

Current Proposed

The First StepThe First Step

Testing the prototype using software Testing the prototype using software simulator, signal generator, and the last simulator, signal generator, and the last test will be connecting the prototype in test will be connecting the prototype in parallel with the current system.parallel with the current system.

ModelSimModelSim

Test BenchTest Bench

ConclusionConclusion

The prototype has been simulated using The prototype has been simulated using ModelSim.ModelSim.

The prototype has been tested using a The prototype has been tested using a saw tooth signal generator.saw tooth signal generator.

The final test is yet to be preformed. The final test is yet to be preformed.