useful methods for improving equipment performance in manufacturing

88Useful Methods for

Improving EquipmentPerformance inManufacturing

As IC manufacturing costs continue to riseand profitability becomes more difficult tomaintain, IC manufacturers are increasingtheir focus on the cost effectiveness, flexibil-ity, and longevity of existing fabs. As a result,existing fabs are implementing a variety ofequipment improvement programs (EIPs)and management strategies to increase thecompanyÕs utilization of assets (employees,as well as equipment and materials). Linespreviously drawn between management,engineering, and operators are also beingremoved to allow proactive improvements infab operations.

This chapter focuses exclusively on improv-ing the cost effectiveness of existing fabs.There are over 800 fabs in operation todaythat are continually challenged to reducemanufacturing costs. These fabs strive foron-going performance improvement, whiledealing with the limitations of existing facil-ities, such as older equipment sets and lim-ited funding for new technology. Especiallyduring years of industry slowdown, compa-nies must continuously improve equipmentperformance and fab productivity in lieu ofpurchasing new equipment and new fabs.

Next, equipment improvement programsthat improve the performance and produc-tivity of equipment are presented. Examplesinclude the upgrade of wet processing sta-tions; development of a manufacturable,

collimated sputtering system for Ti/TiNdeposition; improvement of tungsten etchand CVD systems; characterization of abatch RIE reactor; and improvement of anAPCVD system. This section is followed bya discussion of cost modeling and examplesdemonstrating when new equipment pur-chases become feasible.

Equipment-level Hardware and Software

IC manufacturers generally instituted equip-ment improvement programs (EIPs) whenequipment is new, or, is being used in pro-duction and may not be consistently per-forming to specification and requiresfrequent maintenance. Typically, new equip-ment that provides the necessary processresults in the prototype or R&D stages mustbe modified to allow its use in a manufac-turing environment. Manufacturability mustbe improved to reduce downtime due toscheduled and unscheduled maintenance,identification and elimination of the causesof high particle levels, and generally, reduc-ing processing costs.

In addition, an improvement program mightbe initiated because the system is exhibitinghigh downtime and is identified as the causeof yield loss. Efforts to improve systemthroughput might be performed when a toolis causing grid-lock, limiting fab productiv-ity. For instance, if a CVD tool is typically

INTEGRATED CIRCUIT ENGINEERING CORPORATION 8-1

8 Useful Methods for Improving EquipmentPerformance in Manufacturing

Useful Methods for Improving Equipment Performance in Manufacturing

INTEGRATED CIRCUIT ENGINEERING CORPORATION8-2

waiting for product from a photoresist strip-per, an improvement program on the strip-per that reduces process time would allow amore continuous flow of wafers through theline. Finally, EIPs are performed to improvethe performance of existing equipment setsthat will be used to process the next genera-tion of devices. As requirements change,process capability usually needs to beextended, and issues such as uniformity,equipment availability, and others, maybecome more pronounced. EIPs are eitherperformed independently by the IC manu-facturer, or in conjunction with the equip-ment or material suppliers.

Here, the results of six specific EIPs arereviewed including:

¥ MotorolaÕs use of response surfacemethodology to improve a multilevel-metal etch process using a batch hexodereactor[1],

¥ AMDÕs use of an in-line particle monitorto reduce the defect density of an inte-grated tungsten CVD-etchback process by10-fold[2],

¥ IntelÕs use of Failure Modes and Effects(FMEA) analysis to eliminate a wafer back-side contamination issue in a W-CVDsystem, and to eliminate uniformity prob-lems that resulted from upgrading the W-CVD system from 150mm to 200mmprocessing[3],

¥ DigitalÕs modification of an oxidation fur-nace to enable processing of thin reoxi-dized nitrided oxide films for 0.5µmmanufacturing[4],

¥ VarianÕs and SematechÕs co-developmentof of a manufacturable process for colli-mated TiN CVD[5],

¥ IntelÕs improvement of an APCVDÕsexhaust system to improve film thicknessuniformity[6], and

¥ IBMÕs upgrade of six automated wet sta-tions at a cost of $1.9 million, saving nearly$7 million over the price of purchasingnew systems.[7]

Refining a Batch, Multilevel Metal EtchProcess

Design of experiments is a commonly usedmethod of process development today. It canalso be used to improve existing processes.At MotorolaÕs MOS 12 fab, engineersrecently improved the performance of ahexode batch etcher using screening experi-ments and response surface methodology.[1]

These techniques allowed the optimizationof individual step chemistries in a multilevelmetal RIE process. Targeting three criticalparameters, etch rate, uniformity and selec-tivity, the bulk etch process included:

¥ Descum of residual (undeveloped) pho-toresist from high aspect ratio openings,

¥ Etch of the hardmask (plasma enhancedoxide) used for profile control,

¥ Metal etch of Al-Cu (1.5 percent),¥ TiW etch, and¥ Passivation to prevent post-etch corrosion.

MotorolaÕs process was a four-layer, Al-Cumetal/polyimide dielectric interconnect on100mm silicon wafers, that used the AppliedMaterialsÕ Precision 8300 hexode RIE systemto simultaneously etch the metal stack.[1]

Tools used in the study included cross-sec-tional analysis to view sidewall profiles,Tencor Alpha-Step 100 or NanometricsNanospec, and SEMs. Original screeningexperiments identified the key variables thatdetermine the desired results (including etchuniformity, etch rate, and selectivity). In thedescum process, a fractional factorial designidentified that DC bias and pressureaccounted for 90 percent of the variation in



etch rate, while 88 percent of the variation inuniformity was modeled by DC bias, pres-sure, and O2 flow. A four factor response sur-face experiment allowed simultaneousoptimization of the hardmask etch rate, uni-formity, and etch selectivity at 250�/minetch rate and greater than 3:1 hardmask tophotoresist selectivity (Figure 8-1). Theexperiments allowed a catering of processneeds. For instance, in this process, loadsizes typically vary and the engineerswanted to optimize the metal etch for con-stant etch rate and good uniformity acrossvarious load sizes. The original CF4 metaletch chemistry was replaced with CHF3 andCl2 (to prevent undercutting), followed by aCF4/O2 step to promote anisotropy.Response surfaces and experiments led to anoptimized RIE process with known relation-ships between process parameters (i.e., DCbias, pressure, and chemistry) and results(etch rate, selectivity, and etch uniformity).[1]

Improving Tungsten CVD and EtchProcesses

AMD developed an in-line defect densitymonitor to dramatically improve existingtungsten CVD and etch processes.[2] In thisstudy, failure analysis revealed that tungstendeposition and etchback steps were respon-sible for both low average yields and cata-strophic yield depressions. AMD developedan in-line defect density monitor to measurethe defect contribution for tungsten deposi-tion and etchback. By continuously monitor-ing the process, factors of ten improvementsin equipment, processes, and maintenancewere realized, while product yieldsimproved and low yield excursions wereeliminated.[2]

DC

Bia

s (V

)

DC

Bia

s (V

)

DC

Bia

s (V

o)

Pressure (mTorr)

Pressure (mTorr)Pressure (mTorr)

HARDMASK ETCH RATE (Å/min)

HARDMASK ETCH UNIFORMITY (%) HARDMASK ETCH SELECTIVITY (PEO:PR)

150.0

200.0

250.0

30.00

20.00

10.005.000

0.000

3.000

3.0002.000

1.0000.000

4.000

5.000

6.000

Source: Motorola/Semiconductor International 20190

Figure 8-1. Shaded Areas of Response Surfaces Indicate Process Windows



The Contamination Free ManufacturingGroup at AMD developed a laser scanninginspection test that allows real-time processmonitoring of a tungsten plug process. Theinspection system used was an Inspex-3500patterned wafer inspection tool. The monitorwafer was first patterned and etched to pro-vide alignment marks for the inspectionsystem and a focal plane during review. Thewafers had a Ti/TiN adhesion layer that wasrapid thermal annealed (RTA). The monitorcould reliably detect 0.7µm defects. Themonitor wafer was run as the first wafer ineach product lot. It was scanned before pro-cessing, underwent CVD and etch, then wasscanned again. The goal was to reduce defectdensity of the integrated tungsten depositionand etchback process by a factor of three.[2]

The result, based on the solutions shown inFigure 8-2, was a ten-fold reduction in defectdensity as measured by the integrated defectmonitor. In addition, the monitor wafer wasused to prevent the misprocessing of wafersunder high defect density conditions. Figure8-3 gives, on an arbitrary scale, the die yield

for a part that used the tungsten plugprocess, labeling the points at which perfor-mance improvements were implemented.

Eliminating Backside Contamination andUniformity Issues in a Tungsten CVDSystem

One strategy commonly used for equipmentimprovement is FMEA (Failure Modes and Effects Analysis), a systematic method usedto identify potential failure modes (causes) insemiconductor manufacturing, resulting in aranked priority of fab and die yield improve-ment activities. The FMEA approach typi-cally involves the documentation of:

¥ Unit process step,¥ Process owner (responsible engineer),¥ Process failure modes (i.e., backside conta-

mination),¥ Potential effects of the failure (i.e., low

yields, contamination of subsequent cham-bers),

¥ Potential causes of the failure (tungstenCVD process),

Problem Detected by Monitor in CVDand Etchback Systems

Heat transfer from wafer heaters causeddeposition inside the CVD shower head,leading to deposition of large defects (1– 5µm) on wafer

Gas phase nucleation in CVD chamber dueto 1:1 ratio of SiH4 : WH6

Increased CVD system defect density dueto clogging of dry pump burn box ofprocess gases, also affecting pumpingcapacity

Periodic detection of Ti/TiN and W flakeson wafers after etch back

Solution

CVD system supplier provided andinstalled a water-cooled version of theshower heads, preventing problem fromreoccurring for 1 year

Revised timing of reactive gasintroduction

Altered preventive maintenance of pumpto maintain system cleanliness

Periodic cleaning of etch chamber withdilute mixture of H2O2 in H2O

19981

Figure 8-2. Improving Defect Density in Tungsten CVD and Etch Processes



¥ Current controls, ¥ Rating of risk factors (rated for severity,

occurrence, and detection), ¥ Assignment of risk priority numbers, and¥ Recommended actions given to eliminate

the problem.

Intel recently used an FMEA program,together with Finite Element Modeling toidentify and rectify the cause of low yield ona tungsten CVD system.[3] In this example,the backside tungsten (BSW) depositionproblem was first detected by a downstreamwet station that reported higher than normallevels on the station monitor. Effects of thefailure were low line yields and contamina-tion of several steppers, lithography tracks,diffusion furnaces, and wet stations.

Tungsten CVD steps include: the nucleation,the bulk deposition, and the backside etch(BSE) steps. BSE can be performed by elevat-ing the wafer in the chamber, so that it isflush with the showerhead at the top of thechamber, and an RF plasma is used toremove residual tungsten left on the waferbackside from the deposition. The FMEAstudy revealed that wafer placement andargon flow were the most important causesof problems (Figure 8-4). Wafer placementwas corrected by visually checking it on aregular basis. Changing the argon MFC andregularly checking the calibration factors onthe MFCs on a weekly basis solved the prob-lem. Finite element simulation using a com-mercially available program, FIDAP,revealed several process regimes (with dif-ferent gas flow rates), where redepositionwas more likely to occur. Long term, simula-tion was used to develop improved processrecipes.[3]

27-F

eb04

-Mar

09-M

ar14

-Mar

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ar24

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29-M

ar03

-Ap

r08

-Ap

r13

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r18

-Ap

r23

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r28

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-Ju

l

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ct

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ect

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sity

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15

20

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40

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H2O Shower Heads

FixedNucleation

Defects EtchSystem

PM

Date19852Source: AMD/IEEE/SEMI

Figure 8-3. Factor of Ten Reduction in Defect Density for a Tungsten CVD Tool



Intel followed this EIP with a second projectdesigned to eliminate poor uniformity of atungsten CVD process resulting fromdirectly scaling-up a 150mm process to a200mm process (Figure 8-5)[3]. To make amanufacturing-worthy process, the engi-neers conducted process simulations and anFMEA. The model showed the presence ofvortices at the edge of the wafer where reac-tant gases from the top and the argon purgefrom the bottom merge before gettingpumped away. The FMEA (Figure 8-6)pointed to residue accumulation of fluorinein the reactor chamber due to the higheramount of WF6 used to process the largerwafers. This was the cause of the uniformitydrift, subsequently confirmed by residualgas analysis. The action taken was to intro-duce inert purge between wafers, and

increasing pumping speed by increasingpump size and inner diameter of pumpingline. These actions reduced the uniformitydrift from every 25 wafers to approximately150 wafers. To further improve the process,the susceptor ceramic ring spacing was laterincreased and the flow rate of the bottompurge was lowered to reduce vortices at theedge of the wafer and improve uniformity.

In these studies, Intel recommends using theFMEA to solve process and equipment prob-lems in the manufacturing line because it iseasier than simulation studies and uses lessresources. In both cases, the FMEAs quicklyled to the root causes of the problems. Onefurther recommendation was the use ofmodeling techniques at new equipment andprocess development stages.[3]

Causes Occurrences Effects Severity Detection Protection RPNRecommended

Actions

Argon Flow

Wafer Variability

Pressure(baratron)

Pressure Circuits

InadequateChamber Clean

Wafer Placement

Spacing

Uniformity

Different backsidessusceptible todeposition

Change indeposition rate

Change in display

Residual W inchamber givesresidues over time

WF6 seeps underthe wafer

Backside etchuneven

MFC fault

Not detected

Not detected

Not detected

Higher defectsafter severalwafers

Uniformity

Visual anduniformity

Check MFCcalibrationweekly

Run limitedproduct types

Calibrateweekly

N/A

Check softwarerevision

Check robotbelt tension

Lube shafts

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12

19854Source: Intel/IEEE/SEMI

Equipment Name: ABC ReactorSubsystem/Function: LPCVD/W

Figure 8-4. FMEA for Backside Tungsten Deposition Problem



00

0.5

1.0

1.5

2.0

2.5

3.0

3.5

4.0

4.5

5.0

5 10 15 20 25 30 35 40 45 50 75

Sca

led

Un

it

Wafer19855Source: Intel/IEEE/SEMI

Figure 8-5. Uniformity for the Original Tungsten CVD 200mm Process

Causes Occurrences Effects Severity Detection Protection RPNRecommended

Actions

Robot drift

MFC drifts

Gas deliverypressure

Pump speeds

ResidueAccumulation

Uniformity

Uniformity

Unknown, MFC (?)

All parameters

Uniformity, others

None

MFC fault

MFC flow

Interlocks

None

Calibrate robot

Performcalibrationregularly

Observe

N/A

Introduce inertpurgeIncrease pumpingspeed

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Equipment Name: ABC ReactorSubsystem/Function: LPCVD/W

Figure 8-6. Failure Modes and Effects Analysis for Reactor Scale-Up



Developing a New Dielectric ProcessUsing an Existing Furnace

Digital Equipment Corp. in Hudson, Mass.,improved the manufacturability of a thinreoxidized nitrided oxide (ROXNOX)process, a new application for a horizontaloxidation furnace, developed for the pro-cessing of a 0.5µm, 3.3V, 64-bit microproces-sor[4]. The Model BDF 41 furnace from BruceTechnologies was modified to allow low-pressure processing (Figure 8-7). To formsufficient nitrogen at the Si-SiO2 interface,high-temperature processing (>950¡C) wasneeded, and low pressure allowed bettercontrol of the oxidation rate. For this process,a very thin reoxidized nitrided oxide film(<100�) was used to improve the hot carrierresistance of the gate. Running the prototypeprocess in the existing furnace resulted insevere downtime due to equipment malfunc-tions, high particle levels and poor film uni-formity. A series of equipment and process

changes were performed to develop a pro-duction-worthy process. These changesresulted in a factor of two film uniformityimprovement, a twenty percent improve-ment in equipment availability, a factor oftwo reduction in average particle counts, andsignificant reduction in the magnitude andoccurrence of particle spikes.[4]

Figure 8-8 summarizes the hardwarechanges made to significantly reduce in-process particle levels and improve film uni-formity to ±4�. As a result of these changes,furnace availability was improved by 20 per-cent, and time spent performing unsched-uled maintenance was reduced by 22percent. Reduced standard deviations inboth cases indicates better process stability.Particle tests, using test wafers at the frontand rear of the furnace, measured on aTencor Surfscan 4500, revealed significantimprovements in particle levels and film uni-formity (to ±3�).

30 InchFlat Zone

18 ft

New IsolationValve Position

Pump

Old Positionof IsolationValve

Gas Inlet

19857Source: DEC/IEEE/SEMI

Figure 8-7. Modified Diffusion Furnace Used to Process Thin Reoxidized Nitrided Oxide Films



Developing a Collimated SputteringProcess Using Existing Equipment

The next example also illustrates a procedureused to modify an existing piece of semicon-ductor equipment for a new application.Through a partnership between Varian andSematech, a manufacturable process fordepositing barrier metal (Ti/TiN) into sub-half-micron contacts and vias, using a colli-mated sputtering system was developed.[6]

Using a modified version of VarianÕs M2000PVD system, design of experiments wasused to optimize the step coverage, thicknessuniformity, material properties, resistivity,defect density, and cost of ownership of theprocess. ÒMarathonÓ tests, which led to thereplacement of the collimator material andother modifications, significantly improvedsystem manufactuability for use in 0.35µmprocessing. Over the course of a year, at least14,000 wafers were processed. Daily calls,

weekly conference calls, and monthly meet-ings between team members as well andquarterly reviews with the Sematech board,facilitated communication and cooperation.

The use of low contact resistance titaniumfilms as a barrier metal is challenging dueto the need to provide conformal sidewallcoverage, with no thinning and no Òshoul-der cuspingÓ in high aspect ratio (5:1 ormore) structures. New CVD systems arecompeting with collimated sputtering toolsfor this application. Collimation, which iscapable of controlling the angle of inci-dence in a sputtering environment (Figure8-9), is one solution that may be able toextend barrier metal use well beyond0.5µm processing. A key issue in collimatedsputtering is the low useful life of the colli-mator, which has prevented its use in amanufacturing environment.

Problem Encountered Solution Used Improve Manufacturability

Initially replaced o-ring every 3 weeks, eventually extending the length of the tubeto drop the temperature (rear), and redesigned the front door to place o-ring away from the radiation heat source

Installed a Flow Surge Suppressionsystem to allow slow reduction in pressureduring pump down

Moved gate valve to back of the tube, andinstalled over/under pressure transducer,allowing interval advancing only when thetransducer sensed equal pressure insideand outside the tube. Front door will not open until pressure inside equals pressurein fab

Modified recipe to eliminate rapid pressuredrops

O-ring failures after 4 weeks of continuousoperation on rear of tube and front door

High particle levels during initialpumpdown, due to rapid drops in pressure

High particle levels due to pump-line back-fill into process chamber as door wasopened and chamber changed from lowpressure to atmospheric

High particle counts and film thicknessnon-uniformity due to programmedchanges in pressure during processing

19982

Figure 8-8. Hardware Modifications Made to Improve the Manufacturability of a New Reoxidized Nitrided Oxide Process



The system used in the EquipmentImprovement Project between Sematech andVarian incorporated a degas station, magnet-ically-enhanced etch module, and collimatedand uncollimated Ti/TiN modules[5]. Stepcoverage and bottom fill for collimateddeposition showed substantial improvementover uncollimated films, particularly below0.8µm contact width (Figure 8-10). Marathontests revealed the need to replace the colli-mator material, which could not withstandthe thermal environment and reduced thealready slow deposition rate due to filmbuild-up on the collimator. Through variouschanges, throughput was brought up to 20wafers per hour (average), new collimatorlife was increased to over 10,000 wafers,system reliability was improved, and cost ofownership was improved by 33 percent. Theprogram also led to classes in statistics, pas-sive data collection, and basic design ofexperiments being taught at Varian bySematech employees.[5]

Equipment Improvement Program for anAPCVD System

After system operation demonstrated unpre-dictable film uniformity and high machinedowntime, Intel performed an EIP on anAPCVD system. The goal was to reduce theimpact of air flow/exhaust fluctuations onfilm thickness uniformity.[6] The exhaustpressures from semiconductor process tools,and atmospheric tools in particular, havebeen known to be susceptible to changes andfluctuations. This problem becomes com-pounded in a rapidly changing cleanroomenvironment, caused by installation and/orremoval of tools with different exhaust pres-sure requirements.

Intel first characterized the system usingextensive ÒsmokeÓ tests (Figure 8-11) and hotwire anemometer studies. Installation ofpanels to isolate the heater elements and theprocess chamber from unpredictable air flowresulted in temperature variability in theAPCVD system to less than 10¡C, despitefluctuations in the bay-to-chase air flow andscrubber exhaust. System availability andwafer-to-wafer BPSG thickness uniformity(Figure 8-12) were significantly improved.[6]

No Collimation With Collimation19859Source: IEEE/SEMI

Figure 8-9. Typical Step Coverage Profiles

Contact Diameter (µm)

Aspect Ratio

UncollimatedBottom Coverage

CollimatedBottom Coverage

UncollimatedSidewall

CollimatedSidewall

0.8

1.4

19%

50%

15-36%

21-26%

0.6

1.6

N/A

45%

N/A

19-22%

0.4

2.3

4%

40%

3%

15-20%

19860Source: Sematech/Varian/IEEE/SEMI

Figure 8-10. Step Coverage Comparison of Collimated Versus Uncollimated

Ti/TiN Sputter Depositions



Rejuvenating 5-year-old Wet Stations

The final example demonstrates a completeupgrade program of six wet stations by IBMand Phoenix Process Automation, which cost$1.9 million, saving nearly $7 million of thecost of new wet station.[7] After 5-6 years ofoperation, the wet stations were characterizedby excessive downtime, frequent chemical

spills, high scrap rates, and reduced through-put. Engineers at IBMÕs Essex Junction,Vermont, fab and Phoenix ProcessAutomation personnel worked closely to planand implement a comprehensive upgradeprogram that included major improvementsto hardware and software controls, toimprove wet station reliability and productiv-ity. One added benefit to the year-long

LaminarFlow

Handler

Subfloor

Heaters

ReactionChamber

Injector Baffle

ChamberExhaust

Bay

GasJungle

Throttle Valve

12" Scrubber Line

Baffle

Baffle

Chase

Bay Lateral

Photohelic

TurbulentRegion


Figure 8-11. Side View of APCVD Air Flow Patterns

0

200

400

600

800

Data Numbers

Sta

nd

ard

Dev

iati

on

Film

Th

ickn

ess

(Å)

After the Panels Installed

19862ASource: Intel/IEEE/SEMI

Figure 8-12. After Panels Were Installed to Isolate the Heater Elements, Wafer-to-Wafer BPSG Film Uniformity Improved

upgrade program was the fact that it pro-vided production-worthy wet benches in afaster turnaround time than new systems.

The upgrade required replacement of thecontrol hardware, installation of new controlsoftware, completely upgraded plumbing,and refurbishing of the robots on the wet sta-tions. Project steps are shown in Figure 8-13.This wet station upgrade led to:

¥ Extended wet station life,¥ Doubled station capacity,¥ Decreased losses caused by robot and con-

trol failures,¥ Improved sanitation, and¥ Increased yield

In addition, it also improved systemthroughput to over 120 wafers per hour,increased system availability to over 85 per-cent, extended mean-time-to-failure to 215hours, and significantly reduced the numberof chemical spills that occurred (Figure 8-14),thereby enhancing worker safety.[7]

The Attractiveness of Used Equipment

Over the last several years, used equipmenthas gained a big boost in the industry as cost-sensitivity and new equipment prices con-tinue to rise. About 8 years ago, TexasInstruments formed a department specializ-ing in purchasing refurbished tools. Sincethat time, many companies have followedsuit. To date, about half of the total numberof semiconductor manufacturers have takenadvantage of the availability of used wafer



• Upgrade proposal planned between Project Manager at Phoenix, IBM processengineers, maintenance technicians, wet station operators, and equipment managers.

• Phoenix personnel set-up office on-site to coordinate detailed controls, plumbing and

hardware rework investigation. • Project manager drafted design specifications and outlined overall project schedules

for six stations. • Planning phase completed after six weeks. Equipment Procurement Specification

signed by IBM and Phoenix. • Arrangement of alternate process routes for product and safe removal of first

sulfuric/nitric acid processing station. Removal and decontamination of robot and track,laminar hoods, and plumbing. Physical layout of station modules, electrical and electronic controls, facility drains, and control software.

• Installed new wafer transfer unit with 50-wafer capability (from 25). • Refurbished flow hoods and installed frames. Reinstalled chemical and rinse modules. Drip pans installed. • Installed new power distribution center. Upgrade of wet station was completed within

8 weeks. • Process was repeated for five other stations.

19983Source: ICE

Figure 8-13. Steps Taken to Upgrade Six Wet Stations Saving $7 Million Relative to New SystemsÕ Cost



processing, testing, and assembly equip-ment. Historically, the market for usedassembly and test equipment has enjoyedthe greatest success as a number of compa-nies have marketed reconditioned or reman-ufactured testers, dicing saws, wire bonders,die bonders, etc., for years. In 1994, Hewlett-Packard officials reported that used equip-ment represented 10 percent of automatictest equipment (ATE) sales[8].

Aside from cost concerns, used equipmentsales are also increasing due to the wide-spread availability of the systems today,which results from years of companieshaving to retire hundreds of systems. Inaddition, many companies manufacturingnon-leading-edge chips would like to takeadvantage of the lower price of used equip-ment (typically 20-60 percent of new equip-ment prices). One of MotorolaÕs older fabs,making bipolar memories and linear analogdevices, saved 45 percent off new equipmentcosts by purchasing used equipment 25times out of 77[9]. More recently, companiesin regions of the world that have just begun

developing their semiconductor industry,such as China, are finding used equipmentparticularly appealing. In addition, overallequipment reliability has also improved dra-matically since the early days of semicon-ductor manufacturing, making the usedoption even more attractive.

Used equipment goes by many namesincluding Òrefurbished,Ó Òreconditioned,ÓÒremanufactured,Ó and Òpre-owned.ÓPerhaps pre-owned is the most accurate termas the equipment typically retains a greatpercentage of its original value. Althoughstrict definitions do not exist, users generallyuse ÒrefurbishÓ or ÒreconditionÓ to describea system only requiring system cleaning andthe replacement of a few parts prior to resale.Alternatively, if the equipment is rebuiltfrom the ground up, replacing some or mostof the system components, the equipment isÒremanufactured.Ó Remanufactured equip-ment often must meet or exceed originalequipment specifications and may be deliv-ered with a one- or two- year warranty.

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DecNovOctSepAugJulyJuneMayAprMarFebJan

Nu

mb

er o

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pill

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Before Upgrades (First Year)

After Upgrades (Second Year)

19863Source: IBM/IEEE/SEMI

Figure 8-14. Reduction in Number of Chemical Spills Due to Wet Station Upgrades



Remanufactured equipment offers advan-tages of lower purchase price and fasterreturn on investment than new equipment.Used equipment may also be immediatelyavailable through an IC manufacturer,equipment refurbishing company, or assetmanagement company. The downside topurchasing pre-owned equipment includesthe possible risk of owning and operating theequipment typically without OEM support,limited availability of spare parts, no war-ranty or service agreements, and poorsystem-to-system matching for tools thathave been owned and operated in differentfashions in the past.

For these reasons, some OEMs work withone specific company to ensure quality andperformance of remanufactured systems. Forinstance, Lam ResearchÕs popular AutoEtchline of plasma etchers, of which over a thou-sand systems are installed worldwide, arebeing remanufactured and sold by AspectSystems. Tegal is selling remanufactured ver-sions of its 900 and 1500 series plasma etch-ers, with an installed based of over 1200systems. Concept Systems caught onto thisconcept several years ago when it beganremanufacturing Gemini I and II epi reactors,of which around 300 systems are installed.Another company, Raines Technology, builtits business on remanufacturing plasma etch-ers, although it currently markets a variety ofproducts. Karl Suss offers remanufacturedversions of its machines, often ensuring thatthe systems have been maintained by Sussfield personnel over the course of themachineÕs life. In addition to these compa-nies, numerous small shops in key manufac-turing areas will now remanufacturesemiconductor equipment.

Evaluating Criteria for Used Equipment

Figure 8-15 lists the principle issues to con-sider when evaluating pre-owned equip-ment. In addition to these concerns, itshelpful to keep in mind that certain systems,such as wet baths, chemical distribution sys-tems, and gas cabinets, do not lend well torefurbishing, while photoresist processingsystems, ion implanters, horizontal diffusionfurnaces, epi reactors, CVD systems, andaligners do[9].

The Importance of In-situ Monitoring

There is an overwhelming need to monitorprocess parameters and wafer-level charac-teristics during processing, thereby detectingyield-limiting events as they occur. The needfor in-situ sensors increases as the industrymoves to larger wafers (200 or 300mm), andthe value of the wafer being processed is sohigh that off-line process controls no longersuffice. In addition, as discussed in Chapter1, it is not only the high price of monitor orparticle-per-wafer-pass (PMP) wafers thatmakes them undesirable, but also theirinability to precisely depict process condi-tions for the actual product wafers.

In-situ Particle Monitors

Perhaps the best candidate for in-situ moni-toring of vacuum-based tool operation isthe in-situ particle monitor. The beauty ofin-situ particle monitors is that they candetect a wide variety of process problems, asmany of them result in high particle levels(sampling shown in Figure 8-16). Mostimportantly, studies show that these moni-tors can result in an annual savings of$200,000 to $1.5 million for a single-waferprocessing tool! Cost savings result from a



number of areas including the detection ofmisprocessing, the optimization of PM andchamber cleaning cycles, the elimination orsignificant reduction in test wafer usage,and real-time detection of particle burststhat lead to yield loss. In fact, in-situ particlemonitors have the potential to eliminate test(PWP) wafer usage. In essence, in-situ sen-sors facilitate yield improvements and cycletime improvements that are virtually impos-sible without their use. They also provide avery promising path to true run-to-run orreal-time process control. In addition, thekey factor that has prevented their use in aproduction environment, the lack of avail-ability on commercially available wafer pro-cessing tools, is being resolved as companiesincluding Eaton, Lam Research, Genus, andApplied Materials, are beginning to offer in-situ particle monitors on their tools. At leastpart of this progress is due to the fact that

equipment vendors have been using in-situparticle monitors for process and productdevelopment for several years.

Estimated Cost Savings Above $200k perTool

In 1992, Sematech engineers reported a$200,000 annual cost of ownership savingsusing an in-situ particle sensor in an EatonNV-20A high-current ion implanter.[9] Theyrealized a 4 percent decrease in the numberof particles generated during the processand a 15 percent increase in tool availabilitydue to improved operation of chambercleaning cycles and reduction of ion beamcurrent to minimize particle generation.[9]

In fact, Eaton pioneered the offering of in-situ particle monitors as a standard optionon its implanters.

• Performance to specifications

• Installed base of the systems

• Necessary facility modifications

• Upgrade-ability and other configuration changes

• Application(s) for which the system was previously used

• Warranty

• Training

• Installation

• Equipment reliability (MTBF and MTTR)

• Preventive maintenance procedures, and time needed to

requalify the equipment following downtime

• System condition

• System set-up, recipe storage capacity

• Initial system qualification -- what needs to be done and how long will it take?

• Typical throughput (wafers/month)

• Availability of spare parts, availability of additional units of the same system

• System-to-system matching

19979Source: ICE

Figure 8-15. Considerations for Purchasers of Used Equipment



Since then, a conservative $213,500 annualsavings was estimated by a group of engi-neers from Sematech, Hewlett-Packard,Lam Research, and High Yield Technology,using an in-situ particle monitor on a Lam4400 polysilicon and silicon nitride etcher(Figure 8-17).[11] Importantly, the group wasable to correlate in-situ particle counts tofunctional yield, short loop monitors, andpatterned wafer visual inspections. Costsavings resulted from the identification ofmisprocessing (in this case, accidentalreplacement of an empty C2F6 cylinder witha cylinder of CHF3), the avoidance of yieldloss due to an identified ÒseasoningÓ periodfollowing electrode replacement, and areduction in usage of test wafers. Figure 8-18 shows the correlation between in-situ

particle counts per lot versus normalized lotyield, and Figure 8-19 shows the cost sav-ings calculation.[11]

Most recently, LSI Logic and Lam Researchshowed that $1.5 million per year can besaved using an in-situ sensor in a Rainbow4500 oxide etcher. This savings is due toincreases in yield, extension of electrode life,and elimination of test wafer usage. In addi-tion, a 15 percent increase in system uptimeresulted from the optimization of PM andchamber cleaning cycles. The studyÕs correla-tion between probe yield and in-situ countsis shown in Figure 8-20.[12] Importantly, thisstudy showed that in-situ counts are morestable than PWP counts, causing LSI to elim-inate the test wafer usage completely fromthis process.

Process Optimization

CVD

Etch

IonImplantation

PhotoresistStripping

Sputtering

Diffusion

All VacuumProcesses

Determine effectiveness of dry cleaning processAbility to adjust gas flow rates to eliminate gas phase nucleation (W-CVD)Indicate need for electrode replacement

Determine process effects caused by using inherently dirty chemistries such as WF6

Determine photoresist problems (i.e.: insufficient edge bead removal, improper prebake, etc.)Ability to maximize beam current to increase throughput while preventing resist burningGain more effective use of cleaning procedures and gettering implants

Detection of incomplete stripping

Detect flaking on TiN and TiW films from clips or targetsDetect cathode arcingIndicate need to change clampsDetect out-of-control wafer backside conditions

Detect leaks from chamber doorDetect flaking from walls as temperature changesDetect the scraping of cantilevers

Directly indicates need for chamber cleansIndicate whether a chamber is ready for processingDetect leaking or degrading O-rings, valves, etc.

Source: Semiconductor International 19910

Figure 8-16. Process Events Optimized Using In-Situ Particle Monitors



Vacuum Manifold

HYT SensorDummy Sensor

19911Source: Lam/HYT/IEEE/SEMI

Figure 8-17. HYT Sensor Located in the Etch Chamber Vacuum Manifold of a Lam 4400 System

9/20

1:0

5

Source: IEEE/SEMI

9/20

22:

05

9/21

2:3

5

9/21

3:3

5

9/22

3:0

0

9/23

11:

00

9/23

15:

50

9/23

22:

35

9/23

23:

46

9/27

13:

45

9/27

15:

45

9/27

23:

00

9/28

1:2

0

9/28

8:05

9/29

7:4

0

9/29

8:4

0

9/30

5:1

5

9/30

14:

10

9/30

19:

41

Upper Electrode Changed

Date-Time of Lot Processing

No

rmal

ized

Ave

rag

e L

ot

Yie

ld

Ave

rag

e o

f T

ota

l In

-Sit

uP

aric

le C

ou

nts

Per

Lo

t

Total In-Situ Counts

>0.2 micron Counts

30

0

25

20

15

10

5

R-Square = 0.65 forlast 10 points

Average Normalized Yield

Average Normalized Die Yield

19912A

Figure 8-18. Correlation Between In-Situ Particle Counts and Yield



The critics of in-situ particle monitoringclaim that the sensors are not sensitiveenough, that they are too costly to imple-ment in every piece of process equipment,and, most importantly, that they may impactthe reliability and availability of the processequipment. Much of this skepticism stemsfor early sensor use where reliability wasquestionable. Today, production-worthy

sensors are available from companiesincluding High Yield Technology, ParticleMeasuring Systems (PMS), and TSI. Theargument of sensitivity is not very relevantas often, when smaller particles are gener-ated, large ones are also generated. In addi-tion, unless the sensor is not detecting anyparticles (which has not been shown tooccur), the particle data is useful.

EventEstimateof Wafers

Saved

Estimate ofEvent

OccurrencePer Year

TotalWafersSaved

Per Year

WaferValueat the

ProcessStep

SavingsPer Year

(K$)

Changein Wafer

CostBased onCOO ($)

AnnualChangein COO

(K$)

ElectrodeChange

PWPWafers

Per Week

WrongGas

Total

20

18

24

12

52

1

240

936

24

$500

$50

$150

$120.0

$46.8

$3.6

$170.4

$1.11

$0.31

$166.7

$46.8

$213.5

Source: IEEE/SEMI 19913

Figure 8-19. Potential Return on Investment Realized by Using In-Situ Particle Monitors

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16

Pro

be

Yie

ld(A

vera

ge

Die

Per

Waf

er)

ISP

MP

arti

cle

Co

un

t(0

.2–2

.0µm

)

Average PM1 ISPM Particle Count

Average PM2 ISPM Particle Count

Test Lot Number (Total of 266 Wafers)

Source: Semiconductor International 19914

Good Die Per Wafer

Figure 8-20. Good Correlation Between In-Situ Particle Counts and Probe Yield



The challenges associated with building in-situ particle sensors into process toolsincludes positioning the sensor so thatcounts accurately reflect counts at the waferlevel and the sensor optics do not becomecoated with films. Most importantly, theenormous amount of data collected by in-situ particle monitors makes it very difficultto manage. However, with data storage capa-bility increasing nearly every day, it isexpected that such an analysis should provepossible very soon. Otherwise, techniquesmust be developed to record only particlebursts that represent out-of-spec processingconditions.

Other Promising In-situ Sensors

Beyond these applications, there are signifi-cant needs to monitor particle levels inprocess fluids (especially chemical purity andconcentration in wafer cleaning/etchingbaths); critical dimensions (CDs) followingphotoresist development; uniformity, selec-tivity and CD control during etch; film thick-ness and composition during CVD andsputtering processes; and temperature duringRTP, CVD, epitaxy, and etch processes.

During TIÕs MMST program, multi-pointfiberoptic temperature sensors, acousticthermometers, scatterometry systems andellipsometers were developed for many ofthese purposes. For plasma processing, TIfound that certain well-establishedprocesses, including polysilicon etch, tung-sten etch, and nitride strip, are significantlyimproved with the addition of in-situ sen-sors (Figure 8-21). Resist ashing, on the otherhand, is a well-established process that doesnot benefit considerably from the use of in-situ sensors.[13] Over the next several years,ICE expects at least some of these sensors tobecome available on commercial etch andstripping tools. Figure 8-22 lists some of theoutstanding sensor needs for most waferprocesses, as identified by TI. Here weinclude only the sensors needed to measurethe process state (e.g., plasma density, deliv-ered power) and the wafer state (e.g. filmthickness, uniformity), as many of theequipment state parameters are alreadymonitored by commercially availableprocess tools.[14]

Process Sensor Type Sensor Use

Polysilicon Etch

Silicon Nitride Etch

Tungsten Etch

Silicon Nitride Strip

Resist Ash

Single wavelength ellipsometer

Monochromator

Eddy current sensorMonochromatorCritical dimension sensor

Special ellipsometer

Monochromator

Endpoint controlEtch rate and uniformity control

Endpoint controlEtch rate and uniformity control

Endpoint calculationEndpoint controlPre-etch linewidth control

Endpoint controlDiagnostics

Endpoint controlDiagnostics

Source: Solid State Technology 19966

Figure 8-21. In-Situ Sensors for Plasma Etch Processes



CVD

PVD/PECVD

Oxidation

Implantation

Annealing/Diffusion

RTP/RTCVD

Lithography: Coat

Expose

Wet Develop

Silylation

Dry Develop

ChemicallyAmplified Resist

Plasma Etch

Wet Clean

Wafer temperatureLocal or spatially resolved plasma density

Dopant energyDopant dose

Dynamic wafer temperature

Endpoint

Endpoint based on latent image

As in plasma etch

Endpoint based on latent image

Local or spacially resolved: Reactant concentration Plasma density Ion energy Ion flux

Solution conc. at waferFluid flow at wafer surface

Particles on wafer Film uniformityDielectric film properties: Index of refraction Stoichiometry

Particles on waferGeneral film properties: Thickness (deposition rate) Uniformity Index of refraction(dielectrics) Sheet resistance (metals)

Film uniformity

Particles on wafer

Particles on waferPlanarity (reflow)

Dopant activationJunction depth

Resist thicknessResist uniformity

Latent imageImage overlay

Resist profile (width/height/slope)Latent image

Latent image

Resist profile (width/height/slope)

Latent image

CD of resist (before etch)CD of etched featureEtch rateEtch rate uniformity

Particles on waferSurface roughness

Process State 1 Wafer State 2

1 In-situ measurements required.2 In-situ measurements preferred, in line (e.g., metrology module on a cluster tool) is a good initial alternative, off line, if necessary.

19995Source: Solid State Technology/ICE

Figure 8-22. Sensor Needs for IC Manufacturing



In addition to these sensors, in-situ deposi-tion rate monitoring, typically performed inresearch applications, is desirable in pro-duction-level thin-film depositionprocesses.[15] The key requirements forthese sensors are cost effectiveness($15,000/sensor) and reliability of thesensor when integrated into the hardwareand process flow. Unless the sensorÕs relia-bility is at least as long as the time betweenpreventive maintenance routines, one mighthave to shut the equipment down just tochange (or clean) the sensor, which is notacceptable in a production environment.

Yield Modeling for New EquipmentDecisions

To effectively reduce manufacturing costs,many manufacturers will attempt to usetheir equipment for as long as possible.However, as equipment is pushed beyond itsoriginal capabilities, often lower defect levelswith existing equipment can only be attainedat a higher operating cost, usually in theform of higher maintenance costs. Therefore,engineers must continually weigh the costsof acquiring and using new equipment,versus continuing to operate existing equip-ment at higher costs.

Yield modeling is widely used for variousapplications in the semiconductor industryto determine in-line yield loss, forecast fac-tory outputs, and predict yield on futuredevices. Yield models help manufacturersfocus on improvements needed to maximizeyields and predict the effects of design ortechnology changes. The defect informationused in yield modeling comes from equip-ment particle levels, actual defects detected

on product wafers, and/or on back-calcula-tions based on actual yields and failureanalysis data.

Advanced Micro Devices (AMD) recentlyshowed how yield models can be used todetermine if it is more cost-effective to con-tinue running existing equipment, or replaceit with new and improved equipment.[16]

The company currently uses a yield model tocorrelate in-line particle counts to actualyields on a die-for-die basis. Defects are clas-sified, and Òkill ratiosÓ for defects based ontype or origin, location on the device, andtheir relative size, are compiled at selectedin-line inspection operations. Defects arerelated to yield using:

In-line defect density x Area scanned x # die tested/#die = Expected die loss scanned x scaling per waferfactor (kill rate)

An example of defect kill ratios based bothon defect size and classification is given inFigure 8-23. These types of charts are com-monly used in manufacturing to provide afocus on the top issues relating to yield loss.In this example, yield loss is manifested inpolysilicon shorts, scratches, general shorts,pattern defects, and source/drain shorts. Byfocusing on these top issues, the fab withlimited resources can improve yields fasterand more effectively.

AMD chose to measure yield impact againstparticles seen on real product. Once the aver-age defect levels for a piece of equipment aredetermined, the cost in potential yield is:

Yield = #particles x Kill rate



Once the loss due to the current tool set isdetermined, the engineer must estimate theloss associated with newer generation equip-ment, which may replace the existing tool. Acomparison is made by:

(Æ) Yield = (Æ) Particles * Kill rate

However, since kill rate is a function ofdefect size, the complete formula in die costsbecomes:

∆Savingsnew-old = ∆Particlesi × Kill Rateii=o

n∑

× Die Cost

i = Particle sizes

S/D Shorts PatternDefects

GeneralShorts

Scratches PolyShorts

Kill

ing

Rat

e (%

)

Defect Type

40

50

60

70

80

90

100

Kill

ing

Rat

e (%

)

0

20

40

60

80

100

0-1 2-3 4-5 10-20 50-100 500-1000 >5000

Defect Size (Square Microns)

19864Source: AMD/IEEE/SEMI

Figure 8-23. Yield Impact on Defect Size and Classification



The formula covers variables such as defectdensity, defect size, kill rates per defect size,and die cost. Frequently, however, defect killrates can be very dependent on the locationwithin a die, depending on whether thedefect is on active or field regions of the chip.The equation becomes:

To calculate overall savings, one uses theabove equation, the production run rate(wafers/week), and the price per chip pro-duced. Given:

Die size 0.47 cm2

Die/wafer: 150Active area 0.12 cm2

Price/die $10.00Run rate 250 wafers/week

The calculated cost saving is $11,668 perweek. This substantial saving must be addedto estimated savings resulting from improve-ments in line yield, maintenance costs, laborcosts, chemical consumption, and powerusage. When the saving is calculated, thequestion becomes, is the cost to purchase thenew equipment and increase in per waferprocessing costs, due to depreciation, offsetby the payback in improved yields? Ofcourse, the article warns that while thismodel will give a useful first-approximationof cost savings, other issues to consider in thepurchase of new equipment include:

¥ Determining if there is another dominantyield limiting step in the process, whichmore critically affects yield.

¥ The certainty or predictability factor of themodel developed and its application to allprocesses running in manufacturing.

¥ The degradation, over time, of chip price,which will lengthen pay-back periods, orthe changing of product mix before equip-ment is installed.

¥ The ability to apply new equipment toimprove the process at multiple opera-tions, causing benefits of new acquisitionsto go up.

¥ The numerous business issues includingROI, payback, and cost added from depre-ciation.

References

1. J.A. Chan, ÒResponse SurfaceMethodology Improves Batch RIEProcessing,Ó Semiconductor International,Mar. 1995, p.5.

2. B. Anderson, A. Berezin, and I. Emami,ÒDefect Density Reduction in TungstenDeposition and Etchback,Ó IEEE/SEMIAdvanced Semiconductor ManufacturingConference Proceedings, 1994, p. 279.

3. S. Tripathi, et. al., ÒComparison of theApplications of Process Simulations andFMEA: Two Case Studies,Ó IEEE/SEMIAdvanced Semiconductor ManufacturingConference Proceedings, 1994, p. 140.

4. S. Bilotta and D. Proctor, ÒDevelopmentof a Manufacturable Low PressureROXNOX Oxidation Process,ÓIEEE/SEMI Advanced SemiconductorManufacturing Conference Proceedings,1994, p. 39.

5. G. Actor, et al., ÒPartnering Works: ACase in Point,Ó IEEE/SEMI InternationalSemiconductor Manufacturing ScienceSymposium Proceedings, 1993, p. 74.

∆Savingsnew-old = ∆Particlesa,i × Kill Ratea,ii=o

n∑

a∑

× Die Cost

i = Particle sizes

a = defect' s die location



6. M. Moinpour, et al., ÒFactors Affectingthe Temperature Stability of APCVDSystems in a Rapidly ChangingSemiconductor ManufacturingEnvironment,Ó IEEE/SEMI InternationalSemiconductor Manufacturing SymposiumProceedings, 1993, p. 33.

7. N. Vedaa and M. Pakulski, ÒNewTechnology for Old Equipment,ÓIEEE/SEMI Advanced SemiconductorManufacturing Conference Proceedings,1994, p. 220.

8. S. Loffredo, "Need an Etcher Fast? TryUsed Gear Mart," Electronic BusinessBuyer, March, 1994, p. 36.

9. ÒHow to Help Bottom Line WithoutHurting Process Line,ÓMicrocontamination, Dec. 1993, p.10.

10. R. Burghard, D. Dance, and R. Markle,ÒReducing Ion-implant Equipment Costof Ownership Through In SituContamination Prevention andReduction,Ó Microcontamination, Sept.1992, p. 27.

11. B. Busselman, et al., ÒIn Situ ParticleMonitoring in a Single Wafer PolySilicon and Silicon Nitride Etch System,ÓIEEE/SEMI International SemiconductorManufacturing Science SymposiumProceedings, 1993, p. 20.

12. H.-D. Pham, M. Elzingre, and P. Borden,ÒLSI Logic Proves Yield Gain Using In-situ Monitor,Ó SemiconductorInternational, April 1995, p. 101.

13. G. Barna, et al., ÒDry Etch Processes andSensors,Ó Solid State Technology, January,1994, p. 47.

14. G. Barna, M. Moslehi, and Y.J. Lee,ÒSensor Needs for IC Manufacturing,ÓSolid State Technology, April 1994, p.57.

15. R. Iscoff, ÒIn-situ Deposition RateMonitoring for Thin Films,ÓSemiconductor International, Aug. 1994, p. 69.

16. M. McIntyre and J. Meitz, ÒApplyingYield Impact Models as a First Pass inUpgrade Decisions,Ó IEEE/SEMIAdvanced Semiconductor ManufacturingConference Proceedings, 1994, p. 147.

useful methods for improving equipment performance in manufacturing

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