VENDING MACHINE CONTROLLER IN VHDL

Team Members

Prijanma Anupriya Banerjee Harmeet soni

Project flow

What is VMC ? Technology and software(a)VHDL(b)FGPA kit Prototype Intro to VHDL Other application of VHDL

What is VMC ?

basic idea to dispence daily commodities without a cashier

used at airports from 1950's well into 1970's to sell life insurance policies in united states

Various usage of vending machines

Various usage of vending machines

3) The vending machine is totally based on different states, which we engineers used to call the state machine or FSM.

4) This project is based on this and it is for a cold drink i.e. it dispense the cold drink only after the customer puts money into this.

Technology used in VHDL

1)VMC is realized using VHDL 2)VHDL stands for V-VHSIC (very high

speed integrated circuit) & HDL stands for hardware descriptive language

Softwares Used Model sim 6.0a modelsim is a fantastic digital simulator for

both Verilog and VHDL hardware description languages

Xilinx tools The objective of the Xilinx is to take you

from design entry to verification of vhdl coding.

FPGA kiti) FPGA's function is defined by a user's

program rather than by the manufacturer of the device. it is atypical integrated circuit performs a particular function defined at the time of manufacture.

More about FPGA FPGA's function is defined by a user's program

rather than by the manufacturer of the device. This user programmability gives the user

access to complex integrated designs without the high engineering costs associated with application specific integrated circuits.

Depending on the particular device, the program is either 'burned' in permanently or semi-permanently as part of a board assembly process, or is loaded from an external memory each time the device is powered up.

The FPGA is an integrated circuit that contains many (64 to over 10,000) identical logic cells that can be viewed as standard components

Protoype of VMC

Design of a basic Vending machine controller

Introduction to VHDL it is a hardware descriptive language

that can be used to model a digital system at many level of abstraction ranging from the algoritm level to the gate level

language features : VHDL=sequential language +concurrent language+netlist language+timing specification+waveform generation language

History of VHDL

1982- US department of defence as part of its VHSIC program developed

1985:VHDL version 7.2 released 1987: language is transferred to

IEEE (IEEE std 1076 -1987) 1993 :an updated standard :IEEE

1164 was adopted (IEEE std 1164-1993)

Primary constructs of vhdl entity declaration architecture body package declaration package body