virtual memory ii - cs.jhu.eduphi/csf/slides/lecture-virtual-memory2.pdf · address space 1 virtual...
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Virtual Memory II
Philipp Koehn
11 November 2019
Philipp Koehn Computer Systems Fundamentals: Virtual Memory II 11 November 2019
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1Address Space
• Virtual memory size: N = 2n bytes
• Physical memory size: M = 2m bytes
• Page (block of memory): P = 2p bytes
• A virtual address can be encoded in n bits
Philipp Koehn Computer Systems Fundamentals: Virtual Memory II 11 November 2019
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2Address Translation
• Task: mapping virtual address to physical address
– virtual address (VA): used by machine code instructions
– physical address (PA): location in RAM
• FormallyMAP: VA → PA ∪ 0
where:MAP(A) = PA if in RAM
xxxxx = 0 otherwise
• Note: this happens very frequently in machine code
• We will do this in hardware: Memory Management Unit (MMU)
Philipp Koehn Computer Systems Fundamentals: Virtual Memory II 11 November 2019
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3Basic Architecture
page table base register
Virtual address
Physical address
Philipp Koehn Computer Systems Fundamentals: Virtual Memory II 11 November 2019
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4Basic Architecture
page table base register
Valid Physical page number
Virtual address
Physical address
Philipp Koehn Computer Systems Fundamentals: Virtual Memory II 11 November 2019
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5Basic Architecture
page table base register
virtual page number page offset
physical page number page offset
Valid Physical page number
Virtual address
Physical address
Philipp Koehn Computer Systems Fundamentals: Virtual Memory II 11 November 2019
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6Basic Architecture
page table base register
virtual page number page offset
physical page number page offset
Valid Physical page number
valid = 0?-> page fault
Virtual address
Physical address
Philipp Koehn Computer Systems Fundamentals: Virtual Memory II 11 November 2019
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7Page Hit
CPU MMU MemoryVA
CPU chip
Data
PTEAPTE
PA
• VA: CPU requests data at virtual address
• PTEA: look up page table entry in page table
• PTE: returns page table entry
• PA: get physical address from entry, look up in memory
• Data: returns data from memory to CPU
Philipp Koehn Computer Systems Fundamentals: Virtual Memory II 11 November 2019
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8Page Fault
CPU MMU MemoryVA
CPU chip
PTEAPTE
Page fault exception handlerException
Data• VA: CPU requests data at virtual address• PTEA: look up page table entry in page table• PTE: returns page table entry• Exception: page not in physical memory
Philipp Koehn Computer Systems Fundamentals: Virtual Memory II 11 November 2019
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9Page Fault
CPU MMU MemoryVA
CPU chip
PTEAPTE
Disk
Victim pageNew page
Page fault exception handlerException
Data• VA: CPU requests data at virtual address• PTEA: look up page table entry in page table• PTE: returns page table entry• Exception: page not in physical memory
• Page fault exception handler– victim page to disk– new page to memory– update page table entries
Philipp Koehn Computer Systems Fundamentals: Virtual Memory II 11 November 2019
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10Page Fault
CPU MMU MemoryVA
CPU chip
Data
PTEAPTE
PADisk
Victim pageNew page
Page fault exception handlerException
• VA: CPU requests data at virtual address• PTEA: look up page table entry in page table• PTE: returns page table entry• Exception: page not in physical memory
• Page fault exception handler– victim page to disk– new page to memory– update page table entries
• Re-do memory requestPhilipp Koehn Computer Systems Fundamentals: Virtual Memory II 11 November 2019
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11Page Miss Exception
• Complex task
– identify which page to remove from RAM (victim page)
– load page from disk to RAM
– update page table entry
– trigger do-over of instruction that caused exception
• Note
– loading into RAM very slow
– added complexity of handling in software no big deal
Philipp Koehn Computer Systems Fundamentals: Virtual Memory II 11 November 2019
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12Refinements
• On-CPU cache
→ integrate cache and virtual memory
• Slow look-up time
→ use translation lookahead buffer (TLB)
• Huge address space
→ multi-level page table
• Putting it all together
Philipp Koehn Computer Systems Fundamentals: Virtual Memory II 11 November 2019
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13Refinements
• On-CPU cache
→ integrate cache and virtual memory
• Slow look-up time
→ use translation lookahead buffer (TLB)
• Huge address space
→ multi-level page table
• Putting it all together
Philipp Koehn Computer Systems Fundamentals: Virtual Memory II 11 November 2019
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14Integrating Caches and Virtual Memory
• Note
– we claim that using on-disk memory is too slow
– having data in RAM only practical solution
• Recall
– we previously claimed that using RAM is too slow
– having data in cache only practical solution
• Both true, so we need to combine
Philipp Koehn Computer Systems Fundamentals: Virtual Memory II 11 November 2019
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15Integrating Caches and Virtual Memory
CPU MMUL1
CacheVA
CPU chip
Data
PTEAPTE
PADRAM
• MMU resolves virtual address to physical address
• Physical address is checked against cache
Philipp Koehn Computer Systems Fundamentals: Virtual Memory II 11 November 2019
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16Integrating Caches and Virtual Memory
CPU MMUL1
CacheVA
CPU chip
Data
PTEAPTE
PADRAM
PTEAPTE
miss?
• Cache miss in page table retrieval?
⇒ Get page table from memory
Philipp Koehn Computer Systems Fundamentals: Virtual Memory II 11 November 2019
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17Integrating Caches and Virtual Memory
CPU MMUL1
CacheVA
CPU chip
Data
PTEAPTE
PADRAM
PTEAPTE
PAData
miss?
miss?
• Cache miss in data retrieval?
⇒ Get data from memory
Philipp Koehn Computer Systems Fundamentals: Virtual Memory II 11 November 2019
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18Refinements
• On-CPU cache
→ integrate cache and virtual memory
• Slow look-up time
→ use translation lookahead buffer (TLB)
• Huge address space
→ multi-level page table
• Putting it all together
Philipp Koehn Computer Systems Fundamentals: Virtual Memory II 11 November 2019
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19Look-Ups
• Every memory-related instruction must pass through MMU(virtual memory look-up)
• Very frequent, this has to be very fast
• Locality to the rescue
– subsequent look-ups in same area of memory
– look-up for a page can be cached
Philipp Koehn Computer Systems Fundamentals: Virtual Memory II 11 November 2019
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20Translation Lookup Buffer
• Same structure as cache
• Break up address into 3 parts
– lowest bits: offset in page
– middle bits: index (location) in cache
– highest bits: tag in cache
• Associative cache: more than one entry per index
Philipp Koehn Computer Systems Fundamentals: Virtual Memory II 11 November 2019
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21Architecture
CPU MMU MemoryVA
CPU chip
Data
PA
TLB
• Translation lookup buffer (TLB) on CPU chip
Philipp Koehn Computer Systems Fundamentals: Virtual Memory II 11 November 2019
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22Translation Lookup Buffer (TLB) Hit
CPU MMU MemoryVA
CPU chip
Data
PA
TLB
PTEA PTE
• Look up page table entry in TLB
Philipp Koehn Computer Systems Fundamentals: Virtual Memory II 11 November 2019
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23Translation Lookup Buffer (TLB) Miss
CPU MMU MemoryVA
CPU chip
Data
PTEPTEA
PA
TLB
PTEA
• Page table entry not in TLB
• Retrieve page table entry from RAM
Philipp Koehn Computer Systems Fundamentals: Virtual Memory II 11 November 2019
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24Refinements
• On-CPU cache
→ integrate cache and virtual memory
• Slow look-up time
→ use translation lookahead buffer (TLB)
• Huge address space
→ multi-level page table
• Putting it all together
Philipp Koehn Computer Systems Fundamentals: Virtual Memory II 11 November 2019
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25Page Table Size
• Example
– 32 bit address space: 4GB
– Page size: 4KB
– Size of page table entry: 4 bytes
→ Number of pages: 1M
→ Size of page table: 4MB
• Recall: one page table per process
• Very wasteful: most of the address space is not used
Philipp Koehn Computer Systems Fundamentals: Virtual Memory II 11 November 2019
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262-Level Page Table
L2 PT 0L2 PT 1
nullnullnull
Valid Level 2 page table
Level 1page table
nullnullnull
L2 PT 8nullnull
PTE 0
PTE 1023
Valid Physical page
Level 2page table
Physicalmemory
PTE 0
PTE 1023
Valid Physical page
PTE 1023
Valid Physical page
Philipp Koehn Computer Systems Fundamentals: Virtual Memory II 11 November 2019
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27Multi-Level Page Table
• Our example: 1M entries
• 2-level page table
→ each level 1K entry (1K2=1M)
• 4-level page table
→ each level 32 entry (324=1M)
Philipp Koehn Computer Systems Fundamentals: Virtual Memory II 11 November 2019
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28Refinements
• On-CPU cache
→ integrate cache and virtual memory
• Slow look-up time
→ use translation lookahead buffer (TLB)
• Huge address space
→ multi-level page table
• Putting it all together
Philipp Koehn Computer Systems Fundamentals: Virtual Memory II 11 November 2019
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29Virtual Address
CPU
VPN VPO
TLBT TLBI
…TLB
PPN PPOVPN1 VPN2 VPN3 VPN4
PTEPTEPTEPTE
CR3
CT CI CO
…L1 Cache
Data RAM
L1 hit L1 miss
TLB hitTLB miss
Virtual address
Philipp Koehn Computer Systems Fundamentals: Virtual Memory II 11 November 2019
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30Translation Lookup Buffer
CPU
VPN VPO
TLBT TLBI
…TLB
PPN PPOVPN1 VPN2 VPN3 VPN4
PTEPTEPTEPTE
CR3
CT CI CO
…L1 Cache
Data RAM
L1 hit L1 miss
TLB hitTLB miss
Virtual address
Philipp Koehn Computer Systems Fundamentals: Virtual Memory II 11 November 2019
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31Compose Address
CPU
VPN VPO
TLBT TLBI
…TLB
PPN PPOVPN1 VPN2 VPN3 VPN4
PTEPTEPTEPTE
CR3
CT CI CO
…L1 Cache
Data RAM
L1 hit L1 miss
TLB hitTLB miss
Virtual address
Philipp Koehn Computer Systems Fundamentals: Virtual Memory II 11 November 2019
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32L1 Cache Lookup
CPU
VPN VPO
TLBT TLBI
…TLB
PPN PPOVPN1 VPN2 VPN3 VPN4
PTEPTEPTEPTE
CR3
CT CI CO
…L1 Cache
Data RAM
L1 hit L1 miss
TLB hitTLB miss
Virtual address
Philipp Koehn Computer Systems Fundamentals: Virtual Memory II 11 November 2019
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33Return Data From L1 Cache
CPU
VPN VPO
TLBT TLBI
…TLB
PPN PPOVPN1 VPN2 VPN3 VPN4
PTEPTEPTEPTE
CR3
CT CI CO
…L1 Cache
Data RAM
L1 hit L1 miss
TLB hitTLB miss
Virtual address
Philipp Koehn Computer Systems Fundamentals: Virtual Memory II 11 November 2019
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34Translation Lookup Buffer Miss
CPU
VPN VPO
TLBT TLBI
…TLB
PPN PPOVPN1 VPN2 VPN3 VPN4
PTEPTEPTEPTE
CR3
CT CI CO
…L1 Cache
Data RAM
L1 hit L1 miss
TLB hitTLB miss
Virtual address
Philipp Koehn Computer Systems Fundamentals: Virtual Memory II 11 November 2019
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35L1 Cache Miss
CPU
VPN VPO
TLBT TLBI
…TLB
PPN PPOVPN1 VPN2 VPN3 VPN4
PTEPTEPTEPTE
CR3
CT CI CO
…L1 Cache
Data RAM
L1 hit L1 miss
TLB hitTLB miss
Virtual address
Philipp Koehn Computer Systems Fundamentals: Virtual Memory II 11 November 2019
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36
core i7
Philipp Koehn Computer Systems Fundamentals: Virtual Memory II 11 November 2019
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37Chip Layout
L1 data cache32 KB, 8-way
L1 instruction cache32 KB, 8-way
L2 unified cache256 KB, 8-way
Registers Instructionfetch
L1 data TLB64 entries, 4-way
L1 instruction TLB128 entries, 4-way
MMU(address translation)
L2 unified TLB512 entries, 4-way
L3 unified cache8 MB, 16-way
(shared by all cores)
DDR3 memory controller
(shared by all cores)
DDR3 memory
Single Core
Chip with 4 cores
Philipp Koehn Computer Systems Fundamentals: Virtual Memory II 11 November 2019
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38Sizes
• Virtual memory: 48 bit (→ 248 = 256TB address space)
• Physical memory: 52 bit (→ 252 = 4PB address space)
• Page size: 12 bit (→ 212 = 4KB)
⇒ 236 = 64G entries, split in 4 levels (512 entries each)
• Translation lookup buffer (TLB): 4-way associative, 16 entries
• L1 cache: 8-way associative, 64 sets, 64 byte blocks (32 KB)
• L2 cache: 8-way associative, 512 sets, 64 byte blocks (256 KB)
• L3 cache: 16-way associative, 8K sets, 64 byte blocks (8 MB)
Philipp Koehn Computer Systems Fundamentals: Virtual Memory II 11 November 2019
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39
linux
Philipp Koehn Computer Systems Fundamentals: Virtual Memory II 11 November 2019
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40Big Picture
• Close co-operation between hardware and software
• Each process has its own virtual address space, page table
• Translation look-up bufferwhen switching processes → flush
• Page tablewhen switching processes → update pointer to top-level page table
• Page tables are always in physical memory→ pointers to page table do not require translation
Philipp Koehn Computer Systems Fundamentals: Virtual Memory II 11 November 2019
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41Handling Page Faults
• Page faults trigger an exception (hardware)
• Exception is handled by software (Linux kernel)
• Kernel must determine what to do
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42Linux Virtual Memory Areas
mm pgd
mmap
vm_endvm_startvm_protvm_flags
vm_next
vm_endvm_startvm_protvm_flags
vm_next
vm_endvm_startvm_protvm_flags
vm_next Shared Libraries
Data
Textvm_endvm_startvm_protvm_flags
vm_next
task_struct mm_struct vm_area_struct Process VM
• pgd: address of page table
• vm flags: private, shared
• vm prot: read, write
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43Handling Page Faults
vm_endvm_startvm_protvm_flags
vm_next
vm_endvm_startvm_protvm_flags
vm_next
vm_endvm_startvm_protvm_flags
vm_next Shared Libraries
Data
Textvm_endvm_startvm_protvm_flags
vm_next
vm_area_struct Process VM
Segmentation fault
Normal page fault(-> load page)
Protection exception(if write)
Kernel walks through vm area struct list to resolve page fault
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44
memory mapping
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45Objects on Disk
• Area of virtual memory = file on disk
• Regular file in file system
– file divided up into pages
– demand loading: just mapped to addresses, not actually loaded
– could be code, shared library, data file
• Anonymous file
– typically allocated memory
– when used for the first time: set all values to zero
– never really on disk, except when swapped out
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46Shared Object
• A shared object is a file on disk
• Private object
– only its process can read/write
– changes not visible to other processes
• Shared object
– multiple processes can read/write
– changes visible to other processes
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47fork()
• Creates a new child process
• Copies all
– virtual memory area structures
– memory mapping structures
– page tables
• New process has identical accessto existing memory
User stack
Memory-mapped region for shared libraries
Run time heap (created by malloc)
Read/write segment (.data / .bss)
Read-only code segment (.init, .text., .rodata)
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48execve()
• Creates a new process
• Deletes all user areas
• Map private areas (.data, .code, .bss)
• Map shared libraries
• Set program counter
User stack
Memory-mapped region for shared libraries
Run time heap (created by malloc)
Read/write segment (.data / .bss)
Read-only code segment (.init, .text., .rodata)
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49User-Level Memory Mapping
• Process can create virtual memory areas with mmap(may be loaded from file)
• Protection options (handled by kernel / hardware)– executable code
– read
– write
– inaccessible
• Mapping options– anonymous: data object initially zeroed out
– private
– shared
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50
dynamic memory allocation
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51Memory Allocation in C
• malloc()
– allocate specified amount of data
– return pointer to (virtual) address
– memory is allocated on heap
• free()
– frees memory allocated at pointer location
– may be between other allocated memory
• Need to track of list of allocated memory
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52Example
p1 = malloc(4*sizeof(int))
p1
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53Example
p1 = malloc(4*sizeof(int))
p2 = malloc(5*sizeof(int))
p1
p1 p2
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54Example
p1 = malloc(4*sizeof(int))
p2 = malloc(5*sizeof(int))
p3 = malloc(6*sizeof(int))
p1
p1 p2
p1 p2 p3
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55Example
p1 = malloc(4*sizeof(int))
p2 = malloc(5*sizeof(int))
p3 = malloc(6*sizeof(int))
free(p2)
p1
p1 p2
p1 p2 p3
p1 p3
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56Example
p1 = malloc(4*sizeof(int))
p2 = malloc(5*sizeof(int))
p3 = malloc(6*sizeof(int))
free(p2)
p4 = malloc(2*sizeof(int))
p1
p1 p2
p1 p2 p3
p1 p3
p1 p3p4
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57Issues
• Memory fragmentation
– internal: frequent malloc() and free() creates
internal: fragmented memory use
– external: new malloc() exceeds heap space → is split
• Free list
– need to maintain a list of free memory areas
– implicit: space between allocated memory
– explicit: maintain a separate list
Philipp Koehn Computer Systems Fundamentals: Virtual Memory II 11 November 2019