vlsi transmission gates
TRANSCRIPT
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Transmission Gates
Prof. Jagannadha Naidu K
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Pass-Transistor Logic
Inp
uts
Switch
Network
Out
Out
A
B
B
B
N transistors
No static consumption
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Example: AND Gate
B
B
F=AB
0
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NMOS-Only Logic
VDD
In
Out
x
0.5m/0.25m
0.5m/0.25m
1.5m/0.25m
0 0.5 1 1.5 20.0
1.0
2.0
3.0
Time [ns]
Voltage
[V
]
x
Out
In
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NMOS-only Switch
A = 2.5 V
B
C = 2.5V
CL
A = 2.5 V
C = 2.5 V
B
M2
M1
Mn
Threshold voltage loss causes
static power consumption
VBdoes not pull up to 2.5V, but 2.5V - VTN
NMO has higher threshold than !MO "bod# e$$ect%
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NMOS Only Logic:Leel !estoring Transistor
M2
M1
Mn
Mr
OutA
B
VDDVDDLevel Restorer
X
Advantage: Full Swing
Restorer adds capacitance, taes awa! pull down current at "
Ratio pro#le$
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"omplementary Pass Transistor Logic
A
B
A
B
B B B B
A
B
A
B
F=AB
F=AB
F=A+B
F=A+B
B B
A
A
A
A
F=A
F=A
OR!NOR "XOR!N"XORAND!NAND
F
F
#$ss%&r$nsistor
Network
#$ss%&r$nsistor
Network
A
ABB
A
ABB
'nverse
($)
(*)
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Transmission Gate
A B
C
C
A B
C
C
B
CL
C= 0 V
A = 2.5 V
C = 2.5 V
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!esistance o# Transmission Gate
Vout
0 V
2.5 V
2.5 VR
n
Rp
0 . 0 1 . 0 2 .00
1 0
2 0
3 0
Vout
V
!esistan"eohms
Rn
Rp
Rn
## Rp
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Pass-Transistor $ase% M<iplexer
AM2
M1
B
S
S
S F
VDD
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Transmission Gate 'O!
A
B
F
B
A
B
BM1
M2
M3/M4
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Transmission Gate (&ll A%%er
A
B
P
Ci
VDDA
A A
VDD
Ci
A
P
AB
VDD
VDD
Ci
Ci
Co
S
Ci
P
P
P
P
P
Su+ ,ener$tion
-$rr. ,ener$tion
Setu/
Similar delays for sum and carry